powerpc/4xx: Fix resource issue in warp-nand.c
[linux-2.6] / arch / powerpc / platforms / 44x / warp-nand.c
1 /*
2  * PIKA Warp(tm) NAND flash specific routines
3  *
4  * Copyright (c) 2008 PIKA Technologies
5  *   Sean MacLennan <smaclennan@pikatech.com>
6  */
7
8 #include <linux/platform_device.h>
9 #include <linux/mtd/mtd.h>
10 #include <linux/mtd/map.h>
11 #include <linux/mtd/partitions.h>
12 #include <linux/mtd/nand.h>
13 #include <linux/mtd/ndfc.h>
14 #include <linux/of.h>
15 #include <asm/machdep.h>
16
17
18 #ifdef CONFIG_MTD_NAND_NDFC
19
20 #define CS_NAND_0       1       /* use chip select 1 for NAND device 0 */
21
22 #define WARP_NAND_FLASH_REG_ADDR        0xD0000000UL
23 #define WARP_NAND_FLASH_REG_SIZE        0x2000
24
25 static struct resource warp_ndfc = {
26         .start = WARP_NAND_FLASH_REG_ADDR,
27         .end   = WARP_NAND_FLASH_REG_ADDR + WARP_NAND_FLASH_REG_SIZE,
28         .flags = IORESOURCE_MEM,
29 };
30
31 static struct mtd_partition nand_parts[] = {
32         {
33                 .name   = "kernel",
34                 .offset = 0,
35                 .size   = 0x0200000
36         },
37         {
38                 .name   = "root",
39                 .offset = 0x0200000,
40                 .size   = 0x3E00000
41         },
42         {
43                 .name   = "persistent",
44                 .offset = 0x4000000,
45                 .size   = 0x4000000
46         },
47         {
48                 .name   = "persistent1",
49                 .offset = 0x8000000,
50                 .size   = 0x4000000
51         },
52         {
53                 .name   = "persistent2",
54                 .offset = 0xC000000,
55                 .size   = 0x4000000
56         }
57 };
58
59 struct ndfc_controller_settings warp_ndfc_settings = {
60         .ccr_settings = (NDFC_CCR_BS(CS_NAND_0) | NDFC_CCR_ARAC1),
61         .ndfc_erpn = 0,
62 };
63
64 static struct ndfc_chip_settings warp_chip0_settings = {
65         .bank_settings = 0x80002222,
66 };
67
68 struct platform_nand_ctrl warp_nand_ctrl = {
69         .priv = &warp_ndfc_settings,
70 };
71
72 static struct platform_device warp_ndfc_device = {
73         .name = "ndfc-nand",
74         .id = 0,
75         .dev = {
76                 .platform_data = &warp_nand_ctrl,
77         },
78         .num_resources = 1,
79         .resource = &warp_ndfc,
80 };
81
82 /* Do NOT set the ecclayout: let it default so it is correct for both
83  * 64M and 256M flash chips.
84  */
85 static struct platform_nand_chip warp_nand_chip0 = {
86         .nr_chips = 1,
87         .chip_offset = CS_NAND_0,
88         .nr_partitions = ARRAY_SIZE(nand_parts),
89         .partitions = nand_parts,
90         .chip_delay = 20,
91         .priv = &warp_chip0_settings,
92 };
93
94 static struct platform_device warp_nand_device = {
95         .name = "ndfc-chip",
96         .id = 0,
97         .num_resources = 0,
98         .dev = {
99                 .platform_data = &warp_nand_chip0,
100                 .parent = &warp_ndfc_device.dev,
101         }
102 };
103
104 static int warp_setup_nand_flash(void)
105 {
106         struct device_node *np;
107
108         /* Try to detect a rev A based on NOR size. */
109         np = of_find_compatible_node(NULL, NULL, "cfi-flash");
110         if (np) {
111                 struct property *pp;
112
113                 pp = of_find_property(np, "reg", NULL);
114                 if (pp && (pp->length == 12)) {
115                         u32 *v = pp->value;
116                         if (v[2] == 0x4000000)
117                                 /* Rev A = 64M NAND */
118                                 warp_nand_chip0.nr_partitions = 2;
119                 }
120                 of_node_put(np);
121         }
122
123         platform_device_register(&warp_ndfc_device);
124         platform_device_register(&warp_nand_device);
125
126         return 0;
127 }
128 machine_device_initcall(warp, warp_setup_nand_flash);
129
130 #endif