Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc
[linux-2.6] / arch / powerpc / platforms / cell / setup.c
1 /*
2  *  linux/arch/powerpc/platforms/cell/cell_setup.c
3  *
4  *  Copyright (C) 1995  Linus Torvalds
5  *  Adapted from 'alpha' version by Gary Thomas
6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
7  *  Modified by PPC64 Team, IBM Corp
8  *  Modified by Cell Team, IBM Deutschland Entwicklung GmbH
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License
12  * as published by the Free Software Foundation; either version
13  * 2 of the License, or (at your option) any later version.
14  */
15 #undef DEBUG
16
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/slab.h>
23 #include <linux/user.h>
24 #include <linux/reboot.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/irq.h>
28 #include <linux/seq_file.h>
29 #include <linux/root_dev.h>
30 #include <linux/console.h>
31 #include <linux/mutex.h>
32 #include <linux/memory_hotplug.h>
33
34 #include <asm/mmu.h>
35 #include <asm/processor.h>
36 #include <asm/io.h>
37 #include <asm/kexec.h>
38 #include <asm/pgtable.h>
39 #include <asm/prom.h>
40 #include <asm/rtas.h>
41 #include <asm/pci-bridge.h>
42 #include <asm/iommu.h>
43 #include <asm/dma.h>
44 #include <asm/machdep.h>
45 #include <asm/time.h>
46 #include <asm/nvram.h>
47 #include <asm/cputable.h>
48 #include <asm/ppc-pci.h>
49 #include <asm/irq.h>
50 #include <asm/spu.h>
51 #include <asm/spu_priv1.h>
52 #include <asm/udbg.h>
53 #include <asm/mpic.h>
54 #include <asm/of_platform.h>
55
56 #include "interrupt.h"
57 #include "cbe_regs.h"
58 #include "pervasive.h"
59 #include "ras.h"
60
61 #ifdef DEBUG
62 #define DBG(fmt...) udbg_printf(fmt)
63 #else
64 #define DBG(fmt...)
65 #endif
66
67 static void cell_show_cpuinfo(struct seq_file *m)
68 {
69         struct device_node *root;
70         const char *model = "";
71
72         root = of_find_node_by_path("/");
73         if (root)
74                 model = get_property(root, "model", NULL);
75         seq_printf(m, "machine\t\t: CHRP %s\n", model);
76         of_node_put(root);
77 }
78
79 static void cell_progress(char *s, unsigned short hex)
80 {
81         printk("*** %04x : %s\n", hex, s ? s : "");
82 }
83
84 static int __init cell_publish_devices(void)
85 {
86         if (!machine_is(cell))
87                 return 0;
88
89         /* Publish OF platform devices for southbridge IOs */
90         of_platform_bus_probe(NULL, NULL, NULL);
91
92         return 0;
93 }
94 device_initcall(cell_publish_devices);
95
96 static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
97 {
98         struct mpic *mpic = desc->handler_data;
99         unsigned int virq;
100
101         virq = mpic_get_one_irq(mpic);
102         if (virq != NO_IRQ)
103                 generic_handle_irq(virq);
104         desc->chip->eoi(irq);
105 }
106
107 static void __init mpic_init_IRQ(void)
108 {
109         struct device_node *dn;
110         struct mpic *mpic;
111         unsigned int virq;
112
113         for (dn = NULL;
114              (dn = of_find_node_by_name(dn, "interrupt-controller"));) {
115                 if (!device_is_compatible(dn, "CBEA,platform-open-pic"))
116                         continue;
117
118                 /* The MPIC driver will get everything it needs from the
119                  * device-tree, just pass 0 to all arguments
120                  */
121                 mpic = mpic_alloc(dn, 0, 0, 0, 0, " MPIC     ");
122                 if (mpic == NULL)
123                         continue;
124                 mpic_init(mpic);
125
126                 virq = irq_of_parse_and_map(dn, 0);
127                 if (virq == NO_IRQ)
128                         continue;
129
130                 printk(KERN_INFO "%s : hooking up to IRQ %d\n",
131                        dn->full_name, virq);
132                 set_irq_data(virq, mpic);
133                 set_irq_chained_handler(virq, cell_mpic_cascade);
134         }
135 }
136
137
138 static void __init cell_init_irq(void)
139 {
140         iic_init_IRQ();
141         spider_init_IRQ();
142         mpic_init_IRQ();
143 }
144
145 static void __init cell_setup_arch(void)
146 {
147 #ifdef CONFIG_SPU_BASE
148         spu_priv1_ops = &spu_priv1_mmio_ops;
149         spu_management_ops = &spu_management_of_ops;
150 #endif
151
152         cbe_regs_init();
153
154 #ifdef CONFIG_CBE_RAS
155         cbe_ras_init();
156 #endif
157
158 #ifdef CONFIG_SMP
159         smp_init_cell();
160 #endif
161         /* init to some ~sane value until calibrate_delay() runs */
162         loops_per_jiffy = 50000000;
163
164         if (ROOT_DEV == 0) {
165                 printk("No ramdisk, default root is /dev/hda2\n");
166                 ROOT_DEV = Root_HDA2;
167         }
168
169         /* Find and initialize PCI host bridges */
170         init_pci_config_tokens();
171         find_and_init_phbs();
172         cbe_pervasive_init();
173 #ifdef CONFIG_DUMMY_CONSOLE
174         conswitchp = &dummy_con;
175 #endif
176
177         mmio_nvram_init();
178 }
179
180 static int __init cell_probe(void)
181 {
182         unsigned long root = of_get_flat_dt_root();
183
184         if (!of_flat_dt_is_compatible(root, "IBM,CBEA") &&
185             !of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
186                 return 0;
187
188         hpte_init_native();
189
190         return 1;
191 }
192
193 /*
194  * Cell has no legacy IO; anything calling this function has to
195  * fail or bad things will happen
196  */
197 static int cell_check_legacy_ioport(unsigned int baseport)
198 {
199         return -ENODEV;
200 }
201
202 define_machine(cell) {
203         .name                   = "Cell",
204         .probe                  = cell_probe,
205         .setup_arch             = cell_setup_arch,
206         .show_cpuinfo           = cell_show_cpuinfo,
207         .restart                = rtas_restart,
208         .power_off              = rtas_power_off,
209         .halt                   = rtas_halt,
210         .get_boot_time          = rtas_get_boot_time,
211         .get_rtc_time           = rtas_get_rtc_time,
212         .set_rtc_time           = rtas_set_rtc_time,
213         .calibrate_decr         = generic_calibrate_decr,
214         .check_legacy_ioport    = cell_check_legacy_ioport,
215         .progress               = cell_progress,
216         .init_IRQ               = cell_init_irq,
217         .pci_setup_phb          = rtas_setup_phb,
218 #ifdef CONFIG_KEXEC
219         .machine_kexec          = default_machine_kexec,
220         .machine_kexec_prepare  = default_machine_kexec_prepare,
221         .machine_crash_shutdown = default_machine_crash_shutdown,
222 #endif
223 };