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   1 /*
   2  * arch/arm/mach-at91/at91sam9260_devices.c
   3  *
   4  *  Copyright (C) 2006 Atmel
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12 #include <asm/mach/arch.h>
  13 #include <asm/mach/map.h>
  14
  15 #include <linux/dma-mapping.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/i2c-gpio.h>
  18
  19 #include <asm/arch/board.h>
  20 #include <asm/arch/gpio.h>
  21 #include <asm/arch/cpu.h>
  22 #include <asm/arch/at91sam9260.h>
  23 #include <asm/arch/at91sam9260_matrix.h>
  24 #include <asm/arch/at91sam9_smc.h>
  25
  26 #include "generic.h"
  27
  28
  29 /* --------------------------------------------------------------------
  30  *  USB Host
  31  * -------------------------------------------------------------------- */
  32
  33 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  34 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  35 static struct at91_usbh_data usbh_data;
  36
  37 static struct resource usbh_resources[] = {
  38         [0] = {
  39                 .start  = AT91SAM9260_UHP_BASE,
  40                 .end    = AT91SAM9260_UHP_BASE + SZ_1M - 1,
  41                 .flags  = IORESOURCE_MEM,
  42         },
  43         [1] = {
  44                 .start  = AT91SAM9260_ID_UHP,
  45                 .end    = AT91SAM9260_ID_UHP,
  46                 .flags  = IORESOURCE_IRQ,
  47         },
  48 };
  49
  50 static struct platform_device at91_usbh_device = {
  51         .name           = "at91_ohci",
  52         .id             = -1,
  53         .dev            = {
  54                                 .dma_mask               = &ohci_dmamask,
  55                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  56                                 .platform_data          = &usbh_data,
  57         },
  58         .resource       = usbh_resources,
  59         .num_resources  = ARRAY_SIZE(usbh_resources),
  60 };
  61
  62 void __init at91_add_device_usbh(struct at91_usbh_data *data)
  63 {
  64         if (!data)
  65                 return;
  66
  67         usbh_data = *data;
  68         platform_device_register(&at91_usbh_device);
  69 }
  70 #else
  71 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  72 #endif
  73
  74
  75 /* --------------------------------------------------------------------
  76  *  USB Device (Gadget)
  77  * -------------------------------------------------------------------- */
  78
  79 #ifdef CONFIG_USB_GADGET_AT91
  80 static struct at91_udc_data udc_data;
  81
  82 static struct resource udc_resources[] = {
  83         [0] = {
  84                 .start  = AT91SAM9260_BASE_UDP,
  85                 .end    = AT91SAM9260_BASE_UDP + SZ_16K - 1,
  86                 .flags  = IORESOURCE_MEM,
  87         },
  88         [1] = {
  89                 .start  = AT91SAM9260_ID_UDP,
  90                 .end    = AT91SAM9260_ID_UDP,
  91                 .flags  = IORESOURCE_IRQ,
  92         },
  93 };
  94
  95 static struct platform_device at91_udc_device = {
  96         .name           = "at91_udc",
  97         .id             = -1,
  98         .dev            = {
  99                                 .platform_data          = &udc_data,
 100         },
 101         .resource       = udc_resources,
 102         .num_resources  = ARRAY_SIZE(udc_resources),
 103 };
 104
 105 void __init at91_add_device_udc(struct at91_udc_data *data)
 106 {
 107         if (!data)
 108                 return;
 109
 110         if (data->vbus_pin) {
 111                 at91_set_gpio_input(data->vbus_pin, 0);
 112                 at91_set_deglitch(data->vbus_pin, 1);
 113         }
 114
 115         /* Pullup pin is handled internally by USB device peripheral */
 116
 117         udc_data = *data;
 118         platform_device_register(&at91_udc_device);
 119 }
 120 #else
 121 void __init at91_add_device_udc(struct at91_udc_data *data) {}
 122 #endif
 123
 124
 125 /* --------------------------------------------------------------------
 126  *  Ethernet
 127  * -------------------------------------------------------------------- */
 128
 129 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 130 static u64 eth_dmamask = DMA_BIT_MASK(32);
 131 static struct at91_eth_data eth_data;
 132
 133 static struct resource eth_resources[] = {
 134         [0] = {
 135                 .start  = AT91SAM9260_BASE_EMAC,
 136                 .end    = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
 137                 .flags  = IORESOURCE_MEM,
 138         },
 139         [1] = {
 140                 .start  = AT91SAM9260_ID_EMAC,
 141                 .end    = AT91SAM9260_ID_EMAC,
 142                 .flags  = IORESOURCE_IRQ,
 143         },
 144 };
 145
 146 static struct platform_device at91sam9260_eth_device = {
 147         .name           = "macb",
 148         .id             = -1,
 149         .dev            = {
 150                                 .dma_mask               = &eth_dmamask,
 151                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 152                                 .platform_data          = &eth_data,
 153         },
 154         .resource       = eth_resources,
 155         .num_resources  = ARRAY_SIZE(eth_resources),
 156 };
 157
 158 void __init at91_add_device_eth(struct at91_eth_data *data)
 159 {
 160         if (!data)
 161                 return;
 162
 163         if (data->phy_irq_pin) {
 164                 at91_set_gpio_input(data->phy_irq_pin, 0);
 165                 at91_set_deglitch(data->phy_irq_pin, 1);
 166         }
 167
 168         /* Pins used for MII and RMII */
 169         at91_set_A_periph(AT91_PIN_PA19, 0);    /* ETXCK_EREFCK */
 170         at91_set_A_periph(AT91_PIN_PA17, 0);    /* ERXDV */
 171         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERX0 */
 172         at91_set_A_periph(AT91_PIN_PA15, 0);    /* ERX1 */
 173         at91_set_A_periph(AT91_PIN_PA18, 0);    /* ERXER */
 174         at91_set_A_periph(AT91_PIN_PA16, 0);    /* ETXEN */
 175         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ETX0 */
 176         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ETX1 */
 177         at91_set_A_periph(AT91_PIN_PA21, 0);    /* EMDIO */
 178         at91_set_A_periph(AT91_PIN_PA20, 0);    /* EMDC */
 179
 180         if (!data->is_rmii) {
 181                 at91_set_B_periph(AT91_PIN_PA28, 0);    /* ECRS */
 182                 at91_set_B_periph(AT91_PIN_PA29, 0);    /* ECOL */
 183                 at91_set_B_periph(AT91_PIN_PA25, 0);    /* ERX2 */
 184                 at91_set_B_periph(AT91_PIN_PA26, 0);    /* ERX3 */
 185                 at91_set_B_periph(AT91_PIN_PA27, 0);    /* ERXCK */
 186                 at91_set_B_periph(AT91_PIN_PA23, 0);    /* ETX2 */
 187                 at91_set_B_periph(AT91_PIN_PA24, 0);    /* ETX3 */
 188                 at91_set_B_periph(AT91_PIN_PA22, 0);    /* ETXER */
 189         }
 190
 191         eth_data = *data;
 192         platform_device_register(&at91sam9260_eth_device);
 193 }
 194 #else
 195 void __init at91_add_device_eth(struct at91_eth_data *data) {}
 196 #endif
 197
 198
 199 /* --------------------------------------------------------------------
 200  *  MMC / SD
 201  * -------------------------------------------------------------------- */
 202
 203 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 204 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 205 static struct at91_mmc_data mmc_data;
 206
 207 static struct resource mmc_resources[] = {
 208         [0] = {
 209                 .start  = AT91SAM9260_BASE_MCI,
 210                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
 211                 .flags  = IORESOURCE_MEM,
 212         },
 213         [1] = {
 214                 .start  = AT91SAM9260_ID_MCI,
 215                 .end    = AT91SAM9260_ID_MCI,
 216                 .flags  = IORESOURCE_IRQ,
 217         },
 218 };
 219
 220 static struct platform_device at91sam9260_mmc_device = {
 221         .name           = "at91_mci",
 222         .id             = -1,
 223         .dev            = {
 224                                 .dma_mask               = &mmc_dmamask,
 225                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 226                                 .platform_data          = &mmc_data,
 227         },
 228         .resource       = mmc_resources,
 229         .num_resources  = ARRAY_SIZE(mmc_resources),
 230 };
 231
 232 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 233 {
 234         if (!data)
 235                 return;
 236
 237         /* input/irq */
 238         if (data->det_pin) {
 239                 at91_set_gpio_input(data->det_pin, 1);
 240                 at91_set_deglitch(data->det_pin, 1);
 241         }
 242         if (data->wp_pin)
 243                 at91_set_gpio_input(data->wp_pin, 1);
 244         if (data->vcc_pin)
 245                 at91_set_gpio_output(data->vcc_pin, 0);
 246
 247         /* CLK */
 248         at91_set_A_periph(AT91_PIN_PA8, 0);
 249
 250         if (data->slot_b) {
 251                 /* CMD */
 252                 at91_set_B_periph(AT91_PIN_PA1, 1);
 253
 254                 /* DAT0, maybe DAT1..DAT3 */
 255                 at91_set_B_periph(AT91_PIN_PA0, 1);
 256                 if (data->wire4) {
 257                         at91_set_B_periph(AT91_PIN_PA5, 1);
 258                         at91_set_B_periph(AT91_PIN_PA4, 1);
 259                         at91_set_B_periph(AT91_PIN_PA3, 1);
 260                 }
 261         } else {
 262                 /* CMD */
 263                 at91_set_A_periph(AT91_PIN_PA7, 1);
 264
 265                 /* DAT0, maybe DAT1..DAT3 */
 266                 at91_set_A_periph(AT91_PIN_PA6, 1);
 267                 if (data->wire4) {
 268                         at91_set_A_periph(AT91_PIN_PA9, 1);
 269                         at91_set_A_periph(AT91_PIN_PA10, 1);
 270                         at91_set_A_periph(AT91_PIN_PA11, 1);
 271                 }
 272         }
 273
 274         mmc_data = *data;
 275         platform_device_register(&at91sam9260_mmc_device);
 276 }
 277 #else
 278 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 279 #endif
 280
 281
 282 /* --------------------------------------------------------------------
 283  *  NAND / SmartMedia
 284  * -------------------------------------------------------------------- */
 285
 286 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
 287 static struct atmel_nand_data nand_data;
 288
 289 #define NAND_BASE       AT91_CHIPSELECT_3
 290
 291 static struct resource nand_resources[] = {
 292         [0] = {
 293                 .start  = NAND_BASE,
 294                 .end    = NAND_BASE + SZ_256M - 1,
 295                 .flags  = IORESOURCE_MEM,
 296         },
 297         [1] = {
 298                 .start  = AT91_BASE_SYS + AT91_ECC,
 299                 .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
 300                 .flags  = IORESOURCE_MEM,
 301         }
 302 };
 303
 304 static struct platform_device at91sam9260_nand_device = {
 305         .name           = "atmel_nand",
 306         .id             = -1,
 307         .dev            = {
 308                                 .platform_data  = &nand_data,
 309         },
 310         .resource       = nand_resources,
 311         .num_resources  = ARRAY_SIZE(nand_resources),
 312 };
 313
 314 void __init at91_add_device_nand(struct atmel_nand_data *data)
 315 {
 316         unsigned long csa, mode;
 317
 318         if (!data)
 319                 return;
 320
 321         csa = at91_sys_read(AT91_MATRIX_EBICSA);
 322         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 323
 324         if (cpu_is_at91sam9260()) {
 325                 /* Timing for sam9260 */
 326                 /* set the bus interface characteristics */
 327                 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
 328                                 | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
 329
 330                 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
 331                                 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
 332
 333                 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
 334
 335                 if (data->bus_width_16)
 336                         mode = AT91_SMC_DBW_16;
 337                 else
 338                         mode = AT91_SMC_DBW_8;
 339                 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
 340         }
 341
 342         if (cpu_is_at91sam9g20()) {
 343                 /* Timing for sam9g20 */
 344                 /* set the bus interface characteristics */
 345                 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0)
 346                                 | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
 347
 348                 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(4)
 349                                 | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(4));
 350
 351                 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
 352
 353                 if (data->bus_width_16)
 354                         mode = AT91_SMC_DBW_16;
 355                 else
 356                         mode = AT91_SMC_DBW_8;
 357                 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(3));
 358         }
 359
 360         /* enable pin */
 361         if (data->enable_pin)
 362                 at91_set_gpio_output(data->enable_pin, 1);
 363
 364         /* ready/busy pin */
 365         if (data->rdy_pin)
 366                 at91_set_gpio_input(data->rdy_pin, 1);
 367
 368         /* card detect pin */
 369         if (data->det_pin)
 370                 at91_set_gpio_input(data->det_pin, 1);
 371
 372         nand_data = *data;
 373         platform_device_register(&at91sam9260_nand_device);
 374 }
 375 #else
 376 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
 377 #endif
 378
 379
 380 /* --------------------------------------------------------------------
 381  *  TWI (i2c)
 382  * -------------------------------------------------------------------- */
 383
 384 /*
 385  * Prefer the GPIO code since the TWI controller isn't robust
 386  * (gets overruns and underruns under load) and can only issue
 387  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 388  */
 389
 390 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 391
 392 static struct i2c_gpio_platform_data pdata = {
 393         .sda_pin                = AT91_PIN_PA23,
 394         .sda_is_open_drain      = 1,
 395         .scl_pin                = AT91_PIN_PA24,
 396         .scl_is_open_drain      = 1,
 397         .udelay                 = 2,            /* ~100 kHz */
 398 };
 399
 400 static struct platform_device at91sam9260_twi_device = {
 401         .name                   = "i2c-gpio",
 402         .id                     = -1,
 403         .dev.platform_data      = &pdata,
 404 };
 405
 406 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 407 {
 408         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
 409         at91_set_multi_drive(AT91_PIN_PA23, 1);
 410
 411         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
 412         at91_set_multi_drive(AT91_PIN_PA24, 1);
 413
 414         i2c_register_board_info(0, devices, nr_devices);
 415         platform_device_register(&at91sam9260_twi_device);
 416 }
 417
 418 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 419
 420 static struct resource twi_resources[] = {
 421         [0] = {
 422                 .start  = AT91SAM9260_BASE_TWI,
 423                 .end    = AT91SAM9260_BASE_TWI + SZ_16K - 1,
 424                 .flags  = IORESOURCE_MEM,
 425         },
 426         [1] = {
 427                 .start  = AT91SAM9260_ID_TWI,
 428                 .end    = AT91SAM9260_ID_TWI,
 429                 .flags  = IORESOURCE_IRQ,
 430         },
 431 };
 432
 433 static struct platform_device at91sam9260_twi_device = {
 434         .name           = "at91_i2c",
 435         .id             = -1,
 436         .resource       = twi_resources,
 437         .num_resources  = ARRAY_SIZE(twi_resources),
 438 };
 439
 440 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 441 {
 442         /* pins used for TWI interface */
 443         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
 444         at91_set_multi_drive(AT91_PIN_PA23, 1);
 445
 446         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
 447         at91_set_multi_drive(AT91_PIN_PA24, 1);
 448
 449         i2c_register_board_info(0, devices, nr_devices);
 450         platform_device_register(&at91sam9260_twi_device);
 451 }
 452 #else
 453 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 454 #endif
 455
 456
 457 /* --------------------------------------------------------------------
 458  *  SPI
 459  * -------------------------------------------------------------------- */
 460
 461 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 462 static u64 spi_dmamask = DMA_BIT_MASK(32);
 463
 464 static struct resource spi0_resources[] = {
 465         [0] = {
 466                 .start  = AT91SAM9260_BASE_SPI0,
 467                 .end    = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
 468                 .flags  = IORESOURCE_MEM,
 469         },
 470         [1] = {
 471                 .start  = AT91SAM9260_ID_SPI0,
 472                 .end    = AT91SAM9260_ID_SPI0,
 473                 .flags  = IORESOURCE_IRQ,
 474         },
 475 };
 476
 477 static struct platform_device at91sam9260_spi0_device = {
 478         .name           = "atmel_spi",
 479         .id             = 0,
 480         .dev            = {
 481                                 .dma_mask               = &spi_dmamask,
 482                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 483         },
 484         .resource       = spi0_resources,
 485         .num_resources  = ARRAY_SIZE(spi0_resources),
 486 };
 487
 488 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
 489
 490 static struct resource spi1_resources[] = {
 491         [0] = {
 492                 .start  = AT91SAM9260_BASE_SPI1,
 493                 .end    = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
 494                 .flags  = IORESOURCE_MEM,
 495         },
 496         [1] = {
 497                 .start  = AT91SAM9260_ID_SPI1,
 498                 .end    = AT91SAM9260_ID_SPI1,
 499                 .flags  = IORESOURCE_IRQ,
 500         },
 501 };
 502
 503 static struct platform_device at91sam9260_spi1_device = {
 504         .name           = "atmel_spi",
 505         .id             = 1,
 506         .dev            = {
 507                                 .dma_mask               = &spi_dmamask,
 508                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 509         },
 510         .resource       = spi1_resources,
 511         .num_resources  = ARRAY_SIZE(spi1_resources),
 512 };
 513
 514 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
 515
 516 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 517 {
 518         int i;
 519         unsigned long cs_pin;
 520         short enable_spi0 = 0;
 521         short enable_spi1 = 0;
 522
 523         /* Choose SPI chip-selects */
 524         for (i = 0; i < nr_devices; i++) {
 525                 if (devices[i].controller_data)
 526                         cs_pin = (unsigned long) devices[i].controller_data;
 527                 else if (devices[i].bus_num == 0)
 528                         cs_pin = spi0_standard_cs[devices[i].chip_select];
 529                 else
 530                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 531
 532                 if (devices[i].bus_num == 0)
 533                         enable_spi0 = 1;
 534                 else
 535                         enable_spi1 = 1;
 536
 537                 /* enable chip-select pin */
 538                 at91_set_gpio_output(cs_pin, 1);
 539
 540                 /* pass chip-select pin to driver */
 541                 devices[i].controller_data = (void *) cs_pin;
 542         }
 543
 544         spi_register_board_info(devices, nr_devices);
 545
 546         /* Configure SPI bus(es) */
 547         if (enable_spi0) {
 548                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
 549                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
 550                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI1_SPCK */
 551
 552                 at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
 553                 platform_device_register(&at91sam9260_spi0_device);
 554         }
 555         if (enable_spi1) {
 556                 at91_set_A_periph(AT91_PIN_PB0, 0);     /* SPI1_MISO */
 557                 at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI1_MOSI */
 558                 at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI1_SPCK */
 559
 560                 at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
 561                 platform_device_register(&at91sam9260_spi1_device);
 562         }
 563 }
 564 #else
 565 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 566 #endif
 567
 568
 569 /* --------------------------------------------------------------------
 570  *  Timer/Counter blocks
 571  * -------------------------------------------------------------------- */
 572
 573 #ifdef CONFIG_ATMEL_TCLIB
 574
 575 static struct resource tcb0_resources[] = {
 576         [0] = {
 577                 .start  = AT91SAM9260_BASE_TCB0,
 578                 .end    = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
 579                 .flags  = IORESOURCE_MEM,
 580         },
 581         [1] = {
 582                 .start  = AT91SAM9260_ID_TC0,
 583                 .end    = AT91SAM9260_ID_TC0,
 584                 .flags  = IORESOURCE_IRQ,
 585         },
 586         [2] = {
 587                 .start  = AT91SAM9260_ID_TC1,
 588                 .end    = AT91SAM9260_ID_TC1,
 589                 .flags  = IORESOURCE_IRQ,
 590         },
 591         [3] = {
 592                 .start  = AT91SAM9260_ID_TC2,
 593                 .end    = AT91SAM9260_ID_TC2,
 594                 .flags  = IORESOURCE_IRQ,
 595         },
 596 };
 597
 598 static struct platform_device at91sam9260_tcb0_device = {
 599         .name           = "atmel_tcb",
 600         .id             = 0,
 601         .resource       = tcb0_resources,
 602         .num_resources  = ARRAY_SIZE(tcb0_resources),
 603 };
 604
 605 static struct resource tcb1_resources[] = {
 606         [0] = {
 607                 .start  = AT91SAM9260_BASE_TCB1,
 608                 .end    = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
 609                 .flags  = IORESOURCE_MEM,
 610         },
 611         [1] = {
 612                 .start  = AT91SAM9260_ID_TC3,
 613                 .end    = AT91SAM9260_ID_TC3,
 614                 .flags  = IORESOURCE_IRQ,
 615         },
 616         [2] = {
 617                 .start  = AT91SAM9260_ID_TC4,
 618                 .end    = AT91SAM9260_ID_TC4,
 619                 .flags  = IORESOURCE_IRQ,
 620         },
 621         [3] = {
 622                 .start  = AT91SAM9260_ID_TC5,
 623                 .end    = AT91SAM9260_ID_TC5,
 624                 .flags  = IORESOURCE_IRQ,
 625         },
 626 };
 627
 628 static struct platform_device at91sam9260_tcb1_device = {
 629         .name           = "atmel_tcb",
 630         .id             = 1,
 631         .resource       = tcb1_resources,
 632         .num_resources  = ARRAY_SIZE(tcb1_resources),
 633 };
 634
 635 static void __init at91_add_device_tc(void)
 636 {
 637         /* this chip has a separate clock and irq for each TC channel */
 638         at91_clock_associate("tc0_clk", &at91sam9260_tcb0_device.dev, "t0_clk");
 639         at91_clock_associate("tc1_clk", &at91sam9260_tcb0_device.dev, "t1_clk");
 640         at91_clock_associate("tc2_clk", &at91sam9260_tcb0_device.dev, "t2_clk");
 641         platform_device_register(&at91sam9260_tcb0_device);
 642
 643         at91_clock_associate("tc3_clk", &at91sam9260_tcb1_device.dev, "t0_clk");
 644         at91_clock_associate("tc4_clk", &at91sam9260_tcb1_device.dev, "t1_clk");
 645         at91_clock_associate("tc5_clk", &at91sam9260_tcb1_device.dev, "t2_clk");
 646         platform_device_register(&at91sam9260_tcb1_device);
 647 }
 648 #else
 649 static void __init at91_add_device_tc(void) { }
 650 #endif
 651
 652
 653 /* --------------------------------------------------------------------
 654  *  RTT
 655  * -------------------------------------------------------------------- */
 656
 657 static struct resource rtt_resources[] = {
 658         {
 659                 .start  = AT91_BASE_SYS + AT91_RTT,
 660                 .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
 661                 .flags  = IORESOURCE_MEM,
 662         }
 663 };
 664
 665 static struct platform_device at91sam9260_rtt_device = {
 666         .name           = "at91_rtt",
 667         .id             = 0,
 668         .resource       = rtt_resources,
 669         .num_resources  = ARRAY_SIZE(rtt_resources),
 670 };
 671
 672 static void __init at91_add_device_rtt(void)
 673 {
 674         platform_device_register(&at91sam9260_rtt_device);
 675 }
 676
 677
 678 /* --------------------------------------------------------------------
 679  *  Watchdog
 680  * -------------------------------------------------------------------- */
 681
 682 #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
 683 static struct platform_device at91sam9260_wdt_device = {
 684         .name           = "at91_wdt",
 685         .id             = -1,
 686         .num_resources  = 0,
 687 };
 688
 689 static void __init at91_add_device_watchdog(void)
 690 {
 691         platform_device_register(&at91sam9260_wdt_device);
 692 }
 693 #else
 694 static void __init at91_add_device_watchdog(void) {}
 695 #endif
 696
 697
 698 /* --------------------------------------------------------------------
 699  *  SSC -- Synchronous Serial Controller
 700  * -------------------------------------------------------------------- */
 701
 702 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 703 static u64 ssc_dmamask = DMA_BIT_MASK(32);
 704
 705 static struct resource ssc_resources[] = {
 706         [0] = {
 707                 .start  = AT91SAM9260_BASE_SSC,
 708                 .end    = AT91SAM9260_BASE_SSC + SZ_16K - 1,
 709                 .flags  = IORESOURCE_MEM,
 710         },
 711         [1] = {
 712                 .start  = AT91SAM9260_ID_SSC,
 713                 .end    = AT91SAM9260_ID_SSC,
 714                 .flags  = IORESOURCE_IRQ,
 715         },
 716 };
 717
 718 static struct platform_device at91sam9260_ssc_device = {
 719         .name   = "ssc",
 720         .id     = 0,
 721         .dev    = {
 722                 .dma_mask               = &ssc_dmamask,
 723                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 724         },
 725         .resource       = ssc_resources,
 726         .num_resources  = ARRAY_SIZE(ssc_resources),
 727 };
 728
 729 static inline void configure_ssc_pins(unsigned pins)
 730 {
 731         if (pins & ATMEL_SSC_TF)
 732                 at91_set_A_periph(AT91_PIN_PB17, 1);
 733         if (pins & ATMEL_SSC_TK)
 734                 at91_set_A_periph(AT91_PIN_PB16, 1);
 735         if (pins & ATMEL_SSC_TD)
 736                 at91_set_A_periph(AT91_PIN_PB18, 1);
 737         if (pins & ATMEL_SSC_RD)
 738                 at91_set_A_periph(AT91_PIN_PB19, 1);
 739         if (pins & ATMEL_SSC_RK)
 740                 at91_set_A_periph(AT91_PIN_PB20, 1);
 741         if (pins & ATMEL_SSC_RF)
 742                 at91_set_A_periph(AT91_PIN_PB21, 1);
 743 }
 744
 745 /*
 746  * SSC controllers are accessed through library code, instead of any
 747  * kind of all-singing/all-dancing driver.  For example one could be
 748  * used by a particular I2S audio codec's driver, while another one
 749  * on the same system might be used by a custom data capture driver.
 750  */
 751 void __init at91_add_device_ssc(unsigned id, unsigned pins)
 752 {
 753         struct platform_device *pdev;
 754
 755         /*
 756          * NOTE: caller is responsible for passing information matching
 757          * "pins" to whatever will be using each particular controller.
 758          */
 759         switch (id) {
 760         case AT91SAM9260_ID_SSC:
 761                 pdev = &at91sam9260_ssc_device;
 762                 configure_ssc_pins(pins);
 763                 at91_clock_associate("ssc_clk", &pdev->dev, "pclk");
 764                 break;
 765         default:
 766                 return;
 767         }
 768
 769         platform_device_register(pdev);
 770 }
 771
 772 #else
 773 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 774 #endif
 775
 776
 777 /* --------------------------------------------------------------------
 778  *  UART
 779  * -------------------------------------------------------------------- */
 780 #if defined(CONFIG_SERIAL_ATMEL)
 781 static struct resource dbgu_resources[] = {
 782         [0] = {
 783                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
 784                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
 785                 .flags  = IORESOURCE_MEM,
 786         },
 787         [1] = {
 788                 .start  = AT91_ID_SYS,
 789                 .end    = AT91_ID_SYS,
 790                 .flags  = IORESOURCE_IRQ,
 791         },
 792 };
 793
 794 static struct atmel_uart_data dbgu_data = {
 795         .use_dma_tx     = 0,
 796         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 797         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 798 };
 799
 800 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
 801
 802 static struct platform_device at91sam9260_dbgu_device = {
 803         .name           = "atmel_usart",
 804         .id             = 0,
 805         .dev            = {
 806                                 .dma_mask               = &dbgu_dmamask,
 807                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 808                                 .platform_data          = &dbgu_data,
 809         },
 810         .resource       = dbgu_resources,
 811         .num_resources  = ARRAY_SIZE(dbgu_resources),
 812 };
 813
 814 static inline void configure_dbgu_pins(void)
 815 {
 816         at91_set_A_periph(AT91_PIN_PB14, 0);            /* DRXD */
 817         at91_set_A_periph(AT91_PIN_PB15, 1);            /* DTXD */
 818 }
 819
 820 static struct resource uart0_resources[] = {
 821         [0] = {
 822                 .start  = AT91SAM9260_BASE_US0,
 823                 .end    = AT91SAM9260_BASE_US0 + SZ_16K - 1,
 824                 .flags  = IORESOURCE_MEM,
 825         },
 826         [1] = {
 827                 .start  = AT91SAM9260_ID_US0,
 828                 .end    = AT91SAM9260_ID_US0,
 829                 .flags  = IORESOURCE_IRQ,
 830         },
 831 };
 832
 833 static struct atmel_uart_data uart0_data = {
 834         .use_dma_tx     = 1,
 835         .use_dma_rx     = 1,
 836 };
 837
 838 static u64 uart0_dmamask = DMA_BIT_MASK(32);
 839
 840 static struct platform_device at91sam9260_uart0_device = {
 841         .name           = "atmel_usart",
 842         .id             = 1,
 843         .dev            = {
 844                                 .dma_mask               = &uart0_dmamask,
 845                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 846                                 .platform_data          = &uart0_data,
 847         },
 848         .resource       = uart0_resources,
 849         .num_resources  = ARRAY_SIZE(uart0_resources),
 850 };
 851
 852 static inline void configure_usart0_pins(unsigned pins)
 853 {
 854         at91_set_A_periph(AT91_PIN_PB4, 1);             /* TXD0 */
 855         at91_set_A_periph(AT91_PIN_PB5, 0);             /* RXD0 */
 856
 857         if (pins & ATMEL_UART_RTS)
 858                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS0 */
 859         if (pins & ATMEL_UART_CTS)
 860                 at91_set_A_periph(AT91_PIN_PB27, 0);    /* CTS0 */
 861         if (pins & ATMEL_UART_DTR)
 862                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* DTR0 */
 863         if (pins & ATMEL_UART_DSR)
 864                 at91_set_A_periph(AT91_PIN_PB22, 0);    /* DSR0 */
 865         if (pins & ATMEL_UART_DCD)
 866                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD0 */
 867         if (pins & ATMEL_UART_RI)
 868                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* RI0 */
 869 }
 870
 871 static struct resource uart1_resources[] = {
 872         [0] = {
 873                 .start  = AT91SAM9260_BASE_US1,
 874                 .end    = AT91SAM9260_BASE_US1 + SZ_16K - 1,
 875                 .flags  = IORESOURCE_MEM,
 876         },
 877         [1] = {
 878                 .start  = AT91SAM9260_ID_US1,
 879                 .end    = AT91SAM9260_ID_US1,
 880                 .flags  = IORESOURCE_IRQ,
 881         },
 882 };
 883
 884 static struct atmel_uart_data uart1_data = {
 885         .use_dma_tx     = 1,
 886         .use_dma_rx     = 1,
 887 };
 888
 889 static u64 uart1_dmamask = DMA_BIT_MASK(32);
 890
 891 static struct platform_device at91sam9260_uart1_device = {
 892         .name           = "atmel_usart",
 893         .id             = 2,
 894         .dev            = {
 895                                 .dma_mask               = &uart1_dmamask,
 896                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 897                                 .platform_data          = &uart1_data,
 898         },
 899         .resource       = uart1_resources,
 900         .num_resources  = ARRAY_SIZE(uart1_resources),
 901 };
 902
 903 static inline void configure_usart1_pins(unsigned pins)
 904 {
 905         at91_set_A_periph(AT91_PIN_PB6, 1);             /* TXD1 */
 906         at91_set_A_periph(AT91_PIN_PB7, 0);             /* RXD1 */
 907
 908         if (pins & ATMEL_UART_RTS)
 909                 at91_set_A_periph(AT91_PIN_PB28, 0);    /* RTS1 */
 910         if (pins & ATMEL_UART_CTS)
 911                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* CTS1 */
 912 }
 913
 914 static struct resource uart2_resources[] = {
 915         [0] = {
 916                 .start  = AT91SAM9260_BASE_US2,
 917                 .end    = AT91SAM9260_BASE_US2 + SZ_16K - 1,
 918                 .flags  = IORESOURCE_MEM,
 919         },
 920         [1] = {
 921                 .start  = AT91SAM9260_ID_US2,
 922                 .end    = AT91SAM9260_ID_US2,
 923                 .flags  = IORESOURCE_IRQ,
 924         },
 925 };
 926
 927 static struct atmel_uart_data uart2_data = {
 928         .use_dma_tx     = 1,
 929         .use_dma_rx     = 1,
 930 };
 931
 932 static u64 uart2_dmamask = DMA_BIT_MASK(32);
 933
 934 static struct platform_device at91sam9260_uart2_device = {
 935         .name           = "atmel_usart",
 936         .id             = 3,
 937         .dev            = {
 938                                 .dma_mask               = &uart2_dmamask,
 939                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 940                                 .platform_data          = &uart2_data,
 941         },
 942         .resource       = uart2_resources,
 943         .num_resources  = ARRAY_SIZE(uart2_resources),
 944 };
 945
 946 static inline void configure_usart2_pins(unsigned pins)
 947 {
 948         at91_set_A_periph(AT91_PIN_PB8, 1);             /* TXD2 */
 949         at91_set_A_periph(AT91_PIN_PB9, 0);             /* RXD2 */
 950
 951         if (pins & ATMEL_UART_RTS)
 952                 at91_set_A_periph(AT91_PIN_PA4, 0);     /* RTS2 */
 953         if (pins & ATMEL_UART_CTS)
 954                 at91_set_A_periph(AT91_PIN_PA5, 0);     /* CTS2 */
 955 }
 956
 957 static struct resource uart3_resources[] = {
 958         [0] = {
 959                 .start  = AT91SAM9260_BASE_US3,
 960                 .end    = AT91SAM9260_BASE_US3 + SZ_16K - 1,
 961                 .flags  = IORESOURCE_MEM,
 962         },
 963         [1] = {
 964                 .start  = AT91SAM9260_ID_US3,
 965                 .end    = AT91SAM9260_ID_US3,
 966                 .flags  = IORESOURCE_IRQ,
 967         },
 968 };
 969
 970 static struct atmel_uart_data uart3_data = {
 971         .use_dma_tx     = 1,
 972         .use_dma_rx     = 1,
 973 };
 974
 975 static u64 uart3_dmamask = DMA_BIT_MASK(32);
 976
 977 static struct platform_device at91sam9260_uart3_device = {
 978         .name           = "atmel_usart",
 979         .id             = 4,
 980         .dev            = {
 981                                 .dma_mask               = &uart3_dmamask,
 982                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 983                                 .platform_data          = &uart3_data,
 984         },
 985         .resource       = uart3_resources,
 986         .num_resources  = ARRAY_SIZE(uart3_resources),
 987 };
 988
 989 static inline void configure_usart3_pins(unsigned pins)
 990 {
 991         at91_set_A_periph(AT91_PIN_PB10, 1);            /* TXD3 */
 992         at91_set_A_periph(AT91_PIN_PB11, 0);            /* RXD3 */
 993
 994         if (pins & ATMEL_UART_RTS)
 995                 at91_set_B_periph(AT91_PIN_PC8, 0);     /* RTS3 */
 996         if (pins & ATMEL_UART_CTS)
 997                 at91_set_B_periph(AT91_PIN_PC10, 0);    /* CTS3 */
 998 }
 999
1000 static struct resource uart4_resources[] = {
1001         [0] = {
1002                 .start  = AT91SAM9260_BASE_US4,
1003                 .end    = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1004                 .flags  = IORESOURCE_MEM,
1005         },
1006         [1] = {
1007                 .start  = AT91SAM9260_ID_US4,
1008                 .end    = AT91SAM9260_ID_US4,
1009                 .flags  = IORESOURCE_IRQ,
1010         },
1011 };
1012
1013 static struct atmel_uart_data uart4_data = {
1014         .use_dma_tx     = 1,
1015         .use_dma_rx     = 1,
1016 };
1017
1018 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1019
1020 static struct platform_device at91sam9260_uart4_device = {
1021         .name           = "atmel_usart",
1022         .id             = 5,
1023         .dev            = {
1024                                 .dma_mask               = &uart4_dmamask,
1025                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1026                                 .platform_data          = &uart4_data,
1027         },
1028         .resource       = uart4_resources,
1029         .num_resources  = ARRAY_SIZE(uart4_resources),
1030 };
1031
1032 static inline void configure_usart4_pins(void)
1033 {
1034         at91_set_B_periph(AT91_PIN_PA31, 1);            /* TXD4 */
1035         at91_set_B_periph(AT91_PIN_PA30, 0);            /* RXD4 */
1036 }
1037
1038 static struct resource uart5_resources[] = {
1039         [0] = {
1040                 .start  = AT91SAM9260_BASE_US5,
1041                 .end    = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1042                 .flags  = IORESOURCE_MEM,
1043         },
1044         [1] = {
1045                 .start  = AT91SAM9260_ID_US5,
1046                 .end    = AT91SAM9260_ID_US5,
1047                 .flags  = IORESOURCE_IRQ,
1048         },
1049 };
1050
1051 static struct atmel_uart_data uart5_data = {
1052         .use_dma_tx     = 1,
1053         .use_dma_rx     = 1,
1054 };
1055
1056 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1057
1058 static struct platform_device at91sam9260_uart5_device = {
1059         .name           = "atmel_usart",
1060         .id             = 6,
1061         .dev            = {
1062                                 .dma_mask               = &uart5_dmamask,
1063                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1064                                 .platform_data          = &uart5_data,
1065         },
1066         .resource       = uart5_resources,
1067         .num_resources  = ARRAY_SIZE(uart5_resources),
1068 };
1069
1070 static inline void configure_usart5_pins(void)
1071 {
1072         at91_set_A_periph(AT91_PIN_PB12, 1);            /* TXD5 */
1073         at91_set_A_periph(AT91_PIN_PB13, 0);            /* RXD5 */
1074 }
1075
1076 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1077 struct platform_device *atmel_default_console_device;   /* the serial console device */
1078
1079 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1080 {
1081         struct platform_device *pdev;
1082
1083         switch (id) {
1084                 case 0:         /* DBGU */
1085                         pdev = &at91sam9260_dbgu_device;
1086                         configure_dbgu_pins();
1087                         at91_clock_associate("mck", &pdev->dev, "usart");
1088                         break;
1089                 case AT91SAM9260_ID_US0:
1090                         pdev = &at91sam9260_uart0_device;
1091                         configure_usart0_pins(pins);
1092                         at91_clock_associate("usart0_clk", &pdev->dev, "usart");
1093                         break;
1094                 case AT91SAM9260_ID_US1:
1095                         pdev = &at91sam9260_uart1_device;
1096                         configure_usart1_pins(pins);
1097                         at91_clock_associate("usart1_clk", &pdev->dev, "usart");
1098                         break;
1099                 case AT91SAM9260_ID_US2:
1100                         pdev = &at91sam9260_uart2_device;
1101                         configure_usart2_pins(pins);
1102                         at91_clock_associate("usart2_clk", &pdev->dev, "usart");
1103                         break;
1104                 case AT91SAM9260_ID_US3:
1105                         pdev = &at91sam9260_uart3_device;
1106                         configure_usart3_pins(pins);
1107                         at91_clock_associate("usart3_clk", &pdev->dev, "usart");
1108                         break;
1109                 case AT91SAM9260_ID_US4:
1110                         pdev = &at91sam9260_uart4_device;
1111                         configure_usart4_pins();
1112                         at91_clock_associate("usart4_clk", &pdev->dev, "usart");
1113                         break;
1114                 case AT91SAM9260_ID_US5:
1115                         pdev = &at91sam9260_uart5_device;
1116                         configure_usart5_pins();
1117                         at91_clock_associate("usart5_clk", &pdev->dev, "usart");
1118                         break;
1119                 default:
1120                         return;
1121         }
1122         pdev->id = portnr;              /* update to mapped ID */
1123
1124         if (portnr < ATMEL_MAX_UART)
1125                 at91_uarts[portnr] = pdev;
1126 }
1127
1128 void __init at91_set_serial_console(unsigned portnr)
1129 {
1130         if (portnr < ATMEL_MAX_UART)
1131                 atmel_default_console_device = at91_uarts[portnr];
1132 }
1133
1134 void __init at91_add_device_serial(void)
1135 {
1136         int i;
1137
1138         for (i = 0; i < ATMEL_MAX_UART; i++) {
1139                 if (at91_uarts[i])
1140                         platform_device_register(at91_uarts[i]);
1141         }
1142
1143         if (!atmel_default_console_device)
1144                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1145 }
1146 #else
1147 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1148 void __init at91_set_serial_console(unsigned portnr) {}
1149 void __init at91_add_device_serial(void) {}
1150 #endif
1151
1152
1153 /* -------------------------------------------------------------------- */
1154 /*
1155  * These devices are always present and don't need any board-specific
1156  * setup.
1157  */
1158 static int __init at91_add_standard_devices(void)
1159 {
1160         at91_add_device_rtt();
1161         at91_add_device_watchdog();
1162         at91_add_device_tc();
1163         return 0;
1164 }
1165
1166 arch_initcall(at91_add_standard_devices);