Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
[linux-2.6] / drivers / acpi / processor_idle.c
1 /*
2  * processor_idle - idle state submodule to the ACPI processor driver
3  *
4  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6  *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7  *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8  *                      - Added processor hotplug support
9  *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10  *                      - Added support for C3 on SMP
11  *
12  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13  *
14  *  This program is free software; you can redistribute it and/or modify
15  *  it under the terms of the GNU General Public License as published by
16  *  the Free Software Foundation; either version 2 of the License, or (at
17  *  your option) any later version.
18  *
19  *  This program is distributed in the hope that it will be useful, but
20  *  WITHOUT ANY WARRANTY; without even the implied warranty of
21  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
22  *  General Public License for more details.
23  *
24  *  You should have received a copy of the GNU General Public License along
25  *  with this program; if not, write to the Free Software Foundation, Inc.,
26  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27  *
28  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29  */
30
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h>        /* need_resched() */
41 #include <linux/pm_qos_params.h>
42 #include <linux/clockchips.h>
43 #include <linux/cpuidle.h>
44 #include <linux/cpuidle.h>
45
46 /*
47  * Include the apic definitions for x86 to have the APIC timer related defines
48  * available also for UP (on SMP it gets magically included via linux/smp.h).
49  * asm/acpi.h is not an option, as it would require more include magic. Also
50  * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
51  */
52 #ifdef CONFIG_X86
53 #include <asm/apic.h>
54 #endif
55
56 #include <asm/io.h>
57 #include <asm/uaccess.h>
58
59 #include <acpi/acpi_bus.h>
60 #include <acpi/processor.h>
61 #include <asm/processor.h>
62
63 #define ACPI_PROCESSOR_COMPONENT        0x01000000
64 #define ACPI_PROCESSOR_CLASS            "processor"
65 #define _COMPONENT              ACPI_PROCESSOR_COMPONENT
66 ACPI_MODULE_NAME("processor_idle");
67 #define ACPI_PROCESSOR_FILE_POWER       "power"
68 #define US_TO_PM_TIMER_TICKS(t)         ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
69 #define PM_TIMER_TICK_NS                (1000000000ULL/PM_TIMER_FREQUENCY)
70 #ifndef CONFIG_CPU_IDLE
71 #define C2_OVERHEAD                     4       /* 1us (3.579 ticks per us) */
72 #define C3_OVERHEAD                     4       /* 1us (3.579 ticks per us) */
73 static void (*pm_idle_save) (void) __read_mostly;
74 #else
75 #define C2_OVERHEAD                     1       /* 1us */
76 #define C3_OVERHEAD                     1       /* 1us */
77 #endif
78 #define PM_TIMER_TICKS_TO_US(p)         (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
79
80 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
81 #ifdef CONFIG_CPU_IDLE
82 module_param(max_cstate, uint, 0000);
83 #else
84 module_param(max_cstate, uint, 0644);
85 #endif
86 static unsigned int nocst __read_mostly;
87 module_param(nocst, uint, 0000);
88
89 #ifndef CONFIG_CPU_IDLE
90 /*
91  * bm_history -- bit-mask with a bit per jiffy of bus-master activity
92  * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
93  * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
94  * 100 HZ: 0x0000000F: 4 jiffies = 40ms
95  * reduce history for more aggressive entry into C3
96  */
97 static unsigned int bm_history __read_mostly =
98     (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
99 module_param(bm_history, uint, 0644);
100
101 static int acpi_processor_set_power_policy(struct acpi_processor *pr);
102
103 #else   /* CONFIG_CPU_IDLE */
104 static unsigned int latency_factor __read_mostly = 2;
105 module_param(latency_factor, uint, 0644);
106 #endif
107
108 /*
109  * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
110  * For now disable this. Probably a bug somewhere else.
111  *
112  * To skip this limit, boot/load with a large max_cstate limit.
113  */
114 static int set_max_cstate(const struct dmi_system_id *id)
115 {
116         if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
117                 return 0;
118
119         printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
120                " Override with \"processor.max_cstate=%d\"\n", id->ident,
121                (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
122
123         max_cstate = (long)id->driver_data;
124
125         return 0;
126 }
127
128 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
129    callers to only run once -AK */
130 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
131         { set_max_cstate, "IBM ThinkPad R40e", {
132           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
133           DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
134         { set_max_cstate, "IBM ThinkPad R40e", {
135           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
136           DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
137         { set_max_cstate, "IBM ThinkPad R40e", {
138           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
139           DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
140         { set_max_cstate, "IBM ThinkPad R40e", {
141           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
142           DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
143         { set_max_cstate, "IBM ThinkPad R40e", {
144           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
145           DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
146         { set_max_cstate, "IBM ThinkPad R40e", {
147           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
148           DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
149         { set_max_cstate, "IBM ThinkPad R40e", {
150           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
151           DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
152         { set_max_cstate, "IBM ThinkPad R40e", {
153           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
154           DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
155         { set_max_cstate, "IBM ThinkPad R40e", {
156           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
157           DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
158         { set_max_cstate, "IBM ThinkPad R40e", {
159           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
160           DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
161         { set_max_cstate, "IBM ThinkPad R40e", {
162           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
163           DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
164         { set_max_cstate, "IBM ThinkPad R40e", {
165           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
166           DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
167         { set_max_cstate, "IBM ThinkPad R40e", {
168           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
169           DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
170         { set_max_cstate, "IBM ThinkPad R40e", {
171           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
172           DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
173         { set_max_cstate, "IBM ThinkPad R40e", {
174           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
175           DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
176         { set_max_cstate, "IBM ThinkPad R40e", {
177           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
178           DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
179         { set_max_cstate, "Medion 41700", {
180           DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
181           DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
182         { set_max_cstate, "Clevo 5600D", {
183           DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
184           DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
185          (void *)2},
186         {},
187 };
188
189 static inline u32 ticks_elapsed(u32 t1, u32 t2)
190 {
191         if (t2 >= t1)
192                 return (t2 - t1);
193         else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
194                 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
195         else
196                 return ((0xFFFFFFFF - t1) + t2);
197 }
198
199 static inline u32 ticks_elapsed_in_us(u32 t1, u32 t2)
200 {
201         if (t2 >= t1)
202                 return PM_TIMER_TICKS_TO_US(t2 - t1);
203         else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
204                 return PM_TIMER_TICKS_TO_US(((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
205         else
206                 return PM_TIMER_TICKS_TO_US((0xFFFFFFFF - t1) + t2);
207 }
208
209 /*
210  * Callers should disable interrupts before the call and enable
211  * interrupts after return.
212  */
213 static void acpi_safe_halt(void)
214 {
215         current_thread_info()->status &= ~TS_POLLING;
216         /*
217          * TS_POLLING-cleared state must be visible before we
218          * test NEED_RESCHED:
219          */
220         smp_mb();
221         if (!need_resched()) {
222                 safe_halt();
223                 local_irq_disable();
224         }
225         current_thread_info()->status |= TS_POLLING;
226 }
227
228 #ifndef CONFIG_CPU_IDLE
229
230 static void
231 acpi_processor_power_activate(struct acpi_processor *pr,
232                               struct acpi_processor_cx *new)
233 {
234         struct acpi_processor_cx *old;
235
236         if (!pr || !new)
237                 return;
238
239         old = pr->power.state;
240
241         if (old)
242                 old->promotion.count = 0;
243         new->demotion.count = 0;
244
245         /* Cleanup from old state. */
246         if (old) {
247                 switch (old->type) {
248                 case ACPI_STATE_C3:
249                         /* Disable bus master reload */
250                         if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
251                                 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
252                         break;
253                 }
254         }
255
256         /* Prepare to use new state. */
257         switch (new->type) {
258         case ACPI_STATE_C3:
259                 /* Enable bus master reload */
260                 if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
261                         acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
262                 break;
263         }
264
265         pr->power.state = new;
266
267         return;
268 }
269
270 static atomic_t c3_cpu_count;
271
272 /* Common C-state entry for C2, C3, .. */
273 static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
274 {
275         /* Don't trace irqs off for idle */
276         stop_critical_timings();
277         if (cstate->entry_method == ACPI_CSTATE_FFH) {
278                 /* Call into architectural FFH based C-state */
279                 acpi_processor_ffh_cstate_enter(cstate);
280         } else {
281                 int unused;
282                 /* IO port based C-state */
283                 inb(cstate->address);
284                 /* Dummy wait op - must do something useless after P_LVL2 read
285                    because chipsets cannot guarantee that STPCLK# signal
286                    gets asserted in time to freeze execution properly. */
287                 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
288         }
289         start_critical_timings();
290 }
291 #endif /* !CONFIG_CPU_IDLE */
292
293 #ifdef ARCH_APICTIMER_STOPS_ON_C3
294
295 /*
296  * Some BIOS implementations switch to C3 in the published C2 state.
297  * This seems to be a common problem on AMD boxen, but other vendors
298  * are affected too. We pick the most conservative approach: we assume
299  * that the local APIC stops in both C2 and C3.
300  */
301 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
302                                    struct acpi_processor_cx *cx)
303 {
304         struct acpi_processor_power *pwr = &pr->power;
305         u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
306
307         /*
308          * Check, if one of the previous states already marked the lapic
309          * unstable
310          */
311         if (pwr->timer_broadcast_on_state < state)
312                 return;
313
314         if (cx->type >= type)
315                 pr->power.timer_broadcast_on_state = state;
316 }
317
318 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
319 {
320         unsigned long reason;
321
322         reason = pr->power.timer_broadcast_on_state < INT_MAX ?
323                 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
324
325         clockevents_notify(reason, &pr->id);
326 }
327
328 /* Power(C) State timer broadcast control */
329 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
330                                        struct acpi_processor_cx *cx,
331                                        int broadcast)
332 {
333         int state = cx - pr->power.states;
334
335         if (state >= pr->power.timer_broadcast_on_state) {
336                 unsigned long reason;
337
338                 reason = broadcast ?  CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
339                         CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
340                 clockevents_notify(reason, &pr->id);
341         }
342 }
343
344 #else
345
346 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
347                                    struct acpi_processor_cx *cstate) { }
348 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
349 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
350                                        struct acpi_processor_cx *cx,
351                                        int broadcast)
352 {
353 }
354
355 #endif
356
357 /*
358  * Suspend / resume control
359  */
360 static int acpi_idle_suspend;
361
362 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
363 {
364         acpi_idle_suspend = 1;
365         return 0;
366 }
367
368 int acpi_processor_resume(struct acpi_device * device)
369 {
370         acpi_idle_suspend = 0;
371         return 0;
372 }
373
374 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
375 static int tsc_halts_in_c(int state)
376 {
377         switch (boot_cpu_data.x86_vendor) {
378         case X86_VENDOR_AMD:
379                 /*
380                  * AMD Fam10h TSC will tick in all
381                  * C/P/S0/S1 states when this bit is set.
382                  */
383                 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
384                         return 0;
385                 /*FALL THROUGH*/
386         case X86_VENDOR_INTEL:
387                 /* Several cases known where TSC halts in C2 too */
388         default:
389                 return state > ACPI_STATE_C1;
390         }
391 }
392 #endif
393
394 #ifndef CONFIG_CPU_IDLE
395 static void acpi_processor_idle(void)
396 {
397         struct acpi_processor *pr = NULL;
398         struct acpi_processor_cx *cx = NULL;
399         struct acpi_processor_cx *next_state = NULL;
400         int sleep_ticks = 0;
401         u32 t1, t2 = 0;
402
403         /*
404          * Interrupts must be disabled during bus mastering calculations and
405          * for C2/C3 transitions.
406          */
407         local_irq_disable();
408
409         pr = __get_cpu_var(processors);
410         if (!pr) {
411                 local_irq_enable();
412                 return;
413         }
414
415         /*
416          * Check whether we truly need to go idle, or should
417          * reschedule:
418          */
419         if (unlikely(need_resched())) {
420                 local_irq_enable();
421                 return;
422         }
423
424         cx = pr->power.state;
425         if (!cx || acpi_idle_suspend) {
426                 if (pm_idle_save) {
427                         pm_idle_save(); /* enables IRQs */
428                 } else {
429                         acpi_safe_halt();
430                         local_irq_enable();
431                 }
432
433                 return;
434         }
435
436         /*
437          * Check BM Activity
438          * -----------------
439          * Check for bus mastering activity (if required), record, and check
440          * for demotion.
441          */
442         if (pr->flags.bm_check) {
443                 u32 bm_status = 0;
444                 unsigned long diff = jiffies - pr->power.bm_check_timestamp;
445
446                 if (diff > 31)
447                         diff = 31;
448
449                 pr->power.bm_activity <<= diff;
450
451                 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
452                 if (bm_status) {
453                         pr->power.bm_activity |= 0x1;
454                         acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
455                 }
456                 /*
457                  * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
458                  * the true state of bus mastering activity; forcing us to
459                  * manually check the BMIDEA bit of each IDE channel.
460                  */
461                 else if (errata.piix4.bmisx) {
462                         if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
463                             || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
464                                 pr->power.bm_activity |= 0x1;
465                 }
466
467                 pr->power.bm_check_timestamp = jiffies;
468
469                 /*
470                  * If bus mastering is or was active this jiffy, demote
471                  * to avoid a faulty transition.  Note that the processor
472                  * won't enter a low-power state during this call (to this
473                  * function) but should upon the next.
474                  *
475                  * TBD: A better policy might be to fallback to the demotion
476                  *      state (use it for this quantum only) istead of
477                  *      demoting -- and rely on duration as our sole demotion
478                  *      qualification.  This may, however, introduce DMA
479                  *      issues (e.g. floppy DMA transfer overrun/underrun).
480                  */
481                 if ((pr->power.bm_activity & 0x1) &&
482                     cx->demotion.threshold.bm) {
483                         local_irq_enable();
484                         next_state = cx->demotion.state;
485                         goto end;
486                 }
487         }
488
489 #ifdef CONFIG_HOTPLUG_CPU
490         /*
491          * Check for P_LVL2_UP flag before entering C2 and above on
492          * an SMP system. We do it here instead of doing it at _CST/P_LVL
493          * detection phase, to work cleanly with logical CPU hotplug.
494          */
495         if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
496             !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
497                 cx = &pr->power.states[ACPI_STATE_C1];
498 #endif
499
500         /*
501          * Sleep:
502          * ------
503          * Invoke the current Cx state to put the processor to sleep.
504          */
505         if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
506                 current_thread_info()->status &= ~TS_POLLING;
507                 /*
508                  * TS_POLLING-cleared state must be visible before we
509                  * test NEED_RESCHED:
510                  */
511                 smp_mb();
512                 if (need_resched()) {
513                         current_thread_info()->status |= TS_POLLING;
514                         local_irq_enable();
515                         return;
516                 }
517         }
518
519         switch (cx->type) {
520
521         case ACPI_STATE_C1:
522                 /*
523                  * Invoke C1.
524                  * Use the appropriate idle routine, the one that would
525                  * be used without acpi C-states.
526                  */
527                 if (pm_idle_save) {
528                         pm_idle_save(); /* enables IRQs */
529                 } else {
530                         acpi_safe_halt();
531                         local_irq_enable();
532                 }
533
534                 /*
535                  * TBD: Can't get time duration while in C1, as resumes
536                  *      go to an ISR rather than here.  Need to instrument
537                  *      base interrupt handler.
538                  *
539                  * Note: the TSC better not stop in C1, sched_clock() will
540                  *       skew otherwise.
541                  */
542                 sleep_ticks = 0xFFFFFFFF;
543
544                 break;
545
546         case ACPI_STATE_C2:
547                 /* Get start time (ticks) */
548                 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
549                 /* Tell the scheduler that we are going deep-idle: */
550                 sched_clock_idle_sleep_event();
551                 /* Invoke C2 */
552                 acpi_state_timer_broadcast(pr, cx, 1);
553                 acpi_cstate_enter(cx);
554                 /* Get end time (ticks) */
555                 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
556
557 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
558                 /* TSC halts in C2, so notify users */
559                 if (tsc_halts_in_c(ACPI_STATE_C2))
560                         mark_tsc_unstable("possible TSC halt in C2");
561 #endif
562                 /* Compute time (ticks) that we were actually asleep */
563                 sleep_ticks = ticks_elapsed(t1, t2);
564
565                 /* Tell the scheduler how much we idled: */
566                 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
567
568                 /* Re-enable interrupts */
569                 local_irq_enable();
570                 /* Do not account our idle-switching overhead: */
571                 sleep_ticks -= cx->latency_ticks + C2_OVERHEAD;
572
573                 current_thread_info()->status |= TS_POLLING;
574                 acpi_state_timer_broadcast(pr, cx, 0);
575                 break;
576
577         case ACPI_STATE_C3:
578                 acpi_unlazy_tlb(smp_processor_id());
579                 /*
580                  * Must be done before busmaster disable as we might
581                  * need to access HPET !
582                  */
583                 acpi_state_timer_broadcast(pr, cx, 1);
584                 /*
585                  * disable bus master
586                  * bm_check implies we need ARB_DIS
587                  * !bm_check implies we need cache flush
588                  * bm_control implies whether we can do ARB_DIS
589                  *
590                  * That leaves a case where bm_check is set and bm_control is
591                  * not set. In that case we cannot do much, we enter C3
592                  * without doing anything.
593                  */
594                 if (pr->flags.bm_check && pr->flags.bm_control) {
595                         if (atomic_inc_return(&c3_cpu_count) ==
596                             num_online_cpus()) {
597                                 /*
598                                  * All CPUs are trying to go to C3
599                                  * Disable bus master arbitration
600                                  */
601                                 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
602                         }
603                 } else if (!pr->flags.bm_check) {
604                         /* SMP with no shared cache... Invalidate cache  */
605                         ACPI_FLUSH_CPU_CACHE();
606                 }
607
608                 /* Get start time (ticks) */
609                 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
610                 /* Invoke C3 */
611                 /* Tell the scheduler that we are going deep-idle: */
612                 sched_clock_idle_sleep_event();
613                 acpi_cstate_enter(cx);
614                 /* Get end time (ticks) */
615                 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
616                 if (pr->flags.bm_check && pr->flags.bm_control) {
617                         /* Enable bus master arbitration */
618                         atomic_dec(&c3_cpu_count);
619                         acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
620                 }
621
622 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
623                 /* TSC halts in C3, so notify users */
624                 if (tsc_halts_in_c(ACPI_STATE_C3))
625                         mark_tsc_unstable("TSC halts in C3");
626 #endif
627                 /* Compute time (ticks) that we were actually asleep */
628                 sleep_ticks = ticks_elapsed(t1, t2);
629                 /* Tell the scheduler how much we idled: */
630                 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
631
632                 /* Re-enable interrupts */
633                 local_irq_enable();
634                 /* Do not account our idle-switching overhead: */
635                 sleep_ticks -= cx->latency_ticks + C3_OVERHEAD;
636
637                 current_thread_info()->status |= TS_POLLING;
638                 acpi_state_timer_broadcast(pr, cx, 0);
639                 break;
640
641         default:
642                 local_irq_enable();
643                 return;
644         }
645         cx->usage++;
646         if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
647                 cx->time += sleep_ticks;
648
649         next_state = pr->power.state;
650
651 #ifdef CONFIG_HOTPLUG_CPU
652         /* Don't do promotion/demotion */
653         if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
654             !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) {
655                 next_state = cx;
656                 goto end;
657         }
658 #endif
659
660         /*
661          * Promotion?
662          * ----------
663          * Track the number of longs (time asleep is greater than threshold)
664          * and promote when the count threshold is reached.  Note that bus
665          * mastering activity may prevent promotions.
666          * Do not promote above max_cstate.
667          */
668         if (cx->promotion.state &&
669             ((cx->promotion.state - pr->power.states) <= max_cstate)) {
670                 if (sleep_ticks > cx->promotion.threshold.ticks &&
671                   cx->promotion.state->latency <=
672                                 pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY)) {
673                         cx->promotion.count++;
674                         cx->demotion.count = 0;
675                         if (cx->promotion.count >=
676                             cx->promotion.threshold.count) {
677                                 if (pr->flags.bm_check) {
678                                         if (!
679                                             (pr->power.bm_activity & cx->
680                                              promotion.threshold.bm)) {
681                                                 next_state =
682                                                     cx->promotion.state;
683                                                 goto end;
684                                         }
685                                 } else {
686                                         next_state = cx->promotion.state;
687                                         goto end;
688                                 }
689                         }
690                 }
691         }
692
693         /*
694          * Demotion?
695          * ---------
696          * Track the number of shorts (time asleep is less than time threshold)
697          * and demote when the usage threshold is reached.
698          */
699         if (cx->demotion.state) {
700                 if (sleep_ticks < cx->demotion.threshold.ticks) {
701                         cx->demotion.count++;
702                         cx->promotion.count = 0;
703                         if (cx->demotion.count >= cx->demotion.threshold.count) {
704                                 next_state = cx->demotion.state;
705                                 goto end;
706                         }
707                 }
708         }
709
710       end:
711         /*
712          * Demote if current state exceeds max_cstate
713          * or if the latency of the current state is unacceptable
714          */
715         if ((pr->power.state - pr->power.states) > max_cstate ||
716                 pr->power.state->latency >
717                                 pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY)) {
718                 if (cx->demotion.state)
719                         next_state = cx->demotion.state;
720         }
721
722         /*
723          * New Cx State?
724          * -------------
725          * If we're going to start using a new Cx state we must clean up
726          * from the previous and prepare to use the new.
727          */
728         if (next_state != pr->power.state)
729                 acpi_processor_power_activate(pr, next_state);
730 }
731
732 static int acpi_processor_set_power_policy(struct acpi_processor *pr)
733 {
734         unsigned int i;
735         unsigned int state_is_set = 0;
736         struct acpi_processor_cx *lower = NULL;
737         struct acpi_processor_cx *higher = NULL;
738         struct acpi_processor_cx *cx;
739
740
741         if (!pr)
742                 return -EINVAL;
743
744         /*
745          * This function sets the default Cx state policy (OS idle handler).
746          * Our scheme is to promote quickly to C2 but more conservatively
747          * to C3.  We're favoring C2  for its characteristics of low latency
748          * (quick response), good power savings, and ability to allow bus
749          * mastering activity.  Note that the Cx state policy is completely
750          * customizable and can be altered dynamically.
751          */
752
753         /* startup state */
754         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
755                 cx = &pr->power.states[i];
756                 if (!cx->valid)
757                         continue;
758
759                 if (!state_is_set)
760                         pr->power.state = cx;
761                 state_is_set++;
762                 break;
763         }
764
765         if (!state_is_set)
766                 return -ENODEV;
767
768         /* demotion */
769         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
770                 cx = &pr->power.states[i];
771                 if (!cx->valid)
772                         continue;
773
774                 if (lower) {
775                         cx->demotion.state = lower;
776                         cx->demotion.threshold.ticks = cx->latency_ticks;
777                         cx->demotion.threshold.count = 1;
778                         if (cx->type == ACPI_STATE_C3)
779                                 cx->demotion.threshold.bm = bm_history;
780                 }
781
782                 lower = cx;
783         }
784
785         /* promotion */
786         for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
787                 cx = &pr->power.states[i];
788                 if (!cx->valid)
789                         continue;
790
791                 if (higher) {
792                         cx->promotion.state = higher;
793                         cx->promotion.threshold.ticks = cx->latency_ticks;
794                         if (cx->type >= ACPI_STATE_C2)
795                                 cx->promotion.threshold.count = 4;
796                         else
797                                 cx->promotion.threshold.count = 10;
798                         if (higher->type == ACPI_STATE_C3)
799                                 cx->promotion.threshold.bm = bm_history;
800                 }
801
802                 higher = cx;
803         }
804
805         return 0;
806 }
807 #endif /* !CONFIG_CPU_IDLE */
808
809 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
810 {
811
812         if (!pr)
813                 return -EINVAL;
814
815         if (!pr->pblk)
816                 return -ENODEV;
817
818         /* if info is obtained from pblk/fadt, type equals state */
819         pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
820         pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
821
822 #ifndef CONFIG_HOTPLUG_CPU
823         /*
824          * Check for P_LVL2_UP flag before entering C2 and above on
825          * an SMP system.
826          */
827         if ((num_online_cpus() > 1) &&
828             !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
829                 return -ENODEV;
830 #endif
831
832         /* determine C2 and C3 address from pblk */
833         pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
834         pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
835
836         /* determine latencies from FADT */
837         pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
838         pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
839
840         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
841                           "lvl2[0x%08x] lvl3[0x%08x]\n",
842                           pr->power.states[ACPI_STATE_C2].address,
843                           pr->power.states[ACPI_STATE_C3].address));
844
845         return 0;
846 }
847
848 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
849 {
850         if (!pr->power.states[ACPI_STATE_C1].valid) {
851                 /* set the first C-State to C1 */
852                 /* all processors need to support C1 */
853                 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
854                 pr->power.states[ACPI_STATE_C1].valid = 1;
855                 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
856         }
857         /* the C0 state only exists as a filler in our array */
858         pr->power.states[ACPI_STATE_C0].valid = 1;
859         return 0;
860 }
861
862 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
863 {
864         acpi_status status = 0;
865         acpi_integer count;
866         int current_count;
867         int i;
868         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
869         union acpi_object *cst;
870
871
872         if (nocst)
873                 return -ENODEV;
874
875         current_count = 0;
876
877         status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
878         if (ACPI_FAILURE(status)) {
879                 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
880                 return -ENODEV;
881         }
882
883         cst = buffer.pointer;
884
885         /* There must be at least 2 elements */
886         if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
887                 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
888                 status = -EFAULT;
889                 goto end;
890         }
891
892         count = cst->package.elements[0].integer.value;
893
894         /* Validate number of power states. */
895         if (count < 1 || count != cst->package.count - 1) {
896                 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
897                 status = -EFAULT;
898                 goto end;
899         }
900
901         /* Tell driver that at least _CST is supported. */
902         pr->flags.has_cst = 1;
903
904         for (i = 1; i <= count; i++) {
905                 union acpi_object *element;
906                 union acpi_object *obj;
907                 struct acpi_power_register *reg;
908                 struct acpi_processor_cx cx;
909
910                 memset(&cx, 0, sizeof(cx));
911
912                 element = &(cst->package.elements[i]);
913                 if (element->type != ACPI_TYPE_PACKAGE)
914                         continue;
915
916                 if (element->package.count != 4)
917                         continue;
918
919                 obj = &(element->package.elements[0]);
920
921                 if (obj->type != ACPI_TYPE_BUFFER)
922                         continue;
923
924                 reg = (struct acpi_power_register *)obj->buffer.pointer;
925
926                 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
927                     (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
928                         continue;
929
930                 /* There should be an easy way to extract an integer... */
931                 obj = &(element->package.elements[1]);
932                 if (obj->type != ACPI_TYPE_INTEGER)
933                         continue;
934
935                 cx.type = obj->integer.value;
936                 /*
937                  * Some buggy BIOSes won't list C1 in _CST -
938                  * Let acpi_processor_get_power_info_default() handle them later
939                  */
940                 if (i == 1 && cx.type != ACPI_STATE_C1)
941                         current_count++;
942
943                 cx.address = reg->address;
944                 cx.index = current_count + 1;
945
946                 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
947                 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
948                         if (acpi_processor_ffh_cstate_probe
949                                         (pr->id, &cx, reg) == 0) {
950                                 cx.entry_method = ACPI_CSTATE_FFH;
951                         } else if (cx.type == ACPI_STATE_C1) {
952                                 /*
953                                  * C1 is a special case where FIXED_HARDWARE
954                                  * can be handled in non-MWAIT way as well.
955                                  * In that case, save this _CST entry info.
956                                  * Otherwise, ignore this info and continue.
957                                  */
958                                 cx.entry_method = ACPI_CSTATE_HALT;
959                                 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
960                         } else {
961                                 continue;
962                         }
963                         if (cx.type == ACPI_STATE_C1 &&
964                                         (idle_halt || idle_nomwait)) {
965                                 /*
966                                  * In most cases the C1 space_id obtained from
967                                  * _CST object is FIXED_HARDWARE access mode.
968                                  * But when the option of idle=halt is added,
969                                  * the entry_method type should be changed from
970                                  * CSTATE_FFH to CSTATE_HALT.
971                                  * When the option of idle=nomwait is added,
972                                  * the C1 entry_method type should be
973                                  * CSTATE_HALT.
974                                  */
975                                 cx.entry_method = ACPI_CSTATE_HALT;
976                                 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
977                         }
978                 } else {
979                         snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
980                                  cx.address);
981                 }
982
983                 if (cx.type == ACPI_STATE_C1) {
984                         cx.valid = 1;
985                 }
986
987                 obj = &(element->package.elements[2]);
988                 if (obj->type != ACPI_TYPE_INTEGER)
989                         continue;
990
991                 cx.latency = obj->integer.value;
992
993                 obj = &(element->package.elements[3]);
994                 if (obj->type != ACPI_TYPE_INTEGER)
995                         continue;
996
997                 cx.power = obj->integer.value;
998
999                 current_count++;
1000                 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
1001
1002                 /*
1003                  * We support total ACPI_PROCESSOR_MAX_POWER - 1
1004                  * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
1005                  */
1006                 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
1007                         printk(KERN_WARNING
1008                                "Limiting number of power states to max (%d)\n",
1009                                ACPI_PROCESSOR_MAX_POWER);
1010                         printk(KERN_WARNING
1011                                "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
1012                         break;
1013                 }
1014         }
1015
1016         ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
1017                           current_count));
1018
1019         /* Validate number of power states discovered */
1020         if (current_count < 2)
1021                 status = -EFAULT;
1022
1023       end:
1024         kfree(buffer.pointer);
1025
1026         return status;
1027 }
1028
1029 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
1030 {
1031
1032         if (!cx->address)
1033                 return;
1034
1035         /*
1036          * C2 latency must be less than or equal to 100
1037          * microseconds.
1038          */
1039         else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
1040                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1041                                   "latency too large [%d]\n", cx->latency));
1042                 return;
1043         }
1044
1045         /*
1046          * Otherwise we've met all of our C2 requirements.
1047          * Normalize the C2 latency to expidite policy
1048          */
1049         cx->valid = 1;
1050
1051 #ifndef CONFIG_CPU_IDLE
1052         cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
1053 #else
1054         cx->latency_ticks = cx->latency;
1055 #endif
1056
1057         return;
1058 }
1059
1060 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
1061                                            struct acpi_processor_cx *cx)
1062 {
1063         static int bm_check_flag;
1064
1065
1066         if (!cx->address)
1067                 return;
1068
1069         /*
1070          * C3 latency must be less than or equal to 1000
1071          * microseconds.
1072          */
1073         else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
1074                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1075                                   "latency too large [%d]\n", cx->latency));
1076                 return;
1077         }
1078
1079         /*
1080          * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
1081          * DMA transfers are used by any ISA device to avoid livelock.
1082          * Note that we could disable Type-F DMA (as recommended by
1083          * the erratum), but this is known to disrupt certain ISA
1084          * devices thus we take the conservative approach.
1085          */
1086         else if (errata.piix4.fdma) {
1087                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1088                                   "C3 not supported on PIIX4 with Type-F DMA\n"));
1089                 return;
1090         }
1091
1092         /* All the logic here assumes flags.bm_check is same across all CPUs */
1093         if (!bm_check_flag) {
1094                 /* Determine whether bm_check is needed based on CPU  */
1095                 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
1096                 bm_check_flag = pr->flags.bm_check;
1097         } else {
1098                 pr->flags.bm_check = bm_check_flag;
1099         }
1100
1101         if (pr->flags.bm_check) {
1102                 if (!pr->flags.bm_control) {
1103                         if (pr->flags.has_cst != 1) {
1104                                 /* bus mastering control is necessary */
1105                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1106                                         "C3 support requires BM control\n"));
1107                                 return;
1108                         } else {
1109                                 /* Here we enter C3 without bus mastering */
1110                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1111                                         "C3 support without BM control\n"));
1112                         }
1113                 }
1114         } else {
1115                 /*
1116                  * WBINVD should be set in fadt, for C3 state to be
1117                  * supported on when bm_check is not required.
1118                  */
1119                 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
1120                         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1121                                           "Cache invalidation should work properly"
1122                                           " for C3 to be enabled on SMP systems\n"));
1123                         return;
1124                 }
1125                 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
1126         }
1127
1128         /*
1129          * Otherwise we've met all of our C3 requirements.
1130          * Normalize the C3 latency to expidite policy.  Enable
1131          * checking of bus mastering status (bm_check) so we can
1132          * use this in our C3 policy
1133          */
1134         cx->valid = 1;
1135
1136 #ifndef CONFIG_CPU_IDLE
1137         cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
1138 #else
1139         cx->latency_ticks = cx->latency;
1140 #endif
1141
1142         return;
1143 }
1144
1145 static int acpi_processor_power_verify(struct acpi_processor *pr)
1146 {
1147         unsigned int i;
1148         unsigned int working = 0;
1149
1150         pr->power.timer_broadcast_on_state = INT_MAX;
1151
1152         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1153                 struct acpi_processor_cx *cx = &pr->power.states[i];
1154
1155                 switch (cx->type) {
1156                 case ACPI_STATE_C1:
1157                         cx->valid = 1;
1158                         break;
1159
1160                 case ACPI_STATE_C2:
1161                         acpi_processor_power_verify_c2(cx);
1162                         if (cx->valid)
1163                                 acpi_timer_check_state(i, pr, cx);
1164                         break;
1165
1166                 case ACPI_STATE_C3:
1167                         acpi_processor_power_verify_c3(pr, cx);
1168                         if (cx->valid)
1169                                 acpi_timer_check_state(i, pr, cx);
1170                         break;
1171                 }
1172
1173                 if (cx->valid)
1174                         working++;
1175         }
1176
1177         acpi_propagate_timer_broadcast(pr);
1178
1179         return (working);
1180 }
1181
1182 static int acpi_processor_get_power_info(struct acpi_processor *pr)
1183 {
1184         unsigned int i;
1185         int result;
1186
1187
1188         /* NOTE: the idle thread may not be running while calling
1189          * this function */
1190
1191         /* Zero initialize all the C-states info. */
1192         memset(pr->power.states, 0, sizeof(pr->power.states));
1193
1194         result = acpi_processor_get_power_info_cst(pr);
1195         if (result == -ENODEV)
1196                 result = acpi_processor_get_power_info_fadt(pr);
1197
1198         if (result)
1199                 return result;
1200
1201         acpi_processor_get_power_info_default(pr);
1202
1203         pr->power.count = acpi_processor_power_verify(pr);
1204
1205 #ifndef CONFIG_CPU_IDLE
1206         /*
1207          * Set Default Policy
1208          * ------------------
1209          * Now that we know which states are supported, set the default
1210          * policy.  Note that this policy can be changed dynamically
1211          * (e.g. encourage deeper sleeps to conserve battery life when
1212          * not on AC).
1213          */
1214         result = acpi_processor_set_power_policy(pr);
1215         if (result)
1216                 return result;
1217 #endif
1218
1219         /*
1220          * if one state of type C2 or C3 is available, mark this
1221          * CPU as being "idle manageable"
1222          */
1223         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1224                 if (pr->power.states[i].valid) {
1225                         pr->power.count = i;
1226                         if (pr->power.states[i].type >= ACPI_STATE_C2)
1227                                 pr->flags.power = 1;
1228                 }
1229         }
1230
1231         return 0;
1232 }
1233
1234 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
1235 {
1236         struct acpi_processor *pr = seq->private;
1237         unsigned int i;
1238
1239
1240         if (!pr)
1241                 goto end;
1242
1243         seq_printf(seq, "active state:            C%zd\n"
1244                    "max_cstate:              C%d\n"
1245                    "bus master activity:     %08x\n"
1246                    "maximum allowed latency: %d usec\n",
1247                    pr->power.state ? pr->power.state - pr->power.states : 0,
1248                    max_cstate, (unsigned)pr->power.bm_activity,
1249                    pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY));
1250
1251         seq_puts(seq, "states:\n");
1252
1253         for (i = 1; i <= pr->power.count; i++) {
1254                 seq_printf(seq, "   %cC%d:                  ",
1255                            (&pr->power.states[i] ==
1256                             pr->power.state ? '*' : ' '), i);
1257
1258                 if (!pr->power.states[i].valid) {
1259                         seq_puts(seq, "<not supported>\n");
1260                         continue;
1261                 }
1262
1263                 switch (pr->power.states[i].type) {
1264                 case ACPI_STATE_C1:
1265                         seq_printf(seq, "type[C1] ");
1266                         break;
1267                 case ACPI_STATE_C2:
1268                         seq_printf(seq, "type[C2] ");
1269                         break;
1270                 case ACPI_STATE_C3:
1271                         seq_printf(seq, "type[C3] ");
1272                         break;
1273                 default:
1274                         seq_printf(seq, "type[--] ");
1275                         break;
1276                 }
1277
1278                 if (pr->power.states[i].promotion.state)
1279                         seq_printf(seq, "promotion[C%zd] ",
1280                                    (pr->power.states[i].promotion.state -
1281                                     pr->power.states));
1282                 else
1283                         seq_puts(seq, "promotion[--] ");
1284
1285                 if (pr->power.states[i].demotion.state)
1286                         seq_printf(seq, "demotion[C%zd] ",
1287                                    (pr->power.states[i].demotion.state -
1288                                     pr->power.states));
1289                 else
1290                         seq_puts(seq, "demotion[--] ");
1291
1292                 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
1293                            pr->power.states[i].latency,
1294                            pr->power.states[i].usage,
1295                            (unsigned long long)pr->power.states[i].time);
1296         }
1297
1298       end:
1299         return 0;
1300 }
1301
1302 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
1303 {
1304         return single_open(file, acpi_processor_power_seq_show,
1305                            PDE(inode)->data);
1306 }
1307
1308 static const struct file_operations acpi_processor_power_fops = {
1309         .owner = THIS_MODULE,
1310         .open = acpi_processor_power_open_fs,
1311         .read = seq_read,
1312         .llseek = seq_lseek,
1313         .release = single_release,
1314 };
1315
1316 #ifndef CONFIG_CPU_IDLE
1317
1318 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1319 {
1320         int result = 0;
1321
1322         if (boot_option_idle_override)
1323                 return 0;
1324
1325         if (!pr)
1326                 return -EINVAL;
1327
1328         if (nocst) {
1329                 return -ENODEV;
1330         }
1331
1332         if (!pr->flags.power_setup_done)
1333                 return -ENODEV;
1334
1335         /* Fall back to the default idle loop */
1336         pm_idle = pm_idle_save;
1337         synchronize_sched();    /* Relies on interrupts forcing exit from idle. */
1338
1339         pr->flags.power = 0;
1340         result = acpi_processor_get_power_info(pr);
1341         if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
1342                 pm_idle = acpi_processor_idle;
1343
1344         return result;
1345 }
1346
1347 #ifdef CONFIG_SMP
1348 static void smp_callback(void *v)
1349 {
1350         /* we already woke the CPU up, nothing more to do */
1351 }
1352
1353 /*
1354  * This function gets called when a part of the kernel has a new latency
1355  * requirement.  This means we need to get all processors out of their C-state,
1356  * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1357  * wakes them all right up.
1358  */
1359 static int acpi_processor_latency_notify(struct notifier_block *b,
1360                 unsigned long l, void *v)
1361 {
1362         smp_call_function(smp_callback, NULL, 1);
1363         return NOTIFY_OK;
1364 }
1365
1366 static struct notifier_block acpi_processor_latency_notifier = {
1367         .notifier_call = acpi_processor_latency_notify,
1368 };
1369
1370 #endif
1371
1372 #else /* CONFIG_CPU_IDLE */
1373
1374 /**
1375  * acpi_idle_bm_check - checks if bus master activity was detected
1376  */
1377 static int acpi_idle_bm_check(void)
1378 {
1379         u32 bm_status = 0;
1380
1381         acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
1382         if (bm_status)
1383                 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
1384         /*
1385          * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
1386          * the true state of bus mastering activity; forcing us to
1387          * manually check the BMIDEA bit of each IDE channel.
1388          */
1389         else if (errata.piix4.bmisx) {
1390                 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
1391                     || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
1392                         bm_status = 1;
1393         }
1394         return bm_status;
1395 }
1396
1397 /**
1398  * acpi_idle_update_bm_rld - updates the BM_RLD bit depending on target state
1399  * @pr: the processor
1400  * @target: the new target state
1401  */
1402 static inline void acpi_idle_update_bm_rld(struct acpi_processor *pr,
1403                                            struct acpi_processor_cx *target)
1404 {
1405         if (pr->flags.bm_rld_set && target->type != ACPI_STATE_C3) {
1406                 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
1407                 pr->flags.bm_rld_set = 0;
1408         }
1409
1410         if (!pr->flags.bm_rld_set && target->type == ACPI_STATE_C3) {
1411                 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
1412                 pr->flags.bm_rld_set = 1;
1413         }
1414 }
1415
1416 /**
1417  * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
1418  * @cx: cstate data
1419  *
1420  * Caller disables interrupt before call and enables interrupt after return.
1421  */
1422 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
1423 {
1424         /* Don't trace irqs off for idle */
1425         stop_critical_timings();
1426         if (cx->entry_method == ACPI_CSTATE_FFH) {
1427                 /* Call into architectural FFH based C-state */
1428                 acpi_processor_ffh_cstate_enter(cx);
1429         } else if (cx->entry_method == ACPI_CSTATE_HALT) {
1430                 acpi_safe_halt();
1431         } else {
1432                 int unused;
1433                 /* IO port based C-state */
1434                 inb(cx->address);
1435                 /* Dummy wait op - must do something useless after P_LVL2 read
1436                    because chipsets cannot guarantee that STPCLK# signal
1437                    gets asserted in time to freeze execution properly. */
1438                 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
1439         }
1440         start_critical_timings();
1441 }
1442
1443 /**
1444  * acpi_idle_enter_c1 - enters an ACPI C1 state-type
1445  * @dev: the target CPU
1446  * @state: the state data
1447  *
1448  * This is equivalent to the HALT instruction.
1449  */
1450 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
1451                               struct cpuidle_state *state)
1452 {
1453         u32 t1, t2;
1454         struct acpi_processor *pr;
1455         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
1456
1457         pr = __get_cpu_var(processors);
1458
1459         if (unlikely(!pr))
1460                 return 0;
1461
1462         local_irq_disable();
1463
1464         /* Do not access any ACPI IO ports in suspend path */
1465         if (acpi_idle_suspend) {
1466                 acpi_safe_halt();
1467                 local_irq_enable();
1468                 return 0;
1469         }
1470
1471         if (pr->flags.bm_check)
1472                 acpi_idle_update_bm_rld(pr, cx);
1473
1474         t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1475         acpi_idle_do_entry(cx);
1476         t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1477
1478         local_irq_enable();
1479         cx->usage++;
1480
1481         return ticks_elapsed_in_us(t1, t2);
1482 }
1483
1484 /**
1485  * acpi_idle_enter_simple - enters an ACPI state without BM handling
1486  * @dev: the target CPU
1487  * @state: the state data
1488  */
1489 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
1490                                   struct cpuidle_state *state)
1491 {
1492         struct acpi_processor *pr;
1493         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
1494         u32 t1, t2;
1495         int sleep_ticks = 0;
1496
1497         pr = __get_cpu_var(processors);
1498
1499         if (unlikely(!pr))
1500                 return 0;
1501
1502         if (acpi_idle_suspend)
1503                 return(acpi_idle_enter_c1(dev, state));
1504
1505         local_irq_disable();
1506         current_thread_info()->status &= ~TS_POLLING;
1507         /*
1508          * TS_POLLING-cleared state must be visible before we test
1509          * NEED_RESCHED:
1510          */
1511         smp_mb();
1512
1513         if (unlikely(need_resched())) {
1514                 current_thread_info()->status |= TS_POLLING;
1515                 local_irq_enable();
1516                 return 0;
1517         }
1518
1519         /*
1520          * Must be done before busmaster disable as we might need to
1521          * access HPET !
1522          */
1523         acpi_state_timer_broadcast(pr, cx, 1);
1524
1525         if (pr->flags.bm_check)
1526                 acpi_idle_update_bm_rld(pr, cx);
1527
1528         if (cx->type == ACPI_STATE_C3)
1529                 ACPI_FLUSH_CPU_CACHE();
1530
1531         t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1532         /* Tell the scheduler that we are going deep-idle: */
1533         sched_clock_idle_sleep_event();
1534         acpi_idle_do_entry(cx);
1535         t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1536
1537 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
1538         /* TSC could halt in idle, so notify users */
1539         if (tsc_halts_in_c(cx->type))
1540                 mark_tsc_unstable("TSC halts in idle");;
1541 #endif
1542         sleep_ticks = ticks_elapsed(t1, t2);
1543
1544         /* Tell the scheduler how much we idled: */
1545         sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
1546
1547         local_irq_enable();
1548         current_thread_info()->status |= TS_POLLING;
1549
1550         cx->usage++;
1551
1552         acpi_state_timer_broadcast(pr, cx, 0);
1553         cx->time += sleep_ticks;
1554         return ticks_elapsed_in_us(t1, t2);
1555 }
1556
1557 static int c3_cpu_count;
1558 static DEFINE_SPINLOCK(c3_lock);
1559
1560 /**
1561  * acpi_idle_enter_bm - enters C3 with proper BM handling
1562  * @dev: the target CPU
1563  * @state: the state data
1564  *
1565  * If BM is detected, the deepest non-C3 idle state is entered instead.
1566  */
1567 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
1568                               struct cpuidle_state *state)
1569 {
1570         struct acpi_processor *pr;
1571         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
1572         u32 t1, t2;
1573         int sleep_ticks = 0;
1574
1575         pr = __get_cpu_var(processors);
1576
1577         if (unlikely(!pr))
1578                 return 0;
1579
1580         if (acpi_idle_suspend)
1581                 return(acpi_idle_enter_c1(dev, state));
1582
1583         if (acpi_idle_bm_check()) {
1584                 if (dev->safe_state) {
1585                         return dev->safe_state->enter(dev, dev->safe_state);
1586                 } else {
1587                         local_irq_disable();
1588                         acpi_safe_halt();
1589                         local_irq_enable();
1590                         return 0;
1591                 }
1592         }
1593
1594         local_irq_disable();
1595         current_thread_info()->status &= ~TS_POLLING;
1596         /*
1597          * TS_POLLING-cleared state must be visible before we test
1598          * NEED_RESCHED:
1599          */
1600         smp_mb();
1601
1602         if (unlikely(need_resched())) {
1603                 current_thread_info()->status |= TS_POLLING;
1604                 local_irq_enable();
1605                 return 0;
1606         }
1607
1608         acpi_unlazy_tlb(smp_processor_id());
1609
1610         /* Tell the scheduler that we are going deep-idle: */
1611         sched_clock_idle_sleep_event();
1612         /*
1613          * Must be done before busmaster disable as we might need to
1614          * access HPET !
1615          */
1616         acpi_state_timer_broadcast(pr, cx, 1);
1617
1618         acpi_idle_update_bm_rld(pr, cx);
1619
1620         /*
1621          * disable bus master
1622          * bm_check implies we need ARB_DIS
1623          * !bm_check implies we need cache flush
1624          * bm_control implies whether we can do ARB_DIS
1625          *
1626          * That leaves a case where bm_check is set and bm_control is
1627          * not set. In that case we cannot do much, we enter C3
1628          * without doing anything.
1629          */
1630         if (pr->flags.bm_check && pr->flags.bm_control) {
1631                 spin_lock(&c3_lock);
1632                 c3_cpu_count++;
1633                 /* Disable bus master arbitration when all CPUs are in C3 */
1634                 if (c3_cpu_count == num_online_cpus())
1635                         acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
1636                 spin_unlock(&c3_lock);
1637         } else if (!pr->flags.bm_check) {
1638                 ACPI_FLUSH_CPU_CACHE();
1639         }
1640
1641         t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1642         acpi_idle_do_entry(cx);
1643         t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1644
1645         /* Re-enable bus master arbitration */
1646         if (pr->flags.bm_check && pr->flags.bm_control) {
1647                 spin_lock(&c3_lock);
1648                 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
1649                 c3_cpu_count--;
1650                 spin_unlock(&c3_lock);
1651         }
1652
1653 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
1654         /* TSC could halt in idle, so notify users */
1655         if (tsc_halts_in_c(ACPI_STATE_C3))
1656                 mark_tsc_unstable("TSC halts in idle");
1657 #endif
1658         sleep_ticks = ticks_elapsed(t1, t2);
1659         /* Tell the scheduler how much we idled: */
1660         sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
1661
1662         local_irq_enable();
1663         current_thread_info()->status |= TS_POLLING;
1664
1665         cx->usage++;
1666
1667         acpi_state_timer_broadcast(pr, cx, 0);
1668         cx->time += sleep_ticks;
1669         return ticks_elapsed_in_us(t1, t2);
1670 }
1671
1672 struct cpuidle_driver acpi_idle_driver = {
1673         .name =         "acpi_idle",
1674         .owner =        THIS_MODULE,
1675 };
1676
1677 /**
1678  * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1679  * @pr: the ACPI processor
1680  */
1681 static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
1682 {
1683         int i, count = CPUIDLE_DRIVER_STATE_START;
1684         struct acpi_processor_cx *cx;
1685         struct cpuidle_state *state;
1686         struct cpuidle_device *dev = &pr->power.dev;
1687
1688         if (!pr->flags.power_setup_done)
1689                 return -EINVAL;
1690
1691         if (pr->flags.power == 0) {
1692                 return -EINVAL;
1693         }
1694
1695         dev->cpu = pr->id;
1696         for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1697                 dev->states[i].name[0] = '\0';
1698                 dev->states[i].desc[0] = '\0';
1699         }
1700
1701         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1702                 cx = &pr->power.states[i];
1703                 state = &dev->states[count];
1704
1705                 if (!cx->valid)
1706                         continue;
1707
1708 #ifdef CONFIG_HOTPLUG_CPU
1709                 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1710                     !pr->flags.has_cst &&
1711                     !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1712                         continue;
1713 #endif
1714                 cpuidle_set_statedata(state, cx);
1715
1716                 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1717                 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1718                 state->exit_latency = cx->latency;
1719                 state->target_residency = cx->latency * latency_factor;
1720                 state->power_usage = cx->power;
1721
1722                 state->flags = 0;
1723                 switch (cx->type) {
1724                         case ACPI_STATE_C1:
1725                         state->flags |= CPUIDLE_FLAG_SHALLOW;
1726                         if (cx->entry_method == ACPI_CSTATE_FFH)
1727                                 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1728
1729                         state->enter = acpi_idle_enter_c1;
1730                         dev->safe_state = state;
1731                         break;
1732
1733                         case ACPI_STATE_C2:
1734                         state->flags |= CPUIDLE_FLAG_BALANCED;
1735                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1736                         state->enter = acpi_idle_enter_simple;
1737                         dev->safe_state = state;
1738                         break;
1739
1740                         case ACPI_STATE_C3:
1741                         state->flags |= CPUIDLE_FLAG_DEEP;
1742                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1743                         state->flags |= CPUIDLE_FLAG_CHECK_BM;
1744                         state->enter = pr->flags.bm_check ?
1745                                         acpi_idle_enter_bm :
1746                                         acpi_idle_enter_simple;
1747                         break;
1748                 }
1749
1750                 count++;
1751                 if (count == CPUIDLE_STATE_MAX)
1752                         break;
1753         }
1754
1755         dev->state_count = count;
1756
1757         if (!count)
1758                 return -EINVAL;
1759
1760         return 0;
1761 }
1762
1763 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1764 {
1765         int ret = 0;
1766
1767         if (boot_option_idle_override)
1768                 return 0;
1769
1770         if (!pr)
1771                 return -EINVAL;
1772
1773         if (nocst) {
1774                 return -ENODEV;
1775         }
1776
1777         if (!pr->flags.power_setup_done)
1778                 return -ENODEV;
1779
1780         cpuidle_pause_and_lock();
1781         cpuidle_disable_device(&pr->power.dev);
1782         acpi_processor_get_power_info(pr);
1783         if (pr->flags.power) {
1784                 acpi_processor_setup_cpuidle(pr);
1785                 ret = cpuidle_enable_device(&pr->power.dev);
1786         }
1787         cpuidle_resume_and_unlock();
1788
1789         return ret;
1790 }
1791
1792 #endif /* CONFIG_CPU_IDLE */
1793
1794 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1795                               struct acpi_device *device)
1796 {
1797         acpi_status status = 0;
1798         static int first_run;
1799         struct proc_dir_entry *entry = NULL;
1800         unsigned int i;
1801
1802         if (boot_option_idle_override)
1803                 return 0;
1804
1805         if (!first_run) {
1806                 if (idle_halt) {
1807                         /*
1808                          * When the boot option of "idle=halt" is added, halt
1809                          * is used for CPU IDLE.
1810                          * In such case C2/C3 is meaningless. So the max_cstate
1811                          * is set to one.
1812                          */
1813                         max_cstate = 1;
1814                 }
1815                 dmi_check_system(processor_power_dmi_table);
1816                 max_cstate = acpi_processor_cstate_check(max_cstate);
1817                 if (max_cstate < ACPI_C_STATES_MAX)
1818                         printk(KERN_NOTICE
1819                                "ACPI: processor limited to max C-state %d\n",
1820                                max_cstate);
1821                 first_run++;
1822 #if !defined(CONFIG_CPU_IDLE) && defined(CONFIG_SMP)
1823                 pm_qos_add_notifier(PM_QOS_CPU_DMA_LATENCY,
1824                                 &acpi_processor_latency_notifier);
1825 #endif
1826         }
1827
1828         if (!pr)
1829                 return -EINVAL;
1830
1831         if (acpi_gbl_FADT.cst_control && !nocst) {
1832                 status =
1833                     acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1834                 if (ACPI_FAILURE(status)) {
1835                         ACPI_EXCEPTION((AE_INFO, status,
1836                                         "Notifying BIOS of _CST ability failed"));
1837                 }
1838         }
1839
1840         acpi_processor_get_power_info(pr);
1841         pr->flags.power_setup_done = 1;
1842
1843         /*
1844          * Install the idle handler if processor power management is supported.
1845          * Note that we use previously set idle handler will be used on
1846          * platforms that only support C1.
1847          */
1848         if (pr->flags.power) {
1849 #ifdef CONFIG_CPU_IDLE
1850                 acpi_processor_setup_cpuidle(pr);
1851                 if (cpuidle_register_device(&pr->power.dev))
1852                         return -EIO;
1853 #endif
1854
1855                 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1856                 for (i = 1; i <= pr->power.count; i++)
1857                         if (pr->power.states[i].valid)
1858                                 printk(" C%d[C%d]", i,
1859                                        pr->power.states[i].type);
1860                 printk(")\n");
1861
1862 #ifndef CONFIG_CPU_IDLE
1863                 if (pr->id == 0) {
1864                         pm_idle_save = pm_idle;
1865                         pm_idle = acpi_processor_idle;
1866                 }
1867 #endif
1868         }
1869
1870         /* 'power' [R] */
1871         entry = proc_create_data(ACPI_PROCESSOR_FILE_POWER,
1872                                  S_IRUGO, acpi_device_dir(device),
1873                                  &acpi_processor_power_fops,
1874                                  acpi_driver_data(device));
1875         if (!entry)
1876                 return -EIO;
1877         return 0;
1878 }
1879
1880 int acpi_processor_power_exit(struct acpi_processor *pr,
1881                               struct acpi_device *device)
1882 {
1883         if (boot_option_idle_override)
1884                 return 0;
1885
1886 #ifdef CONFIG_CPU_IDLE
1887         cpuidle_unregister_device(&pr->power.dev);
1888 #endif
1889         pr->flags.power_setup_done = 0;
1890
1891         if (acpi_device_dir(device))
1892                 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1893                                   acpi_device_dir(device));
1894
1895 #ifndef CONFIG_CPU_IDLE
1896
1897         /* Unregister the idle handler when processor #0 is removed. */
1898         if (pr->id == 0) {
1899                 pm_idle = pm_idle_save;
1900
1901                 /*
1902                  * We are about to unload the current idle thread pm callback
1903                  * (pm_idle), Wait for all processors to update cached/local
1904                  * copies of pm_idle before proceeding.
1905                  */
1906                 cpu_idle_wait();
1907 #ifdef CONFIG_SMP
1908                 pm_qos_remove_notifier(PM_QOS_CPU_DMA_LATENCY,
1909                                 &acpi_processor_latency_notifier);
1910 #endif
1911         }
1912 #endif
1913
1914         return 0;
1915 }