git.oblomov.eu Git - linux-2.6/blob - drivers/staging/rt2860/common/rtmp_init.c

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         rtmp_init.c
  29
  30         Abstract:
  31         Miniport generic portion header file
  32
  33         Revision History:
  34         Who         When          What
  35         --------    ----------    ----------------------------------------------
  36         Paul Lin    2002-08-01    created
  37     John Chang  2004-08-20    RT2561/2661 use scatter-gather scheme
  38     Jan Lee  2006-09-15    RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
  39 */
  40 #include "../rt_config.h"
  41 #include        "firmware.h"
  42 #include <linux/bitrev.h>
  43
  44 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
  45 ULONG    BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
  46                                         0x00000010, 0x00000020, 0x00000040, 0x00000080,
  47                                         0x00000100, 0x00000200, 0x00000400, 0x00000800,
  48                                         0x00001000, 0x00002000, 0x00004000, 0x00008000,
  49                                         0x00010000, 0x00020000, 0x00040000, 0x00080000,
  50                                         0x00100000, 0x00200000, 0x00400000, 0x00800000,
  51                                         0x01000000, 0x02000000, 0x04000000, 0x08000000,
  52                                         0x10000000, 0x20000000, 0x40000000, 0x80000000};
  53
  54 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
  55
  56 const unsigned short ccitt_16Table[] = {
  57         0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
  58         0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
  59         0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
  60         0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
  61         0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
  62         0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
  63         0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
  64         0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
  65         0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
  66         0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
  67         0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
  68         0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
  69         0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
  70         0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
  71         0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
  72         0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
  73         0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
  74         0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
  75         0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
  76         0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
  77         0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
  78         0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
  79         0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
  80         0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
  81         0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
  82         0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
  83         0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
  84         0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
  85         0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
  86         0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
  87         0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
  88         0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
  89 };
  90 #define ByteCRC16(v, crc) \
  91         (unsigned short)((crc << 8) ^  ccitt_16Table[((crc >> 8) ^ (v)) & 255])
  92
  93 //
  94 // BBP register initialization set
  95 //
  96 REG_PAIR   BBPRegTable[] = {
  97         {BBP_R65,               0x2C},          // fix rssi issue
  98         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
  99         {BBP_R69,               0x12},
 100         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
 101         {BBP_R73,               0x10},
 102         {BBP_R81,               0x37},
 103         {BBP_R82,               0x62},
 104         {BBP_R83,               0x6A},
 105         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
 106         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
 107         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
 108         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
 109         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
 110         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
 111 };
 112 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
 113
 114 //
 115 // RF register initialization set
 116 //
 117
 118 //
 119 // ASIC register initialization sets
 120 //
 121
 122 RTMP_REG_PAIR   MACRegTable[] = {
 123 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
 124         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
 125         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
 126 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
 127         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 128         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 129 #else
 130     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
 131 #endif // HW_BEACON_OFFSET //
 132
 133         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
 134         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
 135         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
 136         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
 137         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
 138         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
 139         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
 140         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
 141         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
 142         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
 143         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
 144         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
 145         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
 146         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
 147         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 148         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 149         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
 150         {GF40_PROT_CFG,                 0x03F44084},
 151         {MM20_PROT_CFG,                 0x01744004},
 152         {MM40_PROT_CFG,                 0x03F54084},
 153         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
 154         {TX_RTS_CFG,                    0x00092b20},
 155         {EXP_ACK_TIME,                  0x002400ca},    // default value
 156         {TXOP_HLDR_ET,                  0x00000002},
 157
 158         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
 159                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
 160                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
 161                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
 162         {XIFS_TIME_CFG,                 0x33a41010},
 163         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
 164 };
 165
 166 RTMP_REG_PAIR   STAMACRegTable[] =      {
 167         {WMM_AIFSN_CFG,         0x00002273},
 168         {WMM_CWMIN_CFG, 0x00002344},
 169         {WMM_CWMAX_CFG, 0x000034aa},
 170 };
 171
 172 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 173 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
 174
 175
 176 // New 8k byte firmware size for RT3071/RT3072
 177 #define FIRMWAREIMAGE_MAX_LENGTH        0x2000
 178 #define FIRMWAREIMAGE_LENGTH            (sizeof (FirmwareImage) / sizeof(UCHAR))
 179 #define FIRMWARE_MAJOR_VERSION  0
 180
 181 #define FIRMWAREIMAGEV1_LENGTH  0x1000
 182 #define FIRMWAREIMAGEV2_LENGTH  0x1000
 183
 184 #define FIRMWARE_MINOR_VERSION  2
 185
 186
 187 /*
 188         ========================================================================
 189
 190         Routine Description:
 191                 Allocate RTMP_ADAPTER data block and do some initialization
 192
 193         Arguments:
 194                 Adapter         Pointer to our adapter
 195
 196         Return Value:
 197                 NDIS_STATUS_SUCCESS
 198                 NDIS_STATUS_FAILURE
 199
 200         IRQL = PASSIVE_LEVEL
 201
 202         Note:
 203
 204         ========================================================================
 205 */
 206 NDIS_STATUS     RTMPAllocAdapterBlock(
 207         IN  PVOID       handle,
 208         OUT     PRTMP_ADAPTER   *ppAdapter)
 209 {
 210         PRTMP_ADAPTER   pAd;
 211         NDIS_STATUS             Status;
 212         INT                     index;
 213         UCHAR                   *pBeaconBuf = NULL;
 214
 215         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
 216
 217         *ppAdapter = NULL;
 218
 219         do
 220         {
 221                 // Allocate RTMP_ADAPTER memory block
 222                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
 223                 if (pBeaconBuf == NULL)
 224                 {
 225                         Status = NDIS_STATUS_FAILURE;
 226                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
 227                         break;
 228                 }
 229
 230                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
 231                 if (Status != NDIS_STATUS_SUCCESS)
 232                 {
 233                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
 234                         break;
 235                 }
 236                 pAd->BeaconBuf = pBeaconBuf;
 237                 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
 238
 239
 240                 // Init spin locks
 241                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
 242                 NdisAllocateSpinLock(&pAd->RxRingLock);
 243
 244                 for (index =0 ; index < NUM_OF_TX_RING; index++)
 245                 {
 246                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
 247                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
 248                         pAd->DeQueueRunning[index] = FALSE;
 249                 }
 250
 251                 NdisAllocateSpinLock(&pAd->irq_lock);
 252
 253         } while (FALSE);
 254
 255         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
 256                 kfree(pBeaconBuf);
 257
 258         *ppAdapter = pAd;
 259
 260         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
 261         return Status;
 262 }
 263
 264 /*
 265         ========================================================================
 266
 267         Routine Description:
 268                 Read initial Tx power per MCS and BW from EEPROM
 269
 270         Arguments:
 271                 Adapter                                         Pointer to our adapter
 272
 273         Return Value:
 274                 None
 275
 276         IRQL = PASSIVE_LEVEL
 277
 278         Note:
 279
 280         ========================================================================
 281 */
 282 VOID    RTMPReadTxPwrPerRate(
 283         IN      PRTMP_ADAPTER   pAd)
 284 {
 285         ULONG           data, Adata, Gdata;
 286         USHORT          i, value, value2;
 287         INT                     Apwrdelta, Gpwrdelta;
 288         UCHAR           t1,t2,t3,t4;
 289         BOOLEAN         bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
 290
 291         //
 292         // Get power delta for 20MHz and 40MHz.
 293         //
 294         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
 295         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
 296         Apwrdelta = 0;
 297         Gpwrdelta = 0;
 298
 299         if ((value2 & 0xff) != 0xff)
 300         {
 301                 if ((value2 & 0x80))
 302                         Gpwrdelta = (value2&0xf);
 303
 304                 if ((value2 & 0x40))
 305                         bGpwrdeltaMinus = FALSE;
 306                 else
 307                         bGpwrdeltaMinus = TRUE;
 308         }
 309         if ((value2 & 0xff00) != 0xff00)
 310         {
 311                 if ((value2 & 0x8000))
 312                         Apwrdelta = ((value2&0xf00)>>8);
 313
 314                 if ((value2 & 0x4000))
 315                         bApwrdeltaMinus = FALSE;
 316                 else
 317                         bApwrdeltaMinus = TRUE;
 318         }
 319         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
 320
 321         //
 322         // Get Txpower per MCS for 20MHz in 2.4G.
 323         //
 324         for (i=0; i<5; i++)
 325         {
 326                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
 327                 data = value;
 328                 if (bApwrdeltaMinus == FALSE)
 329                 {
 330                         t1 = (value&0xf)+(Apwrdelta);
 331                         if (t1 > 0xf)
 332                                 t1 = 0xf;
 333                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 334                         if (t2 > 0xf)
 335                                 t2 = 0xf;
 336                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 337                         if (t3 > 0xf)
 338                                 t3 = 0xf;
 339                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 340                         if (t4 > 0xf)
 341                                 t4 = 0xf;
 342                 }
 343                 else
 344                 {
 345                         if ((value&0xf) > Apwrdelta)
 346                                 t1 = (value&0xf)-(Apwrdelta);
 347                         else
 348                                 t1 = 0;
 349                         if (((value&0xf0)>>4) > Apwrdelta)
 350                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 351                         else
 352                                 t2 = 0;
 353                         if (((value&0xf00)>>8) > Apwrdelta)
 354                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 355                         else
 356                                 t3 = 0;
 357                         if (((value&0xf000)>>12) > Apwrdelta)
 358                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 359                         else
 360                                 t4 = 0;
 361                 }
 362                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 363                 if (bGpwrdeltaMinus == FALSE)
 364                 {
 365                         t1 = (value&0xf)+(Gpwrdelta);
 366                         if (t1 > 0xf)
 367                                 t1 = 0xf;
 368                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 369                         if (t2 > 0xf)
 370                                 t2 = 0xf;
 371                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 372                         if (t3 > 0xf)
 373                                 t3 = 0xf;
 374                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 375                         if (t4 > 0xf)
 376                                 t4 = 0xf;
 377                 }
 378                 else
 379                 {
 380                         if ((value&0xf) > Gpwrdelta)
 381                                 t1 = (value&0xf)-(Gpwrdelta);
 382                         else
 383                                 t1 = 0;
 384                         if (((value&0xf0)>>4) > Gpwrdelta)
 385                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 386                         else
 387                                 t2 = 0;
 388                         if (((value&0xf00)>>8) > Gpwrdelta)
 389                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 390                         else
 391                                 t3 = 0;
 392                         if (((value&0xf000)>>12) > Gpwrdelta)
 393                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 394                         else
 395                                 t4 = 0;
 396                 }
 397                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 398
 399                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
 400                 if (bApwrdeltaMinus == FALSE)
 401                 {
 402                         t1 = (value&0xf)+(Apwrdelta);
 403                         if (t1 > 0xf)
 404                                 t1 = 0xf;
 405                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 406                         if (t2 > 0xf)
 407                                 t2 = 0xf;
 408                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 409                         if (t3 > 0xf)
 410                                 t3 = 0xf;
 411                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 412                         if (t4 > 0xf)
 413                                 t4 = 0xf;
 414                 }
 415                 else
 416                 {
 417                         if ((value&0xf) > Apwrdelta)
 418                                 t1 = (value&0xf)-(Apwrdelta);
 419                         else
 420                                 t1 = 0;
 421                         if (((value&0xf0)>>4) > Apwrdelta)
 422                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 423                         else
 424                                 t2 = 0;
 425                         if (((value&0xf00)>>8) > Apwrdelta)
 426                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 427                         else
 428                                 t3 = 0;
 429                         if (((value&0xf000)>>12) > Apwrdelta)
 430                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 431                         else
 432                                 t4 = 0;
 433                 }
 434                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 435                 if (bGpwrdeltaMinus == FALSE)
 436                 {
 437                         t1 = (value&0xf)+(Gpwrdelta);
 438                         if (t1 > 0xf)
 439                                 t1 = 0xf;
 440                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 441                         if (t2 > 0xf)
 442                                 t2 = 0xf;
 443                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 444                         if (t3 > 0xf)
 445                                 t3 = 0xf;
 446                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 447                         if (t4 > 0xf)
 448                                 t4 = 0xf;
 449                 }
 450                 else
 451                 {
 452                         if ((value&0xf) > Gpwrdelta)
 453                                 t1 = (value&0xf)-(Gpwrdelta);
 454                         else
 455                                 t1 = 0;
 456                         if (((value&0xf0)>>4) > Gpwrdelta)
 457                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 458                         else
 459                                 t2 = 0;
 460                         if (((value&0xf00)>>8) > Gpwrdelta)
 461                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 462                         else
 463                                 t3 = 0;
 464                         if (((value&0xf000)>>12) > Gpwrdelta)
 465                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 466                         else
 467                                 t4 = 0;
 468                 }
 469                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 470                 data |= (value<<16);
 471
 472                 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
 473                 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
 474
 475                 if (data != 0xffffffff)
 476                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
 477                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
 478         }
 479
 480         //
 481         // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
 482         //
 483         bValid = TRUE;
 484         for (i=0; i<6; i++)
 485         {
 486                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
 487                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 488                 {
 489                         bValid = FALSE;
 490                         break;
 491                 }
 492         }
 493
 494         //
 495         // Get Txpower per MCS for 40MHz in 2.4G.
 496         //
 497         if (bValid)
 498         {
 499                 for (i=0; i<4; i++)
 500                 {
 501                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
 502                         if (bGpwrdeltaMinus == FALSE)
 503                         {
 504                                 t1 = (value&0xf)+(Gpwrdelta);
 505                                 if (t1 > 0xf)
 506                                         t1 = 0xf;
 507                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 508                                 if (t2 > 0xf)
 509                                         t2 = 0xf;
 510                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 511                                 if (t3 > 0xf)
 512                                         t3 = 0xf;
 513                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 514                                 if (t4 > 0xf)
 515                                         t4 = 0xf;
 516                         }
 517                         else
 518                         {
 519                                 if ((value&0xf) > Gpwrdelta)
 520                                         t1 = (value&0xf)-(Gpwrdelta);
 521                                 else
 522                                         t1 = 0;
 523                                 if (((value&0xf0)>>4) > Gpwrdelta)
 524                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 525                                 else
 526                                         t2 = 0;
 527                                 if (((value&0xf00)>>8) > Gpwrdelta)
 528                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 529                                 else
 530                                         t3 = 0;
 531                                 if (((value&0xf000)>>12) > Gpwrdelta)
 532                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 533                                 else
 534                                         t4 = 0;
 535                         }
 536                         Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 537
 538                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
 539                         if (bGpwrdeltaMinus == FALSE)
 540                         {
 541                                 t1 = (value&0xf)+(Gpwrdelta);
 542                                 if (t1 > 0xf)
 543                                         t1 = 0xf;
 544                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 545                                 if (t2 > 0xf)
 546                                         t2 = 0xf;
 547                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 548                                 if (t3 > 0xf)
 549                                         t3 = 0xf;
 550                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 551                                 if (t4 > 0xf)
 552                                         t4 = 0xf;
 553                         }
 554                         else
 555                         {
 556                                 if ((value&0xf) > Gpwrdelta)
 557                                         t1 = (value&0xf)-(Gpwrdelta);
 558                                 else
 559                                         t1 = 0;
 560                                 if (((value&0xf0)>>4) > Gpwrdelta)
 561                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 562                                 else
 563                                         t2 = 0;
 564                                 if (((value&0xf00)>>8) > Gpwrdelta)
 565                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 566                                 else
 567                                         t3 = 0;
 568                                 if (((value&0xf000)>>12) > Gpwrdelta)
 569                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 570                                 else
 571                                         t4 = 0;
 572                         }
 573                         Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 574
 575                         if (i == 0)
 576                                 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
 577                         else
 578                                 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
 579
 580                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
 581                 }
 582         }
 583
 584         //
 585         // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 586         //
 587         bValid = TRUE;
 588         for (i=0; i<8; i++)
 589         {
 590                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
 591                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 592                 {
 593                         bValid = FALSE;
 594                         break;
 595                 }
 596         }
 597
 598         //
 599         // Get Txpower per MCS for 20MHz in 5G.
 600         //
 601         if (bValid)
 602         {
 603                 for (i=0; i<5; i++)
 604                 {
 605                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
 606                         if (bApwrdeltaMinus == FALSE)
 607                         {
 608                                 t1 = (value&0xf)+(Apwrdelta);
 609                                 if (t1 > 0xf)
 610                                         t1 = 0xf;
 611                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 612                                 if (t2 > 0xf)
 613                                         t2 = 0xf;
 614                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 615                                 if (t3 > 0xf)
 616                                         t3 = 0xf;
 617                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 618                                 if (t4 > 0xf)
 619                                         t4 = 0xf;
 620                         }
 621                         else
 622                         {
 623                                 if ((value&0xf) > Apwrdelta)
 624                                         t1 = (value&0xf)-(Apwrdelta);
 625                                 else
 626                                         t1 = 0;
 627                                 if (((value&0xf0)>>4) > Apwrdelta)
 628                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 629                                 else
 630                                         t2 = 0;
 631                                 if (((value&0xf00)>>8) > Apwrdelta)
 632                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 633                                 else
 634                                         t3 = 0;
 635                                 if (((value&0xf000)>>12) > Apwrdelta)
 636                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 637                                 else
 638                                         t4 = 0;
 639                         }
 640                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 641
 642                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
 643                         if (bApwrdeltaMinus == FALSE)
 644                         {
 645                                 t1 = (value&0xf)+(Apwrdelta);
 646                                 if (t1 > 0xf)
 647                                         t1 = 0xf;
 648                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 649                                 if (t2 > 0xf)
 650                                         t2 = 0xf;
 651                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 652                                 if (t3 > 0xf)
 653                                         t3 = 0xf;
 654                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 655                                 if (t4 > 0xf)
 656                                         t4 = 0xf;
 657                         }
 658                         else
 659                         {
 660                                 if ((value&0xf) > Apwrdelta)
 661                                         t1 = (value&0xf)-(Apwrdelta);
 662                                 else
 663                                         t1 = 0;
 664                                 if (((value&0xf0)>>4) > Apwrdelta)
 665                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 666                                 else
 667                                         t2 = 0;
 668                                 if (((value&0xf00)>>8) > Apwrdelta)
 669                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 670                                 else
 671                                         t3 = 0;
 672                                 if (((value&0xf000)>>12) > Apwrdelta)
 673                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 674                                 else
 675                                         t4 = 0;
 676                         }
 677                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 678
 679                         if (i == 0)
 680                                 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 681                         else
 682                                 pAd->Tx20MPwrCfgABand[i] = Adata;
 683
 684                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
 685                 }
 686         }
 687
 688         //
 689         // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 690         //
 691         bValid = TRUE;
 692         for (i=0; i<6; i++)
 693         {
 694                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
 695                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 696                 {
 697                         bValid = FALSE;
 698                         break;
 699                 }
 700         }
 701
 702         //
 703         // Get Txpower per MCS for 40MHz in 5G.
 704         //
 705         if (bValid)
 706         {
 707                 for (i=0; i<4; i++)
 708                 {
 709                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
 710                         if (bApwrdeltaMinus == FALSE)
 711                         {
 712                                 t1 = (value&0xf)+(Apwrdelta);
 713                                 if (t1 > 0xf)
 714                                         t1 = 0xf;
 715                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 716                                 if (t2 > 0xf)
 717                                         t2 = 0xf;
 718                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 719                                 if (t3 > 0xf)
 720                                         t3 = 0xf;
 721                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 722                                 if (t4 > 0xf)
 723                                         t4 = 0xf;
 724                         }
 725                         else
 726                         {
 727                                 if ((value&0xf) > Apwrdelta)
 728                                         t1 = (value&0xf)-(Apwrdelta);
 729                                 else
 730                                         t1 = 0;
 731                                 if (((value&0xf0)>>4) > Apwrdelta)
 732                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 733                                 else
 734                                         t2 = 0;
 735                                 if (((value&0xf00)>>8) > Apwrdelta)
 736                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 737                                 else
 738                                         t3 = 0;
 739                                 if (((value&0xf000)>>12) > Apwrdelta)
 740                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 741                                 else
 742                                         t4 = 0;
 743                         }
 744                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 745
 746                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
 747                         if (bApwrdeltaMinus == FALSE)
 748                         {
 749                                 t1 = (value&0xf)+(Apwrdelta);
 750                                 if (t1 > 0xf)
 751                                         t1 = 0xf;
 752                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 753                                 if (t2 > 0xf)
 754                                         t2 = 0xf;
 755                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 756                                 if (t3 > 0xf)
 757                                         t3 = 0xf;
 758                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 759                                 if (t4 > 0xf)
 760                                         t4 = 0xf;
 761                         }
 762                         else
 763                         {
 764                                 if ((value&0xf) > Apwrdelta)
 765                                         t1 = (value&0xf)-(Apwrdelta);
 766                                 else
 767                                         t1 = 0;
 768                                 if (((value&0xf0)>>4) > Apwrdelta)
 769                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 770                                 else
 771                                         t2 = 0;
 772                                 if (((value&0xf00)>>8) > Apwrdelta)
 773                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 774                                 else
 775                                         t3 = 0;
 776                                 if (((value&0xf000)>>12) > Apwrdelta)
 777                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 778                                 else
 779                                         t4 = 0;
 780                         }
 781                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 782
 783                         if (i == 0)
 784                                 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 785                         else
 786                                 pAd->Tx40MPwrCfgABand[i+1] = Adata;
 787
 788                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
 789                 }
 790         }
 791 }
 792
 793
 794 /*
 795         ========================================================================
 796
 797         Routine Description:
 798                 Read initial channel power parameters from EEPROM
 799
 800         Arguments:
 801                 Adapter                                         Pointer to our adapter
 802
 803         Return Value:
 804                 None
 805
 806         IRQL = PASSIVE_LEVEL
 807
 808         Note:
 809
 810         ========================================================================
 811 */
 812 VOID    RTMPReadChannelPwr(
 813         IN      PRTMP_ADAPTER   pAd)
 814 {
 815         UCHAR                           i, choffset;
 816         EEPROM_TX_PWR_STRUC         Power;
 817         EEPROM_TX_PWR_STRUC         Power2;
 818
 819         // Read Tx power value for all channels
 820         // Value from 1 - 0x7f. Default value is 24.
 821         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
 822         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
 823
 824         // 0. 11b/g, ch1 - ch 14
 825         for (i = 0; i < 7; i++)
 826         {
 827                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
 828                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
 829                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
 830                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
 831
 832                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
 833                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
 834                 else
 835                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
 836
 837                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
 838                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
 839                 else
 840                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
 841
 842                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
 843                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
 844                 else
 845                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
 846
 847                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
 848                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
 849                 else
 850                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
 851         }
 852
 853         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
 854         // 1.1 Fill up channel
 855         choffset = 14;
 856         for (i = 0; i < 4; i++)
 857         {
 858                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
 859                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 860                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 861
 862                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
 863                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 864                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 865
 866                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
 867                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 868                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 869         }
 870
 871         // 1.2 Fill up power
 872         for (i = 0; i < 6; i++)
 873         {
 874                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
 875                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
 876
 877                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 878                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 879
 880                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 881                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 882
 883                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 884                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 885
 886                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 887                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 888         }
 889
 890         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
 891         // 2.1 Fill up channel
 892         choffset = 14 + 12;
 893         for (i = 0; i < 5; i++)
 894         {
 895                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
 896                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 897                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 898
 899                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
 900                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 901                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 902
 903                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
 904                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 905                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 906         }
 907         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
 908         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 909         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 910
 911         // 2.2 Fill up power
 912         for (i = 0; i < 8; i++)
 913         {
 914                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 915                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 916
 917                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 918                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 919
 920                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 921                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 922
 923                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 924                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 925
 926                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 927                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 928         }
 929
 930         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
 931         // 3.1 Fill up channel
 932         choffset = 14 + 12 + 16;
 933         for (i = 0; i < 2; i++)
 934         {
 935                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
 936                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 937                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 938
 939                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
 940                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 941                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 942
 943                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
 944                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 945                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 946         }
 947         pAd->TxPower[3 * 2 + choffset + 0].Channel              = 165;
 948         pAd->TxPower[3 * 2 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 949         pAd->TxPower[3 * 2 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 950
 951         // 3.2 Fill up power
 952         for (i = 0; i < 4; i++)
 953         {
 954                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 955                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 956
 957                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 958                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 959
 960                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 961                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 962
 963                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 964                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 965
 966                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 967                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 968         }
 969
 970         // 4. Print and Debug
 971         choffset = 14 + 12 + 16 + 7;
 972
 973
 974 #if 0
 975         // Init the 802.11j channel number for TX channel power
 976         // 0. 20MHz
 977         for (i = 0; i < 3; i++)
 978         {
 979                 pAd->TxPower11J[i].Channel = 8 + i * 4;
 980                 pAd->TxPower11J[i].BW = BW_20;
 981         }
 982
 983         for (i = 0; i < 4; i++)
 984         {
 985                 pAd->TxPower11J[i + 3].Channel = 34 + i * 4;
 986                 pAd->TxPower11J[i + 3].BW = BW_20;
 987         }
 988
 989         for (i = 0; i < 4; i++)
 990         {
 991                 pAd->TxPower11J[i + 7].Channel = 184 + i * 4;
 992                 pAd->TxPower11J[i + 7].BW = BW_20;
 993         }
 994
 995         // 0. 10MHz
 996         for (i = 0; i < 2; i++)
 997         {
 998                 pAd->TxPower11J[i + 11].Channel = 7 + i;
 999                 pAd->TxPower11J[i + 11].BW = BW_10;
1000         }
1001         pAd->TxPower11J[13].Channel = 11;
1002         pAd->TxPower11J[13].BW = BW_10;
1003
1004         for (i = 0; i < 3; i++)
1005         {
1006                 pAd->TxPower11J[i + 14].Channel = 183 + i;
1007                 pAd->TxPower11J[i + 14].BW= BW_10;
1008         }
1009
1010         for (i = 0; i < 3; i++)
1011         {
1012                 pAd->TxPower11J[i + 17].Channel = 187 + i;
1013                 pAd->TxPower11J[i + 17].BW = BW_10;
1014         }
1015         for (i = 0; i < 10; i++)
1016         {
1017                 Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX_PWR_OFFSET + i * 2);
1018                 Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX2_PWR_OFFSET + i * 2);
1019
1020                 if ((Power.field.Byte0 < 36) && (Power.field.Byte0 > -6))
1021                         pAd->TxPower11J[i * 2].Power = Power.field.Byte0;
1022
1023                 if ((Power.field.Byte1 < 36) && (Power.field.Byte1 > -6))
1024                         pAd->TxPower11J[i * 2 + 1].Power = Power.field.Byte1;
1025
1026                 if ((Power2.field.Byte0 < 36) && (Power2.field.Byte0 > -6))
1027                         pAd->TxPower11J[i * 2].Power2 = Power2.field.Byte0;
1028
1029                 if ((Power2.field.Byte1 < 36) && (Power2.field.Byte1 > -6))
1030                         pAd->TxPower11J[i * 2 + 1].Power2 = Power2.field.Byte1;
1031         }
1032 #endif
1033 }
1034
1035 /*
1036         ========================================================================
1037
1038         Routine Description:
1039                 Read the following from the registry
1040                 1. All the parameters
1041                 2. NetworkAddres
1042
1043         Arguments:
1044                 Adapter                                         Pointer to our adapter
1045                 WrapperConfigurationContext     For use by NdisOpenConfiguration
1046
1047         Return Value:
1048                 NDIS_STATUS_SUCCESS
1049                 NDIS_STATUS_FAILURE
1050                 NDIS_STATUS_RESOURCES
1051
1052         IRQL = PASSIVE_LEVEL
1053
1054         Note:
1055
1056         ========================================================================
1057 */
1058 NDIS_STATUS     NICReadRegParameters(
1059         IN      PRTMP_ADAPTER           pAd,
1060         IN      NDIS_HANDLE                     WrapperConfigurationContext
1061         )
1062 {
1063         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
1064         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1065         return Status;
1066 }
1067
1068
1069
1070
1071 /*
1072         ========================================================================
1073
1074         Routine Description:
1075                 Read initial parameters from EEPROM
1076
1077         Arguments:
1078                 Adapter                                         Pointer to our adapter
1079
1080         Return Value:
1081                 None
1082
1083         IRQL = PASSIVE_LEVEL
1084
1085         Note:
1086
1087         ========================================================================
1088 */
1089 VOID    NICReadEEPROMParameters(
1090         IN      PRTMP_ADAPTER   pAd,
1091         IN      PUCHAR                  mac_addr)
1092 {
1093         UINT32                  data = 0;
1094         USHORT                  i, value, value2;
1095         UCHAR                   TmpPhy;
1096         EEPROM_TX_PWR_STRUC         Power;
1097         EEPROM_VERSION_STRUC    Version;
1098         EEPROM_ANTENNA_STRUC    Antenna;
1099         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1100
1101         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1102
1103         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1104         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1105         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1106
1107         if((data & 0x30) == 0)
1108                 pAd->EEPROMAddressNum = 6;              // 93C46
1109         else if((data & 0x30) == 0x10)
1110                 pAd->EEPROMAddressNum = 8;     // 93C66
1111         else
1112                 pAd->EEPROMAddressNum = 8;     // 93C86
1113         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1114
1115         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1116         // MAC address registers according to E2PROM setting
1117         if (mac_addr == NULL ||
1118                 strlen(mac_addr) != 17 ||
1119                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
1120                 mac_addr[11] != ':' || mac_addr[14] != ':')
1121         {
1122                 USHORT  Addr01,Addr23,Addr45 ;
1123
1124                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1125                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1126                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1127
1128                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1129                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1130                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1131                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1132                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1133                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1134
1135                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1136         }
1137         else
1138         {
1139                 INT             j;
1140                 PUCHAR  macptr;
1141
1142                 macptr = mac_addr;
1143
1144                 for (j=0; j<MAC_ADDR_LEN; j++)
1145                 {
1146                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
1147                         macptr=macptr+3;
1148                 }
1149
1150                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1151         }
1152
1153
1154         {
1155                 //more conveninet to test mbssid, so ap's bssid &0xf1
1156                 if (pAd->PermanentAddress[0] == 0xff)
1157                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1158
1159                 //if (pAd->PermanentAddress[5] == 0xff)
1160                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1161
1162                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1163                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1164                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1165                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1166                 if (pAd->bLocalAdminMAC == FALSE)
1167                 {
1168                         MAC_DW0_STRUC csr2;
1169                         MAC_DW1_STRUC csr3;
1170                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1171                         csr2.field.Byte0 = pAd->CurrentAddress[0];
1172                         csr2.field.Byte1 = pAd->CurrentAddress[1];
1173                         csr2.field.Byte2 = pAd->CurrentAddress[2];
1174                         csr2.field.Byte3 = pAd->CurrentAddress[3];
1175                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1176                         csr3.word = 0;
1177                         csr3.field.Byte4 = pAd->CurrentAddress[4];
1178                         csr3.field.Byte5 = pAd->CurrentAddress[5];
1179                         csr3.field.U2MeMask = 0xff;
1180                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1181                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1182                                 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1183                                 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1184                                 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1185                 }
1186         }
1187
1188         // if not return early. cause fail at emulation.
1189         // Init the channel number for TX channel power
1190         RTMPReadChannelPwr(pAd);
1191
1192         // if E2PROM version mismatch with driver's expectation, then skip
1193         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1194         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1195         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1196         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1197
1198         if (Version.field.Version > VALID_EEPROM_VERSION)
1199         {
1200                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1201                 /*pAd->SystemErrorBitmap |= 0x00000001;
1202
1203                 // hard-code default value when no proper E2PROM installed
1204                 pAd->bAutoTxAgcA = FALSE;
1205                 pAd->bAutoTxAgcG = FALSE;
1206
1207                 // Default the channel power
1208                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1209                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1210
1211                 // Default the channel power
1212                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1213                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1214
1215                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1216                         pAd->EEPROMDefaultValue[i] = 0xffff;
1217                 return;  */
1218         }
1219
1220         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1221         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1222         pAd->EEPROMDefaultValue[0] = value;
1223
1224         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1225         pAd->EEPROMDefaultValue[1] = value;
1226
1227         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1228         pAd->EEPROMDefaultValue[2] = value;
1229
1230         for(i = 0; i < 8; i++)
1231         {
1232                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1233                 pAd->EEPROMDefaultValue[i+3] = value;
1234         }
1235
1236         // We have to parse NIC configuration 0 at here.
1237         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1238         // Therefore, we have to read TxAutoAgc control beforehand.
1239         // Read Tx AGC control bit
1240         Antenna.word = pAd->EEPROMDefaultValue[0];
1241         if (Antenna.word == 0xFFFF)
1242         {
1243                 Antenna.word = 0;
1244                 Antenna.field.RfIcType = RFIC_2820;
1245                 Antenna.field.TxPath = 1;
1246                 Antenna.field.RxPath = 2;
1247                 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1248         }
1249
1250         // Choose the desired Tx&Rx stream.
1251         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1252                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1253
1254         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1255         {
1256                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1257
1258                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1259                         (pAd->CommonCfg.RxStream > 2))
1260                 {
1261                         // only 2 Rx streams for RT2860 series
1262                         pAd->CommonCfg.RxStream = 2;
1263                 }
1264         }
1265
1266         // 3*3
1267         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1268         // yet implement
1269         for(i=0; i<3; i++)
1270         {
1271         }
1272
1273         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1274
1275         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1276         {
1277                 NicConfig2.word = 0;
1278                 if ((NicConfig2.word & 0x00ff) == 0xff)
1279                 {
1280                         NicConfig2.word &= 0xff00;
1281                 }
1282
1283                 if ((NicConfig2.word >> 8) == 0xff)
1284                 {
1285                         NicConfig2.word &= 0x00ff;
1286                 }
1287         }
1288
1289         if (NicConfig2.field.DynamicTxAgcControl == 1)
1290                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1291         else
1292                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1293
1294         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1295
1296         // Save the antenna for future use
1297         pAd->Antenna.word = Antenna.word;
1298
1299         //
1300         // Reset PhyMode if we don't support 802.11a
1301         // Only RFIC_2850 & RFIC_2750 support 802.11a
1302         //
1303         if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1304         {
1305                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1306                         (pAd->CommonCfg.PhyMode == PHY_11A))
1307                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1308                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
1309                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
1310                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
1311                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1312                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1313         }
1314
1315         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1316         // 0. 11b/g
1317         {
1318                 /* these are tempature reference value (0x00 ~ 0xFE)
1319                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1320                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1321                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1322                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1323                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1324                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1325                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1326                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1327                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1328                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1329                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
1330                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1331                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1332                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1333                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1334                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1335                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1336                 pAd->TxAgcStepG = Power.field.Byte1;
1337                 pAd->TxAgcCompensateG = 0;
1338                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1339                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
1340
1341                 // Disable TxAgc if the based value is not right
1342                 if (pAd->TssiRefG == 0xff)
1343                         pAd->bAutoTxAgcG = FALSE;
1344
1345                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1346                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1347                         pAd->TssiRefG,
1348                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1349                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1350         }
1351         // 1. 11a
1352         {
1353                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1354                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1355                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1356                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1357                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1358                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1359                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1360                 pAd->TssiRefA   = Power.field.Byte0;
1361                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1362                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1363                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1364                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1365                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1366                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1367                 pAd->TxAgcStepA = Power.field.Byte1;
1368                 pAd->TxAgcCompensateA = 0;
1369                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1370                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
1371
1372                 // Disable TxAgc if the based value is not right
1373                 if (pAd->TssiRefA == 0xff)
1374                         pAd->bAutoTxAgcA = FALSE;
1375
1376                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1377                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1378                         pAd->TssiRefA,
1379                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1380                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1381         }
1382         pAd->BbpRssiToDbmDelta = 0x0;
1383
1384         // Read frequency offset setting for RF
1385         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1386         if ((value & 0x00FF) != 0x00FF)
1387                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1388         else
1389                 pAd->RfFreqOffset = 0;
1390         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1391
1392         //CountryRegion byte offset (38h)
1393         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1394         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1395
1396         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1397         {
1398                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1399                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1400                 TmpPhy = pAd->CommonCfg.PhyMode;
1401                 pAd->CommonCfg.PhyMode = 0xff;
1402                 RTMPSetPhyMode(pAd, TmpPhy);
1403                 SetCommonHT(pAd);
1404         }
1405
1406         //
1407         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1408         // The valid value are (-10 ~ 10)
1409         //
1410         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1411         pAd->BGRssiOffset0 = value & 0x00ff;
1412         pAd->BGRssiOffset1 = (value >> 8);
1413         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1414         pAd->BGRssiOffset2 = value & 0x00ff;
1415         pAd->ALNAGain1 = (value >> 8);
1416         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1417         pAd->BLNAGain = value & 0x00ff;
1418         pAd->ALNAGain0 = (value >> 8);
1419
1420         // Validate 11b/g RSSI_0 offset.
1421         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1422                 pAd->BGRssiOffset0 = 0;
1423
1424         // Validate 11b/g RSSI_1 offset.
1425         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1426                 pAd->BGRssiOffset1 = 0;
1427
1428         // Validate 11b/g RSSI_2 offset.
1429         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1430                 pAd->BGRssiOffset2 = 0;
1431
1432         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1433         pAd->ARssiOffset0 = value & 0x00ff;
1434         pAd->ARssiOffset1 = (value >> 8);
1435         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1436         pAd->ARssiOffset2 = value & 0x00ff;
1437         pAd->ALNAGain2 = (value >> 8);
1438
1439         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1440                 pAd->ALNAGain1 = pAd->ALNAGain0;
1441         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1442                 pAd->ALNAGain2 = pAd->ALNAGain0;
1443
1444         // Validate 11a RSSI_0 offset.
1445         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1446                 pAd->ARssiOffset0 = 0;
1447
1448         // Validate 11a RSSI_1 offset.
1449         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1450                 pAd->ARssiOffset1 = 0;
1451
1452         //Validate 11a RSSI_2 offset.
1453         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1454                 pAd->ARssiOffset2 = 0;
1455
1456         //
1457         // Get LED Setting.
1458         //
1459         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1460         pAd->LedCntl.word = (value&0xff00) >> 8;
1461         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1462         pAd->Led1 = value;
1463         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1464         pAd->Led2 = value;
1465         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1466         pAd->Led3 = value;
1467
1468         RTMPReadTxPwrPerRate(pAd);
1469
1470         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1471 }
1472
1473 /*
1474         ========================================================================
1475
1476         Routine Description:
1477                 Set default value from EEPROM
1478
1479         Arguments:
1480                 Adapter                                         Pointer to our adapter
1481
1482         Return Value:
1483                 None
1484
1485         IRQL = PASSIVE_LEVEL
1486
1487         Note:
1488
1489         ========================================================================
1490 */
1491 VOID    NICInitAsicFromEEPROM(
1492         IN      PRTMP_ADAPTER   pAd)
1493 {
1494         UINT32                                  data = 0;
1495         UCHAR   BBPR1 = 0;
1496         USHORT                                  i;
1497         EEPROM_ANTENNA_STRUC    Antenna;
1498         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1499         UCHAR   BBPR3 = 0;
1500
1501         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1502         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1503         {
1504                 UCHAR BbpRegIdx, BbpValue;
1505
1506                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1507                 {
1508                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1509                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1510                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1511                 }
1512         }
1513
1514         Antenna.word = pAd->Antenna.word;
1515         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1516         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1517
1518         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1519
1520
1521         // Save the antenna for future use
1522         pAd->NicConfig2.word = NicConfig2.word;
1523
1524         //
1525         // Send LED Setting to MCU.
1526         //
1527         if (pAd->LedCntl.word == 0xFF)
1528         {
1529                 pAd->LedCntl.word = 0x01;
1530                 pAd->Led1 = 0x5555;
1531                 pAd->Led2 = 0x2221;
1532                 pAd->Led3 = 0xA9F8;
1533         }
1534
1535         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1536         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1537         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1538     pAd->LedIndicatorStregth = 0xFF;
1539     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
1540
1541         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1542         {
1543                 // Read Hardware controlled Radio state enable bit
1544                 if (NicConfig2.field.HardwareRadioControl == 1)
1545                 {
1546                         pAd->StaCfg.bHardwareRadio = TRUE;
1547
1548                         // Read GPIO pin2 as Hardware controlled radio state
1549                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1550                         if ((data & 0x04) == 0)
1551                         {
1552                                 pAd->StaCfg.bHwRadio = FALSE;
1553                                 pAd->StaCfg.bRadio = FALSE;
1554                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1555                         }
1556                 }
1557                 else
1558                         pAd->StaCfg.bHardwareRadio = FALSE;
1559
1560                 if (pAd->StaCfg.bRadio == FALSE)
1561                 {
1562                         RTMPSetLED(pAd, LED_RADIO_OFF);
1563                 }
1564                 else
1565                 {
1566                         RTMPSetLED(pAd, LED_RADIO_ON);
1567                         AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1568                         AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1569                         // 2-1. wait command ok.
1570                         AsicCheckCommanOk(pAd, PowerWakeCID);
1571                 }
1572         }
1573
1574         // Turn off patching for cardbus controller
1575         if (NicConfig2.field.CardbusAcceleration == 1)
1576         {
1577         }
1578
1579         if (NicConfig2.field.DynamicTxAgcControl == 1)
1580                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1581         else
1582                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1583         //
1584         // Since BBP has been progamed, to make sure BBP setting will be
1585         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1586         //
1587         pAd->CommonCfg.BandState = UNKNOWN_BAND;
1588
1589         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1590         BBPR3 &= (~0x18);
1591         if(pAd->Antenna.field.RxPath == 3)
1592         {
1593                 BBPR3 |= (0x10);
1594         }
1595         else if(pAd->Antenna.field.RxPath == 2)
1596         {
1597                 BBPR3 |= (0x8);
1598         }
1599         else if(pAd->Antenna.field.RxPath == 1)
1600         {
1601                 BBPR3 |= (0x0);
1602         }
1603         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1604
1605         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1606         {
1607                 // Handle the difference when 1T
1608                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1609                 if(pAd->Antenna.field.TxPath == 1)
1610                 {
1611                 BBPR1 &= (~0x18);
1612                 }
1613                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1614
1615                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1616         }
1617
1618         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1619         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1620 }
1621
1622 /*
1623         ========================================================================
1624
1625         Routine Description:
1626                 Initialize NIC hardware
1627
1628         Arguments:
1629                 Adapter                                         Pointer to our adapter
1630
1631         Return Value:
1632                 None
1633
1634         IRQL = PASSIVE_LEVEL
1635
1636         Note:
1637
1638         ========================================================================
1639 */
1640 NDIS_STATUS     NICInitializeAdapter(
1641         IN      PRTMP_ADAPTER   pAd,
1642         IN   BOOLEAN    bHardReset)
1643 {
1644         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
1645         WPDMA_GLO_CFG_STRUC     GloCfg;
1646         UINT32                  Value;
1647         DELAY_INT_CFG_STRUC     IntCfg;
1648         ULONG   i =0, j=0;
1649         AC_TXOP_CSR0_STRUC      csr0;
1650
1651         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1652
1653         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1654 retry:
1655         i = 0;
1656         do
1657         {
1658                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1659                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1660                         break;
1661
1662                 RTMPusecDelay(1000);
1663                 i++;
1664         }while ( i<100);
1665         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1666         GloCfg.word &= 0xff0;
1667         GloCfg.field.EnTXWriteBackDDONE =1;
1668         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1669
1670         // Record HW Beacon offset
1671         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1672         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1673         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1674         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1675         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1676         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1677         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1678         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1679
1680         //
1681         // write all shared Ring's base address into ASIC
1682         //
1683
1684         // asic simulation sequence put this ahead before loading firmware.
1685         // pbf hardware reset
1686         RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f);   // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1687         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1688         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1689
1690         // Initialze ASIC for TX & Rx operation
1691         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1692         {
1693                 if (j++ == 0)
1694                 {
1695                         NICLoadFirmware(pAd);
1696                         goto retry;
1697                 }
1698                 return NDIS_STATUS_FAILURE;
1699         }
1700
1701
1702         // Write AC_BK base address register
1703         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1704         RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1705         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1706
1707         // Write AC_BE base address register
1708         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1709         RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1710         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1711
1712         // Write AC_VI base address register
1713         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1714         RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1715         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1716
1717         // Write AC_VO base address register
1718         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1719         RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1720         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1721
1722         // Write HCCA base address register
1723           Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
1724           RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
1725         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
1726
1727         // Write MGMT_BASE_CSR register
1728         Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1729         RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1730         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1731
1732         // Write RX_BASE_CSR register
1733         Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1734         RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1735         DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1736
1737         // Init RX Ring index pointer
1738         pAd->RxRing.RxSwReadIdx = 0;
1739         pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1740         RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1741
1742         // Init TX rings index pointer
1743         {
1744                 for (i=0; i<NUM_OF_TX_RING; i++)
1745                 {
1746                         pAd->TxRing[i].TxSwFreeIdx = 0;
1747                         pAd->TxRing[i].TxCpuIdx = 0;
1748                         RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) ,  pAd->TxRing[i].TxCpuIdx);
1749                 }
1750         }
1751
1752         // init MGMT ring index pointer
1753         pAd->MgmtRing.TxSwFreeIdx = 0;
1754         pAd->MgmtRing.TxCpuIdx = 0;
1755         RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX,  pAd->MgmtRing.TxCpuIdx);
1756
1757         //
1758         // set each Ring's SIZE  into ASIC. Descriptor Size is fixed by design.
1759         //
1760
1761         // Write TX_RING_CSR0 register
1762         Value = TX_RING_SIZE;
1763         RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1764         RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1765         RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1766         RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1767         RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1768         Value = MGMT_RING_SIZE;
1769         RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1770
1771         // Write RX_RING_CSR register
1772         Value = RX_RING_SIZE;
1773         RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1774
1775
1776         // WMM parameter
1777         csr0.word = 0;
1778         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1779         if (pAd->CommonCfg.PhyMode == PHY_11B)
1780         {
1781                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
1782                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
1783         }
1784         else
1785         {
1786                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
1787                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
1788         }
1789         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1790
1791
1792         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1793         i = 0;
1794         do
1795         {
1796                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1797                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1798                         break;
1799
1800                 RTMPusecDelay(1000);
1801                 i++;
1802         }while ( i < 100);
1803
1804         GloCfg.word &= 0xff0;
1805         GloCfg.field.EnTXWriteBackDDONE =1;
1806         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1807
1808         IntCfg.word = 0;
1809         RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1810
1811
1812         // reset action
1813         // Load firmware
1814         //  Status = NICLoadFirmware(pAd);
1815
1816         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1817         return Status;
1818 }
1819
1820 /*
1821         ========================================================================
1822
1823         Routine Description:
1824                 Initialize ASIC
1825
1826         Arguments:
1827                 Adapter                                         Pointer to our adapter
1828
1829         Return Value:
1830                 None
1831
1832         IRQL = PASSIVE_LEVEL
1833
1834         Note:
1835
1836         ========================================================================
1837 */
1838 NDIS_STATUS     NICInitializeAsic(
1839         IN      PRTMP_ADAPTER   pAd,
1840         IN  BOOLEAN             bHardReset)
1841 {
1842         ULONG                   Index = 0;
1843         UCHAR                   R0 = 0xff;
1844         UINT32                  MacCsr12 = 0, Counter = 0;
1845         USHORT                  KeyIdx;
1846         INT                             i,apidx;
1847
1848         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1849
1850         if (bHardReset == TRUE)
1851         {
1852                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1853         }
1854         else
1855                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1856
1857         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1858         // Initialize MAC register to default value
1859         for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1860         {
1861                 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1862         }
1863
1864
1865         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1866         {
1867                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1868                 {
1869                         RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1870                 }
1871         }
1872
1873         //
1874         // Before program BBP, we need to wait BBP/RF get wake up.
1875         //
1876         Index = 0;
1877         do
1878         {
1879                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1880
1881                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
1882                         break;
1883
1884                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
1885                 RTMPusecDelay(1000);
1886         } while (Index++ < 100);
1887
1888     // The commands to firmware should be after these commands, these commands will init firmware
1889         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1890         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1891         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1892         RTMPusecDelay(1000);
1893
1894         // Read BBP register, make sure BBP is up and running before write new data
1895         Index = 0;
1896         do
1897         {
1898                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1899                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1900         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1901         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1902
1903         if ((R0 == 0xff) || (R0 == 0x00))
1904                 return NDIS_STATUS_FAILURE;
1905
1906         // Initialize BBP register to default value
1907         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1908         {
1909                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1910         }
1911
1912         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1913         if ((pAd->MACVersion&0xffff) != 0x0101)
1914                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1915
1916
1917         if (pAd->MACVersion == 0x28600100)
1918         {
1919                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1920                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1921     }
1922
1923         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1924         {
1925                 // enlarge MAX_LEN_CFG
1926                 UINT32 csr;
1927                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1928                 csr &= 0xFFF;
1929                 csr |= 0x2000;
1930                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1931         }
1932
1933
1934         // Add radio off control
1935         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1936         {
1937                 if (pAd->StaCfg.bRadio == FALSE)
1938                 {
1939 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1940                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1941                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1942                 }
1943         }
1944
1945         // Clear raw counters
1946         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1947         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1948         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1949         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1950         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1951         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1952
1953         // ASIC will keep garbage value after boot
1954         // Clear all seared key table when initial
1955         // This routine can be ignored in radio-ON/OFF operation.
1956         if (bHardReset)
1957         {
1958                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
1959                 {
1960                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
1961                 }
1962
1963                 // Clear all pairwise key table when initial
1964                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
1965                 {
1966                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
1967                 }
1968         }
1969
1970
1971         // It isn't necessary to clear this space when not hard reset.
1972         if (bHardReset == TRUE)
1973         {
1974                 // clear all on-chip BEACON frame space
1975                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
1976                 {
1977                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
1978                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
1979                 }
1980         }
1981
1982         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1983         {
1984                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
1985                 if ((pAd->MACVersion&0xffff) != 0x0101)
1986                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
1987         }
1988
1989         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
1990         return NDIS_STATUS_SUCCESS;
1991 }
1992
1993
1994 VOID NICRestoreBBPValue(
1995         IN PRTMP_ADAPTER pAd)
1996 {
1997         UCHAR           index;
1998         UCHAR           Value = 0;
1999         ULONG           Data;
2000
2001         DBGPRINT(RT_DEBUG_TRACE, ("--->  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2002         // Initialize BBP register to default value (rtmp_init.c)
2003         for (index = 0; index < NUM_BBP_REG_PARMS; index++)
2004         {
2005                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[index].Register, BBPRegTable[index].Value);
2006         }
2007         // copy from (rtmp_init.c)
2008         if (pAd->MACVersion == 0x28600100)
2009         {
2010                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2011                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2012         }
2013
2014         // copy from (connect.c LinkUp function)
2015         if (INFRA_ON(pAd))
2016         {
2017                 // Change to AP channel
2018                 if ((pAd->CommonCfg.CentralChannel > pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2019                 {
2020                         // Must using 40MHz.
2021                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2022                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2023                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2024
2025                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2026                         Value &= (~0x18);
2027                         Value |= 0x10;
2028                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2029
2030                         //  RX : control channel at lower
2031                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2032                         Value &= (~0x20);
2033                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2034                         // Record BBPR3 setting, But don't keep R Antenna # information.
2035                         pAd->StaCfg.BBPR3 = Value;
2036
2037                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2038                         Data &= 0xfffffffe;
2039                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2040
2041                         if (pAd->MACVersion == 0x28600100)
2042                         {
2043                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2044                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2045                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2046                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2047                         }
2048
2049                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Lower LINK UP !!! Control Channel at Below. Central = %d \n", pAd->CommonCfg.CentralChannel ));
2050                 }
2051                 else if ((pAd->CommonCfg.CentralChannel < pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2052                 {
2053                         // Must using 40MHz.
2054                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2055                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2056                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2057
2058                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2059                         Value &= (~0x18);
2060                         Value |= 0x10;
2061                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2062
2063                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2064                         Data |= 0x1;
2065                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2066
2067                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2068                         Value |= (0x20);
2069                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2070                         // Record BBPR3 setting, But don't keep R Antenna # information.
2071                         pAd->StaCfg.BBPR3 = Value;
2072
2073                         if (pAd->MACVersion == 0x28600100)
2074                         {
2075                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2076                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2077                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2078                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2079                         }
2080
2081                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Upper LINK UP !!! Control Channel at UpperCentral = %d \n", pAd->CommonCfg.CentralChannel ));
2082                 }
2083                 else
2084                 {
2085                         pAd->CommonCfg.BBPCurrentBW = BW_20;
2086                         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
2087                         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
2088
2089                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2090                         Value &= (~0x18);
2091                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2092
2093                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2094                         Data &= 0xfffffffe;
2095                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2096
2097                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2098                         Value &= (~0x20);
2099                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2100                         // Record BBPR3 setting, But don't keep R Antenna # information.
2101                         pAd->StaCfg.BBPR3 = Value;
2102
2103                         if (pAd->MACVersion == 0x28600100)
2104                         {
2105                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2106                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
2107                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
2108                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2109                         }
2110
2111                         DBGPRINT(RT_DEBUG_TRACE, ("!!!20MHz LINK UP !!! \n" ));
2112                 }
2113         }
2114
2115         DBGPRINT(RT_DEBUG_TRACE, ("<---  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2116 }
2117
2118 /*
2119         ========================================================================
2120
2121         Routine Description:
2122                 Reset NIC Asics
2123
2124         Arguments:
2125                 Adapter                                         Pointer to our adapter
2126
2127         Return Value:
2128                 None
2129
2130         IRQL = PASSIVE_LEVEL
2131
2132         Note:
2133                 Reset NIC to initial state AS IS system boot up time.
2134
2135         ========================================================================
2136 */
2137 VOID    NICIssueReset(
2138         IN      PRTMP_ADAPTER   pAd)
2139 {
2140         UINT32  Value = 0;
2141         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2142
2143         // Disable Rx, register value supposed will remain after reset
2144         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2145         Value &= (0xfffffff3);
2146         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2147
2148         // Issue reset and clear from reset state
2149         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2150         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2151
2152         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2153 }
2154
2155 /*
2156         ========================================================================
2157
2158         Routine Description:
2159                 Check ASIC registers and find any reason the system might hang
2160
2161         Arguments:
2162                 Adapter                                         Pointer to our adapter
2163
2164         Return Value:
2165                 None
2166
2167         IRQL = DISPATCH_LEVEL
2168
2169         ========================================================================
2170 */
2171 BOOLEAN NICCheckForHang(
2172         IN      PRTMP_ADAPTER   pAd)
2173 {
2174         return (FALSE);
2175 }
2176
2177 VOID NICUpdateFifoStaCounters(
2178         IN PRTMP_ADAPTER pAd)
2179 {
2180         TX_STA_FIFO_STRUC       StaFifo;
2181         MAC_TABLE_ENTRY         *pEntry;
2182         UCHAR                           i = 0;
2183         UCHAR                   pid = 0, wcid = 0;
2184         CHAR                            reTry;
2185         UCHAR                           succMCS;
2186
2187                 do
2188                 {
2189                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2190
2191                         if (StaFifo.field.bValid == 0)
2192                                 break;
2193
2194                         wcid = (UCHAR)StaFifo.field.wcid;
2195
2196
2197                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2198                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2199                         {
2200                                 i++;
2201                                 continue;
2202                         }
2203
2204                         /* PID store Tx MCS Rate */
2205                         pid = (UCHAR)StaFifo.field.PidType;
2206
2207                         pEntry = &pAd->MacTab.Content[wcid];
2208
2209                         pEntry->DebugFIFOCount++;
2210
2211                         if (StaFifo.field.TxBF) // 3*3
2212                                 pEntry->TxBFCount++;
2213
2214 #ifdef UAPSD_AP_SUPPORT
2215                         UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2216 #endif // UAPSD_AP_SUPPORT //
2217
2218                         if (!StaFifo.field.TxSuccess)
2219                         {
2220                                 pEntry->FIFOCount++;
2221                                 pEntry->OneSecTxFailCount++;
2222
2223                                 if (pEntry->FIFOCount >= 1)
2224                                 {
2225                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2226 #if 0
2227                                         SendRefreshBAR(pAd, pEntry);
2228                                         pEntry->NoBADataCountDown = 64;
2229 #else
2230                                         pEntry->NoBADataCountDown = 64;
2231
2232                                         if(pEntry->PsMode == PWR_ACTIVE)
2233                                         {
2234                                                 int tid;
2235                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2236                                                 {
2237                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2238                                                 }
2239
2240                                                 // Update the continuous transmission counter except PS mode
2241                                                 pEntry->ContinueTxFailCnt++;
2242                                         }
2243                                         else
2244                                         {
2245                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2246                                                 //     this tx error happened due to sta just go to sleep.
2247                                                 pEntry->FIFOCount = 0;
2248                                                 pEntry->ContinueTxFailCnt = 0;
2249                                         }
2250 #endif
2251                                         //pEntry->FIFOCount = 0;
2252                                 }
2253                                 //pEntry->bSendBAR = TRUE;
2254                         }
2255                         else
2256                         {
2257                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2258                                 {
2259                                         pEntry->NoBADataCountDown--;
2260                                         if (pEntry->NoBADataCountDown==0)
2261                                         {
2262                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2263                                         }
2264                                 }
2265
2266                                 pEntry->FIFOCount = 0;
2267                                 pEntry->OneSecTxNoRetryOkCount++;
2268                                 // update NoDataIdleCount when sucessful send packet to STA.
2269                                 pEntry->NoDataIdleCount = 0;
2270                                 pEntry->ContinueTxFailCnt = 0;
2271                         }
2272
2273                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2274
2275                         reTry = pid - succMCS;
2276
2277                         if (StaFifo.field.TxSuccess)
2278                         {
2279                                 pEntry->TXMCSExpected[pid]++;
2280                                 if (pid == succMCS)
2281                                 {
2282                                         pEntry->TXMCSSuccessful[pid]++;
2283                                 }
2284                                 else
2285                                 {
2286                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2287                                 }
2288                         }
2289                         else
2290                         {
2291                                 pEntry->TXMCSFailed[pid]++;
2292                         }
2293
2294                         if (reTry > 0)
2295                         {
2296                                 if ((pid >= 12) && succMCS <=7)
2297                                 {
2298                                         reTry -= 4;
2299                                 }
2300                                 pEntry->OneSecTxRetryOkCount += reTry;
2301                         }
2302
2303                         i++;
2304                         // ASIC store 16 stack
2305                 } while ( i < (2*TX_RING_SIZE) );
2306
2307 }
2308
2309 /*
2310         ========================================================================
2311
2312         Routine Description:
2313                 Read statistical counters from hardware registers and record them
2314                 in software variables for later on query
2315
2316         Arguments:
2317                 pAd                                     Pointer to our adapter
2318
2319         Return Value:
2320                 None
2321
2322         IRQL = DISPATCH_LEVEL
2323
2324         ========================================================================
2325 */
2326 VOID NICUpdateRawCounters(
2327         IN PRTMP_ADAPTER pAd)
2328 {
2329         UINT32  OldValue;
2330         RX_STA_CNT0_STRUC        RxStaCnt0;
2331         RX_STA_CNT1_STRUC   RxStaCnt1;
2332         RX_STA_CNT2_STRUC   RxStaCnt2;
2333         TX_STA_CNT0_STRUC        TxStaCnt0;
2334         TX_STA_CNT1_STRUC        StaTx1;
2335         TX_STA_CNT2_STRUC        StaTx2;
2336         TX_AGG_CNT_STRUC        TxAggCnt;
2337         TX_AGG_CNT0_STRUC       TxAggCnt0;
2338         TX_AGG_CNT1_STRUC       TxAggCnt1;
2339         TX_AGG_CNT2_STRUC       TxAggCnt2;
2340         TX_AGG_CNT3_STRUC       TxAggCnt3;
2341         TX_AGG_CNT4_STRUC       TxAggCnt4;
2342         TX_AGG_CNT5_STRUC       TxAggCnt5;
2343         TX_AGG_CNT6_STRUC       TxAggCnt6;
2344         TX_AGG_CNT7_STRUC       TxAggCnt7;
2345
2346         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2347         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2348
2349         {
2350                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2351             // Update RX PLCP error counter
2352             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2353                 // Update False CCA counter
2354                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2355         }
2356
2357         // Update FCS counters
2358         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2359         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2360         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2361                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2362
2363         // Add FCS error count to private counters
2364         pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2365         OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2366         pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2367         if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2368                 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2369
2370         // Update Duplicate Rcv check
2371         pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2372         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2373         // Update RX Overflow counter
2374         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2375
2376         if (!pAd->bUpdateBcnCntDone)
2377         {
2378         // Update BEACON sent count
2379         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2380         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2381         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2382         pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2383         pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2384         pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2385         pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2386         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2387         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2388         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2389         }
2390
2391         {
2392                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2393                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2394                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2395                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2396                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2397                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2398                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2399                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2400                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2401                 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2402                 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2403                 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2404                 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2405
2406                 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2407                 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2408                 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2409                 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2410
2411                 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2412                 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2413                 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2414                 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2415
2416                 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2417                 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2418                 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2419                 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2420
2421                 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2422                 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2423
2424                 // Calculate the transmitted A-MPDU count
2425                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2426                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2427
2428                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2429                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2430
2431                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2432                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2433
2434                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2435                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2436
2437                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2438                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2439
2440                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2441                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2442
2443                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2444                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2445
2446                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2447                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2448         }
2449
2450 #ifdef DBG_DIAGNOSE
2451         {
2452                 RtmpDiagStruct  *pDiag;
2453                 COUNTER_RALINK  *pRalinkCounters;
2454                 UCHAR                   ArrayCurIdx, i;
2455
2456                 pDiag = &pAd->DiagStruct;
2457                 pRalinkCounters = &pAd->RalinkCounters;
2458                 ArrayCurIdx = pDiag->ArrayCurIdx;
2459
2460                 if (pDiag->inited == 0)
2461                 {
2462                         NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2463                         pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2464                         pDiag->inited = 1;
2465                 }
2466                 else
2467                 {
2468                         // Tx
2469                         pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2470                         pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2471                         pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2472                         pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2473                         pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2474                         pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2475                         pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2476                         pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2477                         pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2478                         pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2479                         pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2480                         pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2481                         pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2482                         pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2483                         pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2484                         pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2485                         pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2486                         pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2487                         pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2488
2489                         pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2490
2491                         INC_RING_INDEX(pDiag->ArrayCurIdx,  DIAGNOSE_TIME);
2492                         ArrayCurIdx = pDiag->ArrayCurIdx;
2493                         for (i =0; i < 9; i++)
2494                         {
2495                                 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2496                                 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2497                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2498                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2499                         }
2500                         pDiag->TxDataCnt[ArrayCurIdx] = 0;
2501                         pDiag->TxFailCnt[ArrayCurIdx] = 0;
2502                         pDiag->RxDataCnt[ArrayCurIdx] = 0;
2503                         pDiag->RxCrcErrCnt[ArrayCurIdx]  = 0;
2504                         for (i = 9; i < 24; i++) // 3*3
2505                         {
2506                                 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2507                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2508                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2509 }
2510
2511                         if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2512                                 INC_RING_INDEX(pDiag->ArrayStartIdx,  DIAGNOSE_TIME);
2513                 }
2514
2515         }
2516 #endif // DBG_DIAGNOSE //
2517
2518
2519 }
2520
2521
2522 /*
2523         ========================================================================
2524
2525         Routine Description:
2526                 Reset NIC from error
2527
2528         Arguments:
2529                 Adapter                                         Pointer to our adapter
2530
2531         Return Value:
2532                 None
2533
2534         IRQL = PASSIVE_LEVEL
2535
2536         Note:
2537                 Reset NIC from error state
2538
2539         ========================================================================
2540 */
2541 VOID    NICResetFromError(
2542         IN      PRTMP_ADAPTER   pAd)
2543 {
2544         // Reset BBP (according to alex, reset ASIC will force reset BBP
2545         // Therefore, skip the reset BBP
2546         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2547
2548         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2549         // Remove ASIC from reset state
2550         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2551
2552         NICInitializeAdapter(pAd, FALSE);
2553         NICInitAsicFromEEPROM(pAd);
2554
2555         // Switch to current channel, since during reset process, the connection should remains on.
2556         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2557         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2558 }
2559
2560 /*
2561         ========================================================================
2562
2563         Routine Description:
2564                 erase 8051 firmware image in MAC ASIC
2565
2566         Arguments:
2567                 Adapter                                         Pointer to our adapter
2568
2569         IRQL = PASSIVE_LEVEL
2570
2571         ========================================================================
2572 */
2573 VOID NICEraseFirmware(
2574         IN PRTMP_ADAPTER pAd)
2575 {
2576         ULONG i;
2577
2578         for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2579                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2580
2581 }/* End of NICEraseFirmware */
2582
2583 /*
2584         ========================================================================
2585
2586         Routine Description:
2587                 Load 8051 firmware RT2561.BIN file into MAC ASIC
2588
2589         Arguments:
2590                 Adapter                                         Pointer to our adapter
2591
2592         Return Value:
2593                 NDIS_STATUS_SUCCESS         firmware image load ok
2594                 NDIS_STATUS_FAILURE         image not found
2595
2596         IRQL = PASSIVE_LEVEL
2597
2598         ========================================================================
2599 */
2600 NDIS_STATUS NICLoadFirmware(
2601         IN PRTMP_ADAPTER pAd)
2602 {
2603         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
2604         PUCHAR                  pFirmwareImage;
2605         ULONG                   FileLength, Index;
2606         //ULONG                 firm;
2607         UINT32                  MacReg = 0;
2608
2609         pFirmwareImage = FirmwareImage;
2610         FileLength = sizeof(FirmwareImage);
2611         RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
2612
2613         /* check if MCU is ready */
2614         Index = 0;
2615         do
2616         {
2617                 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
2618
2619                 if (MacReg & 0x80)
2620                         break;
2621
2622                 RTMPusecDelay(1000);
2623         } while (Index++ < 1000);
2624
2625     if (Index >= 1000)
2626         {
2627                 Status = NDIS_STATUS_FAILURE;
2628                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
2629         } /* End of if */
2630
2631     DBGPRINT(RT_DEBUG_TRACE,
2632                          ("<=== %s (status=%d)\n", __func__, Status));
2633     return Status;
2634 } /* End of NICLoadFirmware */
2635
2636
2637 /*
2638         ========================================================================
2639
2640         Routine Description:
2641                 Load Tx rate switching parameters
2642
2643         Arguments:
2644                 Adapter                                         Pointer to our adapter
2645
2646         Return Value:
2647                 NDIS_STATUS_SUCCESS         firmware image load ok
2648                 NDIS_STATUS_FAILURE         image not found
2649
2650         IRQL = PASSIVE_LEVEL
2651
2652         Rate Table Format:
2653                 1. (B0: Valid Item number) (B1:Initial item from zero)
2654                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
2655
2656         ========================================================================
2657 */
2658 NDIS_STATUS NICLoadRateSwitchingParams(
2659         IN PRTMP_ADAPTER pAd)
2660 {
2661         return NDIS_STATUS_SUCCESS;
2662 }
2663
2664 /*
2665         ========================================================================
2666
2667         Routine Description:
2668                 if  pSrc1 all zero with length Length, return 0.
2669                 If not all zero, return 1
2670
2671         Arguments:
2672                 pSrc1
2673
2674         Return Value:
2675                 1:                      not all zero
2676                 0:                      all zero
2677
2678         IRQL = DISPATCH_LEVEL
2679
2680         Note:
2681
2682         ========================================================================
2683 */
2684 ULONG   RTMPNotAllZero(
2685         IN      PVOID   pSrc1,
2686         IN      ULONG   Length)
2687 {
2688         PUCHAR  pMem1;
2689         ULONG   Index = 0;
2690
2691         pMem1 = (PUCHAR) pSrc1;
2692
2693         for (Index = 0; Index < Length; Index++)
2694         {
2695                 if (pMem1[Index] != 0x0)
2696                 {
2697                         break;
2698                 }
2699         }
2700
2701         if (Index == Length)
2702         {
2703                 return (0);
2704         }
2705         else
2706         {
2707                 return (1);
2708         }
2709 }
2710
2711 /*
2712         ========================================================================
2713
2714         Routine Description:
2715                 Compare two memory block
2716
2717         Arguments:
2718                 pSrc1           Pointer to first memory address
2719                 pSrc2           Pointer to second memory address
2720
2721         Return Value:
2722                 0:                      memory is equal
2723                 1:                      pSrc1 memory is larger
2724                 2:                      pSrc2 memory is larger
2725
2726         IRQL = DISPATCH_LEVEL
2727
2728         Note:
2729
2730         ========================================================================
2731 */
2732 ULONG   RTMPCompareMemory(
2733         IN      PVOID   pSrc1,
2734         IN      PVOID   pSrc2,
2735         IN      ULONG   Length)
2736 {
2737         PUCHAR  pMem1;
2738         PUCHAR  pMem2;
2739         ULONG   Index = 0;
2740
2741         pMem1 = (PUCHAR) pSrc1;
2742         pMem2 = (PUCHAR) pSrc2;
2743
2744         for (Index = 0; Index < Length; Index++)
2745         {
2746                 if (pMem1[Index] > pMem2[Index])
2747                         return (1);
2748                 else if (pMem1[Index] < pMem2[Index])
2749                         return (2);
2750         }
2751
2752         // Equal
2753         return (0);
2754 }
2755
2756 /*
2757         ========================================================================
2758
2759         Routine Description:
2760                 Zero out memory block
2761
2762         Arguments:
2763                 pSrc1           Pointer to memory address
2764                 Length          Size
2765
2766         Return Value:
2767                 None
2768
2769         IRQL = PASSIVE_LEVEL
2770         IRQL = DISPATCH_LEVEL
2771
2772         Note:
2773
2774         ========================================================================
2775 */
2776 VOID    RTMPZeroMemory(
2777         IN      PVOID   pSrc,
2778         IN      ULONG   Length)
2779 {
2780         PUCHAR  pMem;
2781         ULONG   Index = 0;
2782
2783         pMem = (PUCHAR) pSrc;
2784
2785         for (Index = 0; Index < Length; Index++)
2786         {
2787                 pMem[Index] = 0x00;
2788         }
2789 }
2790
2791 VOID    RTMPFillMemory(
2792         IN      PVOID   pSrc,
2793         IN      ULONG   Length,
2794         IN      UCHAR   Fill)
2795 {
2796         PUCHAR  pMem;
2797         ULONG   Index = 0;
2798
2799         pMem = (PUCHAR) pSrc;
2800
2801         for (Index = 0; Index < Length; Index++)
2802         {
2803                 pMem[Index] = Fill;
2804         }
2805 }
2806
2807 /*
2808         ========================================================================
2809
2810         Routine Description:
2811                 Copy data from memory block 1 to memory block 2
2812
2813         Arguments:
2814                 pDest           Pointer to destination memory address
2815                 pSrc            Pointer to source memory address
2816                 Length          Copy size
2817
2818         Return Value:
2819                 None
2820
2821         IRQL = PASSIVE_LEVEL
2822         IRQL = DISPATCH_LEVEL
2823
2824         Note:
2825
2826         ========================================================================
2827 */
2828 VOID    RTMPMoveMemory(
2829         OUT     PVOID   pDest,
2830         IN      PVOID   pSrc,
2831         IN      ULONG   Length)
2832 {
2833         PUCHAR  pMem1;
2834         PUCHAR  pMem2;
2835         UINT    Index;
2836
2837         ASSERT((Length==0) || (pDest && pSrc));
2838
2839         pMem1 = (PUCHAR) pDest;
2840         pMem2 = (PUCHAR) pSrc;
2841
2842         for (Index = 0; Index < Length; Index++)
2843         {
2844                 pMem1[Index] = pMem2[Index];
2845         }
2846 }
2847
2848 /*
2849         ========================================================================
2850
2851         Routine Description:
2852                 Initialize port configuration structure
2853
2854         Arguments:
2855                 Adapter                                         Pointer to our adapter
2856
2857         Return Value:
2858                 None
2859
2860         IRQL = PASSIVE_LEVEL
2861
2862         Note:
2863
2864         ========================================================================
2865 */
2866 VOID    UserCfgInit(
2867         IN      PRTMP_ADAPTER pAd)
2868 {
2869     UINT key_index, bss_index;
2870
2871         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
2872
2873         //
2874         //  part I. intialize common configuration
2875         //
2876
2877         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
2878         {
2879                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
2880                 {
2881                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
2882                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
2883                 }
2884         }
2885
2886         pAd->Antenna.word = 0;
2887         pAd->CommonCfg.BBPCurrentBW = BW_20;
2888
2889         pAd->LedCntl.word = 0;
2890         pAd->LedIndicatorStregth = 0;
2891         pAd->RLnkCtrlOffset = 0;
2892         pAd->HostLnkCtrlOffset = 0;
2893         pAd->CheckDmaBusyCount = 0;
2894
2895         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
2896         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
2897         pAd->RfIcType = RFIC_2820;
2898
2899         // Init timer for reset complete event
2900         pAd->CommonCfg.CentralChannel = 1;
2901         pAd->bForcePrintTX = FALSE;
2902         pAd->bForcePrintRX = FALSE;
2903         pAd->bStaFifoTest = FALSE;
2904         pAd->bProtectionTest = FALSE;
2905         pAd->bHCCATest = FALSE;
2906         pAd->bGenOneHCCA = FALSE;
2907         pAd->CommonCfg.Dsifs = 10;      // in units of usec
2908         pAd->CommonCfg.TxPower = 100; //mW
2909         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
2910         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
2911         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
2912         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
2913         pAd->CommonCfg.RtsThreshold = 2347;
2914         pAd->CommonCfg.FragmentThreshold = 2346;
2915         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
2916         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
2917         pAd->CommonCfg.PhyMode = 0xff;     // unknown
2918         pAd->CommonCfg.BandState = UNKNOWN_BAND;
2919         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
2920         pAd->CommonCfg.RadarDetect.CSCount = 0;
2921         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
2922         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
2923         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
2924         pAd->CommonCfg.bAPSDCapable = FALSE;
2925         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
2926         pAd->CommonCfg.TriggerTimerCount = 0;
2927         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
2928         pAd->CommonCfg.bCountryFlag = FALSE;
2929         pAd->CommonCfg.TxStream = 0;
2930         pAd->CommonCfg.RxStream = 0;
2931
2932         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
2933
2934         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
2935         pAd->HTCEnable = FALSE;
2936         pAd->bBroadComHT = FALSE;
2937         pAd->CommonCfg.bRdg = FALSE;
2938
2939         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
2940         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
2941         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
2942         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
2943         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
2944         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
2945         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
2946
2947         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
2948         BATableInit(pAd, &pAd->BATable);
2949
2950         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
2951         pAd->CommonCfg.bHTProtect = 1;
2952         pAd->CommonCfg.bMIMOPSEnable = TRUE;
2953         pAd->CommonCfg.bBADecline = FALSE;
2954         pAd->CommonCfg.bDisableReordering = FALSE;
2955
2956         pAd->CommonCfg.TxBASize = 7;
2957
2958         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
2959
2960         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
2961         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
2962         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
2963         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
2964         pAd->CommonCfg.TxRate = RATE_6;
2965
2966         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
2967         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
2968         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
2969
2970         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
2971
2972         //
2973         // part II. intialize STA specific configuration
2974         //
2975         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2976         {
2977                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
2978                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
2979                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
2980                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
2981
2982                 pAd->StaCfg.Psm = PWR_ACTIVE;
2983
2984                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
2985                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
2986                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
2987                 pAd->StaCfg.bMixCipher = FALSE;
2988                 pAd->StaCfg.DefaultKeyId = 0;
2989
2990                 // 802.1x port control
2991                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
2992                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
2993                 pAd->StaCfg.LastMicErrorTime = 0;
2994                 pAd->StaCfg.MicErrCnt        = 0;
2995                 pAd->StaCfg.bBlockAssoc      = FALSE;
2996                 pAd->StaCfg.WpaState         = SS_NOTUSE;
2997
2998                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
2999
3000                 pAd->StaCfg.RssiTrigger = 0;
3001                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3002                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3003                 pAd->StaCfg.AtimWin = 0;
3004                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3005                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3006                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3007                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3008                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3009
3010                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3011                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3012         }
3013
3014         // global variables mXXXX used in MAC protocol state machines
3015         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3016         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3017         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3018
3019         // PHY specification
3020         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
3021         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
3022
3023         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3024         {
3025                 // user desired power mode
3026                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3027                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3028                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3029
3030                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3031                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3032
3033                 // Patch for Ndtest
3034                 pAd->StaCfg.ScanCnt = 0;
3035
3036                 // CCX 2.0 control flag init
3037                 pAd->StaCfg.CCXEnable = FALSE;
3038                 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3039                 pAd->StaCfg.CCXQosECWMin        = 4;
3040                 pAd->StaCfg.CCXQosECWMax        = 10;
3041
3042                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
3043                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
3044                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
3045                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
3046                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
3047
3048                 // Nitro mode control
3049                 pAd->StaCfg.bAutoReconnect = TRUE;
3050
3051                 // Save the init time as last scan time, the system should do scan after 2 seconds.
3052                 // This patch is for driver wake up from standby mode, system will do scan right away.
3053                 pAd->StaCfg.LastScanTime = 0;
3054                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3055                 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3056                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3057                 pAd->StaCfg.IEEE8021X = FALSE;
3058                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3059                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3060                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3061         }
3062
3063         // Default for extra information is not valid
3064         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3065
3066         // Default Config change flag
3067         pAd->bConfigChanged = FALSE;
3068
3069         //
3070         // part III. AP configurations
3071         //
3072
3073
3074         //
3075         // part IV. others
3076         //
3077         // dynamic BBP R66:sensibity tuning to overcome background noise
3078         pAd->BbpTuning.bEnable                = TRUE;
3079         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3080         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3081         pAd->BbpTuning.R66Delta               = 4;
3082         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3083
3084         //
3085         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3086         // if not initial this value, the default value will be 0.
3087         //
3088         pAd->BbpTuning.R66CurrentValue = 0x38;
3089
3090         pAd->Bbp94 = BBPR94_DEFAULT;
3091         pAd->BbpForCCK = FALSE;
3092
3093         // initialize MAC table and allocate spin lock
3094         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3095         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3096         NdisAllocateSpinLock(&pAd->MacTabLock);
3097
3098         pAd->CommonCfg.bWiFiTest = FALSE;
3099         pAd->bPCIclkOff = FALSE;
3100
3101         RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
3102         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3103 }
3104
3105 // IRQL = PASSIVE_LEVEL
3106 UCHAR BtoH(char ch)
3107 {
3108         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
3109         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
3110         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
3111         return(255);
3112 }
3113
3114 //
3115 //  FUNCTION: AtoH(char *, UCHAR *, int)
3116 //
3117 //  PURPOSE:  Converts ascii string to network order hex
3118 //
3119 //  PARAMETERS:
3120 //    src    - pointer to input ascii string
3121 //    dest   - pointer to output hex
3122 //    destlen - size of dest
3123 //
3124 //  COMMENTS:
3125 //
3126 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3127 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
3128 //
3129 // IRQL = PASSIVE_LEVEL
3130
3131 void AtoH(char * src, UCHAR * dest, int destlen)
3132 {
3133         char * srcptr;
3134         PUCHAR destTemp;
3135
3136         srcptr = src;
3137         destTemp = (PUCHAR) dest;
3138
3139         while(destlen--)
3140         {
3141                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
3142                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
3143                 destTemp++;
3144         }
3145 }
3146
3147 VOID    RTMPPatchMacBbpBug(
3148         IN      PRTMP_ADAPTER   pAd)
3149 {
3150         ULONG   Index;
3151
3152         // Initialize BBP register to default value
3153         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3154         {
3155                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3156         }
3157
3158         // Initialize RF register to default value
3159         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3160         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3161
3162         // Re-init BBP register from EEPROM value
3163         NICInitAsicFromEEPROM(pAd);
3164 }
3165
3166 /*
3167         ========================================================================
3168
3169         Routine Description:
3170                 Init timer objects
3171
3172         Arguments:
3173                 pAd                     Pointer to our adapter
3174                 pTimer                          Timer structure
3175                 pTimerFunc                      Function to execute when timer expired
3176                 Repeat                          Ture for period timer
3177
3178         Return Value:
3179                 None
3180
3181         Note:
3182
3183         ========================================================================
3184 */
3185 VOID    RTMPInitTimer(
3186         IN      PRTMP_ADAPTER                   pAd,
3187         IN      PRALINK_TIMER_STRUCT    pTimer,
3188         IN      PVOID                                   pTimerFunc,
3189         IN      PVOID                                   pData,
3190         IN      BOOLEAN                                 Repeat)
3191 {
3192         //
3193         // Set Valid to TRUE for later used.
3194         // It will crash if we cancel a timer or set a timer
3195         // that we haven't initialize before.
3196         //
3197         pTimer->Valid      = TRUE;
3198
3199         pTimer->PeriodicType = Repeat;
3200         pTimer->State      = FALSE;
3201         pTimer->cookie = (ULONG) pData;
3202
3203
3204         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
3205 }
3206
3207 /*
3208         ========================================================================
3209
3210         Routine Description:
3211                 Init timer objects
3212
3213         Arguments:
3214                 pTimer                          Timer structure
3215                 Value                           Timer value in milliseconds
3216
3217         Return Value:
3218                 None
3219
3220         Note:
3221                 To use this routine, must call RTMPInitTimer before.
3222
3223         ========================================================================
3224 */
3225 VOID    RTMPSetTimer(
3226         IN      PRALINK_TIMER_STRUCT    pTimer,
3227         IN      ULONG                                   Value)
3228 {
3229         if (pTimer->Valid)
3230         {
3231                 pTimer->TimerValue = Value;
3232                 pTimer->State      = FALSE;
3233                 if (pTimer->PeriodicType == TRUE)
3234                 {
3235                         pTimer->Repeat = TRUE;
3236                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3237                 }
3238                 else
3239                 {
3240                         pTimer->Repeat = FALSE;
3241                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3242                 }
3243         }
3244         else
3245         {
3246                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3247         }
3248 }
3249
3250
3251 /*
3252         ========================================================================
3253
3254         Routine Description:
3255                 Init timer objects
3256
3257         Arguments:
3258                 pTimer                          Timer structure
3259                 Value                           Timer value in milliseconds
3260
3261         Return Value:
3262                 None
3263
3264         Note:
3265                 To use this routine, must call RTMPInitTimer before.
3266
3267         ========================================================================
3268 */
3269 VOID    RTMPModTimer(
3270         IN      PRALINK_TIMER_STRUCT    pTimer,
3271         IN      ULONG                                   Value)
3272 {
3273         BOOLEAN Cancel;
3274
3275         if (pTimer->Valid)
3276         {
3277                 pTimer->TimerValue = Value;
3278                 pTimer->State      = FALSE;
3279                 if (pTimer->PeriodicType == TRUE)
3280                 {
3281                         RTMPCancelTimer(pTimer, &Cancel);
3282                         RTMPSetTimer(pTimer, Value);
3283                 }
3284                 else
3285                 {
3286                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3287                 }
3288         }
3289         else
3290         {
3291                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3292         }
3293 }
3294
3295 /*
3296         ========================================================================
3297
3298         Routine Description:
3299                 Cancel timer objects
3300
3301         Arguments:
3302                 Adapter                                         Pointer to our adapter
3303
3304         Return Value:
3305                 None
3306
3307         IRQL = PASSIVE_LEVEL
3308         IRQL = DISPATCH_LEVEL
3309
3310         Note:
3311                 1.) To use this routine, must call RTMPInitTimer before.
3312                 2.) Reset NIC to initial state AS IS system boot up time.
3313
3314         ========================================================================
3315 */
3316 VOID    RTMPCancelTimer(
3317         IN      PRALINK_TIMER_STRUCT    pTimer,
3318         OUT     BOOLEAN                                 *pCancelled)
3319 {
3320         if (pTimer->Valid)
3321         {
3322                 if (pTimer->State == FALSE)
3323                         pTimer->Repeat = FALSE;
3324                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3325
3326                 if (*pCancelled == TRUE)
3327                         pTimer->State = TRUE;
3328
3329         }
3330         else
3331         {
3332                 //
3333                 // NdisMCancelTimer just canced the timer and not mean release the timer.
3334                 // And don't set the "Valid" to False. So that we can use this timer again.
3335                 //
3336                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3337         }
3338 }
3339
3340 /*
3341         ========================================================================
3342
3343         Routine Description:
3344                 Set LED Status
3345
3346         Arguments:
3347                 pAd                                             Pointer to our adapter
3348                 Status                                  LED Status
3349
3350         Return Value:
3351                 None
3352
3353         IRQL = PASSIVE_LEVEL
3354         IRQL = DISPATCH_LEVEL
3355
3356         Note:
3357
3358         ========================================================================
3359 */
3360 VOID RTMPSetLED(
3361         IN PRTMP_ADAPTER        pAd,
3362         IN UCHAR                        Status)
3363 {
3364         //ULONG                 data;
3365         UCHAR                   HighByte = 0;
3366         UCHAR                   LowByte;
3367
3368         LowByte = pAd->LedCntl.field.LedMode&0x7f;
3369         switch (Status)
3370         {
3371                 case LED_LINK_DOWN:
3372                         HighByte = 0x20;
3373                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3374                         pAd->LedIndicatorStregth = 0;
3375                         break;
3376                 case LED_LINK_UP:
3377                         if (pAd->CommonCfg.Channel > 14)
3378                                 HighByte = 0xa0;
3379                         else
3380                                 HighByte = 0x60;
3381                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3382                         break;
3383                 case LED_RADIO_ON:
3384                         HighByte = 0x20;
3385                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3386                         break;
3387                 case LED_HALT:
3388                         LowByte = 0; // Driver sets MAC register and MAC controls LED
3389                 case LED_RADIO_OFF:
3390                         HighByte = 0;
3391                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3392                         break;
3393         case LED_WPS:
3394                         HighByte = 0x10;
3395                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3396                         break;
3397                 case LED_ON_SITE_SURVEY:
3398                         HighByte = 0x08;
3399                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3400                         break;
3401                 case LED_POWER_UP:
3402                         HighByte = 0x04;
3403                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3404                         break;
3405                 default:
3406                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3407                         break;
3408         }
3409
3410     //
3411         // Keep LED status for LED SiteSurvey mode.
3412         // After SiteSurvey, we will set the LED mode to previous status.
3413         //
3414         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3415                 pAd->LedStatus = Status;
3416
3417         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3418 }
3419
3420 /*
3421         ========================================================================
3422
3423         Routine Description:
3424                 Set LED Signal Stregth
3425
3426         Arguments:
3427                 pAd                                             Pointer to our adapter
3428                 Dbm                                             Signal Stregth
3429
3430         Return Value:
3431                 None
3432
3433         IRQL = PASSIVE_LEVEL
3434
3435         Note:
3436                 Can be run on any IRQL level.
3437
3438                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3439                 <= -90  No Signal
3440                 <= -81  Very Low
3441                 <= -71  Low
3442                 <= -67  Good
3443                 <= -57  Very Good
3444                  > -57  Excellent
3445         ========================================================================
3446 */
3447 VOID RTMPSetSignalLED(
3448         IN PRTMP_ADAPTER        pAd,
3449         IN NDIS_802_11_RSSI Dbm)
3450 {
3451         UCHAR           nLed = 0;
3452
3453         //
3454         // if not Signal Stregth, then do nothing.
3455         //
3456         if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3457         {
3458                 return;
3459         }
3460
3461         if (Dbm <= -90)
3462                 nLed = 0;
3463         else if (Dbm <= -81)
3464                 nLed = 1;
3465         else if (Dbm <= -71)
3466                 nLed = 3;
3467         else if (Dbm <= -67)
3468                 nLed = 7;
3469         else if (Dbm <= -57)
3470                 nLed = 15;
3471         else
3472                 nLed = 31;
3473
3474         //
3475         // Update Signal Stregth to firmware if changed.
3476         //
3477         if (pAd->LedIndicatorStregth != nLed)
3478         {
3479                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3480                 pAd->LedIndicatorStregth = nLed;
3481         }
3482 }
3483
3484 /*
3485         ========================================================================
3486
3487         Routine Description:
3488                 Enable RX
3489
3490         Arguments:
3491                 pAd                                             Pointer to our adapter
3492
3493         Return Value:
3494                 None
3495
3496         IRQL <= DISPATCH_LEVEL
3497
3498         Note:
3499                 Before Enable RX, make sure you have enabled Interrupt.
3500         ========================================================================
3501 */
3502 VOID RTMPEnableRxTx(
3503         IN PRTMP_ADAPTER        pAd)
3504 {
3505         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3506
3507         // Enable Rx DMA.
3508         RT28XXDMAEnable(pAd);
3509
3510         // enable RX of MAC block
3511         if (pAd->OpMode == OPMODE_AP)
3512         {
3513                 UINT32 rx_filter_flag = APNORMAL;
3514
3515
3516                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
3517         }
3518         else
3519         {
3520                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);     // Staion not drop control frame will fail WiFi Certification.
3521         }
3522
3523         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3524         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3525 }
3526
3527