2 i2c Support for Apple Keywest I2C Bus Controller
4 Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
8 Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 2001/12/13 BenH New implementation
27 2001/12/15 BenH Add support for "byte" and "quick"
28 transfers. Add i2c_xfer routine.
29 2003/09/21 BenH Rework state machine with Paulus help
30 2004/01/21 BenH Merge in Greg KH changes, polled mode is back
31 2004/02/05 BenH Merge 64 bits fixes from the g5 ppc64 tree
33 My understanding of the various modes supported by keywest are:
35 - Dumb mode : not implemented, probably direct tweaking of lines
36 - Standard mode : simple i2c transaction of type
37 S Addr R/W A Data A Data ... T
38 - Standard sub mode : combined 8 bit subaddr write with data read
39 S Addr R/W A SubAddr A Data A Data ... T
40 - Combined mode : Subaddress and Data sequences appended with no stop
41 S Addr R/W A SubAddr S Addr R/W A Data A Data ... T
43 Currently, this driver uses only Standard mode for i2c xfer, and
44 smbus byte & quick transfers ; and uses StandardSub mode for
45 other smbus transfers instead of combined as we need that for the
46 sound driver to be happy
49 #include <linux/config.h>
50 #include <linux/module.h>
51 #include <linux/kernel.h>
52 #include <linux/ioport.h>
53 #include <linux/pci.h>
54 #include <linux/types.h>
55 #include <linux/delay.h>
56 #include <linux/i2c.h>
57 #include <linux/init.h>
59 #include <linux/timer.h>
60 #include <linux/spinlock.h>
61 #include <linux/completion.h>
62 #include <linux/interrupt.h>
66 #include <asm/machdep.h>
67 #include <asm/pmac_feature.h>
68 #include <asm/pmac_low_i2c.h>
70 #include "i2c-keywest.h"
74 /* Some debug macros */
75 #define WRONG_STATE(name) do {\
76 pr_debug("KW: wrong state. Got %s, state: %s (isr: %02x)\n", \
77 name, __kw_state_names[iface->state], isr); \
81 static const char *__kw_state_names[] = {
93 MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
94 MODULE_DESCRIPTION("I2C driver for Apple's Keywest");
95 MODULE_LICENSE("GPL");
96 module_param(probe, bool, 0);
99 /* Don't schedule, the g5 fan controller is too
103 wait_interrupt(struct keywest_iface* iface)
108 for (i = 0; i < 200000; i++) {
109 isr = read_reg(reg_isr) & KW_I2C_IRQ_MASK;
116 #endif /* POLLED_MODE */
119 do_stop(struct keywest_iface* iface, int result)
121 write_reg(reg_control, KW_I2C_CTL_STOP);
122 iface->state = state_stop;
123 iface->result = result;
126 /* Main state machine for standard & standard sub mode */
128 handle_interrupt(struct keywest_iface *iface, u8 isr)
133 if (iface->state != state_stop) {
134 pr_debug("KW: Timeout !\n");
135 do_stop(iface, -EIO);
137 if (iface->state == state_stop) {
138 ack = read_reg(reg_status);
139 if (!(ack & KW_I2C_STAT_BUSY)) {
140 iface->state = state_idle;
141 write_reg(reg_ier, 0x00);
143 complete(&iface->complete);
144 #endif /* POLLED_MODE */
150 if (isr & KW_I2C_IRQ_ADDR) {
151 ack = read_reg(reg_status);
152 if (iface->state != state_addr) {
153 write_reg(reg_isr, KW_I2C_IRQ_ADDR);
154 WRONG_STATE("KW_I2C_IRQ_ADDR");
155 do_stop(iface, -EIO);
158 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
159 iface->state = state_stop;
160 iface->result = -ENODEV;
161 pr_debug("KW: NAK on address\n");
163 /* Handle rw "quick" mode */
164 if (iface->datalen == 0) {
166 } else if (iface->read_write == I2C_SMBUS_READ) {
167 iface->state = state_read;
168 if (iface->datalen > 1)
169 write_reg(reg_control, KW_I2C_CTL_AAK);
171 iface->state = state_write;
172 write_reg(reg_data, *(iface->data++));
176 write_reg(reg_isr, KW_I2C_IRQ_ADDR);
179 if (isr & KW_I2C_IRQ_DATA) {
180 if (iface->state == state_read) {
181 *(iface->data++) = read_reg(reg_data);
182 write_reg(reg_isr, KW_I2C_IRQ_DATA);
184 if (iface->datalen == 0)
185 iface->state = state_stop;
186 else if (iface->datalen == 1)
187 write_reg(reg_control, 0);
188 } else if (iface->state == state_write) {
189 /* Check ack status */
190 ack = read_reg(reg_status);
191 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
192 pr_debug("KW: nack on data write (%x): %x\n",
193 iface->data[-1], ack);
194 do_stop(iface, -EIO);
195 } else if (iface->datalen) {
196 write_reg(reg_data, *(iface->data++));
199 write_reg(reg_control, KW_I2C_CTL_STOP);
200 iface->state = state_stop;
203 write_reg(reg_isr, KW_I2C_IRQ_DATA);
205 write_reg(reg_isr, KW_I2C_IRQ_DATA);
206 WRONG_STATE("KW_I2C_IRQ_DATA");
207 if (iface->state != state_stop)
208 do_stop(iface, -EIO);
212 if (isr & KW_I2C_IRQ_STOP) {
213 write_reg(reg_isr, KW_I2C_IRQ_STOP);
214 if (iface->state != state_stop) {
215 WRONG_STATE("KW_I2C_IRQ_STOP");
216 iface->result = -EIO;
218 iface->state = state_idle;
219 write_reg(reg_ier, 0x00);
221 complete(&iface->complete);
222 #endif /* POLLED_MODE */
225 if (isr & KW_I2C_IRQ_START)
226 write_reg(reg_isr, KW_I2C_IRQ_START);
231 /* Interrupt handler */
233 keywest_irq(int irq, void *dev_id, struct pt_regs *regs)
235 struct keywest_iface *iface = (struct keywest_iface *)dev_id;
238 spin_lock_irqsave(&iface->lock, flags);
239 del_timer(&iface->timeout_timer);
240 handle_interrupt(iface, read_reg(reg_isr));
241 if (iface->state != state_idle) {
242 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
243 add_timer(&iface->timeout_timer);
245 spin_unlock_irqrestore(&iface->lock, flags);
250 keywest_timeout(unsigned long data)
252 struct keywest_iface *iface = (struct keywest_iface *)data;
255 pr_debug("timeout !\n");
256 spin_lock_irqsave(&iface->lock, flags);
257 handle_interrupt(iface, read_reg(reg_isr));
258 if (iface->state != state_idle) {
259 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
260 add_timer(&iface->timeout_timer);
262 spin_unlock_irqrestore(&iface->lock, flags);
265 #endif /* POLLED_MODE */
268 * SMBUS-type transfer entrypoint
271 keywest_smbus_xfer( struct i2c_adapter* adap,
273 unsigned short flags,
277 union i2c_smbus_data* data)
279 struct keywest_chan* chan = i2c_get_adapdata(adap);
280 struct keywest_iface* iface = chan->iface;
286 if (iface->state == state_dead)
289 /* Prepare datas & select mode */
290 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
292 case I2C_SMBUS_QUICK:
295 iface->cur_mode |= KW_I2C_MODE_STANDARD;
299 buffer = &data->byte;
300 iface->cur_mode |= KW_I2C_MODE_STANDARD;
302 case I2C_SMBUS_BYTE_DATA:
304 buffer = &data->byte;
305 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
307 case I2C_SMBUS_WORD_DATA:
309 cur_word = cpu_to_le16(data->word);
310 buffer = (u8 *)&cur_word;
311 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
313 case I2C_SMBUS_BLOCK_DATA:
314 len = data->block[0];
315 buffer = &data->block[1];
316 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
322 /* Turn a standardsub read into a combined mode access */
323 if (read_write == I2C_SMBUS_READ
324 && (iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB) {
325 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
326 iface->cur_mode |= KW_I2C_MODE_COMBINED;
329 /* Original driver had this limitation */
333 if (pmac_low_i2c_lock(iface->node))
336 pr_debug("chan: %d, addr: 0x%x, transfer len: %d, read: %d\n",
337 chan->chan_no, addr, len, read_write == I2C_SMBUS_READ);
339 iface->data = buffer;
340 iface->datalen = len;
341 iface->state = state_addr;
343 iface->read_write = read_write;
345 /* Setup channel & clear pending irqs */
346 write_reg(reg_isr, read_reg(reg_isr));
347 write_reg(reg_mode, iface->cur_mode | (chan->chan_no << 4));
348 write_reg(reg_status, 0);
350 /* Set up address and r/w bit */
352 (addr << 1) | ((read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
354 /* Set up the sub address */
355 if ((iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
356 || (iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
357 write_reg(reg_subaddr, command);
361 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
362 add_timer(&iface->timeout_timer);
365 /* Start sending address & enable interrupt*/
366 write_reg(reg_control, KW_I2C_CTL_XADDR);
367 write_reg(reg_ier, KW_I2C_IRQ_MASK);
370 pr_debug("using polled mode...\n");
371 /* State machine, to turn into an interrupt handler */
372 while(iface->state != state_idle) {
375 u8 isr = wait_interrupt(iface);
376 spin_lock_irqsave(&iface->lock, flags);
377 handle_interrupt(iface, isr);
378 spin_unlock_irqrestore(&iface->lock, flags);
380 #else /* POLLED_MODE */
381 pr_debug("using interrupt mode...\n");
382 wait_for_completion(&iface->complete);
383 #endif /* POLLED_MODE */
386 pr_debug("transfer done, result: %d\n", rc);
388 if (rc == 0 && size == I2C_SMBUS_WORD_DATA && read_write == I2C_SMBUS_READ)
389 data->word = le16_to_cpu(cur_word);
392 pmac_low_i2c_unlock(iface->node);
398 * Generic i2c master transfer entrypoint
401 keywest_xfer( struct i2c_adapter *adap,
402 struct i2c_msg *msgs,
405 struct keywest_chan* chan = i2c_get_adapdata(adap);
406 struct keywest_iface* iface = chan->iface;
407 struct i2c_msg *pmsg;
411 if (iface->state == state_dead)
414 if (pmac_low_i2c_lock(iface->node))
417 /* Set adapter to standard mode */
418 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
419 iface->cur_mode |= KW_I2C_MODE_STANDARD;
422 for (i = 0; rc >= 0 && i < num;) {
427 if (pmsg->flags & I2C_M_TEN) {
428 printk(KERN_ERR "i2c-keywest: 10 bits addr not supported !\n");
432 pr_debug("xfer: chan: %d, doing %s %d bytes to 0x%02x - %d of %d messages\n",
434 pmsg->flags & I2C_M_RD ? "read" : "write",
435 pmsg->len, addr, i, num);
437 /* Setup channel & clear pending irqs */
438 write_reg(reg_mode, iface->cur_mode | (chan->chan_no << 4));
439 write_reg(reg_isr, read_reg(reg_isr));
440 write_reg(reg_status, 0);
442 iface->data = pmsg->buf;
443 iface->datalen = pmsg->len;
444 iface->state = state_addr;
446 if (pmsg->flags & I2C_M_RD)
447 iface->read_write = I2C_SMBUS_READ;
449 iface->read_write = I2C_SMBUS_WRITE;
451 /* Set up address and r/w bit */
452 if (pmsg->flags & I2C_M_REV_DIR_ADDR)
456 ((iface->read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
460 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
461 add_timer(&iface->timeout_timer);
464 /* Start sending address & enable interrupt*/
465 write_reg(reg_ier, KW_I2C_IRQ_MASK);
466 write_reg(reg_control, KW_I2C_CTL_XADDR);
469 pr_debug("using polled mode...\n");
470 /* State machine, to turn into an interrupt handler */
471 while(iface->state != state_idle) {
472 u8 isr = wait_interrupt(iface);
473 handle_interrupt(iface, isr);
475 #else /* POLLED_MODE */
476 pr_debug("using interrupt mode...\n");
477 wait_for_completion(&iface->complete);
478 #endif /* POLLED_MODE */
483 pr_debug("transfer done, result: %d\n", rc);
487 pmac_low_i2c_unlock(iface->node);
493 keywest_func(struct i2c_adapter * adapter)
495 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
496 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
497 I2C_FUNC_SMBUS_BLOCK_DATA;
500 /* For now, we only handle combined mode (smbus) */
501 static struct i2c_algorithm keywest_algorithm = {
502 .name = "Keywest i2c",
503 .id = I2C_ALGO_SMBUS,
504 .smbus_xfer = keywest_smbus_xfer,
505 .master_xfer = keywest_xfer,
506 .functionality = keywest_func,
511 create_iface(struct device_node *np, struct device *dev)
514 unsigned bsteps, tsize, i, nchan, addroffset;
515 struct keywest_iface* iface;
519 if (np->n_intrs < 1 || np->n_addrs < 1) {
520 printk(KERN_ERR "%s: Missing interrupt or address !\n",
524 if (pmac_low_i2c_lock(np))
527 psteps = (u32 *)get_property(np, "AAPL,address-step", NULL);
528 steps = psteps ? (*psteps) : 0x10;
530 /* Hrm... maybe we can be smarter here */
531 for (bsteps = 0; (steps & 0x01) == 0; bsteps++)
534 if (np->parent->name[0] == 'u') {
542 tsize = sizeof(struct keywest_iface) +
543 (sizeof(struct keywest_chan) + 4) * nchan;
544 iface = (struct keywest_iface *) kmalloc(tsize, GFP_KERNEL);
546 printk(KERN_ERR "i2c-keywest: can't allocate inteface !\n");
547 pmac_low_i2c_unlock(np);
550 memset(iface, 0, tsize);
551 spin_lock_init(&iface->lock);
552 init_completion(&iface->complete);
553 iface->node = of_node_get(np);
554 iface->bsteps = bsteps;
555 iface->chan_count = nchan;
556 iface->state = state_idle;
557 iface->irq = np->intrs[0].line;
558 iface->channels = (struct keywest_chan *)
559 (((unsigned long)(iface + 1) + 3UL) & ~3UL);
560 iface->base = ioremap(np->addrs[0].address + addroffset,
563 printk(KERN_ERR "i2c-keywest: can't map inteface !\n");
565 pmac_low_i2c_unlock(np);
570 init_timer(&iface->timeout_timer);
571 iface->timeout_timer.function = keywest_timeout;
572 iface->timeout_timer.data = (unsigned long)iface;
575 /* Select interface rate */
576 iface->cur_mode = KW_I2C_MODE_100KHZ;
577 prate = (u32 *)get_property(np, "AAPL,i2c-rate", NULL);
578 if (prate) switch(*prate) {
580 iface->cur_mode = KW_I2C_MODE_100KHZ;
583 iface->cur_mode = KW_I2C_MODE_50KHZ;
586 iface->cur_mode = KW_I2C_MODE_25KHZ;
589 printk(KERN_WARNING "i2c-keywest: unknown rate %ldKhz, using 100KHz\n",
593 /* Select standard mode by default */
594 iface->cur_mode |= KW_I2C_MODE_STANDARD;
597 write_reg(reg_mode, iface->cur_mode);
599 /* Switch interrupts off & clear them*/
600 write_reg(reg_ier, 0x00);
601 write_reg(reg_isr, KW_I2C_IRQ_MASK);
604 /* Request chip interrupt */
605 rc = request_irq(iface->irq, keywest_irq, SA_INTERRUPT, "keywest i2c", iface);
607 printk(KERN_ERR "i2c-keywest: can't get IRQ %d !\n", iface->irq);
608 iounmap(iface->base);
610 pmac_low_i2c_unlock(np);
613 #endif /* POLLED_MODE */
615 pmac_low_i2c_unlock(np);
616 dev_set_drvdata(dev, iface);
618 for (i=0; i<nchan; i++) {
619 struct keywest_chan* chan = &iface->channels[i];
622 sprintf(chan->adapter.name, "%s %d", np->parent->name, i);
625 chan->adapter.id = I2C_ALGO_SMBUS;
626 chan->adapter.algo = &keywest_algorithm;
627 chan->adapter.algo_data = NULL;
628 chan->adapter.client_register = NULL;
629 chan->adapter.client_unregister = NULL;
630 i2c_set_adapdata(&chan->adapter, chan);
631 chan->adapter.dev.parent = dev;
633 rc = i2c_add_adapter(&chan->adapter);
635 printk("i2c-keywest.c: Adapter %s registration failed\n",
637 i2c_set_adapdata(&chan->adapter, NULL);
641 for (addr = 0x00; addr <= 0x7f; addr++) {
642 if (i2c_smbus_xfer(&chan->adapter,addr,
643 0,0,0,I2C_SMBUS_QUICK,NULL) >= 0)
644 printk("%02x ", addr);
650 printk(KERN_INFO "Found KeyWest i2c on \"%s\", %d channel%s, stepping: %d bits\n",
651 np->parent->name, nchan, nchan > 1 ? "s" : "", bsteps);
657 dispose_iface(struct device *dev)
659 struct keywest_iface *iface = dev_get_drvdata(dev);
662 /* Make sure we stop all activity */
663 if (pmac_low_i2c_lock(iface->node))
667 spin_lock_irq(&iface->lock);
668 while (iface->state != state_idle) {
669 spin_unlock_irq(&iface->lock);
671 spin_lock_irq(&iface->lock);
673 #endif /* POLLED_MODE */
674 iface->state = state_dead;
676 spin_unlock_irq(&iface->lock);
677 free_irq(iface->irq, iface);
678 #endif /* POLLED_MODE */
680 pmac_low_i2c_unlock(iface->node);
682 /* Release all channels */
683 for (i=0; i<iface->chan_count; i++) {
684 struct keywest_chan* chan = &iface->channels[i];
685 if (i2c_get_adapdata(&chan->adapter) == NULL)
687 rc = i2c_del_adapter(&chan->adapter);
688 i2c_set_adapdata(&chan->adapter, NULL);
689 /* We aren't that prepared to deal with this... */
691 printk("i2c-keywest.c: i2c_del_adapter failed, that's bad !\n");
693 iounmap(iface->base);
694 dev_set_drvdata(dev, NULL);
695 of_node_put(iface->node);
702 create_iface_macio(struct macio_dev* dev, const struct of_match *match)
704 return create_iface(dev->ofdev.node, &dev->ofdev.dev);
708 dispose_iface_macio(struct macio_dev* dev)
710 return dispose_iface(&dev->ofdev.dev);
714 create_iface_of_platform(struct of_device* dev, const struct of_match *match)
716 return create_iface(dev->node, &dev->dev);
720 dispose_iface_of_platform(struct of_device* dev)
722 return dispose_iface(&dev->dev);
725 static struct of_match i2c_keywest_match[] =
728 .name = OF_ANY_MATCH,
730 .compatible = "keywest"
735 static struct macio_driver i2c_keywest_macio_driver =
737 .name = "i2c-keywest",
738 .match_table = i2c_keywest_match,
739 .probe = create_iface_macio,
740 .remove = dispose_iface_macio
743 static struct of_platform_driver i2c_keywest_of_platform_driver =
745 .name = "i2c-keywest",
746 .match_table = i2c_keywest_match,
747 .probe = create_iface_of_platform,
748 .remove = dispose_iface_of_platform
752 i2c_keywest_init(void)
754 of_register_driver(&i2c_keywest_of_platform_driver);
755 macio_register_driver(&i2c_keywest_macio_driver);
761 i2c_keywest_cleanup(void)
763 of_unregister_driver(&i2c_keywest_of_platform_driver);
764 macio_unregister_driver(&i2c_keywest_macio_driver);
767 module_init(i2c_keywest_init);
768 module_exit(i2c_keywest_cleanup);