2 * linux/arch/arm/plat-omap/devices.c
4 * Common platform device setup/initialization for OMAP1 and OMAP2
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
17 #include <asm/hardware.h>
19 #include <asm/mach-types.h>
20 #include <asm/mach/map.h>
22 #include <asm/arch/tc.h>
23 #include <asm/arch/board.h>
24 #include <asm/arch/mux.h>
25 #include <asm/arch/gpio.h>
26 #include <asm/arch/menelaus.h>
28 #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
30 #include "../plat-omap/dsp/dsp_common.h"
32 static struct dsp_platform_data dsp_pdata = {
33 .kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list),
36 static struct resource omap_dsp_resources[] = {
40 .flags = IORESOURCE_IRQ,
44 static struct platform_device omap_dsp_device = {
47 .num_resources = ARRAY_SIZE(omap_dsp_resources),
48 .resource = omap_dsp_resources,
50 .platform_data = &dsp_pdata,
54 static inline void omap_init_dsp(void)
59 if (cpu_is_omap15xx())
60 irq = INT_1510_DSP_MMU;
61 else if (cpu_is_omap16xx())
62 irq = INT_1610_DSP_MMU;
63 else if (cpu_is_omap24xx())
64 irq = INT_24XX_DSP_MMU;
66 res = platform_get_resource_byname(&omap_dsp_device,
67 IORESOURCE_IRQ, "dsp_mmu");
70 platform_device_register(&omap_dsp_device);
73 int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev)
75 static DEFINE_MUTEX(dsp_pdata_lock);
77 mutex_init(&kdev->lock);
79 mutex_lock(&dsp_pdata_lock);
80 list_add_tail(&kdev->entry, &dsp_pdata.kdev_list);
81 mutex_unlock(&dsp_pdata_lock);
85 EXPORT_SYMBOL(dsp_kfunc_device_register);
88 static inline void omap_init_dsp(void) { }
89 #endif /* CONFIG_OMAP_DSP */
91 /*-------------------------------------------------------------------------*/
92 #if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
94 static void omap_init_kp(void)
96 if (machine_is_omap_h2() || machine_is_omap_h3()) {
97 omap_cfg_reg(F18_1610_KBC0);
98 omap_cfg_reg(D20_1610_KBC1);
99 omap_cfg_reg(D19_1610_KBC2);
100 omap_cfg_reg(E18_1610_KBC3);
101 omap_cfg_reg(C21_1610_KBC4);
103 omap_cfg_reg(G18_1610_KBR0);
104 omap_cfg_reg(F19_1610_KBR1);
105 omap_cfg_reg(H14_1610_KBR2);
106 omap_cfg_reg(E20_1610_KBR3);
107 omap_cfg_reg(E19_1610_KBR4);
108 omap_cfg_reg(N19_1610_KBR5);
109 } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
110 omap_cfg_reg(E2_730_KBR0);
111 omap_cfg_reg(J7_730_KBR1);
112 omap_cfg_reg(E1_730_KBR2);
113 omap_cfg_reg(F3_730_KBR3);
114 omap_cfg_reg(D2_730_KBR4);
116 omap_cfg_reg(C2_730_KBC0);
117 omap_cfg_reg(D3_730_KBC1);
118 omap_cfg_reg(E4_730_KBC2);
119 omap_cfg_reg(F4_730_KBC3);
120 omap_cfg_reg(E3_730_KBC4);
121 } else if (machine_is_omap_h4()) {
122 omap_cfg_reg(T19_24XX_KBR0);
123 omap_cfg_reg(R19_24XX_KBR1);
124 omap_cfg_reg(V18_24XX_KBR2);
125 omap_cfg_reg(M21_24XX_KBR3);
126 omap_cfg_reg(E5__24XX_KBR4);
127 if (omap_has_menelaus()) {
128 omap_cfg_reg(B3__24XX_KBR5);
129 omap_cfg_reg(AA4_24XX_KBC2);
130 omap_cfg_reg(B13_24XX_KBC6);
132 omap_cfg_reg(M18_24XX_KBR5);
133 omap_cfg_reg(H19_24XX_KBC2);
134 omap_cfg_reg(N19_24XX_KBC6);
136 omap_cfg_reg(R20_24XX_KBC0);
137 omap_cfg_reg(M14_24XX_KBC1);
138 omap_cfg_reg(V17_24XX_KBC3);
139 omap_cfg_reg(P21_24XX_KBC4);
140 omap_cfg_reg(L14_24XX_KBC5);
144 static inline void omap_init_kp(void) {}
147 /*-------------------------------------------------------------------------*/
149 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
151 #ifdef CONFIG_ARCH_OMAP24XX
152 #define OMAP_MMC1_BASE 0x4809c000
153 #define OMAP_MMC1_INT INT_24XX_MMC_IRQ
155 #define OMAP_MMC1_BASE 0xfffb7800
156 #define OMAP_MMC1_INT INT_MMC
158 #define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */
160 static struct omap_mmc_conf mmc1_conf;
162 static u64 mmc1_dmamask = 0xffffffff;
164 static struct resource mmc1_resources[] = {
166 .start = OMAP_MMC1_BASE,
167 .end = OMAP_MMC1_BASE + 0x7f,
168 .flags = IORESOURCE_MEM,
171 .start = OMAP_MMC1_INT,
172 .flags = IORESOURCE_IRQ,
176 static struct platform_device mmc_omap_device1 = {
180 .dma_mask = &mmc1_dmamask,
181 .platform_data = &mmc1_conf,
183 .num_resources = ARRAY_SIZE(mmc1_resources),
184 .resource = mmc1_resources,
187 #ifdef CONFIG_ARCH_OMAP16XX
189 static struct omap_mmc_conf mmc2_conf;
191 static u64 mmc2_dmamask = 0xffffffff;
193 static struct resource mmc2_resources[] = {
195 .start = OMAP_MMC2_BASE,
196 .end = OMAP_MMC2_BASE + 0x7f,
197 .flags = IORESOURCE_MEM,
200 .start = INT_1610_MMC2,
201 .flags = IORESOURCE_IRQ,
205 static struct platform_device mmc_omap_device2 = {
209 .dma_mask = &mmc2_dmamask,
210 .platform_data = &mmc2_conf,
212 .num_resources = ARRAY_SIZE(mmc2_resources),
213 .resource = mmc2_resources,
217 static void __init omap_init_mmc(void)
219 const struct omap_mmc_config *mmc_conf;
220 const struct omap_mmc_conf *mmc;
222 /* NOTE: assumes MMC was never (wrongly) enabled */
223 mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
227 /* block 1 is always available and has just one pinout option */
228 mmc = &mmc_conf->mmc[0];
230 if (cpu_is_omap24xx()) {
231 omap_cfg_reg(H18_24XX_MMC_CMD);
232 omap_cfg_reg(H15_24XX_MMC_CLKI);
233 omap_cfg_reg(G19_24XX_MMC_CLKO);
234 omap_cfg_reg(F20_24XX_MMC_DAT0);
235 omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
236 omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
238 omap_cfg_reg(MMC_CMD);
239 omap_cfg_reg(MMC_CLK);
240 omap_cfg_reg(MMC_DAT0);
241 if (cpu_is_omap1710()) {
242 omap_cfg_reg(M15_1710_MMC_CLKI);
243 omap_cfg_reg(P19_1710_MMC_CMDDIR);
244 omap_cfg_reg(P20_1710_MMC_DATDIR0);
248 if (cpu_is_omap24xx()) {
249 omap_cfg_reg(H14_24XX_MMC_DAT1);
250 omap_cfg_reg(E19_24XX_MMC_DAT2);
251 omap_cfg_reg(D19_24XX_MMC_DAT3);
252 omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
253 omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
254 omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
256 omap_cfg_reg(MMC_DAT1);
257 /* NOTE: DAT2 can be on W10 (here) or M15 */
259 omap_cfg_reg(MMC_DAT2);
260 omap_cfg_reg(MMC_DAT3);
264 (void) platform_device_register(&mmc_omap_device1);
267 #ifdef CONFIG_ARCH_OMAP16XX
268 /* block 2 is on newer chips, and has many pinout options */
269 mmc = &mmc_conf->mmc[1];
272 omap_cfg_reg(Y8_1610_MMC2_CMD);
273 omap_cfg_reg(Y10_1610_MMC2_CLK);
274 omap_cfg_reg(R18_1610_MMC2_CLKIN);
275 omap_cfg_reg(W8_1610_MMC2_DAT0);
277 omap_cfg_reg(V8_1610_MMC2_DAT1);
278 omap_cfg_reg(W15_1610_MMC2_DAT2);
279 omap_cfg_reg(R10_1610_MMC2_DAT3);
282 /* These are needed for the level shifter */
283 omap_cfg_reg(V9_1610_MMC2_CMDDIR);
284 omap_cfg_reg(V5_1610_MMC2_DATDIR0);
285 omap_cfg_reg(W19_1610_MMC2_DATDIR1);
288 /* Feedback clock must be set on OMAP-1710 MMC2 */
289 if (cpu_is_omap1710())
290 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
293 (void) platform_device_register(&mmc_omap_device2);
299 static inline void omap_init_mmc(void) {}
302 /*-------------------------------------------------------------------------*/
304 /* Numbering for the SPI-capable controllers when used for SPI:
311 #if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
313 #define OMAP_UWIRE_BASE 0xfffb3000
315 static struct resource uwire_resources[] = {
317 .start = OMAP_UWIRE_BASE,
318 .end = OMAP_UWIRE_BASE + 0x20,
319 .flags = IORESOURCE_MEM,
323 static struct platform_device omap_uwire_device = {
324 .name = "omap_uwire",
326 .num_resources = ARRAY_SIZE(uwire_resources),
327 .resource = uwire_resources,
330 static void omap_init_uwire(void)
332 /* FIXME define and use a boot tag; not all boards will be hooking
333 * up devices to the microwire controller, and multi-board configs
334 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
337 /* board-specific code must configure chipselects (only a few
338 * are normally used) and SCLK/SDI/SDO (each has two choices).
340 (void) platform_device_register(&omap_uwire_device);
343 static inline void omap_init_uwire(void) {}
346 /*-------------------------------------------------------------------------*/
348 #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
350 #ifdef CONFIG_ARCH_OMAP24XX
351 #define OMAP_WDT_BASE 0x48022000
353 #define OMAP_WDT_BASE 0xfffeb000
356 static struct resource wdt_resources[] = {
358 .start = OMAP_WDT_BASE,
359 .end = OMAP_WDT_BASE + 0x4f,
360 .flags = IORESOURCE_MEM,
364 static struct platform_device omap_wdt_device = {
367 .num_resources = ARRAY_SIZE(wdt_resources),
368 .resource = wdt_resources,
371 static void omap_init_wdt(void)
373 (void) platform_device_register(&omap_wdt_device);
376 static inline void omap_init_wdt(void) {}
379 /*-------------------------------------------------------------------------*/
381 #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)
383 #ifdef CONFIG_ARCH_OMAP24XX
384 #define OMAP_RNG_BASE 0x480A0000
386 #define OMAP_RNG_BASE 0xfffe5000
389 static struct resource rng_resources[] = {
391 .start = OMAP_RNG_BASE,
392 .end = OMAP_RNG_BASE + 0x4f,
393 .flags = IORESOURCE_MEM,
397 static struct platform_device omap_rng_device = {
400 .num_resources = ARRAY_SIZE(rng_resources),
401 .resource = rng_resources,
404 static void omap_init_rng(void)
406 (void) platform_device_register(&omap_rng_device);
409 static inline void omap_init_rng(void) {}
413 * This gets called after board-specific INIT_MACHINE, and initializes most
414 * on-chip peripherals accessible on this board (except for few like USB):
416 * (a) Does any "standard config" pin muxing needed. Board-specific
417 * code will have muxed GPIO pins and done "nonstandard" setup;
418 * that code could live in the boot loader.
419 * (b) Populating board-specific platform_data with the data drivers
420 * rely on to handle wiring variations.
421 * (c) Creating platform devices as meaningful on this board and
422 * with this kernel configuration.
424 * Claiming GPIOs, and setting their direction and initial values, is the
425 * responsibility of the device drivers. So is responding to probe().
427 * Board-specific knowlege like creating devices or pin setup is to be
428 * kept out of drivers as much as possible. In particular, pin setup
429 * may be handled by the boot loader, and drivers should expect it will
430 * normally have been done by the time they're probed.
432 static int __init omap_init_devices(void)
435 * Need to enable relevant once for 2430 SDP
437 #ifndef CONFIG_MACH_OMAP_2430SDP
438 /* please keep these calls, and their implementations above,
439 * in alphabetical order so they're easier to sort through.
450 arch_initcall(omap_init_devices);