3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/init.h>
21 #include <linux/list.h>
22 #include <linux/notifier.h>
23 #include <linux/pci.h>
24 #include <linux/proc_fs.h>
25 #include <linux/rbtree.h>
26 #include <linux/seq_file.h>
27 #include <linux/spinlock.h>
28 #include <asm/atomic.h>
31 #include <asm/machdep.h>
33 #include <asm/atomic.h>
34 #include <asm/systemcfg.h>
35 #include <asm/ppc-pci.h>
40 * EEH, or "Extended Error Handling" is a PCI bridge technology for
41 * dealing with PCI bus errors that can't be dealt with within the
42 * usual PCI framework, except by check-stopping the CPU. Systems
43 * that are designed for high-availability/reliability cannot afford
44 * to crash due to a "mere" PCI error, thus the need for EEH.
45 * An EEH-capable bridge operates by converting a detected error
46 * into a "slot freeze", taking the PCI adapter off-line, making
47 * the slot behave, from the OS'es point of view, as if the slot
48 * were "empty": all reads return 0xff's and all writes are silently
49 * ignored. EEH slot isolation events can be triggered by parity
50 * errors on the address or data busses (e.g. during posted writes),
51 * which in turn might be caused by low voltage on the bus, dust,
52 * vibration, humidity, radioactivity or plain-old failed hardware.
54 * Note, however, that one of the leading causes of EEH slot
55 * freeze events are buggy device drivers, buggy device microcode,
56 * or buggy device hardware. This is because any attempt by the
57 * device to bus-master data to a memory address that is not
58 * assigned to the device will trigger a slot freeze. (The idea
59 * is to prevent devices-gone-wild from corrupting system memory).
60 * Buggy hardware/drivers will have a miserable time co-existing
63 * Ideally, a PCI device driver, when suspecting that an isolation
64 * event has occured (e.g. by reading 0xff's), will then ask EEH
65 * whether this is the case, and then take appropriate steps to
66 * reset the PCI slot, the PCI device, and then resume operations.
67 * However, until that day, the checking is done here, with the
68 * eeh_check_failure() routine embedded in the MMIO macros. If
69 * the slot is found to be isolated, an "EEH Event" is synthesized
70 * and sent out for processing.
73 /* EEH event workqueue setup. */
74 static DEFINE_SPINLOCK(eeh_eventlist_lock);
75 LIST_HEAD(eeh_eventlist);
76 static void eeh_event_handler(void *);
77 DECLARE_WORK(eeh_event_wq, eeh_event_handler, NULL);
79 static struct notifier_block *eeh_notifier_chain;
82 * If a device driver keeps reading an MMIO register in an interrupt
83 * handler after a slot isolation event has occurred, we assume it
84 * is broken and panic. This sets the threshold for how many read
85 * attempts we allow before panicking.
87 #define EEH_MAX_FAILS 1000
88 static atomic_t eeh_fail_count;
91 static int ibm_set_eeh_option;
92 static int ibm_set_slot_reset;
93 static int ibm_read_slot_reset_state;
94 static int ibm_read_slot_reset_state2;
95 static int ibm_slot_error_detail;
97 static int eeh_subsystem_enabled;
99 /* Buffer for reporting slot-error-detail rtas calls */
100 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
101 static DEFINE_SPINLOCK(slot_errbuf_lock);
102 static int eeh_error_buf_size;
104 /* System monitoring statistics */
105 static DEFINE_PER_CPU(unsigned long, no_device);
106 static DEFINE_PER_CPU(unsigned long, no_dn);
107 static DEFINE_PER_CPU(unsigned long, no_cfg_addr);
108 static DEFINE_PER_CPU(unsigned long, ignored_check);
109 static DEFINE_PER_CPU(unsigned long, total_mmio_ffs);
110 static DEFINE_PER_CPU(unsigned long, false_positives);
111 static DEFINE_PER_CPU(unsigned long, ignored_failures);
112 static DEFINE_PER_CPU(unsigned long, slot_resets);
115 * The pci address cache subsystem. This subsystem places
116 * PCI device address resources into a red-black tree, sorted
117 * according to the address range, so that given only an i/o
118 * address, the corresponding PCI device can be **quickly**
119 * found. It is safe to perform an address lookup in an interrupt
120 * context; this ability is an important feature.
122 * Currently, the only customer of this code is the EEH subsystem;
123 * thus, this code has been somewhat tailored to suit EEH better.
124 * In particular, the cache does *not* hold the addresses of devices
125 * for which EEH is not enabled.
127 * (Implementation Note: The RB tree seems to be better/faster
128 * than any hash algo I could think of for this problem, even
129 * with the penalty of slow pointer chases for d-cache misses).
131 struct pci_io_addr_range
133 struct rb_node rb_node;
134 unsigned long addr_lo;
135 unsigned long addr_hi;
136 struct pci_dev *pcidev;
140 static struct pci_io_addr_cache
142 struct rb_root rb_root;
143 spinlock_t piar_lock;
144 } pci_io_addr_cache_root;
146 static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
148 struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
151 struct pci_io_addr_range *piar;
152 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
154 if (addr < piar->addr_lo) {
157 if (addr > piar->addr_hi) {
160 pci_dev_get(piar->pcidev);
170 * pci_get_device_by_addr - Get device, given only address
171 * @addr: mmio (PIO) phys address or i/o port number
173 * Given an mmio phys address, or a port number, find a pci device
174 * that implements this address. Be sure to pci_dev_put the device
175 * when finished. I/O port numbers are assumed to be offset
176 * from zero (that is, they do *not* have pci_io_addr added in).
177 * It is safe to call this function within an interrupt.
179 static struct pci_dev *pci_get_device_by_addr(unsigned long addr)
184 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
185 dev = __pci_get_device_by_addr(addr);
186 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
192 * Handy-dandy debug print routine, does nothing more
193 * than print out the contents of our addr cache.
195 static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
200 n = rb_first(&cache->rb_root);
202 struct pci_io_addr_range *piar;
203 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
204 printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
205 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
206 piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
213 /* Insert address range into the rb tree. */
214 static struct pci_io_addr_range *
215 pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
216 unsigned long ahi, unsigned int flags)
218 struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
219 struct rb_node *parent = NULL;
220 struct pci_io_addr_range *piar;
222 /* Walk tree, find a place to insert into tree */
225 piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
226 if (ahi < piar->addr_lo) {
227 p = &parent->rb_left;
228 } else if (alo > piar->addr_hi) {
229 p = &parent->rb_right;
231 if (dev != piar->pcidev ||
232 alo != piar->addr_lo || ahi != piar->addr_hi) {
233 printk(KERN_WARNING "PIAR: overlapping address range\n");
238 piar = (struct pci_io_addr_range *)kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
248 printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
249 alo, ahi, pci_name (dev));
252 rb_link_node(&piar->rb_node, parent, p);
253 rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
258 static void __pci_addr_cache_insert_device(struct pci_dev *dev)
260 struct device_node *dn;
265 dn = pci_device_to_OF_node(dev);
267 printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
271 /* Skip any devices for which EEH is not enabled. */
273 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
274 pdn->eeh_mode & EEH_MODE_NOCHECK) {
276 printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n",
277 pci_name(dev), pdn->node->full_name);
282 /* The cache holds a reference to the device... */
285 /* Walk resources on this device, poke them into the tree */
286 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
287 unsigned long start = pci_resource_start(dev,i);
288 unsigned long end = pci_resource_end(dev,i);
289 unsigned int flags = pci_resource_flags(dev,i);
291 /* We are interested only bus addresses, not dma or other stuff */
292 if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
294 if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
296 pci_addr_cache_insert(dev, start, end, flags);
300 /* If there was nothing to add, the cache has no reference... */
306 * pci_addr_cache_insert_device - Add a device to the address cache
307 * @dev: PCI device whose I/O addresses we are interested in.
309 * In order to support the fast lookup of devices based on addresses,
310 * we maintain a cache of devices that can be quickly searched.
311 * This routine adds a device to that cache.
313 static void pci_addr_cache_insert_device(struct pci_dev *dev)
317 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
318 __pci_addr_cache_insert_device(dev);
319 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
322 static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
328 n = rb_first(&pci_io_addr_cache_root.rb_root);
330 struct pci_io_addr_range *piar;
331 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
333 if (piar->pcidev == dev) {
334 rb_erase(n, &pci_io_addr_cache_root.rb_root);
342 /* The cache no longer holds its reference to this device... */
348 * pci_addr_cache_remove_device - remove pci device from addr cache
349 * @dev: device to remove
351 * Remove a device from the addr-cache tree.
352 * This is potentially expensive, since it will walk
353 * the tree multiple times (once per resource).
354 * But so what; device removal doesn't need to be that fast.
356 static void pci_addr_cache_remove_device(struct pci_dev *dev)
360 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
361 __pci_addr_cache_remove_device(dev);
362 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
366 * pci_addr_cache_build - Build a cache of I/O addresses
368 * Build a cache of pci i/o addresses. This cache will be used to
369 * find the pci device that corresponds to a given address.
370 * This routine scans all pci busses to build the cache.
371 * Must be run late in boot process, after the pci controllers
372 * have been scaned for devices (after all device resources are known).
374 void __init pci_addr_cache_build(void)
376 struct pci_dev *dev = NULL;
378 if (!eeh_subsystem_enabled)
381 spin_lock_init(&pci_io_addr_cache_root.piar_lock);
383 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
384 /* Ignore PCI bridges ( XXX why ??) */
385 if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) {
388 pci_addr_cache_insert_device(dev);
392 /* Verify tree built up above, echo back the list of addrs. */
393 pci_addr_cache_print(&pci_io_addr_cache_root);
397 /* --------------------------------------------------------------- */
398 /* Above lies the PCI Address Cache. Below lies the EEH event infrastructure */
401 * eeh_register_notifier - Register to find out about EEH events.
402 * @nb: notifier block to callback on events
404 int eeh_register_notifier(struct notifier_block *nb)
406 return notifier_chain_register(&eeh_notifier_chain, nb);
410 * eeh_unregister_notifier - Unregister to an EEH event notifier.
411 * @nb: notifier block to callback on events
413 int eeh_unregister_notifier(struct notifier_block *nb)
415 return notifier_chain_unregister(&eeh_notifier_chain, nb);
419 * read_slot_reset_state - Read the reset state of a device node's slot
420 * @dn: device node to read
421 * @rets: array to return results in
423 static int read_slot_reset_state(struct pci_dn *pdn, int rets[])
427 if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
428 token = ibm_read_slot_reset_state2;
431 token = ibm_read_slot_reset_state;
432 rets[2] = 0; /* fake PE Unavailable info */
436 return rtas_call(token, 3, outputs, rets, pdn->eeh_config_addr,
437 BUID_HI(pdn->phb->buid), BUID_LO(pdn->phb->buid));
441 * eeh_panic - call panic() for an eeh event that cannot be handled.
442 * The philosophy of this routine is that it is better to panic and
443 * halt the OS than it is to risk possible data corruption by
444 * oblivious device drivers that don't know better.
446 * @dev pci device that had an eeh event
447 * @reset_state current reset state of the device slot
449 static void eeh_panic(struct pci_dev *dev, int reset_state)
452 * XXX We should create a separate sysctl for this.
454 * Since the panic_on_oops sysctl is used to halt the system
455 * in light of potential corruption, we can use it here.
458 panic("EEH: MMIO failure (%d) on device:%s\n", reset_state,
461 __get_cpu_var(ignored_failures)++;
462 printk(KERN_INFO "EEH: Ignored MMIO failure (%d) on device:%s\n",
463 reset_state, pci_name(dev));
468 * eeh_event_handler - dispatch EEH events. The detection of a frozen
469 * slot can occur inside an interrupt, where it can be hard to do
470 * anything about it. The goal of this routine is to pull these
471 * detection events out of the context of the interrupt handler, and
472 * re-dispatch them for processing at a later time in a normal context.
476 static void eeh_event_handler(void *dummy)
479 struct eeh_event *event;
482 spin_lock_irqsave(&eeh_eventlist_lock, flags);
484 if (!list_empty(&eeh_eventlist)) {
485 event = list_entry(eeh_eventlist.next, struct eeh_event, list);
486 list_del(&event->list);
488 spin_unlock_irqrestore(&eeh_eventlist_lock, flags);
492 printk(KERN_INFO "EEH: MMIO failure (%d), notifiying device "
493 "%s\n", event->reset_state,
494 pci_name(event->dev));
496 atomic_set(&eeh_fail_count, 0);
497 notifier_call_chain (&eeh_notifier_chain,
498 EEH_NOTIFY_FREEZE, event);
500 pci_dev_put(event->dev);
506 * eeh_token_to_phys - convert EEH address token to phys address
507 * @token i/o token, should be address in the form 0xA....
509 static inline unsigned long eeh_token_to_phys(unsigned long token)
514 ptep = find_linux_pte(init_mm.pgd, token);
517 pa = pte_pfn(*ptep) << PAGE_SHIFT;
519 return pa | (token & (PAGE_SIZE-1));
523 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
525 * @dev pci device, if known
527 * Check for an EEH failure for the given device node. Call this
528 * routine if the result of a read was all 0xff's and you want to
529 * find out if this is due to an EEH slot freeze. This routine
530 * will query firmware for the EEH status.
532 * Returns 0 if there has not been an EEH error; otherwise returns
533 * a non-zero value and queues up a slot isolation event notification.
535 * It is safe to call this routine in an interrupt context.
537 int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
543 struct eeh_event *event;
546 __get_cpu_var(total_mmio_ffs)++;
548 if (!eeh_subsystem_enabled)
552 __get_cpu_var(no_dn)++;
557 /* Access to IO BARs might get this far and still not want checking. */
558 if (!pdn->eeh_capable || !(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
559 pdn->eeh_mode & EEH_MODE_NOCHECK) {
560 __get_cpu_var(ignored_check)++;
562 printk ("EEH:ignored check for %s %s\n", pci_name (dev), dn->full_name);
567 if (!pdn->eeh_config_addr) {
568 __get_cpu_var(no_cfg_addr)++;
573 * If we already have a pending isolation event for this
574 * slot, we know it's bad already, we don't need to check...
576 if (pdn->eeh_mode & EEH_MODE_ISOLATED) {
577 atomic_inc(&eeh_fail_count);
578 if (atomic_read(&eeh_fail_count) >= EEH_MAX_FAILS) {
579 /* re-read the slot reset state */
580 if (read_slot_reset_state(pdn, rets) != 0)
581 rets[0] = -1; /* reset state unknown */
582 eeh_panic(dev, rets[0]);
588 * Now test for an EEH failure. This is VERY expensive.
589 * Note that the eeh_config_addr may be a parent device
590 * in the case of a device behind a bridge, or it may be
591 * function zero of a multi-function device.
592 * In any case they must share a common PHB.
594 ret = read_slot_reset_state(pdn, rets);
595 if (!(ret == 0 && rets[1] == 1 && (rets[0] == 2 || rets[0] == 4))) {
596 __get_cpu_var(false_positives)++;
600 /* prevent repeated reports of this failure */
601 pdn->eeh_mode |= EEH_MODE_ISOLATED;
602 __get_cpu_var(slot_resets)++;
604 reset_state = rets[0];
606 spin_lock_irqsave(&slot_errbuf_lock, flags);
607 memset(slot_errbuf, 0, eeh_error_buf_size);
609 rc = rtas_call(ibm_slot_error_detail,
610 8, 1, NULL, pdn->eeh_config_addr,
611 BUID_HI(pdn->phb->buid),
612 BUID_LO(pdn->phb->buid), NULL, 0,
613 virt_to_phys(slot_errbuf),
615 1 /* Temporary Error */);
618 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
619 spin_unlock_irqrestore(&slot_errbuf_lock, flags);
621 printk(KERN_INFO "EEH: MMIO failure (%d) on device: %s %s\n",
622 rets[0], dn->name, dn->full_name);
623 event = kmalloc(sizeof(*event), GFP_ATOMIC);
625 eeh_panic(dev, reset_state);
631 event->reset_state = reset_state;
633 /* We may or may not be called in an interrupt context */
634 spin_lock_irqsave(&eeh_eventlist_lock, flags);
635 list_add(&event->list, &eeh_eventlist);
636 spin_unlock_irqrestore(&eeh_eventlist_lock, flags);
638 /* Most EEH events are due to device driver bugs. Having
639 * a stack trace will help the device-driver authors figure
640 * out what happened. So print that out. */
642 schedule_work(&eeh_event_wq);
647 EXPORT_SYMBOL(eeh_dn_check_failure);
650 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
651 * @token i/o token, should be address in the form 0xA....
652 * @val value, should be all 1's (XXX why do we need this arg??)
654 * Check for an EEH failure at the given token address. Call this
655 * routine if the result of a read was all 0xff's and you want to
656 * find out if this is due to an EEH slot freeze event. This routine
657 * will query firmware for the EEH status.
659 * Note this routine is safe to call in an interrupt context.
661 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
665 struct device_node *dn;
667 /* Finding the phys addr + pci device; this is pretty quick. */
668 addr = eeh_token_to_phys((unsigned long __force) token);
669 dev = pci_get_device_by_addr(addr);
671 __get_cpu_var(no_device)++;
675 dn = pci_device_to_OF_node(dev);
676 eeh_dn_check_failure (dn, dev);
682 EXPORT_SYMBOL(eeh_check_failure);
684 struct eeh_early_enable_info {
685 unsigned int buid_hi;
686 unsigned int buid_lo;
689 /* Enable eeh for the given device node. */
690 static void *early_enable_eeh(struct device_node *dn, void *data)
692 struct eeh_early_enable_info *info = data;
694 char *status = get_property(dn, "status", NULL);
695 u32 *class_code = (u32 *)get_property(dn, "class-code", NULL);
696 u32 *vendor_id = (u32 *)get_property(dn, "vendor-id", NULL);
697 u32 *device_id = (u32 *)get_property(dn, "device-id", NULL);
700 struct pci_dn *pdn = PCI_DN(dn);
704 if (status && strcmp(status, "ok") != 0)
705 return NULL; /* ignore devices with bad status */
707 /* Ignore bad nodes. */
708 if (!class_code || !vendor_id || !device_id)
711 /* There is nothing to check on PCI to ISA bridges */
712 if (dn->type && !strcmp(dn->type, "isa")) {
713 pdn->eeh_mode |= EEH_MODE_NOCHECK;
718 * Now decide if we are going to "Disable" EEH checking
719 * for this device. We still run with the EEH hardware active,
720 * but we won't be checking for ff's. This means a driver
721 * could return bad data (very bad!), an interrupt handler could
722 * hang waiting on status bits that won't change, etc.
723 * But there are a few cases like display devices that make sense.
725 enable = 1; /* i.e. we will do checking */
726 if ((*class_code >> 16) == PCI_BASE_CLASS_DISPLAY)
730 pdn->eeh_mode |= EEH_MODE_NOCHECK;
732 /* Ok... see if this device supports EEH. Some do, some don't,
733 * and the only way to find out is to check each and every one. */
734 regs = (u32 *)get_property(dn, "reg", NULL);
736 /* First register entry is addr (00BBSS00) */
737 /* Try to enable eeh */
738 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
739 regs[0], info->buid_hi, info->buid_lo,
742 eeh_subsystem_enabled = 1;
743 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
744 pdn->eeh_config_addr = regs[0];
746 printk(KERN_DEBUG "EEH: %s: eeh enabled\n", dn->full_name);
750 /* This device doesn't support EEH, but it may have an
751 * EEH parent, in which case we mark it as supported. */
752 if (dn->parent && PCI_DN(dn->parent)
753 && (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
754 /* Parent supports EEH. */
755 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
756 pdn->eeh_config_addr = PCI_DN(dn->parent)->eeh_config_addr;
761 printk(KERN_WARNING "EEH: %s: unable to get reg property.\n",
769 * Initialize EEH by trying to enable it for all of the adapters in the system.
770 * As a side effect we can determine here if eeh is supported at all.
771 * Note that we leave EEH on so failed config cycles won't cause a machine
772 * check. If a user turns off EEH for a particular adapter they are really
773 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
774 * grant access to a slot if EEH isn't enabled, and so we always enable
775 * EEH for all slots/all devices.
777 * The eeh-force-off option disables EEH checking globally, for all slots.
778 * Even if force-off is set, the EEH hardware is still enabled, so that
779 * newer systems can boot.
781 void __init eeh_init(void)
783 struct device_node *phb, *np;
784 struct eeh_early_enable_info info;
786 np = of_find_node_by_path("/rtas");
790 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
791 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
792 ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
793 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
794 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
796 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE)
799 eeh_error_buf_size = rtas_token("rtas-error-log-max");
800 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
801 eeh_error_buf_size = 1024;
803 if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
804 printk(KERN_WARNING "EEH: rtas-error-log-max is bigger than allocated "
805 "buffer ! (%d vs %d)", eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
806 eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
809 /* Enable EEH for all adapters. Note that eeh requires buid's */
810 for (phb = of_find_node_by_name(NULL, "pci"); phb;
811 phb = of_find_node_by_name(phb, "pci")) {
814 buid = get_phb_buid(phb);
815 if (buid == 0 || PCI_DN(phb) == NULL)
818 info.buid_lo = BUID_LO(buid);
819 info.buid_hi = BUID_HI(buid);
820 traverse_pci_devices(phb, early_enable_eeh, &info);
823 if (eeh_subsystem_enabled)
824 printk(KERN_INFO "EEH: PCI Enhanced I/O Error Handling Enabled\n");
826 printk(KERN_WARNING "EEH: No capable adapters found\n");
830 * eeh_add_device_early - enable EEH for the indicated device_node
831 * @dn: device node for which to set up EEH
833 * This routine must be used to perform EEH initialization for PCI
834 * devices that were added after system boot (e.g. hotplug, dlpar).
835 * This routine must be called before any i/o is performed to the
836 * adapter (inluding any config-space i/o).
837 * Whether this actually enables EEH or not for this device depends
838 * on the CEC architecture, type of the device, on earlier boot
839 * command-line arguments & etc.
841 void eeh_add_device_early(struct device_node *dn)
843 struct pci_controller *phb;
844 struct eeh_early_enable_info info;
846 if (!dn || !PCI_DN(dn))
848 phb = PCI_DN(dn)->phb;
849 if (NULL == phb || 0 == phb->buid) {
850 printk(KERN_WARNING "EEH: Expected buid but found none for %s\n",
856 info.buid_hi = BUID_HI(phb->buid);
857 info.buid_lo = BUID_LO(phb->buid);
858 early_enable_eeh(dn, &info);
860 EXPORT_SYMBOL_GPL(eeh_add_device_early);
863 * eeh_add_device_late - perform EEH initialization for the indicated pci device
864 * @dev: pci device for which to set up EEH
866 * This routine must be used to complete EEH initialization for PCI
867 * devices that were added after system boot (e.g. hotplug, dlpar).
869 void eeh_add_device_late(struct pci_dev *dev)
871 struct device_node *dn;
873 if (!dev || !eeh_subsystem_enabled)
877 printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev));
881 dn = pci_device_to_OF_node(dev);
882 PCI_DN(dn)->pcidev = dev;
884 pci_addr_cache_insert_device (dev);
886 EXPORT_SYMBOL_GPL(eeh_add_device_late);
889 * eeh_remove_device - undo EEH setup for the indicated pci device
890 * @dev: pci device to be removed
892 * This routine should be when a device is removed from a running
893 * system (e.g. by hotplug or dlpar).
895 void eeh_remove_device(struct pci_dev *dev)
897 struct device_node *dn;
898 if (!dev || !eeh_subsystem_enabled)
901 /* Unregister the device with the EEH/PCI address search system */
903 printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev));
905 pci_addr_cache_remove_device(dev);
907 dn = pci_device_to_OF_node(dev);
908 PCI_DN(dn)->pcidev = NULL;
911 EXPORT_SYMBOL_GPL(eeh_remove_device);
913 static int proc_eeh_show(struct seq_file *m, void *v)
916 unsigned long ffs = 0, positives = 0, failures = 0;
917 unsigned long resets = 0;
918 unsigned long no_dev = 0, no_dn = 0, no_cfg = 0, no_check = 0;
921 ffs += per_cpu(total_mmio_ffs, cpu);
922 positives += per_cpu(false_positives, cpu);
923 failures += per_cpu(ignored_failures, cpu);
924 resets += per_cpu(slot_resets, cpu);
925 no_dev += per_cpu(no_device, cpu);
926 no_dn += per_cpu(no_dn, cpu);
927 no_cfg += per_cpu(no_cfg_addr, cpu);
928 no_check += per_cpu(ignored_check, cpu);
931 if (0 == eeh_subsystem_enabled) {
932 seq_printf(m, "EEH Subsystem is globally disabled\n");
933 seq_printf(m, "eeh_total_mmio_ffs=%ld\n", ffs);
935 seq_printf(m, "EEH Subsystem is enabled\n");
938 "no device node=%ld\n"
939 "no config address=%ld\n"
940 "check not wanted=%ld\n"
941 "eeh_total_mmio_ffs=%ld\n"
942 "eeh_false_positives=%ld\n"
943 "eeh_ignored_failures=%ld\n"
944 "eeh_slot_resets=%ld\n",
945 no_dev, no_dn, no_cfg, no_check,
946 ffs, positives, failures, resets);
952 static int proc_eeh_open(struct inode *inode, struct file *file)
954 return single_open(file, proc_eeh_show, NULL);
957 static struct file_operations proc_eeh_operations = {
958 .open = proc_eeh_open,
961 .release = single_release,
964 static int __init eeh_init_proc(void)
966 struct proc_dir_entry *e;
968 if (systemcfg->platform & PLATFORM_PSERIES) {
969 e = create_proc_entry("ppc64/eeh", 0, NULL);
971 e->proc_fops = &proc_eeh_operations;
976 __initcall(eeh_init_proc);