1 /*******************************************************************************
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
30 #include <net/ip6_checksum.h>
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
37 #define DRIVERNAPI "-NAPI"
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 char e1000_driver_version[] = DRV_VERSION;
41 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
43 /* e1000_pci_tbl - PCI Device ID Table
45 * Last entry must be all 0s
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103 INTEL_E1000_ETHERNET_DEVICE(0x10A5),
104 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
105 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
108 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
110 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
111 INTEL_E1000_ETHERNET_DEVICE(0x10D9),
112 INTEL_E1000_ETHERNET_DEVICE(0x10DA),
113 /* required last entry */
117 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
119 int e1000_up(struct e1000_adapter *adapter);
120 void e1000_down(struct e1000_adapter *adapter);
121 void e1000_reinit_locked(struct e1000_adapter *adapter);
122 void e1000_reset(struct e1000_adapter *adapter);
123 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
124 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
125 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
126 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
127 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
128 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
129 struct e1000_tx_ring *txdr);
130 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
131 struct e1000_rx_ring *rxdr);
132 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
133 struct e1000_tx_ring *tx_ring);
134 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
135 struct e1000_rx_ring *rx_ring);
136 void e1000_update_stats(struct e1000_adapter *adapter);
138 static int e1000_init_module(void);
139 static void e1000_exit_module(void);
140 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
141 static void __devexit e1000_remove(struct pci_dev *pdev);
142 static int e1000_alloc_queues(struct e1000_adapter *adapter);
143 static int e1000_sw_init(struct e1000_adapter *adapter);
144 static int e1000_open(struct net_device *netdev);
145 static int e1000_close(struct net_device *netdev);
146 static void e1000_configure_tx(struct e1000_adapter *adapter);
147 static void e1000_configure_rx(struct e1000_adapter *adapter);
148 static void e1000_setup_rctl(struct e1000_adapter *adapter);
149 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
150 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
151 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
152 struct e1000_tx_ring *tx_ring);
153 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
154 struct e1000_rx_ring *rx_ring);
155 static void e1000_set_multi(struct net_device *netdev);
156 static void e1000_update_phy_info(unsigned long data);
157 static void e1000_watchdog(unsigned long data);
158 static void e1000_82547_tx_fifo_stall(unsigned long data);
159 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
160 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
161 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
162 static int e1000_set_mac(struct net_device *netdev, void *p);
163 static irqreturn_t e1000_intr(int irq, void *data);
164 static irqreturn_t e1000_intr_msi(int irq, void *data);
165 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
166 struct e1000_tx_ring *tx_ring);
167 #ifdef CONFIG_E1000_NAPI
168 static int e1000_clean(struct net_device *poll_dev, int *budget);
169 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
170 struct e1000_rx_ring *rx_ring,
171 int *work_done, int work_to_do);
172 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
173 struct e1000_rx_ring *rx_ring,
174 int *work_done, int work_to_do);
176 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
177 struct e1000_rx_ring *rx_ring);
178 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
179 struct e1000_rx_ring *rx_ring);
181 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
182 struct e1000_rx_ring *rx_ring,
184 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
185 struct e1000_rx_ring *rx_ring,
187 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
188 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
190 void e1000_set_ethtool_ops(struct net_device *netdev);
191 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
192 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
193 static void e1000_tx_timeout(struct net_device *dev);
194 static void e1000_reset_task(struct work_struct *work);
195 static void e1000_smartspeed(struct e1000_adapter *adapter);
196 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
197 struct sk_buff *skb);
199 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
200 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
201 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
202 static void e1000_restore_vlan(struct e1000_adapter *adapter);
204 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
206 static int e1000_resume(struct pci_dev *pdev);
208 static void e1000_shutdown(struct pci_dev *pdev);
210 #ifdef CONFIG_NET_POLL_CONTROLLER
211 /* for netdump / net console */
212 static void e1000_netpoll (struct net_device *netdev);
215 extern void e1000_check_options(struct e1000_adapter *adapter);
217 #define COPYBREAK_DEFAULT 256
218 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
219 module_param(copybreak, uint, 0644);
220 MODULE_PARM_DESC(copybreak,
221 "Maximum size of packet that is copied to a new buffer on receive");
223 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
224 pci_channel_state_t state);
225 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
226 static void e1000_io_resume(struct pci_dev *pdev);
228 static struct pci_error_handlers e1000_err_handler = {
229 .error_detected = e1000_io_error_detected,
230 .slot_reset = e1000_io_slot_reset,
231 .resume = e1000_io_resume,
234 static struct pci_driver e1000_driver = {
235 .name = e1000_driver_name,
236 .id_table = e1000_pci_tbl,
237 .probe = e1000_probe,
238 .remove = __devexit_p(e1000_remove),
240 /* Power Managment Hooks */
241 .suspend = e1000_suspend,
242 .resume = e1000_resume,
244 .shutdown = e1000_shutdown,
245 .err_handler = &e1000_err_handler
248 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
249 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
250 MODULE_LICENSE("GPL");
251 MODULE_VERSION(DRV_VERSION);
253 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
254 module_param(debug, int, 0);
255 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
258 * e1000_init_module - Driver Registration Routine
260 * e1000_init_module is the first routine called when the driver is
261 * loaded. All it does is register with the PCI subsystem.
265 e1000_init_module(void)
268 printk(KERN_INFO "%s - version %s\n",
269 e1000_driver_string, e1000_driver_version);
271 printk(KERN_INFO "%s\n", e1000_copyright);
273 ret = pci_register_driver(&e1000_driver);
274 if (copybreak != COPYBREAK_DEFAULT) {
276 printk(KERN_INFO "e1000: copybreak disabled\n");
278 printk(KERN_INFO "e1000: copybreak enabled for "
279 "packets <= %u bytes\n", copybreak);
284 module_init(e1000_init_module);
287 * e1000_exit_module - Driver Exit Cleanup Routine
289 * e1000_exit_module is called just before the driver is removed
294 e1000_exit_module(void)
296 pci_unregister_driver(&e1000_driver);
299 module_exit(e1000_exit_module);
301 static int e1000_request_irq(struct e1000_adapter *adapter)
303 struct net_device *netdev = adapter->netdev;
304 void (*handler) = &e1000_intr;
305 int irq_flags = IRQF_SHARED;
308 if (adapter->hw.mac_type >= e1000_82571) {
309 adapter->have_msi = !pci_enable_msi(adapter->pdev);
310 if (adapter->have_msi) {
311 handler = &e1000_intr_msi;
316 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
319 if (adapter->have_msi)
320 pci_disable_msi(adapter->pdev);
322 "Unable to allocate interrupt Error: %d\n", err);
328 static void e1000_free_irq(struct e1000_adapter *adapter)
330 struct net_device *netdev = adapter->netdev;
332 free_irq(adapter->pdev->irq, netdev);
334 if (adapter->have_msi)
335 pci_disable_msi(adapter->pdev);
339 * e1000_irq_disable - Mask off interrupt generation on the NIC
340 * @adapter: board private structure
344 e1000_irq_disable(struct e1000_adapter *adapter)
346 atomic_inc(&adapter->irq_sem);
347 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
348 E1000_WRITE_FLUSH(&adapter->hw);
349 synchronize_irq(adapter->pdev->irq);
353 * e1000_irq_enable - Enable default interrupt generation settings
354 * @adapter: board private structure
358 e1000_irq_enable(struct e1000_adapter *adapter)
360 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
361 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
362 E1000_WRITE_FLUSH(&adapter->hw);
367 e1000_update_mng_vlan(struct e1000_adapter *adapter)
369 struct net_device *netdev = adapter->netdev;
370 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
371 uint16_t old_vid = adapter->mng_vlan_id;
372 if (adapter->vlgrp) {
373 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
374 if (adapter->hw.mng_cookie.status &
375 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
376 e1000_vlan_rx_add_vid(netdev, vid);
377 adapter->mng_vlan_id = vid;
379 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
381 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
383 !vlan_group_get_device(adapter->vlgrp, old_vid))
384 e1000_vlan_rx_kill_vid(netdev, old_vid);
386 adapter->mng_vlan_id = vid;
391 * e1000_release_hw_control - release control of the h/w to f/w
392 * @adapter: address of board private structure
394 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
395 * For ASF and Pass Through versions of f/w this means that the
396 * driver is no longer loaded. For AMT version (only with 82573) i
397 * of the f/w this means that the network i/f is closed.
402 e1000_release_hw_control(struct e1000_adapter *adapter)
407 /* Let firmware taken over control of h/w */
408 switch (adapter->hw.mac_type) {
410 swsm = E1000_READ_REG(&adapter->hw, SWSM);
411 E1000_WRITE_REG(&adapter->hw, SWSM,
412 swsm & ~E1000_SWSM_DRV_LOAD);
416 case e1000_80003es2lan:
418 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
419 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
420 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
428 * e1000_get_hw_control - get control of the h/w from f/w
429 * @adapter: address of board private structure
431 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
432 * For ASF and Pass Through versions of f/w this means that
433 * the driver is loaded. For AMT version (only with 82573)
434 * of the f/w this means that the network i/f is open.
439 e1000_get_hw_control(struct e1000_adapter *adapter)
444 /* Let firmware know the driver has taken over */
445 switch (adapter->hw.mac_type) {
447 swsm = E1000_READ_REG(&adapter->hw, SWSM);
448 E1000_WRITE_REG(&adapter->hw, SWSM,
449 swsm | E1000_SWSM_DRV_LOAD);
453 case e1000_80003es2lan:
455 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
456 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
457 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
465 e1000_init_manageability(struct e1000_adapter *adapter)
467 if (adapter->en_mng_pt) {
468 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
470 /* disable hardware interception of ARP */
471 manc &= ~(E1000_MANC_ARP_EN);
473 /* enable receiving management packets to the host */
474 /* this will probably generate destination unreachable messages
475 * from the host OS, but the packets will be handled on SMBUS */
476 if (adapter->hw.has_manc2h) {
477 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
479 manc |= E1000_MANC_EN_MNG2HOST;
480 #define E1000_MNG2HOST_PORT_623 (1 << 5)
481 #define E1000_MNG2HOST_PORT_664 (1 << 6)
482 manc2h |= E1000_MNG2HOST_PORT_623;
483 manc2h |= E1000_MNG2HOST_PORT_664;
484 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
487 E1000_WRITE_REG(&adapter->hw, MANC, manc);
492 e1000_release_manageability(struct e1000_adapter *adapter)
494 if (adapter->en_mng_pt) {
495 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
497 /* re-enable hardware interception of ARP */
498 manc |= E1000_MANC_ARP_EN;
500 if (adapter->hw.has_manc2h)
501 manc &= ~E1000_MANC_EN_MNG2HOST;
503 /* don't explicitly have to mess with MANC2H since
504 * MANC has an enable disable that gates MANC2H */
506 E1000_WRITE_REG(&adapter->hw, MANC, manc);
511 * e1000_configure - configure the hardware for RX and TX
512 * @adapter = private board structure
514 static void e1000_configure(struct e1000_adapter *adapter)
516 struct net_device *netdev = adapter->netdev;
519 e1000_set_multi(netdev);
521 e1000_restore_vlan(adapter);
522 e1000_init_manageability(adapter);
524 e1000_configure_tx(adapter);
525 e1000_setup_rctl(adapter);
526 e1000_configure_rx(adapter);
527 /* call E1000_DESC_UNUSED which always leaves
528 * at least 1 descriptor unused to make sure
529 * next_to_use != next_to_clean */
530 for (i = 0; i < adapter->num_rx_queues; i++) {
531 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
532 adapter->alloc_rx_buf(adapter, ring,
533 E1000_DESC_UNUSED(ring));
536 adapter->tx_queue_len = netdev->tx_queue_len;
539 int e1000_up(struct e1000_adapter *adapter)
541 /* hardware has been reset, we need to reload some things */
542 e1000_configure(adapter);
544 clear_bit(__E1000_DOWN, &adapter->flags);
546 #ifdef CONFIG_E1000_NAPI
547 netif_poll_enable(adapter->netdev);
549 e1000_irq_enable(adapter);
551 /* fire a link change interrupt to start the watchdog */
552 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
557 * e1000_power_up_phy - restore link in case the phy was powered down
558 * @adapter: address of board private structure
560 * The phy may be powered down to save power and turn off link when the
561 * driver is unloaded and wake on lan is not enabled (among others)
562 * *** this routine MUST be followed by a call to e1000_reset ***
566 void e1000_power_up_phy(struct e1000_adapter *adapter)
568 uint16_t mii_reg = 0;
570 /* Just clear the power down bit to wake the phy back up */
571 if (adapter->hw.media_type == e1000_media_type_copper) {
572 /* according to the manual, the phy will retain its
573 * settings across a power-down/up cycle */
574 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
575 mii_reg &= ~MII_CR_POWER_DOWN;
576 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
580 static void e1000_power_down_phy(struct e1000_adapter *adapter)
582 /* Power down the PHY so no link is implied when interface is down *
583 * The PHY cannot be powered down if any of the following is TRUE *
586 * (c) SoL/IDER session is active */
587 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
588 adapter->hw.media_type == e1000_media_type_copper) {
589 uint16_t mii_reg = 0;
591 switch (adapter->hw.mac_type) {
594 case e1000_82545_rev_3:
596 case e1000_82546_rev_3:
598 case e1000_82541_rev_2:
600 case e1000_82547_rev_2:
601 if (E1000_READ_REG(&adapter->hw, MANC) &
608 case e1000_80003es2lan:
610 if (e1000_check_mng_mode(&adapter->hw) ||
611 e1000_check_phy_reset_block(&adapter->hw))
617 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
618 mii_reg |= MII_CR_POWER_DOWN;
619 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
627 e1000_down(struct e1000_adapter *adapter)
629 struct net_device *netdev = adapter->netdev;
631 /* signal that we're down so the interrupt handler does not
632 * reschedule our watchdog timer */
633 set_bit(__E1000_DOWN, &adapter->flags);
635 #ifdef CONFIG_E1000_NAPI
636 netif_poll_disable(netdev);
638 e1000_irq_disable(adapter);
640 del_timer_sync(&adapter->tx_fifo_stall_timer);
641 del_timer_sync(&adapter->watchdog_timer);
642 del_timer_sync(&adapter->phy_info_timer);
644 netdev->tx_queue_len = adapter->tx_queue_len;
645 adapter->link_speed = 0;
646 adapter->link_duplex = 0;
647 netif_carrier_off(netdev);
648 netif_stop_queue(netdev);
650 e1000_reset(adapter);
651 e1000_clean_all_tx_rings(adapter);
652 e1000_clean_all_rx_rings(adapter);
656 e1000_reinit_locked(struct e1000_adapter *adapter)
658 WARN_ON(in_interrupt());
659 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
663 clear_bit(__E1000_RESETTING, &adapter->flags);
667 e1000_reset(struct e1000_adapter *adapter)
669 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
670 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
671 boolean_t legacy_pba_adjust = FALSE;
673 /* Repartition Pba for greater than 9k mtu
674 * To take effect CTRL.RST is required.
677 switch (adapter->hw.mac_type) {
678 case e1000_82542_rev2_0:
679 case e1000_82542_rev2_1:
684 case e1000_82541_rev_2:
685 legacy_pba_adjust = TRUE;
689 case e1000_82545_rev_3:
691 case e1000_82546_rev_3:
695 case e1000_82547_rev_2:
696 legacy_pba_adjust = TRUE;
701 case e1000_80003es2lan:
709 case e1000_undefined:
714 if (legacy_pba_adjust == TRUE) {
715 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
716 pba -= 8; /* allocate more FIFO for Tx */
718 if (adapter->hw.mac_type == e1000_82547) {
719 adapter->tx_fifo_head = 0;
720 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
721 adapter->tx_fifo_size =
722 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
723 atomic_set(&adapter->tx_fifo_stall, 0);
725 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
726 /* adjust PBA for jumbo frames */
727 E1000_WRITE_REG(&adapter->hw, PBA, pba);
729 /* To maintain wire speed transmits, the Tx FIFO should be
730 * large enough to accomodate two full transmit packets,
731 * rounded up to the next 1KB and expressed in KB. Likewise,
732 * the Rx FIFO should be large enough to accomodate at least
733 * one full receive packet and is similarly rounded up and
734 * expressed in KB. */
735 pba = E1000_READ_REG(&adapter->hw, PBA);
736 /* upper 16 bits has Tx packet buffer allocation size in KB */
737 tx_space = pba >> 16;
738 /* lower 16 bits has Rx packet buffer allocation size in KB */
740 /* don't include ethernet FCS because hardware appends/strips */
741 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
743 min_tx_space = min_rx_space;
745 min_tx_space = ALIGN(min_tx_space, 1024);
747 min_rx_space = ALIGN(min_rx_space, 1024);
750 /* If current Tx allocation is less than the min Tx FIFO size,
751 * and the min Tx FIFO size is less than the current Rx FIFO
752 * allocation, take space away from current Rx allocation */
753 if (tx_space < min_tx_space &&
754 ((min_tx_space - tx_space) < pba)) {
755 pba = pba - (min_tx_space - tx_space);
757 /* PCI/PCIx hardware has PBA alignment constraints */
758 switch (adapter->hw.mac_type) {
759 case e1000_82545 ... e1000_82546_rev_3:
760 pba &= ~(E1000_PBA_8K - 1);
766 /* if short on rx space, rx wins and must trump tx
767 * adjustment or use Early Receive if available */
768 if (pba < min_rx_space) {
769 switch (adapter->hw.mac_type) {
771 /* ERT enabled in e1000_configure_rx */
781 E1000_WRITE_REG(&adapter->hw, PBA, pba);
783 /* flow control settings */
784 /* Set the FC high water mark to 90% of the FIFO size.
785 * Required to clear last 3 LSB */
786 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
787 /* We can't use 90% on small FIFOs because the remainder
788 * would be less than 1 full frame. In this case, we size
789 * it to allow at least a full frame above the high water
791 if (pba < E1000_PBA_16K)
792 fc_high_water_mark = (pba * 1024) - 1600;
794 adapter->hw.fc_high_water = fc_high_water_mark;
795 adapter->hw.fc_low_water = fc_high_water_mark - 8;
796 if (adapter->hw.mac_type == e1000_80003es2lan)
797 adapter->hw.fc_pause_time = 0xFFFF;
799 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
800 adapter->hw.fc_send_xon = 1;
801 adapter->hw.fc = adapter->hw.original_fc;
803 /* Allow time for pending master requests to run */
804 e1000_reset_hw(&adapter->hw);
805 if (adapter->hw.mac_type >= e1000_82544)
806 E1000_WRITE_REG(&adapter->hw, WUC, 0);
808 if (e1000_init_hw(&adapter->hw))
809 DPRINTK(PROBE, ERR, "Hardware Error\n");
810 e1000_update_mng_vlan(adapter);
812 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
813 if (adapter->hw.mac_type >= e1000_82544 &&
814 adapter->hw.mac_type <= e1000_82547_rev_2 &&
815 adapter->hw.autoneg == 1 &&
816 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
817 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
818 /* clear phy power management bit if we are in gig only mode,
819 * which if enabled will attempt negotiation to 100Mb, which
820 * can cause a loss of link at power off or driver unload */
821 ctrl &= ~E1000_CTRL_SWDPIN3;
822 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
825 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
826 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
828 e1000_reset_adaptive(&adapter->hw);
829 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
831 if (!adapter->smart_power_down &&
832 (adapter->hw.mac_type == e1000_82571 ||
833 adapter->hw.mac_type == e1000_82572)) {
834 uint16_t phy_data = 0;
835 /* speed up time to link by disabling smart power down, ignore
836 * the return value of this function because there is nothing
837 * different we would do if it failed */
838 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
840 phy_data &= ~IGP02E1000_PM_SPD;
841 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
845 e1000_release_manageability(adapter);
849 * e1000_probe - Device Initialization Routine
850 * @pdev: PCI device information struct
851 * @ent: entry in e1000_pci_tbl
853 * Returns 0 on success, negative on failure
855 * e1000_probe initializes an adapter identified by a pci_dev structure.
856 * The OS initialization, configuring of the adapter private structure,
857 * and a hardware reset occur.
861 e1000_probe(struct pci_dev *pdev,
862 const struct pci_device_id *ent)
864 struct net_device *netdev;
865 struct e1000_adapter *adapter;
866 unsigned long mmio_start, mmio_len;
867 unsigned long flash_start, flash_len;
869 static int cards_found = 0;
870 static int global_quad_port_a = 0; /* global ksp3 port a indication */
871 int i, err, pci_using_dac;
872 uint16_t eeprom_data = 0;
873 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
874 if ((err = pci_enable_device(pdev)))
877 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
878 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
881 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
882 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
883 E1000_ERR("No usable DMA configuration, aborting\n");
889 if ((err = pci_request_regions(pdev, e1000_driver_name)))
892 pci_set_master(pdev);
895 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
897 goto err_alloc_etherdev;
899 SET_MODULE_OWNER(netdev);
900 SET_NETDEV_DEV(netdev, &pdev->dev);
902 pci_set_drvdata(pdev, netdev);
903 adapter = netdev_priv(netdev);
904 adapter->netdev = netdev;
905 adapter->pdev = pdev;
906 adapter->hw.back = adapter;
907 adapter->msg_enable = (1 << debug) - 1;
909 mmio_start = pci_resource_start(pdev, BAR_0);
910 mmio_len = pci_resource_len(pdev, BAR_0);
913 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
914 if (!adapter->hw.hw_addr)
917 for (i = BAR_1; i <= BAR_5; i++) {
918 if (pci_resource_len(pdev, i) == 0)
920 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
921 adapter->hw.io_base = pci_resource_start(pdev, i);
926 netdev->open = &e1000_open;
927 netdev->stop = &e1000_close;
928 netdev->hard_start_xmit = &e1000_xmit_frame;
929 netdev->get_stats = &e1000_get_stats;
930 netdev->set_multicast_list = &e1000_set_multi;
931 netdev->set_mac_address = &e1000_set_mac;
932 netdev->change_mtu = &e1000_change_mtu;
933 netdev->do_ioctl = &e1000_ioctl;
934 e1000_set_ethtool_ops(netdev);
935 netdev->tx_timeout = &e1000_tx_timeout;
936 netdev->watchdog_timeo = 5 * HZ;
937 #ifdef CONFIG_E1000_NAPI
938 netdev->poll = &e1000_clean;
941 netdev->vlan_rx_register = e1000_vlan_rx_register;
942 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
943 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
944 #ifdef CONFIG_NET_POLL_CONTROLLER
945 netdev->poll_controller = e1000_netpoll;
947 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
949 netdev->mem_start = mmio_start;
950 netdev->mem_end = mmio_start + mmio_len;
951 netdev->base_addr = adapter->hw.io_base;
953 adapter->bd_number = cards_found;
955 /* setup the private structure */
957 if ((err = e1000_sw_init(adapter)))
961 /* Flash BAR mapping must happen after e1000_sw_init
962 * because it depends on mac_type */
963 if ((adapter->hw.mac_type == e1000_ich8lan) &&
964 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
965 flash_start = pci_resource_start(pdev, 1);
966 flash_len = pci_resource_len(pdev, 1);
967 adapter->hw.flash_address = ioremap(flash_start, flash_len);
968 if (!adapter->hw.flash_address)
972 if (e1000_check_phy_reset_block(&adapter->hw))
973 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
975 if (adapter->hw.mac_type >= e1000_82543) {
976 netdev->features = NETIF_F_SG |
980 NETIF_F_HW_VLAN_FILTER;
981 if (adapter->hw.mac_type == e1000_ich8lan)
982 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
985 if ((adapter->hw.mac_type >= e1000_82544) &&
986 (adapter->hw.mac_type != e1000_82547))
987 netdev->features |= NETIF_F_TSO;
989 if (adapter->hw.mac_type > e1000_82547_rev_2)
990 netdev->features |= NETIF_F_TSO6;
992 netdev->features |= NETIF_F_HIGHDMA;
994 netdev->features |= NETIF_F_LLTX;
996 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
998 /* initialize eeprom parameters */
1000 if (e1000_init_eeprom_params(&adapter->hw)) {
1001 E1000_ERR("EEPROM initialization failed\n");
1005 /* before reading the EEPROM, reset the controller to
1006 * put the device in a known good starting state */
1008 e1000_reset_hw(&adapter->hw);
1010 /* make sure the EEPROM is good */
1012 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1013 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1017 /* copy the MAC address out of the EEPROM */
1019 if (e1000_read_mac_addr(&adapter->hw))
1020 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1021 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1022 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1024 if (!is_valid_ether_addr(netdev->perm_addr)) {
1025 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1029 e1000_get_bus_info(&adapter->hw);
1031 init_timer(&adapter->tx_fifo_stall_timer);
1032 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1033 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1035 init_timer(&adapter->watchdog_timer);
1036 adapter->watchdog_timer.function = &e1000_watchdog;
1037 adapter->watchdog_timer.data = (unsigned long) adapter;
1039 init_timer(&adapter->phy_info_timer);
1040 adapter->phy_info_timer.function = &e1000_update_phy_info;
1041 adapter->phy_info_timer.data = (unsigned long) adapter;
1043 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1045 e1000_check_options(adapter);
1047 /* Initial Wake on LAN setting
1048 * If APM wake is enabled in the EEPROM,
1049 * enable the ACPI Magic Packet filter
1052 switch (adapter->hw.mac_type) {
1053 case e1000_82542_rev2_0:
1054 case e1000_82542_rev2_1:
1058 e1000_read_eeprom(&adapter->hw,
1059 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1060 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1063 e1000_read_eeprom(&adapter->hw,
1064 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1065 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1068 case e1000_82546_rev_3:
1070 case e1000_80003es2lan:
1071 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1072 e1000_read_eeprom(&adapter->hw,
1073 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1078 e1000_read_eeprom(&adapter->hw,
1079 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1082 if (eeprom_data & eeprom_apme_mask)
1083 adapter->eeprom_wol |= E1000_WUFC_MAG;
1085 /* now that we have the eeprom settings, apply the special cases
1086 * where the eeprom may be wrong or the board simply won't support
1087 * wake on lan on a particular port */
1088 switch (pdev->device) {
1089 case E1000_DEV_ID_82546GB_PCIE:
1090 adapter->eeprom_wol = 0;
1092 case E1000_DEV_ID_82546EB_FIBER:
1093 case E1000_DEV_ID_82546GB_FIBER:
1094 case E1000_DEV_ID_82571EB_FIBER:
1095 /* Wake events only supported on port A for dual fiber
1096 * regardless of eeprom setting */
1097 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1098 adapter->eeprom_wol = 0;
1100 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1101 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1102 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1103 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1104 /* if quad port adapter, disable WoL on all but port A */
1105 if (global_quad_port_a != 0)
1106 adapter->eeprom_wol = 0;
1108 adapter->quad_port_a = 1;
1109 /* Reset for multiple quad port adapters */
1110 if (++global_quad_port_a == 4)
1111 global_quad_port_a = 0;
1115 /* initialize the wol settings based on the eeprom settings */
1116 adapter->wol = adapter->eeprom_wol;
1118 /* print bus type/speed/width info */
1120 struct e1000_hw *hw = &adapter->hw;
1121 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1122 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1123 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1124 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1125 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1126 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1127 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1128 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1129 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1130 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1131 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1135 for (i = 0; i < 6; i++)
1136 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1138 /* reset the hardware with the new settings */
1139 e1000_reset(adapter);
1141 /* If the controller is 82573 and f/w is AMT, do not set
1142 * DRV_LOAD until the interface is up. For all other cases,
1143 * let the f/w know that the h/w is now under the control
1145 if (adapter->hw.mac_type != e1000_82573 ||
1146 !e1000_check_mng_mode(&adapter->hw))
1147 e1000_get_hw_control(adapter);
1149 /* tell the stack to leave us alone until e1000_open() is called */
1150 netif_carrier_off(netdev);
1151 netif_stop_queue(netdev);
1152 #ifdef CONFIG_E1000_NAPI
1153 netif_poll_disable(netdev);
1156 strcpy(netdev->name, "eth%d");
1157 if ((err = register_netdev(netdev)))
1160 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1166 e1000_release_hw_control(adapter);
1168 if (!e1000_check_phy_reset_block(&adapter->hw))
1169 e1000_phy_hw_reset(&adapter->hw);
1171 if (adapter->hw.flash_address)
1172 iounmap(adapter->hw.flash_address);
1174 #ifdef CONFIG_E1000_NAPI
1175 for (i = 0; i < adapter->num_rx_queues; i++)
1176 dev_put(&adapter->polling_netdev[i]);
1179 kfree(adapter->tx_ring);
1180 kfree(adapter->rx_ring);
1181 #ifdef CONFIG_E1000_NAPI
1182 kfree(adapter->polling_netdev);
1185 iounmap(adapter->hw.hw_addr);
1187 free_netdev(netdev);
1189 pci_release_regions(pdev);
1192 pci_disable_device(pdev);
1197 * e1000_remove - Device Removal Routine
1198 * @pdev: PCI device information struct
1200 * e1000_remove is called by the PCI subsystem to alert the driver
1201 * that it should release a PCI device. The could be caused by a
1202 * Hot-Plug event, or because the driver is going to be removed from
1206 static void __devexit
1207 e1000_remove(struct pci_dev *pdev)
1209 struct net_device *netdev = pci_get_drvdata(pdev);
1210 struct e1000_adapter *adapter = netdev_priv(netdev);
1211 #ifdef CONFIG_E1000_NAPI
1215 cancel_work_sync(&adapter->reset_task);
1217 e1000_release_manageability(adapter);
1219 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1220 * would have already happened in close and is redundant. */
1221 e1000_release_hw_control(adapter);
1223 unregister_netdev(netdev);
1224 #ifdef CONFIG_E1000_NAPI
1225 for (i = 0; i < adapter->num_rx_queues; i++)
1226 dev_put(&adapter->polling_netdev[i]);
1229 if (!e1000_check_phy_reset_block(&adapter->hw))
1230 e1000_phy_hw_reset(&adapter->hw);
1232 kfree(adapter->tx_ring);
1233 kfree(adapter->rx_ring);
1234 #ifdef CONFIG_E1000_NAPI
1235 kfree(adapter->polling_netdev);
1238 iounmap(adapter->hw.hw_addr);
1239 if (adapter->hw.flash_address)
1240 iounmap(adapter->hw.flash_address);
1241 pci_release_regions(pdev);
1243 free_netdev(netdev);
1245 pci_disable_device(pdev);
1249 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1250 * @adapter: board private structure to initialize
1252 * e1000_sw_init initializes the Adapter private data structure.
1253 * Fields are initialized based on PCI device information and
1254 * OS network device settings (MTU size).
1257 static int __devinit
1258 e1000_sw_init(struct e1000_adapter *adapter)
1260 struct e1000_hw *hw = &adapter->hw;
1261 struct net_device *netdev = adapter->netdev;
1262 struct pci_dev *pdev = adapter->pdev;
1263 #ifdef CONFIG_E1000_NAPI
1267 /* PCI config space info */
1269 hw->vendor_id = pdev->vendor;
1270 hw->device_id = pdev->device;
1271 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1272 hw->subsystem_id = pdev->subsystem_device;
1273 hw->revision_id = pdev->revision;
1275 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1277 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1278 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1279 hw->max_frame_size = netdev->mtu +
1280 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1281 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1283 /* identify the MAC */
1285 if (e1000_set_mac_type(hw)) {
1286 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1290 switch (hw->mac_type) {
1295 case e1000_82541_rev_2:
1296 case e1000_82547_rev_2:
1297 hw->phy_init_script = 1;
1301 e1000_set_media_type(hw);
1303 hw->wait_autoneg_complete = FALSE;
1304 hw->tbi_compatibility_en = TRUE;
1305 hw->adaptive_ifs = TRUE;
1307 /* Copper options */
1309 if (hw->media_type == e1000_media_type_copper) {
1310 hw->mdix = AUTO_ALL_MODES;
1311 hw->disable_polarity_correction = FALSE;
1312 hw->master_slave = E1000_MASTER_SLAVE;
1315 adapter->num_tx_queues = 1;
1316 adapter->num_rx_queues = 1;
1318 if (e1000_alloc_queues(adapter)) {
1319 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1323 #ifdef CONFIG_E1000_NAPI
1324 for (i = 0; i < adapter->num_rx_queues; i++) {
1325 adapter->polling_netdev[i].priv = adapter;
1326 adapter->polling_netdev[i].poll = &e1000_clean;
1327 adapter->polling_netdev[i].weight = 64;
1328 dev_hold(&adapter->polling_netdev[i]);
1329 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1331 spin_lock_init(&adapter->tx_queue_lock);
1334 /* Explicitly disable IRQ since the NIC can be in any state. */
1335 atomic_set(&adapter->irq_sem, 0);
1336 e1000_irq_disable(adapter);
1338 spin_lock_init(&adapter->stats_lock);
1340 set_bit(__E1000_DOWN, &adapter->flags);
1346 * e1000_alloc_queues - Allocate memory for all rings
1347 * @adapter: board private structure to initialize
1349 * We allocate one ring per queue at run-time since we don't know the
1350 * number of queues at compile-time. The polling_netdev array is
1351 * intended for Multiqueue, but should work fine with a single queue.
1354 static int __devinit
1355 e1000_alloc_queues(struct e1000_adapter *adapter)
1357 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1358 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1359 if (!adapter->tx_ring)
1362 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1363 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1364 if (!adapter->rx_ring) {
1365 kfree(adapter->tx_ring);
1369 #ifdef CONFIG_E1000_NAPI
1370 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1371 sizeof(struct net_device),
1373 if (!adapter->polling_netdev) {
1374 kfree(adapter->tx_ring);
1375 kfree(adapter->rx_ring);
1380 return E1000_SUCCESS;
1384 * e1000_open - Called when a network interface is made active
1385 * @netdev: network interface device structure
1387 * Returns 0 on success, negative value on failure
1389 * The open entry point is called when a network interface is made
1390 * active by the system (IFF_UP). At this point all resources needed
1391 * for transmit and receive operations are allocated, the interrupt
1392 * handler is registered with the OS, the watchdog timer is started,
1393 * and the stack is notified that the interface is ready.
1397 e1000_open(struct net_device *netdev)
1399 struct e1000_adapter *adapter = netdev_priv(netdev);
1402 /* disallow open during test */
1403 if (test_bit(__E1000_TESTING, &adapter->flags))
1406 /* allocate transmit descriptors */
1407 err = e1000_setup_all_tx_resources(adapter);
1411 /* allocate receive descriptors */
1412 err = e1000_setup_all_rx_resources(adapter);
1416 e1000_power_up_phy(adapter);
1418 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1419 if ((adapter->hw.mng_cookie.status &
1420 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1421 e1000_update_mng_vlan(adapter);
1424 /* If AMT is enabled, let the firmware know that the network
1425 * interface is now open */
1426 if (adapter->hw.mac_type == e1000_82573 &&
1427 e1000_check_mng_mode(&adapter->hw))
1428 e1000_get_hw_control(adapter);
1430 /* before we allocate an interrupt, we must be ready to handle it.
1431 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1432 * as soon as we call pci_request_irq, so we have to setup our
1433 * clean_rx handler before we do so. */
1434 e1000_configure(adapter);
1436 err = e1000_request_irq(adapter);
1440 /* From here on the code is the same as e1000_up() */
1441 clear_bit(__E1000_DOWN, &adapter->flags);
1443 #ifdef CONFIG_E1000_NAPI
1444 netif_poll_enable(netdev);
1447 e1000_irq_enable(adapter);
1449 /* fire a link status change interrupt to start the watchdog */
1450 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1452 return E1000_SUCCESS;
1455 e1000_release_hw_control(adapter);
1456 e1000_power_down_phy(adapter);
1457 e1000_free_all_rx_resources(adapter);
1459 e1000_free_all_tx_resources(adapter);
1461 e1000_reset(adapter);
1467 * e1000_close - Disables a network interface
1468 * @netdev: network interface device structure
1470 * Returns 0, this is not allowed to fail
1472 * The close entry point is called when an interface is de-activated
1473 * by the OS. The hardware is still under the drivers control, but
1474 * needs to be disabled. A global MAC reset is issued to stop the
1475 * hardware, and all transmit and receive resources are freed.
1479 e1000_close(struct net_device *netdev)
1481 struct e1000_adapter *adapter = netdev_priv(netdev);
1483 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1484 e1000_down(adapter);
1485 e1000_power_down_phy(adapter);
1486 e1000_free_irq(adapter);
1488 e1000_free_all_tx_resources(adapter);
1489 e1000_free_all_rx_resources(adapter);
1491 /* kill manageability vlan ID if supported, but not if a vlan with
1492 * the same ID is registered on the host OS (let 8021q kill it) */
1493 if ((adapter->hw.mng_cookie.status &
1494 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1496 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1497 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1500 /* If AMT is enabled, let the firmware know that the network
1501 * interface is now closed */
1502 if (adapter->hw.mac_type == e1000_82573 &&
1503 e1000_check_mng_mode(&adapter->hw))
1504 e1000_release_hw_control(adapter);
1510 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1511 * @adapter: address of board private structure
1512 * @start: address of beginning of memory
1513 * @len: length of memory
1516 e1000_check_64k_bound(struct e1000_adapter *adapter,
1517 void *start, unsigned long len)
1519 unsigned long begin = (unsigned long) start;
1520 unsigned long end = begin + len;
1522 /* First rev 82545 and 82546 need to not allow any memory
1523 * write location to cross 64k boundary due to errata 23 */
1524 if (adapter->hw.mac_type == e1000_82545 ||
1525 adapter->hw.mac_type == e1000_82546) {
1526 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1533 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1534 * @adapter: board private structure
1535 * @txdr: tx descriptor ring (for a specific queue) to setup
1537 * Return 0 on success, negative on failure
1541 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1542 struct e1000_tx_ring *txdr)
1544 struct pci_dev *pdev = adapter->pdev;
1547 size = sizeof(struct e1000_buffer) * txdr->count;
1548 txdr->buffer_info = vmalloc(size);
1549 if (!txdr->buffer_info) {
1551 "Unable to allocate memory for the transmit descriptor ring\n");
1554 memset(txdr->buffer_info, 0, size);
1556 /* round up to nearest 4K */
1558 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1559 txdr->size = ALIGN(txdr->size, 4096);
1561 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1564 vfree(txdr->buffer_info);
1566 "Unable to allocate memory for the transmit descriptor ring\n");
1570 /* Fix for errata 23, can't cross 64kB boundary */
1571 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1572 void *olddesc = txdr->desc;
1573 dma_addr_t olddma = txdr->dma;
1574 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1575 "at %p\n", txdr->size, txdr->desc);
1576 /* Try again, without freeing the previous */
1577 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1578 /* Failed allocation, critical failure */
1580 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1581 goto setup_tx_desc_die;
1584 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1586 pci_free_consistent(pdev, txdr->size, txdr->desc,
1588 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1590 "Unable to allocate aligned memory "
1591 "for the transmit descriptor ring\n");
1592 vfree(txdr->buffer_info);
1595 /* Free old allocation, new allocation was successful */
1596 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1599 memset(txdr->desc, 0, txdr->size);
1601 txdr->next_to_use = 0;
1602 txdr->next_to_clean = 0;
1603 spin_lock_init(&txdr->tx_lock);
1609 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1610 * (Descriptors) for all queues
1611 * @adapter: board private structure
1613 * Return 0 on success, negative on failure
1617 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1621 for (i = 0; i < adapter->num_tx_queues; i++) {
1622 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1625 "Allocation for Tx Queue %u failed\n", i);
1626 for (i-- ; i >= 0; i--)
1627 e1000_free_tx_resources(adapter,
1628 &adapter->tx_ring[i]);
1637 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1638 * @adapter: board private structure
1640 * Configure the Tx unit of the MAC after a reset.
1644 e1000_configure_tx(struct e1000_adapter *adapter)
1647 struct e1000_hw *hw = &adapter->hw;
1648 uint32_t tdlen, tctl, tipg, tarc;
1649 uint32_t ipgr1, ipgr2;
1651 /* Setup the HW Tx Head and Tail descriptor pointers */
1653 switch (adapter->num_tx_queues) {
1656 tdba = adapter->tx_ring[0].dma;
1657 tdlen = adapter->tx_ring[0].count *
1658 sizeof(struct e1000_tx_desc);
1659 E1000_WRITE_REG(hw, TDLEN, tdlen);
1660 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1661 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1662 E1000_WRITE_REG(hw, TDT, 0);
1663 E1000_WRITE_REG(hw, TDH, 0);
1664 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1665 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1669 /* Set the default values for the Tx Inter Packet Gap timer */
1670 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1671 (hw->media_type == e1000_media_type_fiber ||
1672 hw->media_type == e1000_media_type_internal_serdes))
1673 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1675 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1677 switch (hw->mac_type) {
1678 case e1000_82542_rev2_0:
1679 case e1000_82542_rev2_1:
1680 tipg = DEFAULT_82542_TIPG_IPGT;
1681 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1682 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1684 case e1000_80003es2lan:
1685 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1686 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1689 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1690 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1693 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1694 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1695 E1000_WRITE_REG(hw, TIPG, tipg);
1697 /* Set the Tx Interrupt Delay register */
1699 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1700 if (hw->mac_type >= e1000_82540)
1701 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1703 /* Program the Transmit Control Register */
1705 tctl = E1000_READ_REG(hw, TCTL);
1706 tctl &= ~E1000_TCTL_CT;
1707 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1708 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1710 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1711 tarc = E1000_READ_REG(hw, TARC0);
1712 /* set the speed mode bit, we'll clear it if we're not at
1713 * gigabit link later */
1715 E1000_WRITE_REG(hw, TARC0, tarc);
1716 } else if (hw->mac_type == e1000_80003es2lan) {
1717 tarc = E1000_READ_REG(hw, TARC0);
1719 E1000_WRITE_REG(hw, TARC0, tarc);
1720 tarc = E1000_READ_REG(hw, TARC1);
1722 E1000_WRITE_REG(hw, TARC1, tarc);
1725 e1000_config_collision_dist(hw);
1727 /* Setup Transmit Descriptor Settings for eop descriptor */
1728 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1730 /* only set IDE if we are delaying interrupts using the timers */
1731 if (adapter->tx_int_delay)
1732 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1734 if (hw->mac_type < e1000_82543)
1735 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1737 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1739 /* Cache if we're 82544 running in PCI-X because we'll
1740 * need this to apply a workaround later in the send path. */
1741 if (hw->mac_type == e1000_82544 &&
1742 hw->bus_type == e1000_bus_type_pcix)
1743 adapter->pcix_82544 = 1;
1745 E1000_WRITE_REG(hw, TCTL, tctl);
1750 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1751 * @adapter: board private structure
1752 * @rxdr: rx descriptor ring (for a specific queue) to setup
1754 * Returns 0 on success, negative on failure
1758 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1759 struct e1000_rx_ring *rxdr)
1761 struct pci_dev *pdev = adapter->pdev;
1764 size = sizeof(struct e1000_buffer) * rxdr->count;
1765 rxdr->buffer_info = vmalloc(size);
1766 if (!rxdr->buffer_info) {
1768 "Unable to allocate memory for the receive descriptor ring\n");
1771 memset(rxdr->buffer_info, 0, size);
1773 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1775 if (!rxdr->ps_page) {
1776 vfree(rxdr->buffer_info);
1778 "Unable to allocate memory for the receive descriptor ring\n");
1782 rxdr->ps_page_dma = kcalloc(rxdr->count,
1783 sizeof(struct e1000_ps_page_dma),
1785 if (!rxdr->ps_page_dma) {
1786 vfree(rxdr->buffer_info);
1787 kfree(rxdr->ps_page);
1789 "Unable to allocate memory for the receive descriptor ring\n");
1793 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1794 desc_len = sizeof(struct e1000_rx_desc);
1796 desc_len = sizeof(union e1000_rx_desc_packet_split);
1798 /* Round up to nearest 4K */
1800 rxdr->size = rxdr->count * desc_len;
1801 rxdr->size = ALIGN(rxdr->size, 4096);
1803 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1807 "Unable to allocate memory for the receive descriptor ring\n");
1809 vfree(rxdr->buffer_info);
1810 kfree(rxdr->ps_page);
1811 kfree(rxdr->ps_page_dma);
1815 /* Fix for errata 23, can't cross 64kB boundary */
1816 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1817 void *olddesc = rxdr->desc;
1818 dma_addr_t olddma = rxdr->dma;
1819 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1820 "at %p\n", rxdr->size, rxdr->desc);
1821 /* Try again, without freeing the previous */
1822 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1823 /* Failed allocation, critical failure */
1825 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1827 "Unable to allocate memory "
1828 "for the receive descriptor ring\n");
1829 goto setup_rx_desc_die;
1832 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1834 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1836 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1838 "Unable to allocate aligned memory "
1839 "for the receive descriptor ring\n");
1840 goto setup_rx_desc_die;
1842 /* Free old allocation, new allocation was successful */
1843 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1846 memset(rxdr->desc, 0, rxdr->size);
1848 rxdr->next_to_clean = 0;
1849 rxdr->next_to_use = 0;
1855 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1856 * (Descriptors) for all queues
1857 * @adapter: board private structure
1859 * Return 0 on success, negative on failure
1863 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1867 for (i = 0; i < adapter->num_rx_queues; i++) {
1868 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1871 "Allocation for Rx Queue %u failed\n", i);
1872 for (i-- ; i >= 0; i--)
1873 e1000_free_rx_resources(adapter,
1874 &adapter->rx_ring[i]);
1883 * e1000_setup_rctl - configure the receive control registers
1884 * @adapter: Board private structure
1886 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1887 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1889 e1000_setup_rctl(struct e1000_adapter *adapter)
1891 uint32_t rctl, rfctl;
1892 uint32_t psrctl = 0;
1893 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1897 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1899 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1901 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1902 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1903 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1905 if (adapter->hw.tbi_compatibility_on == 1)
1906 rctl |= E1000_RCTL_SBP;
1908 rctl &= ~E1000_RCTL_SBP;
1910 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1911 rctl &= ~E1000_RCTL_LPE;
1913 rctl |= E1000_RCTL_LPE;
1915 /* Setup buffer sizes */
1916 rctl &= ~E1000_RCTL_SZ_4096;
1917 rctl |= E1000_RCTL_BSEX;
1918 switch (adapter->rx_buffer_len) {
1919 case E1000_RXBUFFER_256:
1920 rctl |= E1000_RCTL_SZ_256;
1921 rctl &= ~E1000_RCTL_BSEX;
1923 case E1000_RXBUFFER_512:
1924 rctl |= E1000_RCTL_SZ_512;
1925 rctl &= ~E1000_RCTL_BSEX;
1927 case E1000_RXBUFFER_1024:
1928 rctl |= E1000_RCTL_SZ_1024;
1929 rctl &= ~E1000_RCTL_BSEX;
1931 case E1000_RXBUFFER_2048:
1933 rctl |= E1000_RCTL_SZ_2048;
1934 rctl &= ~E1000_RCTL_BSEX;
1936 case E1000_RXBUFFER_4096:
1937 rctl |= E1000_RCTL_SZ_4096;
1939 case E1000_RXBUFFER_8192:
1940 rctl |= E1000_RCTL_SZ_8192;
1942 case E1000_RXBUFFER_16384:
1943 rctl |= E1000_RCTL_SZ_16384;
1947 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1948 /* 82571 and greater support packet-split where the protocol
1949 * header is placed in skb->data and the packet data is
1950 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1951 * In the case of a non-split, skb->data is linearly filled,
1952 * followed by the page buffers. Therefore, skb->data is
1953 * sized to hold the largest protocol header.
1955 /* allocations using alloc_page take too long for regular MTU
1956 * so only enable packet split for jumbo frames */
1957 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1958 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1959 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1960 adapter->rx_ps_pages = pages;
1962 adapter->rx_ps_pages = 0;
1964 if (adapter->rx_ps_pages) {
1965 /* Configure extra packet-split registers */
1966 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1967 rfctl |= E1000_RFCTL_EXTEN;
1968 /* disable packet split support for IPv6 extension headers,
1969 * because some malformed IPv6 headers can hang the RX */
1970 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1971 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1973 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1975 rctl |= E1000_RCTL_DTYP_PS;
1977 psrctl |= adapter->rx_ps_bsize0 >>
1978 E1000_PSRCTL_BSIZE0_SHIFT;
1980 switch (adapter->rx_ps_pages) {
1982 psrctl |= PAGE_SIZE <<
1983 E1000_PSRCTL_BSIZE3_SHIFT;
1985 psrctl |= PAGE_SIZE <<
1986 E1000_PSRCTL_BSIZE2_SHIFT;
1988 psrctl |= PAGE_SIZE >>
1989 E1000_PSRCTL_BSIZE1_SHIFT;
1993 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1996 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2000 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
2001 * @adapter: board private structure
2003 * Configure the Rx unit of the MAC after a reset.
2007 e1000_configure_rx(struct e1000_adapter *adapter)
2010 struct e1000_hw *hw = &adapter->hw;
2011 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2013 if (adapter->rx_ps_pages) {
2014 /* this is a 32 byte descriptor */
2015 rdlen = adapter->rx_ring[0].count *
2016 sizeof(union e1000_rx_desc_packet_split);
2017 adapter->clean_rx = e1000_clean_rx_irq_ps;
2018 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2020 rdlen = adapter->rx_ring[0].count *
2021 sizeof(struct e1000_rx_desc);
2022 adapter->clean_rx = e1000_clean_rx_irq;
2023 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2026 /* disable receives while setting up the descriptors */
2027 rctl = E1000_READ_REG(hw, RCTL);
2028 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2030 /* set the Receive Delay Timer Register */
2031 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2033 if (hw->mac_type >= e1000_82540) {
2034 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2035 if (adapter->itr_setting != 0)
2036 E1000_WRITE_REG(hw, ITR,
2037 1000000000 / (adapter->itr * 256));
2040 if (hw->mac_type >= e1000_82571) {
2041 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2042 /* Reset delay timers after every interrupt */
2043 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2044 #ifdef CONFIG_E1000_NAPI
2045 /* Auto-Mask interrupts upon ICR access */
2046 ctrl_ext |= E1000_CTRL_EXT_IAME;
2047 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2049 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2050 E1000_WRITE_FLUSH(hw);
2053 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2054 * the Base and Length of the Rx Descriptor Ring */
2055 switch (adapter->num_rx_queues) {
2058 rdba = adapter->rx_ring[0].dma;
2059 E1000_WRITE_REG(hw, RDLEN, rdlen);
2060 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2061 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2062 E1000_WRITE_REG(hw, RDT, 0);
2063 E1000_WRITE_REG(hw, RDH, 0);
2064 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2065 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2069 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2070 if (hw->mac_type >= e1000_82543) {
2071 rxcsum = E1000_READ_REG(hw, RXCSUM);
2072 if (adapter->rx_csum == TRUE) {
2073 rxcsum |= E1000_RXCSUM_TUOFL;
2075 /* Enable 82571 IPv4 payload checksum for UDP fragments
2076 * Must be used in conjunction with packet-split. */
2077 if ((hw->mac_type >= e1000_82571) &&
2078 (adapter->rx_ps_pages)) {
2079 rxcsum |= E1000_RXCSUM_IPPCSE;
2082 rxcsum &= ~E1000_RXCSUM_TUOFL;
2083 /* don't need to clear IPPCSE as it defaults to 0 */
2085 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2088 /* enable early receives on 82573, only takes effect if using > 2048
2089 * byte total frame size. for example only for jumbo frames */
2090 #define E1000_ERT_2048 0x100
2091 if (hw->mac_type == e1000_82573)
2092 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2094 /* Enable Receives */
2095 E1000_WRITE_REG(hw, RCTL, rctl);
2099 * e1000_free_tx_resources - Free Tx Resources per Queue
2100 * @adapter: board private structure
2101 * @tx_ring: Tx descriptor ring for a specific queue
2103 * Free all transmit software resources
2107 e1000_free_tx_resources(struct e1000_adapter *adapter,
2108 struct e1000_tx_ring *tx_ring)
2110 struct pci_dev *pdev = adapter->pdev;
2112 e1000_clean_tx_ring(adapter, tx_ring);
2114 vfree(tx_ring->buffer_info);
2115 tx_ring->buffer_info = NULL;
2117 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2119 tx_ring->desc = NULL;
2123 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2124 * @adapter: board private structure
2126 * Free all transmit software resources
2130 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2134 for (i = 0; i < adapter->num_tx_queues; i++)
2135 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2139 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2140 struct e1000_buffer *buffer_info)
2142 if (buffer_info->dma) {
2143 pci_unmap_page(adapter->pdev,
2145 buffer_info->length,
2147 buffer_info->dma = 0;
2149 if (buffer_info->skb) {
2150 dev_kfree_skb_any(buffer_info->skb);
2151 buffer_info->skb = NULL;
2153 /* buffer_info must be completely set up in the transmit path */
2157 * e1000_clean_tx_ring - Free Tx Buffers
2158 * @adapter: board private structure
2159 * @tx_ring: ring to be cleaned
2163 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2164 struct e1000_tx_ring *tx_ring)
2166 struct e1000_buffer *buffer_info;
2170 /* Free all the Tx ring sk_buffs */
2172 for (i = 0; i < tx_ring->count; i++) {
2173 buffer_info = &tx_ring->buffer_info[i];
2174 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2177 size = sizeof(struct e1000_buffer) * tx_ring->count;
2178 memset(tx_ring->buffer_info, 0, size);
2180 /* Zero out the descriptor ring */
2182 memset(tx_ring->desc, 0, tx_ring->size);
2184 tx_ring->next_to_use = 0;
2185 tx_ring->next_to_clean = 0;
2186 tx_ring->last_tx_tso = 0;
2188 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2189 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2193 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2194 * @adapter: board private structure
2198 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2202 for (i = 0; i < adapter->num_tx_queues; i++)
2203 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2207 * e1000_free_rx_resources - Free Rx Resources
2208 * @adapter: board private structure
2209 * @rx_ring: ring to clean the resources from
2211 * Free all receive software resources
2215 e1000_free_rx_resources(struct e1000_adapter *adapter,
2216 struct e1000_rx_ring *rx_ring)
2218 struct pci_dev *pdev = adapter->pdev;
2220 e1000_clean_rx_ring(adapter, rx_ring);
2222 vfree(rx_ring->buffer_info);
2223 rx_ring->buffer_info = NULL;
2224 kfree(rx_ring->ps_page);
2225 rx_ring->ps_page = NULL;
2226 kfree(rx_ring->ps_page_dma);
2227 rx_ring->ps_page_dma = NULL;
2229 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2231 rx_ring->desc = NULL;
2235 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2236 * @adapter: board private structure
2238 * Free all receive software resources
2242 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2246 for (i = 0; i < adapter->num_rx_queues; i++)
2247 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2251 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2252 * @adapter: board private structure
2253 * @rx_ring: ring to free buffers from
2257 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2258 struct e1000_rx_ring *rx_ring)
2260 struct e1000_buffer *buffer_info;
2261 struct e1000_ps_page *ps_page;
2262 struct e1000_ps_page_dma *ps_page_dma;
2263 struct pci_dev *pdev = adapter->pdev;
2267 /* Free all the Rx ring sk_buffs */
2268 for (i = 0; i < rx_ring->count; i++) {
2269 buffer_info = &rx_ring->buffer_info[i];
2270 if (buffer_info->skb) {
2271 pci_unmap_single(pdev,
2273 buffer_info->length,
2274 PCI_DMA_FROMDEVICE);
2276 dev_kfree_skb(buffer_info->skb);
2277 buffer_info->skb = NULL;
2279 ps_page = &rx_ring->ps_page[i];
2280 ps_page_dma = &rx_ring->ps_page_dma[i];
2281 for (j = 0; j < adapter->rx_ps_pages; j++) {
2282 if (!ps_page->ps_page[j]) break;
2283 pci_unmap_page(pdev,
2284 ps_page_dma->ps_page_dma[j],
2285 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2286 ps_page_dma->ps_page_dma[j] = 0;
2287 put_page(ps_page->ps_page[j]);
2288 ps_page->ps_page[j] = NULL;
2292 size = sizeof(struct e1000_buffer) * rx_ring->count;
2293 memset(rx_ring->buffer_info, 0, size);
2294 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2295 memset(rx_ring->ps_page, 0, size);
2296 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2297 memset(rx_ring->ps_page_dma, 0, size);
2299 /* Zero out the descriptor ring */
2301 memset(rx_ring->desc, 0, rx_ring->size);
2303 rx_ring->next_to_clean = 0;
2304 rx_ring->next_to_use = 0;
2306 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2307 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2311 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2312 * @adapter: board private structure
2316 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2320 for (i = 0; i < adapter->num_rx_queues; i++)
2321 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2324 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2325 * and memory write and invalidate disabled for certain operations
2328 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2330 struct net_device *netdev = adapter->netdev;
2333 e1000_pci_clear_mwi(&adapter->hw);
2335 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2336 rctl |= E1000_RCTL_RST;
2337 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2338 E1000_WRITE_FLUSH(&adapter->hw);
2341 if (netif_running(netdev))
2342 e1000_clean_all_rx_rings(adapter);
2346 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2348 struct net_device *netdev = adapter->netdev;
2351 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2352 rctl &= ~E1000_RCTL_RST;
2353 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2354 E1000_WRITE_FLUSH(&adapter->hw);
2357 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2358 e1000_pci_set_mwi(&adapter->hw);
2360 if (netif_running(netdev)) {
2361 /* No need to loop, because 82542 supports only 1 queue */
2362 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2363 e1000_configure_rx(adapter);
2364 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2369 * e1000_set_mac - Change the Ethernet Address of the NIC
2370 * @netdev: network interface device structure
2371 * @p: pointer to an address structure
2373 * Returns 0 on success, negative on failure
2377 e1000_set_mac(struct net_device *netdev, void *p)
2379 struct e1000_adapter *adapter = netdev_priv(netdev);
2380 struct sockaddr *addr = p;
2382 if (!is_valid_ether_addr(addr->sa_data))
2383 return -EADDRNOTAVAIL;
2385 /* 82542 2.0 needs to be in reset to write receive address registers */
2387 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2388 e1000_enter_82542_rst(adapter);
2390 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2391 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2393 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2395 /* With 82571 controllers, LAA may be overwritten (with the default)
2396 * due to controller reset from the other port. */
2397 if (adapter->hw.mac_type == e1000_82571) {
2398 /* activate the work around */
2399 adapter->hw.laa_is_present = 1;
2401 /* Hold a copy of the LAA in RAR[14] This is done so that
2402 * between the time RAR[0] gets clobbered and the time it
2403 * gets fixed (in e1000_watchdog), the actual LAA is in one
2404 * of the RARs and no incoming packets directed to this port
2405 * are dropped. Eventaully the LAA will be in RAR[0] and
2407 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2408 E1000_RAR_ENTRIES - 1);
2411 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2412 e1000_leave_82542_rst(adapter);
2418 * e1000_set_multi - Multicast and Promiscuous mode set
2419 * @netdev: network interface device structure
2421 * The set_multi entry point is called whenever the multicast address
2422 * list or the network interface flags are updated. This routine is
2423 * responsible for configuring the hardware for proper multicast,
2424 * promiscuous mode, and all-multi behavior.
2428 e1000_set_multi(struct net_device *netdev)
2430 struct e1000_adapter *adapter = netdev_priv(netdev);
2431 struct e1000_hw *hw = &adapter->hw;
2432 struct dev_mc_list *mc_ptr;
2434 uint32_t hash_value;
2435 int i, rar_entries = E1000_RAR_ENTRIES;
2436 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2437 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2438 E1000_NUM_MTA_REGISTERS;
2440 if (adapter->hw.mac_type == e1000_ich8lan)
2441 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2443 /* reserve RAR[14] for LAA over-write work-around */
2444 if (adapter->hw.mac_type == e1000_82571)
2447 /* Check for Promiscuous and All Multicast modes */
2449 rctl = E1000_READ_REG(hw, RCTL);
2451 if (netdev->flags & IFF_PROMISC) {
2452 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2453 } else if (netdev->flags & IFF_ALLMULTI) {
2454 rctl |= E1000_RCTL_MPE;
2455 rctl &= ~E1000_RCTL_UPE;
2457 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2460 E1000_WRITE_REG(hw, RCTL, rctl);
2462 /* 82542 2.0 needs to be in reset to write receive address registers */
2464 if (hw->mac_type == e1000_82542_rev2_0)
2465 e1000_enter_82542_rst(adapter);
2467 /* load the first 14 multicast address into the exact filters 1-14
2468 * RAR 0 is used for the station MAC adddress
2469 * if there are not 14 addresses, go ahead and clear the filters
2470 * -- with 82571 controllers only 0-13 entries are filled here
2472 mc_ptr = netdev->mc_list;
2474 for (i = 1; i < rar_entries; i++) {
2476 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2477 mc_ptr = mc_ptr->next;
2479 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2480 E1000_WRITE_FLUSH(hw);
2481 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2482 E1000_WRITE_FLUSH(hw);
2486 /* clear the old settings from the multicast hash table */
2488 for (i = 0; i < mta_reg_count; i++) {
2489 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2490 E1000_WRITE_FLUSH(hw);
2493 /* load any remaining addresses into the hash table */
2495 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2496 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2497 e1000_mta_set(hw, hash_value);
2500 if (hw->mac_type == e1000_82542_rev2_0)
2501 e1000_leave_82542_rst(adapter);
2504 /* Need to wait a few seconds after link up to get diagnostic information from
2508 e1000_update_phy_info(unsigned long data)
2510 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2511 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2515 * e1000_82547_tx_fifo_stall - Timer Call-back
2516 * @data: pointer to adapter cast into an unsigned long
2520 e1000_82547_tx_fifo_stall(unsigned long data)
2522 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2523 struct net_device *netdev = adapter->netdev;
2526 if (atomic_read(&adapter->tx_fifo_stall)) {
2527 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2528 E1000_READ_REG(&adapter->hw, TDH)) &&
2529 (E1000_READ_REG(&adapter->hw, TDFT) ==
2530 E1000_READ_REG(&adapter->hw, TDFH)) &&
2531 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2532 E1000_READ_REG(&adapter->hw, TDFHS))) {
2533 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2534 E1000_WRITE_REG(&adapter->hw, TCTL,
2535 tctl & ~E1000_TCTL_EN);
2536 E1000_WRITE_REG(&adapter->hw, TDFT,
2537 adapter->tx_head_addr);
2538 E1000_WRITE_REG(&adapter->hw, TDFH,
2539 adapter->tx_head_addr);
2540 E1000_WRITE_REG(&adapter->hw, TDFTS,
2541 adapter->tx_head_addr);
2542 E1000_WRITE_REG(&adapter->hw, TDFHS,
2543 adapter->tx_head_addr);
2544 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2545 E1000_WRITE_FLUSH(&adapter->hw);
2547 adapter->tx_fifo_head = 0;
2548 atomic_set(&adapter->tx_fifo_stall, 0);
2549 netif_wake_queue(netdev);
2551 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2557 * e1000_watchdog - Timer Call-back
2558 * @data: pointer to adapter cast into an unsigned long
2561 e1000_watchdog(unsigned long data)
2563 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2564 struct net_device *netdev = adapter->netdev;
2565 struct e1000_tx_ring *txdr = adapter->tx_ring;
2566 uint32_t link, tctl;
2569 ret_val = e1000_check_for_link(&adapter->hw);
2570 if ((ret_val == E1000_ERR_PHY) &&
2571 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2572 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2573 /* See e1000_kumeran_lock_loss_workaround() */
2575 "Gigabit has been disabled, downgrading speed\n");
2578 if (adapter->hw.mac_type == e1000_82573) {
2579 e1000_enable_tx_pkt_filtering(&adapter->hw);
2580 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2581 e1000_update_mng_vlan(adapter);
2584 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2585 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2586 link = !adapter->hw.serdes_link_down;
2588 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2591 if (!netif_carrier_ok(netdev)) {
2593 boolean_t txb2b = 1;
2594 e1000_get_speed_and_duplex(&adapter->hw,
2595 &adapter->link_speed,
2596 &adapter->link_duplex);
2598 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2599 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2600 "Flow Control: %s\n",
2601 adapter->link_speed,
2602 adapter->link_duplex == FULL_DUPLEX ?
2603 "Full Duplex" : "Half Duplex",
2604 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2605 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2606 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2607 E1000_CTRL_TFCE) ? "TX" : "None" )));
2609 /* tweak tx_queue_len according to speed/duplex
2610 * and adjust the timeout factor */
2611 netdev->tx_queue_len = adapter->tx_queue_len;
2612 adapter->tx_timeout_factor = 1;
2613 switch (adapter->link_speed) {
2616 netdev->tx_queue_len = 10;
2617 adapter->tx_timeout_factor = 8;
2621 netdev->tx_queue_len = 100;
2622 /* maybe add some timeout factor ? */
2626 if ((adapter->hw.mac_type == e1000_82571 ||
2627 adapter->hw.mac_type == e1000_82572) &&
2630 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2631 tarc0 &= ~(1 << 21);
2632 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2635 /* disable TSO for pcie and 10/100 speeds, to avoid
2636 * some hardware issues */
2637 if (!adapter->tso_force &&
2638 adapter->hw.bus_type == e1000_bus_type_pci_express){
2639 switch (adapter->link_speed) {
2643 "10/100 speed: disabling TSO\n");
2644 netdev->features &= ~NETIF_F_TSO;
2645 netdev->features &= ~NETIF_F_TSO6;
2648 netdev->features |= NETIF_F_TSO;
2649 netdev->features |= NETIF_F_TSO6;
2657 /* enable transmits in the hardware, need to do this
2658 * after setting TARC0 */
2659 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2660 tctl |= E1000_TCTL_EN;
2661 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2663 netif_carrier_on(netdev);
2664 netif_wake_queue(netdev);
2665 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2666 adapter->smartspeed = 0;
2668 /* make sure the receive unit is started */
2669 if (adapter->hw.rx_needs_kicking) {
2670 struct e1000_hw *hw = &adapter->hw;
2671 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2672 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2676 if (netif_carrier_ok(netdev)) {
2677 adapter->link_speed = 0;
2678 adapter->link_duplex = 0;
2679 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2680 netif_carrier_off(netdev);
2681 netif_stop_queue(netdev);
2682 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2684 /* 80003ES2LAN workaround--
2685 * For packet buffer work-around on link down event;
2686 * disable receives in the ISR and
2687 * reset device here in the watchdog
2689 if (adapter->hw.mac_type == e1000_80003es2lan)
2691 schedule_work(&adapter->reset_task);
2694 e1000_smartspeed(adapter);
2697 e1000_update_stats(adapter);
2699 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2700 adapter->tpt_old = adapter->stats.tpt;
2701 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2702 adapter->colc_old = adapter->stats.colc;
2704 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2705 adapter->gorcl_old = adapter->stats.gorcl;
2706 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2707 adapter->gotcl_old = adapter->stats.gotcl;
2709 e1000_update_adaptive(&adapter->hw);
2711 if (!netif_carrier_ok(netdev)) {
2712 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2713 /* We've lost link, so the controller stops DMA,
2714 * but we've got queued Tx work that's never going
2715 * to get done, so reset controller to flush Tx.
2716 * (Do the reset outside of interrupt context). */
2717 adapter->tx_timeout_count++;
2718 schedule_work(&adapter->reset_task);
2722 /* Cause software interrupt to ensure rx ring is cleaned */
2723 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2725 /* Force detection of hung controller every watchdog period */
2726 adapter->detect_tx_hung = TRUE;
2728 /* With 82571 controllers, LAA may be overwritten due to controller
2729 * reset from the other port. Set the appropriate LAA in RAR[0] */
2730 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2731 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2733 /* Reset the timer */
2734 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2737 enum latency_range {
2741 latency_invalid = 255
2745 * e1000_update_itr - update the dynamic ITR value based on statistics
2746 * Stores a new ITR value based on packets and byte
2747 * counts during the last interrupt. The advantage of per interrupt
2748 * computation is faster updates and more accurate ITR for the current
2749 * traffic pattern. Constants in this function were computed
2750 * based on theoretical maximum wire speed and thresholds were set based
2751 * on testing data as well as attempting to minimize response time
2752 * while increasing bulk throughput.
2753 * this functionality is controlled by the InterruptThrottleRate module
2754 * parameter (see e1000_param.c)
2755 * @adapter: pointer to adapter
2756 * @itr_setting: current adapter->itr
2757 * @packets: the number of packets during this measurement interval
2758 * @bytes: the number of bytes during this measurement interval
2760 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2761 uint16_t itr_setting,
2765 unsigned int retval = itr_setting;
2766 struct e1000_hw *hw = &adapter->hw;
2768 if (unlikely(hw->mac_type < e1000_82540))
2769 goto update_itr_done;
2772 goto update_itr_done;
2774 switch (itr_setting) {
2775 case lowest_latency:
2776 /* jumbo frames get bulk treatment*/
2777 if (bytes/packets > 8000)
2778 retval = bulk_latency;
2779 else if ((packets < 5) && (bytes > 512))
2780 retval = low_latency;
2782 case low_latency: /* 50 usec aka 20000 ints/s */
2783 if (bytes > 10000) {
2784 /* jumbo frames need bulk latency setting */
2785 if (bytes/packets > 8000)
2786 retval = bulk_latency;
2787 else if ((packets < 10) || ((bytes/packets) > 1200))
2788 retval = bulk_latency;
2789 else if ((packets > 35))
2790 retval = lowest_latency;
2791 } else if (bytes/packets > 2000)
2792 retval = bulk_latency;
2793 else if (packets <= 2 && bytes < 512)
2794 retval = lowest_latency;
2796 case bulk_latency: /* 250 usec aka 4000 ints/s */
2797 if (bytes > 25000) {
2799 retval = low_latency;
2800 } else if (bytes < 6000) {
2801 retval = low_latency;
2810 static void e1000_set_itr(struct e1000_adapter *adapter)
2812 struct e1000_hw *hw = &adapter->hw;
2813 uint16_t current_itr;
2814 uint32_t new_itr = adapter->itr;
2816 if (unlikely(hw->mac_type < e1000_82540))
2819 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2820 if (unlikely(adapter->link_speed != SPEED_1000)) {
2826 adapter->tx_itr = e1000_update_itr(adapter,
2828 adapter->total_tx_packets,
2829 adapter->total_tx_bytes);
2830 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2831 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2832 adapter->tx_itr = low_latency;
2834 adapter->rx_itr = e1000_update_itr(adapter,
2836 adapter->total_rx_packets,
2837 adapter->total_rx_bytes);
2838 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2839 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2840 adapter->rx_itr = low_latency;
2842 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2844 switch (current_itr) {
2845 /* counts and packets in update_itr are dependent on these numbers */
2846 case lowest_latency:
2850 new_itr = 20000; /* aka hwitr = ~200 */
2860 if (new_itr != adapter->itr) {
2861 /* this attempts to bias the interrupt rate towards Bulk
2862 * by adding intermediate steps when interrupt rate is
2864 new_itr = new_itr > adapter->itr ?
2865 min(adapter->itr + (new_itr >> 2), new_itr) :
2867 adapter->itr = new_itr;
2868 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2874 #define E1000_TX_FLAGS_CSUM 0x00000001
2875 #define E1000_TX_FLAGS_VLAN 0x00000002
2876 #define E1000_TX_FLAGS_TSO 0x00000004
2877 #define E1000_TX_FLAGS_IPV4 0x00000008
2878 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2879 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2882 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2883 struct sk_buff *skb)
2885 struct e1000_context_desc *context_desc;
2886 struct e1000_buffer *buffer_info;
2888 uint32_t cmd_length = 0;
2889 uint16_t ipcse = 0, tucse, mss;
2890 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2893 if (skb_is_gso(skb)) {
2894 if (skb_header_cloned(skb)) {
2895 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2900 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2901 mss = skb_shinfo(skb)->gso_size;
2902 if (skb->protocol == htons(ETH_P_IP)) {
2903 struct iphdr *iph = ip_hdr(skb);
2906 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2910 cmd_length = E1000_TXD_CMD_IP;
2911 ipcse = skb_transport_offset(skb) - 1;
2912 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2913 ipv6_hdr(skb)->payload_len = 0;
2914 tcp_hdr(skb)->check =
2915 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2916 &ipv6_hdr(skb)->daddr,
2920 ipcss = skb_network_offset(skb);
2921 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2922 tucss = skb_transport_offset(skb);
2923 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2926 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2927 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2929 i = tx_ring->next_to_use;
2930 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2931 buffer_info = &tx_ring->buffer_info[i];
2933 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2934 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2935 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2936 context_desc->upper_setup.tcp_fields.tucss = tucss;
2937 context_desc->upper_setup.tcp_fields.tucso = tucso;
2938 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2939 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2940 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2941 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2943 buffer_info->time_stamp = jiffies;
2944 buffer_info->next_to_watch = i;
2946 if (++i == tx_ring->count) i = 0;
2947 tx_ring->next_to_use = i;
2955 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2956 struct sk_buff *skb)
2958 struct e1000_context_desc *context_desc;
2959 struct e1000_buffer *buffer_info;
2963 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2964 css = skb_transport_offset(skb);
2966 i = tx_ring->next_to_use;
2967 buffer_info = &tx_ring->buffer_info[i];
2968 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2970 context_desc->lower_setup.ip_config = 0;
2971 context_desc->upper_setup.tcp_fields.tucss = css;
2972 context_desc->upper_setup.tcp_fields.tucso =
2973 css + skb->csum_offset;
2974 context_desc->upper_setup.tcp_fields.tucse = 0;
2975 context_desc->tcp_seg_setup.data = 0;
2976 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2978 buffer_info->time_stamp = jiffies;
2979 buffer_info->next_to_watch = i;
2981 if (unlikely(++i == tx_ring->count)) i = 0;
2982 tx_ring->next_to_use = i;
2990 #define E1000_MAX_TXD_PWR 12
2991 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2994 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2995 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2996 unsigned int nr_frags, unsigned int mss)
2998 struct e1000_buffer *buffer_info;
2999 unsigned int len = skb->len;
3000 unsigned int offset = 0, size, count = 0, i;
3002 len -= skb->data_len;
3004 i = tx_ring->next_to_use;
3007 buffer_info = &tx_ring->buffer_info[i];
3008 size = min(len, max_per_txd);
3009 /* Workaround for Controller erratum --
3010 * descriptor for non-tso packet in a linear SKB that follows a
3011 * tso gets written back prematurely before the data is fully
3012 * DMA'd to the controller */
3013 if (!skb->data_len && tx_ring->last_tx_tso &&
3015 tx_ring->last_tx_tso = 0;
3019 /* Workaround for premature desc write-backs
3020 * in TSO mode. Append 4-byte sentinel desc */
3021 if (unlikely(mss && !nr_frags && size == len && size > 8))
3023 /* work-around for errata 10 and it applies
3024 * to all controllers in PCI-X mode
3025 * The fix is to make sure that the first descriptor of a
3026 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3028 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3029 (size > 2015) && count == 0))
3032 /* Workaround for potential 82544 hang in PCI-X. Avoid
3033 * terminating buffers within evenly-aligned dwords. */
3034 if (unlikely(adapter->pcix_82544 &&
3035 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3039 buffer_info->length = size;
3041 pci_map_single(adapter->pdev,
3045 buffer_info->time_stamp = jiffies;
3046 buffer_info->next_to_watch = i;
3051 if (unlikely(++i == tx_ring->count)) i = 0;
3054 for (f = 0; f < nr_frags; f++) {
3055 struct skb_frag_struct *frag;
3057 frag = &skb_shinfo(skb)->frags[f];
3059 offset = frag->page_offset;
3062 buffer_info = &tx_ring->buffer_info[i];
3063 size = min(len, max_per_txd);
3064 /* Workaround for premature desc write-backs
3065 * in TSO mode. Append 4-byte sentinel desc */
3066 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3068 /* Workaround for potential 82544 hang in PCI-X.
3069 * Avoid terminating buffers within evenly-aligned
3071 if (unlikely(adapter->pcix_82544 &&
3072 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3076 buffer_info->length = size;
3078 pci_map_page(adapter->pdev,
3083 buffer_info->time_stamp = jiffies;
3084 buffer_info->next_to_watch = i;
3089 if (unlikely(++i == tx_ring->count)) i = 0;
3093 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3094 tx_ring->buffer_info[i].skb = skb;
3095 tx_ring->buffer_info[first].next_to_watch = i;
3101 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3102 int tx_flags, int count)
3104 struct e1000_tx_desc *tx_desc = NULL;
3105 struct e1000_buffer *buffer_info;
3106 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3109 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3110 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3112 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3114 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3115 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3118 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3119 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3120 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3123 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3124 txd_lower |= E1000_TXD_CMD_VLE;
3125 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3128 i = tx_ring->next_to_use;
3131 buffer_info = &tx_ring->buffer_info[i];
3132 tx_desc = E1000_TX_DESC(*tx_ring, i);
3133 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3134 tx_desc->lower.data =
3135 cpu_to_le32(txd_lower | buffer_info->length);
3136 tx_desc->upper.data = cpu_to_le32(txd_upper);
3137 if (unlikely(++i == tx_ring->count)) i = 0;
3140 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3142 /* Force memory writes to complete before letting h/w
3143 * know there are new descriptors to fetch. (Only
3144 * applicable for weak-ordered memory model archs,
3145 * such as IA-64). */
3148 tx_ring->next_to_use = i;
3149 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3150 /* we need this if more than one processor can write to our tail
3151 * at a time, it syncronizes IO on IA64/Altix systems */
3156 * 82547 workaround to avoid controller hang in half-duplex environment.
3157 * The workaround is to avoid queuing a large packet that would span
3158 * the internal Tx FIFO ring boundary by notifying the stack to resend
3159 * the packet at a later time. This gives the Tx FIFO an opportunity to
3160 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3161 * to the beginning of the Tx FIFO.
3164 #define E1000_FIFO_HDR 0x10
3165 #define E1000_82547_PAD_LEN 0x3E0
3168 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3170 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3171 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3173 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3175 if (adapter->link_duplex != HALF_DUPLEX)
3176 goto no_fifo_stall_required;
3178 if (atomic_read(&adapter->tx_fifo_stall))
3181 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3182 atomic_set(&adapter->tx_fifo_stall, 1);
3186 no_fifo_stall_required:
3187 adapter->tx_fifo_head += skb_fifo_len;
3188 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3189 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3193 #define MINIMUM_DHCP_PACKET_SIZE 282
3195 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3197 struct e1000_hw *hw = &adapter->hw;
3198 uint16_t length, offset;
3199 if (vlan_tx_tag_present(skb)) {
3200 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3201 ( adapter->hw.mng_cookie.status &
3202 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3205 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3206 struct ethhdr *eth = (struct ethhdr *) skb->data;
3207 if ((htons(ETH_P_IP) == eth->h_proto)) {
3208 const struct iphdr *ip =
3209 (struct iphdr *)((uint8_t *)skb->data+14);
3210 if (IPPROTO_UDP == ip->protocol) {
3211 struct udphdr *udp =
3212 (struct udphdr *)((uint8_t *)ip +
3214 if (ntohs(udp->dest) == 67) {
3215 offset = (uint8_t *)udp + 8 - skb->data;
3216 length = skb->len - offset;
3218 return e1000_mng_write_dhcp_info(hw,
3228 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3230 struct e1000_adapter *adapter = netdev_priv(netdev);
3231 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3233 netif_stop_queue(netdev);
3234 /* Herbert's original patch had:
3235 * smp_mb__after_netif_stop_queue();
3236 * but since that doesn't exist yet, just open code it. */
3239 /* We need to check again in a case another CPU has just
3240 * made room available. */
3241 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3245 netif_start_queue(netdev);
3246 ++adapter->restart_queue;
3250 static int e1000_maybe_stop_tx(struct net_device *netdev,
3251 struct e1000_tx_ring *tx_ring, int size)
3253 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3255 return __e1000_maybe_stop_tx(netdev, size);
3258 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3260 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3262 struct e1000_adapter *adapter = netdev_priv(netdev);
3263 struct e1000_tx_ring *tx_ring;
3264 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3265 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3266 unsigned int tx_flags = 0;
3267 unsigned int len = skb->len;
3268 unsigned long flags;
3269 unsigned int nr_frags = 0;
3270 unsigned int mss = 0;
3274 len -= skb->data_len;
3276 /* This goes back to the question of how to logically map a tx queue
3277 * to a flow. Right now, performance is impacted slightly negatively
3278 * if using multiple tx queues. If the stack breaks away from a
3279 * single qdisc implementation, we can look at this again. */
3280 tx_ring = adapter->tx_ring;
3282 if (unlikely(skb->len <= 0)) {
3283 dev_kfree_skb_any(skb);
3284 return NETDEV_TX_OK;
3287 /* 82571 and newer doesn't need the workaround that limited descriptor
3289 if (adapter->hw.mac_type >= e1000_82571)
3292 mss = skb_shinfo(skb)->gso_size;
3293 /* The controller does a simple calculation to
3294 * make sure there is enough room in the FIFO before
3295 * initiating the DMA for each buffer. The calc is:
3296 * 4 = ceil(buffer len/mss). To make sure we don't
3297 * overrun the FIFO, adjust the max buffer len if mss
3301 max_per_txd = min(mss << 2, max_per_txd);
3302 max_txd_pwr = fls(max_per_txd) - 1;
3304 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3305 * points to just header, pull a few bytes of payload from
3306 * frags into skb->data */
3307 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3308 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3309 switch (adapter->hw.mac_type) {
3310 unsigned int pull_size;
3312 /* Make sure we have room to chop off 4 bytes,
3313 * and that the end alignment will work out to
3314 * this hardware's requirements
3315 * NOTE: this is a TSO only workaround
3316 * if end byte alignment not correct move us
3317 * into the next dword */
3318 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3325 pull_size = min((unsigned int)4, skb->data_len);
3326 if (!__pskb_pull_tail(skb, pull_size)) {
3328 "__pskb_pull_tail failed.\n");
3329 dev_kfree_skb_any(skb);
3330 return NETDEV_TX_OK;
3332 len = skb->len - skb->data_len;
3341 /* reserve a descriptor for the offload context */
3342 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3346 /* Controller Erratum workaround */
3347 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3350 count += TXD_USE_COUNT(len, max_txd_pwr);
3352 if (adapter->pcix_82544)
3355 /* work-around for errata 10 and it applies to all controllers
3356 * in PCI-X mode, so add one more descriptor to the count
3358 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3362 nr_frags = skb_shinfo(skb)->nr_frags;
3363 for (f = 0; f < nr_frags; f++)
3364 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3366 if (adapter->pcix_82544)
3370 if (adapter->hw.tx_pkt_filtering &&
3371 (adapter->hw.mac_type == e1000_82573))
3372 e1000_transfer_dhcp_info(adapter, skb);
3374 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3375 /* Collision - tell upper layer to requeue */
3376 return NETDEV_TX_LOCKED;
3378 /* need: count + 2 desc gap to keep tail from touching
3379 * head, otherwise try next time */
3380 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3381 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3382 return NETDEV_TX_BUSY;
3385 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3386 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3387 netif_stop_queue(netdev);
3388 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3389 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3390 return NETDEV_TX_BUSY;
3394 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3395 tx_flags |= E1000_TX_FLAGS_VLAN;
3396 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3399 first = tx_ring->next_to_use;
3401 tso = e1000_tso(adapter, tx_ring, skb);
3403 dev_kfree_skb_any(skb);
3404 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3405 return NETDEV_TX_OK;
3409 tx_ring->last_tx_tso = 1;
3410 tx_flags |= E1000_TX_FLAGS_TSO;
3411 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3412 tx_flags |= E1000_TX_FLAGS_CSUM;
3414 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3415 * 82571 hardware supports TSO capabilities for IPv6 as well...
3416 * no longer assume, we must. */
3417 if (likely(skb->protocol == htons(ETH_P_IP)))
3418 tx_flags |= E1000_TX_FLAGS_IPV4;
3420 e1000_tx_queue(adapter, tx_ring, tx_flags,
3421 e1000_tx_map(adapter, tx_ring, skb, first,
3422 max_per_txd, nr_frags, mss));
3424 netdev->trans_start = jiffies;
3426 /* Make sure there is space in the ring for the next send. */
3427 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3429 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3430 return NETDEV_TX_OK;
3434 * e1000_tx_timeout - Respond to a Tx Hang
3435 * @netdev: network interface device structure
3439 e1000_tx_timeout(struct net_device *netdev)
3441 struct e1000_adapter *adapter = netdev_priv(netdev);
3443 /* Do the reset outside of interrupt context */
3444 adapter->tx_timeout_count++;
3445 schedule_work(&adapter->reset_task);
3449 e1000_reset_task(struct work_struct *work)
3451 struct e1000_adapter *adapter =
3452 container_of(work, struct e1000_adapter, reset_task);
3454 e1000_reinit_locked(adapter);
3458 * e1000_get_stats - Get System Network Statistics
3459 * @netdev: network interface device structure
3461 * Returns the address of the device statistics structure.
3462 * The statistics are actually updated from the timer callback.
3465 static struct net_device_stats *
3466 e1000_get_stats(struct net_device *netdev)
3468 struct e1000_adapter *adapter = netdev_priv(netdev);
3470 /* only return the current stats */
3471 return &adapter->net_stats;
3475 * e1000_change_mtu - Change the Maximum Transfer Unit
3476 * @netdev: network interface device structure
3477 * @new_mtu: new value for maximum frame size
3479 * Returns 0 on success, negative on failure
3483 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3485 struct e1000_adapter *adapter = netdev_priv(netdev);
3486 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3487 uint16_t eeprom_data = 0;
3489 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3490 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3491 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3495 /* Adapter-specific max frame size limits. */
3496 switch (adapter->hw.mac_type) {
3497 case e1000_undefined ... e1000_82542_rev2_1:
3499 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3500 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3505 /* Jumbo Frames not supported if:
3506 * - this is not an 82573L device
3507 * - ASPM is enabled in any way (0x1A bits 3:2) */
3508 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3510 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3511 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3512 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3514 "Jumbo Frames not supported.\n");
3519 /* ERT will be enabled later to enable wire speed receives */
3521 /* fall through to get support */
3524 case e1000_80003es2lan:
3525 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3526 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3527 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3532 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3536 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3537 * means we reserve 2 more, this pushes us to allocate from the next
3539 * i.e. RXBUFFER_2048 --> size-4096 slab */
3541 if (max_frame <= E1000_RXBUFFER_256)
3542 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3543 else if (max_frame <= E1000_RXBUFFER_512)
3544 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3545 else if (max_frame <= E1000_RXBUFFER_1024)
3546 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3547 else if (max_frame <= E1000_RXBUFFER_2048)
3548 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3549 else if (max_frame <= E1000_RXBUFFER_4096)
3550 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3551 else if (max_frame <= E1000_RXBUFFER_8192)
3552 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3553 else if (max_frame <= E1000_RXBUFFER_16384)
3554 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3556 /* adjust allocation if LPE protects us, and we aren't using SBP */
3557 if (!adapter->hw.tbi_compatibility_on &&
3558 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3559 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3560 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3562 netdev->mtu = new_mtu;
3563 adapter->hw.max_frame_size = max_frame;
3565 if (netif_running(netdev))
3566 e1000_reinit_locked(adapter);
3572 * e1000_update_stats - Update the board statistics counters
3573 * @adapter: board private structure
3577 e1000_update_stats(struct e1000_adapter *adapter)
3579 struct e1000_hw *hw = &adapter->hw;
3580 struct pci_dev *pdev = adapter->pdev;
3581 unsigned long flags;
3584 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3587 * Prevent stats update while adapter is being reset, or if the pci
3588 * connection is down.
3590 if (adapter->link_speed == 0)
3592 if (pci_channel_offline(pdev))
3595 spin_lock_irqsave(&adapter->stats_lock, flags);
3597 /* these counters are modified from e1000_adjust_tbi_stats,
3598 * called from the interrupt context, so they must only
3599 * be written while holding adapter->stats_lock
3602 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3603 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3604 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3605 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3606 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3607 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3608 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3610 if (adapter->hw.mac_type != e1000_ich8lan) {
3611 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3612 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3613 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3614 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3615 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3616 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3619 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3620 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3621 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3622 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3623 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3624 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3625 adapter->stats.dc += E1000_READ_REG(hw, DC);
3626 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3627 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3628 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3629 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3630 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3631 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3632 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3633 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3634 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3635 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3636 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3637 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3638 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3639 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3640 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3641 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3642 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3643 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3644 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3646 if (adapter->hw.mac_type != e1000_ich8lan) {
3647 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3648 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3649 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3650 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3651 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3652 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3655 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3656 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3658 /* used for adaptive IFS */
3660 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3661 adapter->stats.tpt += hw->tx_packet_delta;
3662 hw->collision_delta = E1000_READ_REG(hw, COLC);
3663 adapter->stats.colc += hw->collision_delta;
3665 if (hw->mac_type >= e1000_82543) {
3666 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3667 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3668 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3669 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3670 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3671 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3673 if (hw->mac_type > e1000_82547_rev_2) {
3674 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3675 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3677 if (adapter->hw.mac_type != e1000_ich8lan) {
3678 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3679 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3680 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3681 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3682 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3683 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3684 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3688 /* Fill out the OS statistics structure */
3689 adapter->net_stats.rx_packets = adapter->stats.gprc;
3690 adapter->net_stats.tx_packets = adapter->stats.gptc;
3691 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3692 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3693 adapter->net_stats.multicast = adapter->stats.mprc;
3694 adapter->net_stats.collisions = adapter->stats.colc;
3698 /* RLEC on some newer hardware can be incorrect so build
3699 * our own version based on RUC and ROC */
3700 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3701 adapter->stats.crcerrs + adapter->stats.algnerrc +
3702 adapter->stats.ruc + adapter->stats.roc +
3703 adapter->stats.cexterr;
3704 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3705 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3706 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3707 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3708 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3711 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3712 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3713 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3714 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3715 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3716 if (adapter->hw.bad_tx_carr_stats_fd &&
3717 adapter->link_duplex == FULL_DUPLEX) {
3718 adapter->net_stats.tx_carrier_errors = 0;
3719 adapter->stats.tncrs = 0;
3722 /* Tx Dropped needs to be maintained elsewhere */
3725 if (hw->media_type == e1000_media_type_copper) {
3726 if ((adapter->link_speed == SPEED_1000) &&
3727 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3728 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3729 adapter->phy_stats.idle_errors += phy_tmp;
3732 if ((hw->mac_type <= e1000_82546) &&
3733 (hw->phy_type == e1000_phy_m88) &&
3734 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3735 adapter->phy_stats.receive_errors += phy_tmp;
3738 /* Management Stats */
3739 if (adapter->hw.has_smbus) {
3740 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3741 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3742 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3745 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3749 * e1000_intr_msi - Interrupt Handler
3750 * @irq: interrupt number
3751 * @data: pointer to a network interface device structure
3755 e1000_intr_msi(int irq, void *data)
3757 struct net_device *netdev = data;
3758 struct e1000_adapter *adapter = netdev_priv(netdev);
3759 struct e1000_hw *hw = &adapter->hw;
3760 #ifndef CONFIG_E1000_NAPI
3763 uint32_t icr = E1000_READ_REG(hw, ICR);
3765 #ifdef CONFIG_E1000_NAPI
3766 /* read ICR disables interrupts using IAM, so keep up with our
3767 * enable/disable accounting */
3768 atomic_inc(&adapter->irq_sem);
3770 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3771 hw->get_link_status = 1;
3772 /* 80003ES2LAN workaround-- For packet buffer work-around on
3773 * link down event; disable receives here in the ISR and reset
3774 * adapter in watchdog */
3775 if (netif_carrier_ok(netdev) &&
3776 (adapter->hw.mac_type == e1000_80003es2lan)) {
3777 /* disable receives */
3778 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3779 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3781 /* guard against interrupt when we're going down */
3782 if (!test_bit(__E1000_DOWN, &adapter->flags))
3783 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3786 #ifdef CONFIG_E1000_NAPI
3787 if (likely(netif_rx_schedule_prep(netdev))) {
3788 adapter->total_tx_bytes = 0;
3789 adapter->total_tx_packets = 0;
3790 adapter->total_rx_bytes = 0;
3791 adapter->total_rx_packets = 0;
3792 __netif_rx_schedule(netdev);
3794 e1000_irq_enable(adapter);
3796 adapter->total_tx_bytes = 0;
3797 adapter->total_rx_bytes = 0;
3798 adapter->total_tx_packets = 0;
3799 adapter->total_rx_packets = 0;
3801 for (i = 0; i < E1000_MAX_INTR; i++)
3802 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3803 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3806 if (likely(adapter->itr_setting & 3))
3807 e1000_set_itr(adapter);
3814 * e1000_intr - Interrupt Handler
3815 * @irq: interrupt number
3816 * @data: pointer to a network interface device structure
3820 e1000_intr(int irq, void *data)
3822 struct net_device *netdev = data;
3823 struct e1000_adapter *adapter = netdev_priv(netdev);
3824 struct e1000_hw *hw = &adapter->hw;
3825 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3826 #ifndef CONFIG_E1000_NAPI
3830 return IRQ_NONE; /* Not our interrupt */
3832 #ifdef CONFIG_E1000_NAPI
3833 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3834 * not set, then the adapter didn't send an interrupt */
3835 if (unlikely(hw->mac_type >= e1000_82571 &&
3836 !(icr & E1000_ICR_INT_ASSERTED)))
3839 /* Interrupt Auto-Mask...upon reading ICR,
3840 * interrupts are masked. No need for the
3841 * IMC write, but it does mean we should
3842 * account for it ASAP. */
3843 if (likely(hw->mac_type >= e1000_82571))
3844 atomic_inc(&adapter->irq_sem);
3847 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3848 hw->get_link_status = 1;
3849 /* 80003ES2LAN workaround--
3850 * For packet buffer work-around on link down event;
3851 * disable receives here in the ISR and
3852 * reset adapter in watchdog
3854 if (netif_carrier_ok(netdev) &&
3855 (adapter->hw.mac_type == e1000_80003es2lan)) {
3856 /* disable receives */
3857 rctl = E1000_READ_REG(hw, RCTL);
3858 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3860 /* guard against interrupt when we're going down */
3861 if (!test_bit(__E1000_DOWN, &adapter->flags))
3862 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3865 #ifdef CONFIG_E1000_NAPI
3866 if (unlikely(hw->mac_type < e1000_82571)) {
3867 /* disable interrupts, without the synchronize_irq bit */
3868 atomic_inc(&adapter->irq_sem);
3869 E1000_WRITE_REG(hw, IMC, ~0);
3870 E1000_WRITE_FLUSH(hw);
3872 if (likely(netif_rx_schedule_prep(netdev))) {
3873 adapter->total_tx_bytes = 0;
3874 adapter->total_tx_packets = 0;
3875 adapter->total_rx_bytes = 0;
3876 adapter->total_rx_packets = 0;
3877 __netif_rx_schedule(netdev);
3879 /* this really should not happen! if it does it is basically a
3880 * bug, but not a hard error, so enable ints and continue */
3881 e1000_irq_enable(adapter);
3883 /* Writing IMC and IMS is needed for 82547.
3884 * Due to Hub Link bus being occupied, an interrupt
3885 * de-assertion message is not able to be sent.
3886 * When an interrupt assertion message is generated later,
3887 * two messages are re-ordered and sent out.
3888 * That causes APIC to think 82547 is in de-assertion
3889 * state, while 82547 is in assertion state, resulting
3890 * in dead lock. Writing IMC forces 82547 into
3891 * de-assertion state.
3893 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3894 atomic_inc(&adapter->irq_sem);
3895 E1000_WRITE_REG(hw, IMC, ~0);
3898 adapter->total_tx_bytes = 0;
3899 adapter->total_rx_bytes = 0;
3900 adapter->total_tx_packets = 0;
3901 adapter->total_rx_packets = 0;
3903 for (i = 0; i < E1000_MAX_INTR; i++)
3904 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3905 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3908 if (likely(adapter->itr_setting & 3))
3909 e1000_set_itr(adapter);
3911 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3912 e1000_irq_enable(adapter);
3918 #ifdef CONFIG_E1000_NAPI
3920 * e1000_clean - NAPI Rx polling callback
3921 * @adapter: board private structure
3925 e1000_clean(struct net_device *poll_dev, int *budget)
3927 struct e1000_adapter *adapter;
3928 int work_to_do = min(*budget, poll_dev->quota);
3929 int tx_cleaned = 0, work_done = 0;
3931 /* Must NOT use netdev_priv macro here. */
3932 adapter = poll_dev->priv;
3934 /* Keep link state information with original netdev */
3935 if (!netif_carrier_ok(poll_dev))
3938 /* e1000_clean is called per-cpu. This lock protects
3939 * tx_ring[0] from being cleaned by multiple cpus
3940 * simultaneously. A failure obtaining the lock means
3941 * tx_ring[0] is currently being cleaned anyway. */
3942 if (spin_trylock(&adapter->tx_queue_lock)) {
3943 tx_cleaned = e1000_clean_tx_irq(adapter,
3944 &adapter->tx_ring[0]);
3945 spin_unlock(&adapter->tx_queue_lock);
3948 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3949 &work_done, work_to_do);
3951 *budget -= work_done;
3952 poll_dev->quota -= work_done;
3954 /* If no Tx and not enough Rx work done, exit the polling mode */
3955 if ((!tx_cleaned && (work_done == 0)) ||
3956 !netif_running(poll_dev)) {
3958 if (likely(adapter->itr_setting & 3))
3959 e1000_set_itr(adapter);
3960 netif_rx_complete(poll_dev);
3961 e1000_irq_enable(adapter);
3970 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3971 * @adapter: board private structure
3975 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3976 struct e1000_tx_ring *tx_ring)
3978 struct net_device *netdev = adapter->netdev;
3979 struct e1000_tx_desc *tx_desc, *eop_desc;
3980 struct e1000_buffer *buffer_info;
3981 unsigned int i, eop;
3982 #ifdef CONFIG_E1000_NAPI
3983 unsigned int count = 0;
3985 boolean_t cleaned = FALSE;
3986 unsigned int total_tx_bytes=0, total_tx_packets=0;
3988 i = tx_ring->next_to_clean;
3989 eop = tx_ring->buffer_info[i].next_to_watch;
3990 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3992 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3993 for (cleaned = FALSE; !cleaned; ) {
3994 tx_desc = E1000_TX_DESC(*tx_ring, i);
3995 buffer_info = &tx_ring->buffer_info[i];
3996 cleaned = (i == eop);
3999 struct sk_buff *skb = buffer_info->skb;
4000 unsigned int segs, bytecount;
4001 segs = skb_shinfo(skb)->gso_segs ?: 1;
4002 /* multiply data chunks by size of headers */
4003 bytecount = ((segs - 1) * skb_headlen(skb)) +
4005 total_tx_packets += segs;
4006 total_tx_bytes += bytecount;
4008 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
4009 tx_desc->upper.data = 0;
4011 if (unlikely(++i == tx_ring->count)) i = 0;
4014 eop = tx_ring->buffer_info[i].next_to_watch;
4015 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4016 #ifdef CONFIG_E1000_NAPI
4017 #define E1000_TX_WEIGHT 64
4018 /* weight of a sort for tx, to avoid endless transmit cleanup */
4019 if (count++ == E1000_TX_WEIGHT) break;
4023 tx_ring->next_to_clean = i;
4025 #define TX_WAKE_THRESHOLD 32
4026 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4027 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4028 /* Make sure that anybody stopping the queue after this
4029 * sees the new next_to_clean.
4032 if (netif_queue_stopped(netdev)) {
4033 netif_wake_queue(netdev);
4034 ++adapter->restart_queue;
4038 if (adapter->detect_tx_hung) {
4039 /* Detect a transmit hang in hardware, this serializes the
4040 * check with the clearing of time_stamp and movement of i */
4041 adapter->detect_tx_hung = FALSE;
4042 if (tx_ring->buffer_info[eop].dma &&
4043 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4044 (adapter->tx_timeout_factor * HZ))
4045 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4046 E1000_STATUS_TXOFF)) {
4048 /* detected Tx unit hang */
4049 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4053 " next_to_use <%x>\n"
4054 " next_to_clean <%x>\n"
4055 "buffer_info[next_to_clean]\n"
4056 " time_stamp <%lx>\n"
4057 " next_to_watch <%x>\n"
4059 " next_to_watch.status <%x>\n",
4060 (unsigned long)((tx_ring - adapter->tx_ring) /
4061 sizeof(struct e1000_tx_ring)),
4062 readl(adapter->hw.hw_addr + tx_ring->tdh),
4063 readl(adapter->hw.hw_addr + tx_ring->tdt),
4064 tx_ring->next_to_use,
4065 tx_ring->next_to_clean,
4066 tx_ring->buffer_info[eop].time_stamp,
4069 eop_desc->upper.fields.status);
4070 netif_stop_queue(netdev);
4073 adapter->total_tx_bytes += total_tx_bytes;
4074 adapter->total_tx_packets += total_tx_packets;
4079 * e1000_rx_checksum - Receive Checksum Offload for 82543
4080 * @adapter: board private structure
4081 * @status_err: receive descriptor status and error fields
4082 * @csum: receive descriptor csum field
4083 * @sk_buff: socket buffer with received data
4087 e1000_rx_checksum(struct e1000_adapter *adapter,
4088 uint32_t status_err, uint32_t csum,
4089 struct sk_buff *skb)
4091 uint16_t status = (uint16_t)status_err;
4092 uint8_t errors = (uint8_t)(status_err >> 24);
4093 skb->ip_summed = CHECKSUM_NONE;
4095 /* 82543 or newer only */
4096 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4097 /* Ignore Checksum bit is set */
4098 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4099 /* TCP/UDP checksum error bit is set */
4100 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4101 /* let the stack verify checksum errors */
4102 adapter->hw_csum_err++;
4105 /* TCP/UDP Checksum has not been calculated */
4106 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4107 if (!(status & E1000_RXD_STAT_TCPCS))
4110 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4113 /* It must be a TCP or UDP packet with a valid checksum */
4114 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4115 /* TCP checksum is good */
4116 skb->ip_summed = CHECKSUM_UNNECESSARY;
4117 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4118 /* IP fragment with UDP payload */
4119 /* Hardware complements the payload checksum, so we undo it
4120 * and then put the value in host order for further stack use.
4122 csum = ntohl(csum ^ 0xFFFF);
4124 skb->ip_summed = CHECKSUM_COMPLETE;
4126 adapter->hw_csum_good++;
4130 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4131 * @adapter: board private structure
4135 #ifdef CONFIG_E1000_NAPI
4136 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4137 struct e1000_rx_ring *rx_ring,
4138 int *work_done, int work_to_do)
4140 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4141 struct e1000_rx_ring *rx_ring)
4144 struct net_device *netdev = adapter->netdev;
4145 struct pci_dev *pdev = adapter->pdev;
4146 struct e1000_rx_desc *rx_desc, *next_rxd;
4147 struct e1000_buffer *buffer_info, *next_buffer;
4148 unsigned long flags;
4152 int cleaned_count = 0;
4153 boolean_t cleaned = FALSE;
4154 unsigned int total_rx_bytes=0, total_rx_packets=0;
4156 i = rx_ring->next_to_clean;
4157 rx_desc = E1000_RX_DESC(*rx_ring, i);
4158 buffer_info = &rx_ring->buffer_info[i];
4160 while (rx_desc->status & E1000_RXD_STAT_DD) {
4161 struct sk_buff *skb;
4164 #ifdef CONFIG_E1000_NAPI
4165 if (*work_done >= work_to_do)
4169 status = rx_desc->status;
4170 skb = buffer_info->skb;
4171 buffer_info->skb = NULL;
4173 prefetch(skb->data - NET_IP_ALIGN);
4175 if (++i == rx_ring->count) i = 0;
4176 next_rxd = E1000_RX_DESC(*rx_ring, i);
4179 next_buffer = &rx_ring->buffer_info[i];
4183 pci_unmap_single(pdev,
4185 buffer_info->length,
4186 PCI_DMA_FROMDEVICE);
4188 length = le16_to_cpu(rx_desc->length);
4190 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4191 /* All receives must fit into a single buffer */
4192 E1000_DBG("%s: Receive packet consumed multiple"
4193 " buffers\n", netdev->name);
4195 buffer_info->skb = skb;
4199 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4200 last_byte = *(skb->data + length - 1);
4201 if (TBI_ACCEPT(&adapter->hw, status,
4202 rx_desc->errors, length, last_byte)) {
4203 spin_lock_irqsave(&adapter->stats_lock, flags);
4204 e1000_tbi_adjust_stats(&adapter->hw,
4207 spin_unlock_irqrestore(&adapter->stats_lock,
4212 buffer_info->skb = skb;
4217 /* adjust length to remove Ethernet CRC, this must be
4218 * done after the TBI_ACCEPT workaround above */
4221 /* probably a little skewed due to removing CRC */
4222 total_rx_bytes += length;
4225 /* code added for copybreak, this should improve
4226 * performance for small packets with large amounts
4227 * of reassembly being done in the stack */
4228 if (length < copybreak) {
4229 struct sk_buff *new_skb =
4230 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4232 skb_reserve(new_skb, NET_IP_ALIGN);
4233 skb_copy_to_linear_data_offset(new_skb,
4239 /* save the skb in buffer_info as good */
4240 buffer_info->skb = skb;
4243 /* else just continue with the old one */
4245 /* end copybreak code */
4246 skb_put(skb, length);
4248 /* Receive Checksum Offload */
4249 e1000_rx_checksum(adapter,
4250 (uint32_t)(status) |
4251 ((uint32_t)(rx_desc->errors) << 24),
4252 le16_to_cpu(rx_desc->csum), skb);
4254 skb->protocol = eth_type_trans(skb, netdev);
4255 #ifdef CONFIG_E1000_NAPI
4256 if (unlikely(adapter->vlgrp &&
4257 (status & E1000_RXD_STAT_VP))) {
4258 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4259 le16_to_cpu(rx_desc->special) &
4260 E1000_RXD_SPC_VLAN_MASK);
4262 netif_receive_skb(skb);
4264 #else /* CONFIG_E1000_NAPI */
4265 if (unlikely(adapter->vlgrp &&
4266 (status & E1000_RXD_STAT_VP))) {
4267 vlan_hwaccel_rx(skb, adapter->vlgrp,
4268 le16_to_cpu(rx_desc->special) &
4269 E1000_RXD_SPC_VLAN_MASK);
4273 #endif /* CONFIG_E1000_NAPI */
4274 netdev->last_rx = jiffies;
4277 rx_desc->status = 0;
4279 /* return some buffers to hardware, one at a time is too slow */
4280 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4281 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4285 /* use prefetched values */
4287 buffer_info = next_buffer;
4289 rx_ring->next_to_clean = i;
4291 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4293 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4295 adapter->total_rx_packets += total_rx_packets;
4296 adapter->total_rx_bytes += total_rx_bytes;
4301 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4302 * @adapter: board private structure
4306 #ifdef CONFIG_E1000_NAPI
4307 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4308 struct e1000_rx_ring *rx_ring,
4309 int *work_done, int work_to_do)
4311 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4312 struct e1000_rx_ring *rx_ring)
4315 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4316 struct net_device *netdev = adapter->netdev;
4317 struct pci_dev *pdev = adapter->pdev;
4318 struct e1000_buffer *buffer_info, *next_buffer;
4319 struct e1000_ps_page *ps_page;
4320 struct e1000_ps_page_dma *ps_page_dma;
4321 struct sk_buff *skb;
4323 uint32_t length, staterr;
4324 int cleaned_count = 0;
4325 boolean_t cleaned = FALSE;
4326 unsigned int total_rx_bytes=0, total_rx_packets=0;
4328 i = rx_ring->next_to_clean;
4329 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4330 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4331 buffer_info = &rx_ring->buffer_info[i];
4333 while (staterr & E1000_RXD_STAT_DD) {
4334 ps_page = &rx_ring->ps_page[i];
4335 ps_page_dma = &rx_ring->ps_page_dma[i];
4336 #ifdef CONFIG_E1000_NAPI
4337 if (unlikely(*work_done >= work_to_do))
4341 skb = buffer_info->skb;
4343 /* in the packet split case this is header only */
4344 prefetch(skb->data - NET_IP_ALIGN);
4346 if (++i == rx_ring->count) i = 0;
4347 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4350 next_buffer = &rx_ring->buffer_info[i];
4354 pci_unmap_single(pdev, buffer_info->dma,
4355 buffer_info->length,
4356 PCI_DMA_FROMDEVICE);
4358 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4359 E1000_DBG("%s: Packet Split buffers didn't pick up"
4360 " the full packet\n", netdev->name);
4361 dev_kfree_skb_irq(skb);
4365 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4366 dev_kfree_skb_irq(skb);
4370 length = le16_to_cpu(rx_desc->wb.middle.length0);
4372 if (unlikely(!length)) {
4373 E1000_DBG("%s: Last part of the packet spanning"
4374 " multiple descriptors\n", netdev->name);
4375 dev_kfree_skb_irq(skb);
4380 skb_put(skb, length);
4383 /* this looks ugly, but it seems compiler issues make it
4384 more efficient than reusing j */
4385 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4387 /* page alloc/put takes too long and effects small packet
4388 * throughput, so unsplit small packets and save the alloc/put*/
4389 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4391 /* there is no documentation about how to call
4392 * kmap_atomic, so we can't hold the mapping
4394 pci_dma_sync_single_for_cpu(pdev,
4395 ps_page_dma->ps_page_dma[0],
4397 PCI_DMA_FROMDEVICE);
4398 vaddr = kmap_atomic(ps_page->ps_page[0],
4399 KM_SKB_DATA_SOFTIRQ);
4400 memcpy(skb_tail_pointer(skb), vaddr, l1);
4401 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4402 pci_dma_sync_single_for_device(pdev,
4403 ps_page_dma->ps_page_dma[0],
4404 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4405 /* remove the CRC */
4412 for (j = 0; j < adapter->rx_ps_pages; j++) {
4413 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4415 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4416 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4417 ps_page_dma->ps_page_dma[j] = 0;
4418 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4420 ps_page->ps_page[j] = NULL;
4422 skb->data_len += length;
4423 skb->truesize += length;
4426 /* strip the ethernet crc, problem is we're using pages now so
4427 * this whole operation can get a little cpu intensive */
4428 pskb_trim(skb, skb->len - 4);
4431 total_rx_bytes += skb->len;
4434 e1000_rx_checksum(adapter, staterr,
4435 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4436 skb->protocol = eth_type_trans(skb, netdev);
4438 if (likely(rx_desc->wb.upper.header_status &
4439 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4440 adapter->rx_hdr_split++;
4441 #ifdef CONFIG_E1000_NAPI
4442 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4443 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4444 le16_to_cpu(rx_desc->wb.middle.vlan) &
4445 E1000_RXD_SPC_VLAN_MASK);
4447 netif_receive_skb(skb);
4449 #else /* CONFIG_E1000_NAPI */
4450 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4451 vlan_hwaccel_rx(skb, adapter->vlgrp,
4452 le16_to_cpu(rx_desc->wb.middle.vlan) &
4453 E1000_RXD_SPC_VLAN_MASK);
4457 #endif /* CONFIG_E1000_NAPI */
4458 netdev->last_rx = jiffies;
4461 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4462 buffer_info->skb = NULL;
4464 /* return some buffers to hardware, one at a time is too slow */
4465 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4466 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4470 /* use prefetched values */
4472 buffer_info = next_buffer;
4474 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4476 rx_ring->next_to_clean = i;
4478 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4480 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4482 adapter->total_rx_packets += total_rx_packets;
4483 adapter->total_rx_bytes += total_rx_bytes;
4488 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4489 * @adapter: address of board private structure
4493 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4494 struct e1000_rx_ring *rx_ring,
4497 struct net_device *netdev = adapter->netdev;
4498 struct pci_dev *pdev = adapter->pdev;
4499 struct e1000_rx_desc *rx_desc;
4500 struct e1000_buffer *buffer_info;
4501 struct sk_buff *skb;
4503 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4505 i = rx_ring->next_to_use;
4506 buffer_info = &rx_ring->buffer_info[i];
4508 while (cleaned_count--) {
4509 skb = buffer_info->skb;
4515 skb = netdev_alloc_skb(netdev, bufsz);
4516 if (unlikely(!skb)) {
4517 /* Better luck next round */
4518 adapter->alloc_rx_buff_failed++;
4522 /* Fix for errata 23, can't cross 64kB boundary */
4523 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4524 struct sk_buff *oldskb = skb;
4525 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4526 "at %p\n", bufsz, skb->data);
4527 /* Try again, without freeing the previous */
4528 skb = netdev_alloc_skb(netdev, bufsz);
4529 /* Failed allocation, critical failure */
4531 dev_kfree_skb(oldskb);
4535 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4538 dev_kfree_skb(oldskb);
4539 break; /* while !buffer_info->skb */
4542 /* Use new allocation */
4543 dev_kfree_skb(oldskb);
4545 /* Make buffer alignment 2 beyond a 16 byte boundary
4546 * this will result in a 16 byte aligned IP header after
4547 * the 14 byte MAC header is removed
4549 skb_reserve(skb, NET_IP_ALIGN);
4551 buffer_info->skb = skb;
4552 buffer_info->length = adapter->rx_buffer_len;
4554 buffer_info->dma = pci_map_single(pdev,
4556 adapter->rx_buffer_len,
4557 PCI_DMA_FROMDEVICE);
4559 /* Fix for errata 23, can't cross 64kB boundary */
4560 if (!e1000_check_64k_bound(adapter,
4561 (void *)(unsigned long)buffer_info->dma,
4562 adapter->rx_buffer_len)) {
4563 DPRINTK(RX_ERR, ERR,
4564 "dma align check failed: %u bytes at %p\n",
4565 adapter->rx_buffer_len,
4566 (void *)(unsigned long)buffer_info->dma);
4568 buffer_info->skb = NULL;
4570 pci_unmap_single(pdev, buffer_info->dma,
4571 adapter->rx_buffer_len,
4572 PCI_DMA_FROMDEVICE);
4574 break; /* while !buffer_info->skb */
4576 rx_desc = E1000_RX_DESC(*rx_ring, i);
4577 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4579 if (unlikely(++i == rx_ring->count))
4581 buffer_info = &rx_ring->buffer_info[i];
4584 if (likely(rx_ring->next_to_use != i)) {
4585 rx_ring->next_to_use = i;
4586 if (unlikely(i-- == 0))
4587 i = (rx_ring->count - 1);
4589 /* Force memory writes to complete before letting h/w
4590 * know there are new descriptors to fetch. (Only
4591 * applicable for weak-ordered memory model archs,
4592 * such as IA-64). */
4594 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4599 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4600 * @adapter: address of board private structure
4604 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4605 struct e1000_rx_ring *rx_ring,
4608 struct net_device *netdev = adapter->netdev;
4609 struct pci_dev *pdev = adapter->pdev;
4610 union e1000_rx_desc_packet_split *rx_desc;
4611 struct e1000_buffer *buffer_info;
4612 struct e1000_ps_page *ps_page;
4613 struct e1000_ps_page_dma *ps_page_dma;
4614 struct sk_buff *skb;
4617 i = rx_ring->next_to_use;
4618 buffer_info = &rx_ring->buffer_info[i];
4619 ps_page = &rx_ring->ps_page[i];
4620 ps_page_dma = &rx_ring->ps_page_dma[i];
4622 while (cleaned_count--) {
4623 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4625 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4626 if (j < adapter->rx_ps_pages) {
4627 if (likely(!ps_page->ps_page[j])) {
4628 ps_page->ps_page[j] =
4629 alloc_page(GFP_ATOMIC);
4630 if (unlikely(!ps_page->ps_page[j])) {
4631 adapter->alloc_rx_buff_failed++;
4634 ps_page_dma->ps_page_dma[j] =
4636 ps_page->ps_page[j],
4638 PCI_DMA_FROMDEVICE);
4640 /* Refresh the desc even if buffer_addrs didn't
4641 * change because each write-back erases
4644 rx_desc->read.buffer_addr[j+1] =
4645 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4647 rx_desc->read.buffer_addr[j+1] = ~0;
4650 skb = netdev_alloc_skb(netdev,
4651 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4653 if (unlikely(!skb)) {
4654 adapter->alloc_rx_buff_failed++;
4658 /* Make buffer alignment 2 beyond a 16 byte boundary
4659 * this will result in a 16 byte aligned IP header after
4660 * the 14 byte MAC header is removed
4662 skb_reserve(skb, NET_IP_ALIGN);
4664 buffer_info->skb = skb;
4665 buffer_info->length = adapter->rx_ps_bsize0;
4666 buffer_info->dma = pci_map_single(pdev, skb->data,
4667 adapter->rx_ps_bsize0,
4668 PCI_DMA_FROMDEVICE);
4670 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4672 if (unlikely(++i == rx_ring->count)) i = 0;
4673 buffer_info = &rx_ring->buffer_info[i];
4674 ps_page = &rx_ring->ps_page[i];
4675 ps_page_dma = &rx_ring->ps_page_dma[i];
4679 if (likely(rx_ring->next_to_use != i)) {
4680 rx_ring->next_to_use = i;
4681 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4683 /* Force memory writes to complete before letting h/w
4684 * know there are new descriptors to fetch. (Only
4685 * applicable for weak-ordered memory model archs,
4686 * such as IA-64). */
4688 /* Hardware increments by 16 bytes, but packet split
4689 * descriptors are 32 bytes...so we increment tail
4692 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4697 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4702 e1000_smartspeed(struct e1000_adapter *adapter)
4704 uint16_t phy_status;
4707 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4708 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4711 if (adapter->smartspeed == 0) {
4712 /* If Master/Slave config fault is asserted twice,
4713 * we assume back-to-back */
4714 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4715 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4716 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4717 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4718 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4719 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4720 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4721 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4723 adapter->smartspeed++;
4724 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4725 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4727 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4728 MII_CR_RESTART_AUTO_NEG);
4729 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4734 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4735 /* If still no link, perhaps using 2/3 pair cable */
4736 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4737 phy_ctrl |= CR_1000T_MS_ENABLE;
4738 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4739 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4740 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4741 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4742 MII_CR_RESTART_AUTO_NEG);
4743 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4746 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4747 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4748 adapter->smartspeed = 0;
4759 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4765 return e1000_mii_ioctl(netdev, ifr, cmd);
4779 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4781 struct e1000_adapter *adapter = netdev_priv(netdev);
4782 struct mii_ioctl_data *data = if_mii(ifr);
4786 unsigned long flags;
4788 if (adapter->hw.media_type != e1000_media_type_copper)
4793 data->phy_id = adapter->hw.phy_addr;
4796 if (!capable(CAP_NET_ADMIN))
4798 spin_lock_irqsave(&adapter->stats_lock, flags);
4799 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4801 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4804 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4807 if (!capable(CAP_NET_ADMIN))
4809 if (data->reg_num & ~(0x1F))
4811 mii_reg = data->val_in;
4812 spin_lock_irqsave(&adapter->stats_lock, flags);
4813 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4815 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4818 if (adapter->hw.media_type == e1000_media_type_copper) {
4819 switch (data->reg_num) {
4821 if (mii_reg & MII_CR_POWER_DOWN)
4823 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4824 adapter->hw.autoneg = 1;
4825 adapter->hw.autoneg_advertised = 0x2F;
4828 spddplx = SPEED_1000;
4829 else if (mii_reg & 0x2000)
4830 spddplx = SPEED_100;
4833 spddplx += (mii_reg & 0x100)
4836 retval = e1000_set_spd_dplx(adapter,
4839 spin_unlock_irqrestore(
4840 &adapter->stats_lock,
4845 if (netif_running(adapter->netdev))
4846 e1000_reinit_locked(adapter);
4848 e1000_reset(adapter);
4850 case M88E1000_PHY_SPEC_CTRL:
4851 case M88E1000_EXT_PHY_SPEC_CTRL:
4852 if (e1000_phy_reset(&adapter->hw)) {
4853 spin_unlock_irqrestore(
4854 &adapter->stats_lock, flags);
4860 switch (data->reg_num) {
4862 if (mii_reg & MII_CR_POWER_DOWN)
4864 if (netif_running(adapter->netdev))
4865 e1000_reinit_locked(adapter);
4867 e1000_reset(adapter);
4871 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4876 return E1000_SUCCESS;
4880 e1000_pci_set_mwi(struct e1000_hw *hw)
4882 struct e1000_adapter *adapter = hw->back;
4883 int ret_val = pci_set_mwi(adapter->pdev);
4886 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4890 e1000_pci_clear_mwi(struct e1000_hw *hw)
4892 struct e1000_adapter *adapter = hw->back;
4894 pci_clear_mwi(adapter->pdev);
4898 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4900 struct e1000_adapter *adapter = hw->back;
4902 pci_read_config_word(adapter->pdev, reg, value);
4906 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4908 struct e1000_adapter *adapter = hw->back;
4910 pci_write_config_word(adapter->pdev, reg, *value);
4914 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4916 struct e1000_adapter *adapter = hw->back;
4917 uint16_t cap_offset;
4919 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4921 return -E1000_ERR_CONFIG;
4923 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4925 return E1000_SUCCESS;
4929 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4935 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4937 struct e1000_adapter *adapter = netdev_priv(netdev);
4938 uint32_t ctrl, rctl;
4940 e1000_irq_disable(adapter);
4941 adapter->vlgrp = grp;
4944 /* enable VLAN tag insert/strip */
4945 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4946 ctrl |= E1000_CTRL_VME;
4947 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4949 if (adapter->hw.mac_type != e1000_ich8lan) {
4950 /* enable VLAN receive filtering */
4951 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4952 rctl |= E1000_RCTL_VFE;
4953 rctl &= ~E1000_RCTL_CFIEN;
4954 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4955 e1000_update_mng_vlan(adapter);
4958 /* disable VLAN tag insert/strip */
4959 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4960 ctrl &= ~E1000_CTRL_VME;
4961 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4963 if (adapter->hw.mac_type != e1000_ich8lan) {
4964 /* disable VLAN filtering */
4965 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4966 rctl &= ~E1000_RCTL_VFE;
4967 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4968 if (adapter->mng_vlan_id !=
4969 (uint16_t)E1000_MNG_VLAN_NONE) {
4970 e1000_vlan_rx_kill_vid(netdev,
4971 adapter->mng_vlan_id);
4972 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4977 e1000_irq_enable(adapter);
4981 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4983 struct e1000_adapter *adapter = netdev_priv(netdev);
4984 uint32_t vfta, index;
4986 if ((adapter->hw.mng_cookie.status &
4987 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4988 (vid == adapter->mng_vlan_id))
4990 /* add VID to filter table */
4991 index = (vid >> 5) & 0x7F;
4992 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4993 vfta |= (1 << (vid & 0x1F));
4994 e1000_write_vfta(&adapter->hw, index, vfta);
4998 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
5000 struct e1000_adapter *adapter = netdev_priv(netdev);
5001 uint32_t vfta, index;
5003 e1000_irq_disable(adapter);
5004 vlan_group_set_device(adapter->vlgrp, vid, NULL);
5005 e1000_irq_enable(adapter);
5007 if ((adapter->hw.mng_cookie.status &
5008 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5009 (vid == adapter->mng_vlan_id)) {
5010 /* release control to f/w */
5011 e1000_release_hw_control(adapter);
5015 /* remove VID from filter table */
5016 index = (vid >> 5) & 0x7F;
5017 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5018 vfta &= ~(1 << (vid & 0x1F));
5019 e1000_write_vfta(&adapter->hw, index, vfta);
5023 e1000_restore_vlan(struct e1000_adapter *adapter)
5025 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5027 if (adapter->vlgrp) {
5029 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5030 if (!vlan_group_get_device(adapter->vlgrp, vid))
5032 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5038 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5040 adapter->hw.autoneg = 0;
5042 /* Fiber NICs only allow 1000 gbps Full duplex */
5043 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5044 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5045 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5050 case SPEED_10 + DUPLEX_HALF:
5051 adapter->hw.forced_speed_duplex = e1000_10_half;
5053 case SPEED_10 + DUPLEX_FULL:
5054 adapter->hw.forced_speed_duplex = e1000_10_full;
5056 case SPEED_100 + DUPLEX_HALF:
5057 adapter->hw.forced_speed_duplex = e1000_100_half;
5059 case SPEED_100 + DUPLEX_FULL:
5060 adapter->hw.forced_speed_duplex = e1000_100_full;
5062 case SPEED_1000 + DUPLEX_FULL:
5063 adapter->hw.autoneg = 1;
5064 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5066 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5068 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5075 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5077 struct net_device *netdev = pci_get_drvdata(pdev);
5078 struct e1000_adapter *adapter = netdev_priv(netdev);
5079 uint32_t ctrl, ctrl_ext, rctl, status;
5080 uint32_t wufc = adapter->wol;
5085 netif_device_detach(netdev);
5087 if (netif_running(netdev)) {
5088 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5089 e1000_down(adapter);
5093 retval = pci_save_state(pdev);
5098 status = E1000_READ_REG(&adapter->hw, STATUS);
5099 if (status & E1000_STATUS_LU)
5100 wufc &= ~E1000_WUFC_LNKC;
5103 e1000_setup_rctl(adapter);
5104 e1000_set_multi(netdev);
5106 /* turn on all-multi mode if wake on multicast is enabled */
5107 if (wufc & E1000_WUFC_MC) {
5108 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5109 rctl |= E1000_RCTL_MPE;
5110 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5113 if (adapter->hw.mac_type >= e1000_82540) {
5114 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5115 /* advertise wake from D3Cold */
5116 #define E1000_CTRL_ADVD3WUC 0x00100000
5117 /* phy power management enable */
5118 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5119 ctrl |= E1000_CTRL_ADVD3WUC |
5120 E1000_CTRL_EN_PHY_PWR_MGMT;
5121 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5124 if (adapter->hw.media_type == e1000_media_type_fiber ||
5125 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5126 /* keep the laser running in D3 */
5127 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5128 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5129 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5132 /* Allow time for pending master requests to run */
5133 e1000_disable_pciex_master(&adapter->hw);
5135 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5136 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5137 pci_enable_wake(pdev, PCI_D3hot, 1);
5138 pci_enable_wake(pdev, PCI_D3cold, 1);
5140 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5141 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5142 pci_enable_wake(pdev, PCI_D3hot, 0);
5143 pci_enable_wake(pdev, PCI_D3cold, 0);
5146 e1000_release_manageability(adapter);
5148 /* make sure adapter isn't asleep if manageability is enabled */
5149 if (adapter->en_mng_pt) {
5150 pci_enable_wake(pdev, PCI_D3hot, 1);
5151 pci_enable_wake(pdev, PCI_D3cold, 1);
5154 if (adapter->hw.phy_type == e1000_phy_igp_3)
5155 e1000_phy_powerdown_workaround(&adapter->hw);
5157 if (netif_running(netdev))
5158 e1000_free_irq(adapter);
5160 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5161 * would have already happened in close and is redundant. */
5162 e1000_release_hw_control(adapter);
5164 pci_disable_device(pdev);
5166 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5173 e1000_resume(struct pci_dev *pdev)
5175 struct net_device *netdev = pci_get_drvdata(pdev);
5176 struct e1000_adapter *adapter = netdev_priv(netdev);
5179 pci_set_power_state(pdev, PCI_D0);
5180 pci_restore_state(pdev);
5181 if ((err = pci_enable_device(pdev))) {
5182 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5185 pci_set_master(pdev);
5187 pci_enable_wake(pdev, PCI_D3hot, 0);
5188 pci_enable_wake(pdev, PCI_D3cold, 0);
5190 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5193 e1000_power_up_phy(adapter);
5194 e1000_reset(adapter);
5195 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5197 e1000_init_manageability(adapter);
5199 if (netif_running(netdev))
5202 netif_device_attach(netdev);
5204 /* If the controller is 82573 and f/w is AMT, do not set
5205 * DRV_LOAD until the interface is up. For all other cases,
5206 * let the f/w know that the h/w is now under the control
5208 if (adapter->hw.mac_type != e1000_82573 ||
5209 !e1000_check_mng_mode(&adapter->hw))
5210 e1000_get_hw_control(adapter);
5216 static void e1000_shutdown(struct pci_dev *pdev)
5218 e1000_suspend(pdev, PMSG_SUSPEND);
5221 #ifdef CONFIG_NET_POLL_CONTROLLER
5223 * Polling 'interrupt' - used by things like netconsole to send skbs
5224 * without having to re-enable interrupts. It's not called while
5225 * the interrupt routine is executing.
5228 e1000_netpoll(struct net_device *netdev)
5230 struct e1000_adapter *adapter = netdev_priv(netdev);
5232 disable_irq(adapter->pdev->irq);
5233 e1000_intr(adapter->pdev->irq, netdev);
5234 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5235 #ifndef CONFIG_E1000_NAPI
5236 adapter->clean_rx(adapter, adapter->rx_ring);
5238 enable_irq(adapter->pdev->irq);
5243 * e1000_io_error_detected - called when PCI error is detected
5244 * @pdev: Pointer to PCI device
5245 * @state: The current pci conneection state
5247 * This function is called after a PCI bus error affecting
5248 * this device has been detected.
5250 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5252 struct net_device *netdev = pci_get_drvdata(pdev);
5253 struct e1000_adapter *adapter = netdev->priv;
5255 netif_device_detach(netdev);
5257 if (netif_running(netdev))
5258 e1000_down(adapter);
5259 pci_disable_device(pdev);
5261 /* Request a slot slot reset. */
5262 return PCI_ERS_RESULT_NEED_RESET;
5266 * e1000_io_slot_reset - called after the pci bus has been reset.
5267 * @pdev: Pointer to PCI device
5269 * Restart the card from scratch, as if from a cold-boot. Implementation
5270 * resembles the first-half of the e1000_resume routine.
5272 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5274 struct net_device *netdev = pci_get_drvdata(pdev);
5275 struct e1000_adapter *adapter = netdev->priv;
5277 if (pci_enable_device(pdev)) {
5278 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5279 return PCI_ERS_RESULT_DISCONNECT;
5281 pci_set_master(pdev);
5283 pci_enable_wake(pdev, PCI_D3hot, 0);
5284 pci_enable_wake(pdev, PCI_D3cold, 0);
5286 e1000_reset(adapter);
5287 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5289 return PCI_ERS_RESULT_RECOVERED;
5293 * e1000_io_resume - called when traffic can start flowing again.
5294 * @pdev: Pointer to PCI device
5296 * This callback is called when the error recovery driver tells us that
5297 * its OK to resume normal operation. Implementation resembles the
5298 * second-half of the e1000_resume routine.
5300 static void e1000_io_resume(struct pci_dev *pdev)
5302 struct net_device *netdev = pci_get_drvdata(pdev);
5303 struct e1000_adapter *adapter = netdev->priv;
5305 e1000_init_manageability(adapter);
5307 if (netif_running(netdev)) {
5308 if (e1000_up(adapter)) {
5309 printk("e1000: can't bring device back up after reset\n");
5314 netif_device_attach(netdev);
5316 /* If the controller is 82573 and f/w is AMT, do not set
5317 * DRV_LOAD until the interface is up. For all other cases,
5318 * let the f/w know that the h/w is now under the control
5320 if (adapter->hw.mac_type != e1000_82573 ||
5321 !e1000_check_mng_mode(&adapter->hw))
5322 e1000_get_hw_control(adapter);