V4L/DVB (9721): cx18: Change to singlethreaded global work queue thread for deferable...
[linux-2.6] / drivers / media / video / cx18 / cx18-av-core.c
1 /*
2  *  cx18 ADEC audio functions
3  *
4  *  Derived from cx25840-core.c
5  *
6  *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
7  *
8  *  This program is free software; you can redistribute it and/or
9  *  modify it under the terms of the GNU General Public License
10  *  as published by the Free Software Foundation; either version 2
11  *  of the License, or (at your option) any later version.
12  *
13  *  This program is distributed in the hope that it will be useful,
14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *  GNU General Public License for more details.
17  *
18  *  You should have received a copy of the GNU General Public License
19  *  along with this program; if not, write to the Free Software
20  *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21  *  02110-1301, USA.
22  */
23
24 #include "cx18-driver.h"
25 #include "cx18-io.h"
26
27 int cx18_av_write(struct cx18 *cx, u16 addr, u8 value)
28 {
29         u32 reg = 0xc40000 + (addr & ~3);
30         u32 mask = 0xff;
31         int shift = (addr & 3) * 8;
32         u32 x = cx18_read_reg(cx, reg);
33
34         x = (x & ~(mask << shift)) | ((u32)value << shift);
35         cx18_write_reg(cx, x, reg);
36         return 0;
37 }
38
39 int cx18_av_write_expect(struct cx18 *cx, u16 addr, u8 value, u8 eval, u8 mask)
40 {
41         u32 reg = 0xc40000 + (addr & ~3);
42         int shift = (addr & 3) * 8;
43         u32 x = cx18_read_reg(cx, reg);
44
45         x = (x & ~((u32)0xff << shift)) | ((u32)value << shift);
46         cx18_write_reg_expect(cx, x, reg,
47                                 ((u32)eval << shift), ((u32)mask << shift));
48         return 0;
49 }
50
51 int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value)
52 {
53         cx18_write_reg(cx, value, 0xc40000 + addr);
54         return 0;
55 }
56
57 int
58 cx18_av_write4_expect(struct cx18 *cx, u16 addr, u32 value, u32 eval, u32 mask)
59 {
60         cx18_write_reg_expect(cx, value, 0xc40000 + addr, eval, mask);
61         return 0;
62 }
63
64 int cx18_av_write4_noretry(struct cx18 *cx, u16 addr, u32 value)
65 {
66         cx18_write_reg_noretry(cx, value, 0xc40000 + addr);
67         return 0;
68 }
69
70 u8 cx18_av_read(struct cx18 *cx, u16 addr)
71 {
72         u32 x = cx18_read_reg(cx, 0xc40000 + (addr & ~3));
73         int shift = (addr & 3) * 8;
74
75         return (x >> shift) & 0xff;
76 }
77
78 u32 cx18_av_read4(struct cx18 *cx, u16 addr)
79 {
80         return cx18_read_reg(cx, 0xc40000 + addr);
81 }
82
83 u32 cx18_av_read4_noretry(struct cx18 *cx, u16 addr)
84 {
85         return cx18_read_reg_noretry(cx, 0xc40000 + addr);
86 }
87
88 int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned and_mask,
89                    u8 or_value)
90 {
91         return cx18_av_write(cx, addr,
92                              (cx18_av_read(cx, addr) & and_mask) |
93                              or_value);
94 }
95
96 int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 and_mask,
97                    u32 or_value)
98 {
99         return cx18_av_write4(cx, addr,
100                              (cx18_av_read4(cx, addr) & and_mask) |
101                              or_value);
102 }
103
104 /* ----------------------------------------------------------------------- */
105
106 static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input,
107                                         enum cx18_av_audio_input aud_input);
108 static void log_audio_status(struct cx18 *cx);
109 static void log_video_status(struct cx18 *cx);
110
111 /* ----------------------------------------------------------------------- */
112
113 static void cx18_av_initialize(struct cx18 *cx)
114 {
115         struct cx18_av_state *state = &cx->av_state;
116         u32 v;
117
118         cx18_av_loadfw(cx);
119         /* Stop 8051 code execution */
120         cx18_av_write4_expect(cx, CXADEC_DL_CTL, 0x03000000,
121                                                  0x03000000, 0x13000000);
122
123         /* initallize the PLL by toggling sleep bit */
124         v = cx18_av_read4(cx, CXADEC_HOST_REG1);
125         /* enable sleep mode - register appears to be read only... */
126         cx18_av_write4_expect(cx, CXADEC_HOST_REG1, v | 1, v, 0xfffe);
127         /* disable sleep mode */
128         cx18_av_write4_expect(cx, CXADEC_HOST_REG1, v & 0xfffe,
129                                                     v & 0xfffe, 0xffff);
130
131         /* initialize DLLs */
132         v = cx18_av_read4(cx, CXADEC_DLL1_DIAG_CTRL) & 0xE1FFFEFF;
133         /* disable FLD */
134         cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v);
135         /* enable FLD */
136         cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v | 0x10000100);
137
138         v = cx18_av_read4(cx, CXADEC_DLL2_DIAG_CTRL) & 0xE1FFFEFF;
139         /* disable FLD */
140         cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v);
141         /* enable FLD */
142         cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v | 0x06000100);
143
144         /* set analog bias currents. Set Vreg to 1.20V. */
145         cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL1, 0x000A1802);
146
147         v = cx18_av_read4(cx, CXADEC_AFE_DIAG_CTRL3) | 1;
148         /* enable TUNE_FIL_RST */
149         cx18_av_write4_expect(cx, CXADEC_AFE_DIAG_CTRL3, v, v, 0x03009F0F);
150         /* disable TUNE_FIL_RST */
151         cx18_av_write4_expect(cx, CXADEC_AFE_DIAG_CTRL3,
152                               v & 0xFFFFFFFE, v & 0xFFFFFFFE, 0x03009F0F);
153
154         /* enable 656 output */
155         cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x040C00);
156
157         /* video output drive strength */
158         cx18_av_and_or4(cx, CXADEC_PIN_CTRL2, ~0, 0x2);
159
160         /* reset video */
161         cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0x8000);
162         cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0);
163
164         /* set video to auto-detect */
165         /* Clear bits 11-12 to enable slow locking mode.  Set autodetect mode */
166         /* set the comb notch = 1 */
167         cx18_av_and_or4(cx, CXADEC_MODE_CTRL, 0xFFF7E7F0, 0x02040800);
168
169         /* Enable wtw_en in CRUSH_CTRL (Set bit 22) */
170         /* Enable maj_sel in CRUSH_CTRL (Set bit 20) */
171         cx18_av_and_or4(cx, CXADEC_CRUSH_CTRL, ~0, 0x00500000);
172
173         /* Set VGA_TRACK_RANGE to 0x20 */
174         cx18_av_and_or4(cx, CXADEC_DFE_CTRL2, 0xFFFF00FF, 0x00002000);
175
176         /* Enable VBI capture */
177         cx18_av_write4(cx, CXADEC_OUT_CTRL1, 0x4010253F);
178         /* cx18_av_write4(cx, CXADEC_OUT_CTRL1, 0x4010253E); */
179
180         /* Set the video input.
181            The setting in MODE_CTRL gets lost when we do the above setup */
182         /* EncSetSignalStd(dwDevNum, pEnc->dwSigStd); */
183         /* EncSetVideoInput(dwDevNum, pEnc->VidIndSelection); */
184
185         v = cx18_av_read4(cx, CXADEC_AFE_CTRL);
186         v &= 0xFFFBFFFF;            /* turn OFF bit 18 for droop_comp_ch1 */
187         v &= 0xFFFF7FFF;            /* turn OFF bit 9 for clamp_sel_ch1 */
188         v &= 0xFFFFFFFE;            /* turn OFF bit 0 for 12db_ch1 */
189         /* v |= 0x00000001;*/            /* turn ON bit 0 for 12db_ch1 */
190         cx18_av_write4(cx, CXADEC_AFE_CTRL, v);
191
192 /*      if(dwEnable && dw3DCombAvailable) { */
193 /*              CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x7728021F); */
194 /*    } else { */
195 /*              CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x6628021F); */
196 /*    } */
197         cx18_av_write4(cx, CXADEC_SRC_COMB_CFG, 0x6628021F);
198         state->default_volume = 228 - cx18_av_read(cx, 0x8d4);
199         state->default_volume = ((state->default_volume / 2) + 23) << 9;
200 }
201
202 /* ----------------------------------------------------------------------- */
203
204 void cx18_av_std_setup(struct cx18 *cx)
205 {
206         struct cx18_av_state *state = &cx->av_state;
207         v4l2_std_id std = state->std;
208         int hblank, hactive, burst, vblank, vactive, sc;
209         int vblank656, src_decimation;
210         int luma_lpf, uv_lpf, comb;
211         u32 pll_int, pll_frac, pll_post;
212
213         /* datasheet startup, step 8d */
214         if (std & ~V4L2_STD_NTSC)
215                 cx18_av_write(cx, 0x49f, 0x11);
216         else
217                 cx18_av_write(cx, 0x49f, 0x14);
218
219         if (std & V4L2_STD_625_50) {
220                 hblank = 132;
221                 hactive = 720;
222                 burst = 93;
223                 vblank = 36;
224                 vactive = 580;
225                 vblank656 = 40;
226                 src_decimation = 0x21f;
227
228                 luma_lpf = 2;
229                 if (std & V4L2_STD_PAL) {
230                         uv_lpf = 1;
231                         comb = 0x20;
232                         sc = 688739;
233                 } else if (std == V4L2_STD_PAL_Nc) {
234                         uv_lpf = 1;
235                         comb = 0x20;
236                         sc = 556453;
237                 } else { /* SECAM */
238                         uv_lpf = 0;
239                         comb = 0;
240                         sc = 672351;
241                 }
242         } else {
243                 hactive = 720;
244                 hblank = 122;
245                 vactive = 487;
246                 luma_lpf = 1;
247                 uv_lpf = 1;
248                 vblank = 26;
249                 vblank656 = 26;
250
251                 src_decimation = 0x21f;
252                 if (std == V4L2_STD_PAL_60) {
253                         burst = 0x5b;
254                         luma_lpf = 2;
255                         comb = 0x20;
256                         sc = 688739;
257                 } else if (std == V4L2_STD_PAL_M) {
258                         burst = 0x61;
259                         comb = 0x20;
260                         sc = 555452;
261                 } else {
262                         burst = 0x5b;
263                         comb = 0x66;
264                         sc = 556063;
265                 }
266         }
267
268         /* DEBUG: Displays configured PLL frequency */
269         pll_int = cx18_av_read(cx, 0x108);
270         pll_frac = cx18_av_read4(cx, 0x10c) & 0x1ffffff;
271         pll_post = cx18_av_read(cx, 0x109);
272         CX18_DEBUG_INFO("PLL regs = int: %u, frac: %u, post: %u\n",
273                         pll_int, pll_frac, pll_post);
274
275         if (pll_post) {
276                 int fin, fsc, pll;
277
278                 pll = (28636364L * ((((u64)pll_int) << 25) + pll_frac)) >> 25;
279                 pll /= pll_post;
280                 CX18_DEBUG_INFO("PLL = %d.%06d MHz\n",
281                                         pll / 1000000, pll % 1000000);
282                 CX18_DEBUG_INFO("PLL/8 = %d.%06d MHz\n",
283                                         pll / 8000000, (pll / 8) % 1000000);
284
285                 fin = ((u64)src_decimation * pll) >> 12;
286                 CX18_DEBUG_INFO("ADC Sampling freq = %d.%06d MHz\n",
287                                         fin / 1000000, fin % 1000000);
288
289                 fsc = (((u64)sc) * pll) >> 24L;
290                 CX18_DEBUG_INFO("Chroma sub-carrier freq = %d.%06d MHz\n",
291                                         fsc / 1000000, fsc % 1000000);
292
293                 CX18_DEBUG_INFO("hblank %i, hactive %i, "
294                         "vblank %i , vactive %i, vblank656 %i, src_dec %i,"
295                         "burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x,"
296                         " sc 0x%06x\n",
297                         hblank, hactive, vblank, vactive, vblank656,
298                         src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
299         }
300
301         /* Sets horizontal blanking delay and active lines */
302         cx18_av_write(cx, 0x470, hblank);
303         cx18_av_write(cx, 0x471, 0xff & (((hblank >> 8) & 0x3) |
304                                                 (hactive << 4)));
305         cx18_av_write(cx, 0x472, hactive >> 4);
306
307         /* Sets burst gate delay */
308         cx18_av_write(cx, 0x473, burst);
309
310         /* Sets vertical blanking delay and active duration */
311         cx18_av_write(cx, 0x474, vblank);
312         cx18_av_write(cx, 0x475, 0xff & (((vblank >> 8) & 0x3) |
313                                                 (vactive << 4)));
314         cx18_av_write(cx, 0x476, vactive >> 4);
315         cx18_av_write(cx, 0x477, vblank656);
316
317         /* Sets src decimation rate */
318         cx18_av_write(cx, 0x478, 0xff & src_decimation);
319         cx18_av_write(cx, 0x479, 0xff & (src_decimation >> 8));
320
321         /* Sets Luma and UV Low pass filters */
322         cx18_av_write(cx, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));
323
324         /* Enables comb filters */
325         cx18_av_write(cx, 0x47b, comb);
326
327         /* Sets SC Step*/
328         cx18_av_write(cx, 0x47c, sc);
329         cx18_av_write(cx, 0x47d, 0xff & sc >> 8);
330         cx18_av_write(cx, 0x47e, 0xff & sc >> 16);
331
332         /* Sets VBI parameters */
333         if (std & V4L2_STD_625_50) {
334                 cx18_av_write(cx, 0x47f, 0x01);
335                 state->vbi_line_offset = 5;
336         } else {
337                 cx18_av_write(cx, 0x47f, 0x00);
338                 state->vbi_line_offset = 8;
339         }
340 }
341
342 /* ----------------------------------------------------------------------- */
343
344 static void input_change(struct cx18 *cx)
345 {
346         struct cx18_av_state *state = &cx->av_state;
347         v4l2_std_id std = state->std;
348         u8 v;
349
350         /* Follow step 8c and 8d of section 3.16 in the cx18_av datasheet */
351         cx18_av_write(cx, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11);
352         cx18_av_and_or(cx, 0x401, ~0x60, 0);
353         cx18_av_and_or(cx, 0x401, ~0x60, 0x60);
354
355         if (std & V4L2_STD_525_60) {
356                 if (std == V4L2_STD_NTSC_M_JP) {
357                         /* Japan uses EIAJ audio standard */
358                         cx18_av_write_expect(cx, 0x808, 0xf7, 0xf7, 0xff);
359                         cx18_av_write_expect(cx, 0x80b, 0x02, 0x02, 0x3f);
360                 } else if (std == V4L2_STD_NTSC_M_KR) {
361                         /* South Korea uses A2 audio standard */
362                         cx18_av_write_expect(cx, 0x808, 0xf8, 0xf8, 0xff);
363                         cx18_av_write_expect(cx, 0x80b, 0x03, 0x03, 0x3f);
364                 } else {
365                         /* Others use the BTSC audio standard */
366                         cx18_av_write_expect(cx, 0x808, 0xf6, 0xf6, 0xff);
367                         cx18_av_write_expect(cx, 0x80b, 0x01, 0x01, 0x3f);
368                 }
369         } else if (std & V4L2_STD_PAL) {
370                 /* Follow tuner change procedure for PAL */
371                 cx18_av_write_expect(cx, 0x808, 0xff, 0xff, 0xff);
372                 cx18_av_write_expect(cx, 0x80b, 0x03, 0x03, 0x3f);
373         } else if (std & V4L2_STD_SECAM) {
374                 /* Select autodetect for SECAM */
375                 cx18_av_write_expect(cx, 0x808, 0xff, 0xff, 0xff);
376                 cx18_av_write_expect(cx, 0x80b, 0x03, 0x03, 0x3f);
377         }
378
379         v = cx18_av_read(cx, 0x803);
380         if (v & 0x10) {
381                 /* restart audio decoder microcontroller */
382                 v &= ~0x10;
383                 cx18_av_write_expect(cx, 0x803, v, v, 0x1f);
384                 v |= 0x10;
385                 cx18_av_write_expect(cx, 0x803, v, v, 0x1f);
386         }
387 }
388
389 static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input,
390                                         enum cx18_av_audio_input aud_input)
391 {
392         struct cx18_av_state *state = &cx->av_state;
393         u8 is_composite = (vid_input >= CX18_AV_COMPOSITE1 &&
394                            vid_input <= CX18_AV_COMPOSITE8);
395         u8 reg;
396         u8 v;
397
398         CX18_DEBUG_INFO("decoder set video input %d, audio input %d\n",
399                         vid_input, aud_input);
400
401         if (is_composite) {
402                 reg = 0xf0 + (vid_input - CX18_AV_COMPOSITE1);
403         } else {
404                 int luma = vid_input & 0xf0;
405                 int chroma = vid_input & 0xf00;
406
407                 if ((vid_input & ~0xff0) ||
408                     luma < CX18_AV_SVIDEO_LUMA1 ||
409                     luma > CX18_AV_SVIDEO_LUMA8 ||
410                     chroma < CX18_AV_SVIDEO_CHROMA4 ||
411                     chroma > CX18_AV_SVIDEO_CHROMA8) {
412                         CX18_ERR("0x%04x is not a valid video input!\n",
413                                         vid_input);
414                         return -EINVAL;
415                 }
416                 reg = 0xf0 + ((luma - CX18_AV_SVIDEO_LUMA1) >> 4);
417                 if (chroma >= CX18_AV_SVIDEO_CHROMA7) {
418                         reg &= 0x3f;
419                         reg |= (chroma - CX18_AV_SVIDEO_CHROMA7) >> 2;
420                 } else {
421                         reg &= 0xcf;
422                         reg |= (chroma - CX18_AV_SVIDEO_CHROMA4) >> 4;
423                 }
424         }
425
426         switch (aud_input) {
427         case CX18_AV_AUDIO_SERIAL1:
428         case CX18_AV_AUDIO_SERIAL2:
429                 /* do nothing, use serial audio input */
430                 break;
431         case CX18_AV_AUDIO4: reg &= ~0x30; break;
432         case CX18_AV_AUDIO5: reg &= ~0x30; reg |= 0x10; break;
433         case CX18_AV_AUDIO6: reg &= ~0x30; reg |= 0x20; break;
434         case CX18_AV_AUDIO7: reg &= ~0xc0; break;
435         case CX18_AV_AUDIO8: reg &= ~0xc0; reg |= 0x40; break;
436
437         default:
438                 CX18_ERR("0x%04x is not a valid audio input!\n", aud_input);
439                 return -EINVAL;
440         }
441
442         cx18_av_write_expect(cx, 0x103, reg, reg, 0xf7);
443         /* Set INPUT_MODE to Composite (0) or S-Video (1) */
444         cx18_av_and_or(cx, 0x401, ~0x6, is_composite ? 0 : 0x02);
445
446         /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
447         v = cx18_av_read(cx, 0x102);
448         if (reg & 0x80)
449                 v &= ~0x2;
450         else
451                 v |= 0x2;
452         /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2 and CH3 */
453         if ((reg & 0xc0) != 0xc0 && (reg & 0x30) != 0x30)
454                 v |= 0x4;
455         else
456                 v &= ~0x4;
457         cx18_av_write_expect(cx, 0x102, v, v, 0x17);
458
459         /*cx18_av_and_or4(cx, 0x104, ~0x001b4180, 0x00004180);*/
460
461         state->vid_input = vid_input;
462         state->aud_input = aud_input;
463         cx18_av_audio_set_path(cx);
464         input_change(cx);
465         return 0;
466 }
467
468 /* ----------------------------------------------------------------------- */
469
470 static int set_v4lstd(struct cx18 *cx)
471 {
472         struct cx18_av_state *state = &cx->av_state;
473         u8 fmt = 0;     /* zero is autodetect */
474         u8 pal_m = 0;
475
476         /* First tests should be against specific std */
477         if (state->std == V4L2_STD_NTSC_M_JP) {
478                 fmt = 0x2;
479         } else if (state->std == V4L2_STD_NTSC_443) {
480                 fmt = 0x3;
481         } else if (state->std == V4L2_STD_PAL_M) {
482                 pal_m = 1;
483                 fmt = 0x5;
484         } else if (state->std == V4L2_STD_PAL_N) {
485                 fmt = 0x6;
486         } else if (state->std == V4L2_STD_PAL_Nc) {
487                 fmt = 0x7;
488         } else if (state->std == V4L2_STD_PAL_60) {
489                 fmt = 0x8;
490         } else {
491                 /* Then, test against generic ones */
492                 if (state->std & V4L2_STD_NTSC)
493                         fmt = 0x1;
494                 else if (state->std & V4L2_STD_PAL)
495                         fmt = 0x4;
496                 else if (state->std & V4L2_STD_SECAM)
497                         fmt = 0xc;
498         }
499
500         CX18_DEBUG_INFO("changing video std to fmt %i\n", fmt);
501
502         /* Follow step 9 of section 3.16 in the cx18_av datasheet.
503            Without this PAL may display a vertical ghosting effect.
504            This happens for example with the Yuan MPC622. */
505         if (fmt >= 4 && fmt < 8) {
506                 /* Set format to NTSC-M */
507                 cx18_av_and_or(cx, 0x400, ~0xf, 1);
508                 /* Turn off LCOMB */
509                 cx18_av_and_or(cx, 0x47b, ~6, 0);
510         }
511         cx18_av_and_or(cx, 0x400, ~0x2f, fmt | 0x20);
512         cx18_av_and_or(cx, 0x403, ~0x3, pal_m);
513         cx18_av_std_setup(cx);
514         input_change(cx);
515         return 0;
516 }
517
518 /* ----------------------------------------------------------------------- */
519
520 static int set_v4lctrl(struct cx18 *cx, struct v4l2_control *ctrl)
521 {
522         switch (ctrl->id) {
523         case V4L2_CID_BRIGHTNESS:
524                 if (ctrl->value < 0 || ctrl->value > 255) {
525                         CX18_ERR("invalid brightness setting %d\n",
526                                     ctrl->value);
527                         return -ERANGE;
528                 }
529
530                 cx18_av_write(cx, 0x414, ctrl->value - 128);
531                 break;
532
533         case V4L2_CID_CONTRAST:
534                 if (ctrl->value < 0 || ctrl->value > 127) {
535                         CX18_ERR("invalid contrast setting %d\n",
536                                     ctrl->value);
537                         return -ERANGE;
538                 }
539
540                 cx18_av_write(cx, 0x415, ctrl->value << 1);
541                 break;
542
543         case V4L2_CID_SATURATION:
544                 if (ctrl->value < 0 || ctrl->value > 127) {
545                         CX18_ERR("invalid saturation setting %d\n",
546                                     ctrl->value);
547                         return -ERANGE;
548                 }
549
550                 cx18_av_write(cx, 0x420, ctrl->value << 1);
551                 cx18_av_write(cx, 0x421, ctrl->value << 1);
552                 break;
553
554         case V4L2_CID_HUE:
555                 if (ctrl->value < -127 || ctrl->value > 127) {
556                         CX18_ERR("invalid hue setting %d\n", ctrl->value);
557                         return -ERANGE;
558                 }
559
560                 cx18_av_write(cx, 0x422, ctrl->value);
561                 break;
562
563         case V4L2_CID_AUDIO_VOLUME:
564         case V4L2_CID_AUDIO_BASS:
565         case V4L2_CID_AUDIO_TREBLE:
566         case V4L2_CID_AUDIO_BALANCE:
567         case V4L2_CID_AUDIO_MUTE:
568                 return cx18_av_audio(cx, VIDIOC_S_CTRL, ctrl);
569
570         default:
571                 return -EINVAL;
572         }
573
574         return 0;
575 }
576
577 static int get_v4lctrl(struct cx18 *cx, struct v4l2_control *ctrl)
578 {
579         switch (ctrl->id) {
580         case V4L2_CID_BRIGHTNESS:
581                 ctrl->value = (s8)cx18_av_read(cx, 0x414) + 128;
582                 break;
583         case V4L2_CID_CONTRAST:
584                 ctrl->value = cx18_av_read(cx, 0x415) >> 1;
585                 break;
586         case V4L2_CID_SATURATION:
587                 ctrl->value = cx18_av_read(cx, 0x420) >> 1;
588                 break;
589         case V4L2_CID_HUE:
590                 ctrl->value = (s8)cx18_av_read(cx, 0x422);
591                 break;
592         case V4L2_CID_AUDIO_VOLUME:
593         case V4L2_CID_AUDIO_BASS:
594         case V4L2_CID_AUDIO_TREBLE:
595         case V4L2_CID_AUDIO_BALANCE:
596         case V4L2_CID_AUDIO_MUTE:
597                 return cx18_av_audio(cx, VIDIOC_G_CTRL, ctrl);
598         default:
599                 return -EINVAL;
600         }
601
602         return 0;
603 }
604
605 /* ----------------------------------------------------------------------- */
606
607 static int get_v4lfmt(struct cx18 *cx, struct v4l2_format *fmt)
608 {
609         switch (fmt->type) {
610         case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
611                 return cx18_av_vbi(cx, VIDIOC_G_FMT, fmt);
612         default:
613                 return -EINVAL;
614         }
615
616         return 0;
617 }
618
619 static int set_v4lfmt(struct cx18 *cx, struct v4l2_format *fmt)
620 {
621         struct cx18_av_state *state = &cx->av_state;
622         struct v4l2_pix_format *pix;
623         int HSC, VSC, Vsrc, Hsrc, filter, Vlines;
624         int is_50Hz = !(state->std & V4L2_STD_525_60);
625
626         switch (fmt->type) {
627         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
628                 pix = &(fmt->fmt.pix);
629
630                 Vsrc = (cx18_av_read(cx, 0x476) & 0x3f) << 4;
631                 Vsrc |= (cx18_av_read(cx, 0x475) & 0xf0) >> 4;
632
633                 Hsrc = (cx18_av_read(cx, 0x472) & 0x3f) << 4;
634                 Hsrc |= (cx18_av_read(cx, 0x471) & 0xf0) >> 4;
635
636                 Vlines = pix->height + (is_50Hz ? 4 : 7);
637
638                 if ((pix->width * 16 < Hsrc) || (Hsrc < pix->width) ||
639                     (Vlines * 8 < Vsrc) || (Vsrc < Vlines)) {
640                         CX18_ERR("%dx%d is not a valid size!\n",
641                                     pix->width, pix->height);
642                         return -ERANGE;
643                 }
644
645                 HSC = (Hsrc * (1 << 20)) / pix->width - (1 << 20);
646                 VSC = (1 << 16) - (Vsrc * (1 << 9) / Vlines - (1 << 9));
647                 VSC &= 0x1fff;
648
649                 if (pix->width >= 385)
650                         filter = 0;
651                 else if (pix->width > 192)
652                         filter = 1;
653                 else if (pix->width > 96)
654                         filter = 2;
655                 else
656                         filter = 3;
657
658                 CX18_DEBUG_INFO("decoder set size %dx%d -> scale  %ux%u\n",
659                             pix->width, pix->height, HSC, VSC);
660
661                 /* HSCALE=HSC */
662                 cx18_av_write(cx, 0x418, HSC & 0xff);
663                 cx18_av_write(cx, 0x419, (HSC >> 8) & 0xff);
664                 cx18_av_write(cx, 0x41a, HSC >> 16);
665                 /* VSCALE=VSC */
666                 cx18_av_write(cx, 0x41c, VSC & 0xff);
667                 cx18_av_write(cx, 0x41d, VSC >> 8);
668                 /* VS_INTRLACE=1 VFILT=filter */
669                 cx18_av_write(cx, 0x41e, 0x8 | filter);
670                 break;
671
672         case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
673                 return cx18_av_vbi(cx, VIDIOC_S_FMT, fmt);
674
675         case V4L2_BUF_TYPE_VBI_CAPTURE:
676                 return cx18_av_vbi(cx, VIDIOC_S_FMT, fmt);
677
678         default:
679                 return -EINVAL;
680         }
681
682         return 0;
683 }
684
685 /* ----------------------------------------------------------------------- */
686
687 int cx18_av_cmd(struct cx18 *cx, unsigned int cmd, void *arg)
688 {
689         struct cx18_av_state *state = &cx->av_state;
690         struct v4l2_tuner *vt = arg;
691         struct v4l2_routing *route = arg;
692
693         /* ignore these commands */
694         switch (cmd) {
695         case TUNER_SET_TYPE_ADDR:
696                 return 0;
697         }
698
699         if (!state->is_initialized) {
700                 CX18_DEBUG_INFO("cmd %08x triggered fw load\n", cmd);
701                 /* initialize on first use */
702                 state->is_initialized = 1;
703                 cx18_av_initialize(cx);
704         }
705
706         switch (cmd) {
707         case VIDIOC_INT_DECODE_VBI_LINE:
708                 return cx18_av_vbi(cx, cmd, arg);
709
710         case VIDIOC_INT_AUDIO_CLOCK_FREQ:
711                 return cx18_av_audio(cx, cmd, arg);
712
713         case VIDIOC_STREAMON:
714                 CX18_DEBUG_INFO("enable output\n");
715                 cx18_av_write(cx, 0x115, 0x8c);
716                 cx18_av_write(cx, 0x116, 0x07);
717                 break;
718
719         case VIDIOC_STREAMOFF:
720                 CX18_DEBUG_INFO("disable output\n");
721                 cx18_av_write(cx, 0x115, 0x00);
722                 cx18_av_write(cx, 0x116, 0x00);
723                 break;
724
725         case VIDIOC_LOG_STATUS:
726                 log_video_status(cx);
727                 log_audio_status(cx);
728                 break;
729
730         case VIDIOC_G_CTRL:
731                 return get_v4lctrl(cx, (struct v4l2_control *)arg);
732
733         case VIDIOC_S_CTRL:
734                 return set_v4lctrl(cx, (struct v4l2_control *)arg);
735
736         case VIDIOC_QUERYCTRL:
737         {
738                 struct v4l2_queryctrl *qc = arg;
739
740                 switch (qc->id) {
741                 case V4L2_CID_BRIGHTNESS:
742                 case V4L2_CID_CONTRAST:
743                 case V4L2_CID_SATURATION:
744                 case V4L2_CID_HUE:
745                         return v4l2_ctrl_query_fill_std(qc);
746                 default:
747                         break;
748                 }
749
750                 switch (qc->id) {
751                 case V4L2_CID_AUDIO_VOLUME:
752                         return v4l2_ctrl_query_fill(qc, 0, 65535,
753                                 65535 / 100, state->default_volume);
754                 case V4L2_CID_AUDIO_MUTE:
755                 case V4L2_CID_AUDIO_BALANCE:
756                 case V4L2_CID_AUDIO_BASS:
757                 case V4L2_CID_AUDIO_TREBLE:
758                         return v4l2_ctrl_query_fill_std(qc);
759                 default:
760                         return -EINVAL;
761                 }
762                 return -EINVAL;
763         }
764
765         case VIDIOC_G_STD:
766                 *(v4l2_std_id *)arg = state->std;
767                 break;
768
769         case VIDIOC_S_STD:
770                 if (state->radio == 0 && state->std == *(v4l2_std_id *)arg)
771                         return 0;
772                 state->radio = 0;
773                 state->std = *(v4l2_std_id *)arg;
774                 return set_v4lstd(cx);
775
776         case AUDC_SET_RADIO:
777                 state->radio = 1;
778                 break;
779
780         case VIDIOC_INT_G_VIDEO_ROUTING:
781                 route->input = state->vid_input;
782                 route->output = 0;
783                 break;
784
785         case VIDIOC_INT_S_VIDEO_ROUTING:
786                 return set_input(cx, route->input, state->aud_input);
787
788         case VIDIOC_INT_G_AUDIO_ROUTING:
789                 route->input = state->aud_input;
790                 route->output = 0;
791                 break;
792
793         case VIDIOC_INT_S_AUDIO_ROUTING:
794                 return set_input(cx, state->vid_input, route->input);
795
796         case VIDIOC_S_FREQUENCY:
797                 input_change(cx);
798                 break;
799
800         case VIDIOC_G_TUNER:
801         {
802                 u8 vpres = cx18_av_read(cx, 0x40e) & 0x20;
803                 u8 mode;
804                 int val = 0;
805
806                 if (state->radio)
807                         break;
808
809                 vt->signal = vpres ? 0xffff : 0x0;
810
811                 vt->capability |=
812                     V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LANG1 |
813                     V4L2_TUNER_CAP_LANG2 | V4L2_TUNER_CAP_SAP;
814
815                 mode = cx18_av_read(cx, 0x804);
816
817                 /* get rxsubchans and audmode */
818                 if ((mode & 0xf) == 1)
819                         val |= V4L2_TUNER_SUB_STEREO;
820                 else
821                         val |= V4L2_TUNER_SUB_MONO;
822
823                 if (mode == 2 || mode == 4)
824                         val = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
825
826                 if (mode & 0x10)
827                         val |= V4L2_TUNER_SUB_SAP;
828
829                 vt->rxsubchans = val;
830                 vt->audmode = state->audmode;
831                 break;
832         }
833
834         case VIDIOC_S_TUNER:
835         {
836                 u8 v;
837
838                 if (state->radio)
839                         break;
840
841                 v = cx18_av_read(cx, 0x809);
842                 v &= ~0xf;
843
844                 switch (vt->audmode) {
845                 case V4L2_TUNER_MODE_MONO:
846                         /* mono      -> mono
847                            stereo    -> mono
848                            bilingual -> lang1 */
849                         break;
850                 case V4L2_TUNER_MODE_STEREO:
851                 case V4L2_TUNER_MODE_LANG1:
852                         /* mono      -> mono
853                            stereo    -> stereo
854                            bilingual -> lang1 */
855                         v |= 0x4;
856                         break;
857                 case V4L2_TUNER_MODE_LANG1_LANG2:
858                         /* mono      -> mono
859                            stereo    -> stereo
860                            bilingual -> lang1/lang2 */
861                         v |= 0x7;
862                         break;
863                 case V4L2_TUNER_MODE_LANG2:
864                         /* mono      -> mono
865                            stereo    -> stereo
866                            bilingual -> lang2 */
867                         v |= 0x1;
868                         break;
869                 default:
870                         return -EINVAL;
871                 }
872                 cx18_av_write_expect(cx, 0x809, v, v, 0xff);
873                 state->audmode = vt->audmode;
874                 break;
875         }
876
877         case VIDIOC_G_FMT:
878                 return get_v4lfmt(cx, (struct v4l2_format *)arg);
879
880         case VIDIOC_S_FMT:
881                 return set_v4lfmt(cx, (struct v4l2_format *)arg);
882
883         case VIDIOC_INT_RESET:
884                 cx18_av_initialize(cx);
885                 break;
886
887         default:
888                 return -EINVAL;
889         }
890
891         return 0;
892 }
893
894 /* ----------------------------------------------------------------------- */
895
896 /* ----------------------------------------------------------------------- */
897
898 static void log_video_status(struct cx18 *cx)
899 {
900         static const char *const fmt_strs[] = {
901                 "0x0",
902                 "NTSC-M", "NTSC-J", "NTSC-4.43",
903                 "PAL-BDGHI", "PAL-M", "PAL-N", "PAL-Nc", "PAL-60",
904                 "0x9", "0xA", "0xB",
905                 "SECAM",
906                 "0xD", "0xE", "0xF"
907         };
908
909         struct cx18_av_state *state = &cx->av_state;
910         u8 vidfmt_sel = cx18_av_read(cx, 0x400) & 0xf;
911         u8 gen_stat1 = cx18_av_read(cx, 0x40d);
912         u8 gen_stat2 = cx18_av_read(cx, 0x40e);
913         int vid_input = state->vid_input;
914
915         CX18_INFO("Video signal:              %spresent\n",
916                     (gen_stat2 & 0x20) ? "" : "not ");
917         CX18_INFO("Detected format:           %s\n",
918                     fmt_strs[gen_stat1 & 0xf]);
919
920         CX18_INFO("Specified standard:        %s\n",
921                     vidfmt_sel ? fmt_strs[vidfmt_sel] : "automatic detection");
922
923         if (vid_input >= CX18_AV_COMPOSITE1 &&
924             vid_input <= CX18_AV_COMPOSITE8) {
925                 CX18_INFO("Specified video input:     Composite %d\n",
926                         vid_input - CX18_AV_COMPOSITE1 + 1);
927         } else {
928                 CX18_INFO("Specified video input:     S-Video (Luma In%d, Chroma In%d)\n",
929                         (vid_input & 0xf0) >> 4, (vid_input & 0xf00) >> 8);
930         }
931
932         CX18_INFO("Specified audioclock freq: %d Hz\n", state->audclk_freq);
933 }
934
935 /* ----------------------------------------------------------------------- */
936
937 static void log_audio_status(struct cx18 *cx)
938 {
939         struct cx18_av_state *state = &cx->av_state;
940         u8 download_ctl = cx18_av_read(cx, 0x803);
941         u8 mod_det_stat0 = cx18_av_read(cx, 0x804);
942         u8 mod_det_stat1 = cx18_av_read(cx, 0x805);
943         u8 audio_config = cx18_av_read(cx, 0x808);
944         u8 pref_mode = cx18_av_read(cx, 0x809);
945         u8 afc0 = cx18_av_read(cx, 0x80b);
946         u8 mute_ctl = cx18_av_read(cx, 0x8d3);
947         int aud_input = state->aud_input;
948         char *p;
949
950         switch (mod_det_stat0) {
951         case 0x00: p = "mono"; break;
952         case 0x01: p = "stereo"; break;
953         case 0x02: p = "dual"; break;
954         case 0x04: p = "tri"; break;
955         case 0x10: p = "mono with SAP"; break;
956         case 0x11: p = "stereo with SAP"; break;
957         case 0x12: p = "dual with SAP"; break;
958         case 0x14: p = "tri with SAP"; break;
959         case 0xfe: p = "forced mode"; break;
960         default: p = "not defined"; break;
961         }
962         CX18_INFO("Detected audio mode:       %s\n", p);
963
964         switch (mod_det_stat1) {
965         case 0x00: p = "not defined"; break;
966         case 0x01: p = "EIAJ"; break;
967         case 0x02: p = "A2-M"; break;
968         case 0x03: p = "A2-BG"; break;
969         case 0x04: p = "A2-DK1"; break;
970         case 0x05: p = "A2-DK2"; break;
971         case 0x06: p = "A2-DK3"; break;
972         case 0x07: p = "A1 (6.0 MHz FM Mono)"; break;
973         case 0x08: p = "AM-L"; break;
974         case 0x09: p = "NICAM-BG"; break;
975         case 0x0a: p = "NICAM-DK"; break;
976         case 0x0b: p = "NICAM-I"; break;
977         case 0x0c: p = "NICAM-L"; break;
978         case 0x0d: p = "BTSC/EIAJ/A2-M Mono (4.5 MHz FMMono)"; break;
979         case 0x0e: p = "IF FM Radio"; break;
980         case 0x0f: p = "BTSC"; break;
981         case 0x10: p = "detected chrominance"; break;
982         case 0xfd: p = "unknown audio standard"; break;
983         case 0xfe: p = "forced audio standard"; break;
984         case 0xff: p = "no detected audio standard"; break;
985         default: p = "not defined"; break;
986         }
987         CX18_INFO("Detected audio standard:   %s\n", p);
988         CX18_INFO("Audio muted:               %s\n",
989                     (mute_ctl & 0x2) ? "yes" : "no");
990         CX18_INFO("Audio microcontroller:     %s\n",
991                     (download_ctl & 0x10) ? "running" : "stopped");
992
993         switch (audio_config >> 4) {
994         case 0x00: p = "undefined"; break;
995         case 0x01: p = "BTSC"; break;
996         case 0x02: p = "EIAJ"; break;
997         case 0x03: p = "A2-M"; break;
998         case 0x04: p = "A2-BG"; break;
999         case 0x05: p = "A2-DK1"; break;
1000         case 0x06: p = "A2-DK2"; break;
1001         case 0x07: p = "A2-DK3"; break;
1002         case 0x08: p = "A1 (6.0 MHz FM Mono)"; break;
1003         case 0x09: p = "AM-L"; break;
1004         case 0x0a: p = "NICAM-BG"; break;
1005         case 0x0b: p = "NICAM-DK"; break;
1006         case 0x0c: p = "NICAM-I"; break;
1007         case 0x0d: p = "NICAM-L"; break;
1008         case 0x0e: p = "FM radio"; break;
1009         case 0x0f: p = "automatic detection"; break;
1010         default: p = "undefined"; break;
1011         }
1012         CX18_INFO("Configured audio standard: %s\n", p);
1013
1014         if ((audio_config >> 4) < 0xF) {
1015                 switch (audio_config & 0xF) {
1016                 case 0x00: p = "MONO1 (LANGUAGE A/Mono L+R channel for BTSC, EIAJ, A2)"; break;
1017                 case 0x01: p = "MONO2 (LANGUAGE B)"; break;
1018                 case 0x02: p = "MONO3 (STEREO forced MONO)"; break;
1019                 case 0x03: p = "MONO4 (NICAM ANALOG-Language C/Analog Fallback)"; break;
1020                 case 0x04: p = "STEREO"; break;
1021                 case 0x05: p = "DUAL1 (AC)"; break;
1022                 case 0x06: p = "DUAL2 (BC)"; break;
1023                 case 0x07: p = "DUAL3 (AB)"; break;
1024                 default: p = "undefined";
1025                 }
1026                 CX18_INFO("Configured audio mode:     %s\n", p);
1027         } else {
1028                 switch (audio_config & 0xF) {
1029                 case 0x00: p = "BG"; break;
1030                 case 0x01: p = "DK1"; break;
1031                 case 0x02: p = "DK2"; break;
1032                 case 0x03: p = "DK3"; break;
1033                 case 0x04: p = "I"; break;
1034                 case 0x05: p = "L"; break;
1035                 case 0x06: p = "BTSC"; break;
1036                 case 0x07: p = "EIAJ"; break;
1037                 case 0x08: p = "A2-M"; break;
1038                 case 0x09: p = "FM Radio (4.5 MHz)"; break;
1039                 case 0x0a: p = "FM Radio (5.5 MHz)"; break;
1040                 case 0x0b: p = "S-Video"; break;
1041                 case 0x0f: p = "automatic standard and mode detection"; break;
1042                 default: p = "undefined"; break;
1043                 }
1044                 CX18_INFO("Configured audio system:   %s\n", p);
1045         }
1046
1047         if (aud_input)
1048                 CX18_INFO("Specified audio input:     Tuner (In%d)\n",
1049                                 aud_input);
1050         else
1051                 CX18_INFO("Specified audio input:     External\n");
1052
1053         switch (pref_mode & 0xf) {
1054         case 0: p = "mono/language A"; break;
1055         case 1: p = "language B"; break;
1056         case 2: p = "language C"; break;
1057         case 3: p = "analog fallback"; break;
1058         case 4: p = "stereo"; break;
1059         case 5: p = "language AC"; break;
1060         case 6: p = "language BC"; break;
1061         case 7: p = "language AB"; break;
1062         default: p = "undefined"; break;
1063         }
1064         CX18_INFO("Preferred audio mode:      %s\n", p);
1065
1066         if ((audio_config & 0xf) == 0xf) {
1067                 switch ((afc0 >> 3) & 0x1) {
1068                 case 0: p = "system DK"; break;
1069                 case 1: p = "system L"; break;
1070                 }
1071                 CX18_INFO("Selected 65 MHz format:    %s\n", p);
1072
1073                 switch (afc0 & 0x7) {
1074                 case 0: p = "Chroma"; break;
1075                 case 1: p = "BTSC"; break;
1076                 case 2: p = "EIAJ"; break;
1077                 case 3: p = "A2-M"; break;
1078                 case 4: p = "autodetect"; break;
1079                 default: p = "undefined"; break;
1080                 }
1081                 CX18_INFO("Selected 45 MHz format:    %s\n", p);
1082         }
1083 }