2 * Atmel PIO2 Port Multiplexer support
4 * Copyright (C) 2004-2006 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
14 #include <linux/platform_device.h>
15 #include <linux/irq.h>
20 #include <mach/portmux.h>
24 #define MAX_NR_PIO_DEVICES 8
27 struct gpio_chip chip;
29 const struct platform_device *pdev;
35 static struct pio_device pio_dev[MAX_NR_PIO_DEVICES];
37 static struct pio_device *gpio_to_pio(unsigned int gpio)
39 struct pio_device *pio;
43 if (index >= MAX_NR_PIO_DEVICES)
45 pio = &pio_dev[index];
52 /* Pin multiplexing API */
53 static DEFINE_SPINLOCK(pio_lock);
55 void __init at32_select_periph(unsigned int port, u32 pin_mask,
56 unsigned int periph, unsigned long flags)
58 struct pio_device *pio;
60 /* assign and verify pio */
61 pio = gpio_to_pio(port);
63 printk(KERN_WARNING "pio: invalid port %u\n", port);
67 /* Test if any of the requested pins is already muxed */
69 if (unlikely(pio->pinmux_mask & pin_mask)) {
70 printk(KERN_WARNING "%s: pin(s) busy (requested 0x%x, busy 0x%x)\n",
71 pio->name, pin_mask, pio->pinmux_mask & pin_mask);
72 spin_unlock(&pio_lock);
76 pio->pinmux_mask |= pin_mask;
79 pio_writel(pio, PUER, pin_mask);
81 /* select either peripheral A or B */
83 pio_writel(pio, BSR, pin_mask);
85 pio_writel(pio, ASR, pin_mask);
87 /* enable peripheral control */
88 pio_writel(pio, PDR, pin_mask);
90 /* Disable pull ups if not requested. */
91 if (!(flags & AT32_GPIOF_PULLUP))
92 pio_writel(pio, PUDR, pin_mask);
94 spin_unlock(&pio_lock);
102 void __init at32_select_gpio(unsigned int pin, unsigned long flags)
104 struct pio_device *pio;
105 unsigned int pin_index = pin & 0x1f;
106 u32 mask = 1 << pin_index;
108 pio = gpio_to_pio(pin);
109 if (unlikely(!pio)) {
110 printk("pio: invalid pin %u\n", pin);
114 if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) {
115 printk("%s: pin %u is busy\n", pio->name, pin_index);
119 if (flags & AT32_GPIOF_OUTPUT) {
120 if (flags & AT32_GPIOF_HIGH)
121 pio_writel(pio, SODR, mask);
123 pio_writel(pio, CODR, mask);
124 if (flags & AT32_GPIOF_MULTIDRV)
125 pio_writel(pio, MDER, mask);
127 pio_writel(pio, MDDR, mask);
128 pio_writel(pio, PUDR, mask);
129 pio_writel(pio, OER, mask);
131 if (flags & AT32_GPIOF_PULLUP)
132 pio_writel(pio, PUER, mask);
134 pio_writel(pio, PUDR, mask);
135 if (flags & AT32_GPIOF_DEGLITCH)
136 pio_writel(pio, IFER, mask);
138 pio_writel(pio, IFDR, mask);
139 pio_writel(pio, ODR, mask);
142 pio_writel(pio, PER, mask);
151 * Undo a previous pin reservation. Will not affect the hardware
154 void at32_deselect_pin(unsigned int pin)
156 struct pio_device *pio;
157 unsigned int pin_index = pin & 0x1f;
159 pio = gpio_to_pio(pin);
160 if (unlikely(!pio)) {
161 printk("pio: invalid pin %u\n", pin);
166 clear_bit(pin_index, &pio->pinmux_mask);
169 /* Reserve a pin, preventing anyone else from changing its configuration. */
170 void __init at32_reserve_pin(unsigned int pin)
172 struct pio_device *pio;
173 unsigned int pin_index = pin & 0x1f;
175 pio = gpio_to_pio(pin);
176 if (unlikely(!pio)) {
177 printk("pio: invalid pin %u\n", pin);
181 if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) {
182 printk("%s: pin %u is busy\n", pio->name, pin_index);
192 /*--------------------------------------------------------------------------*/
196 static int direction_input(struct gpio_chip *chip, unsigned offset)
198 struct pio_device *pio = container_of(chip, struct pio_device, chip);
199 u32 mask = 1 << offset;
201 if (!(pio_readl(pio, PSR) & mask))
204 pio_writel(pio, ODR, mask);
208 static int gpio_get(struct gpio_chip *chip, unsigned offset)
210 struct pio_device *pio = container_of(chip, struct pio_device, chip);
212 return (pio_readl(pio, PDSR) >> offset) & 1;
215 static void gpio_set(struct gpio_chip *chip, unsigned offset, int value);
217 static int direction_output(struct gpio_chip *chip, unsigned offset, int value)
219 struct pio_device *pio = container_of(chip, struct pio_device, chip);
220 u32 mask = 1 << offset;
222 if (!(pio_readl(pio, PSR) & mask))
225 gpio_set(chip, offset, value);
226 pio_writel(pio, OER, mask);
230 static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
232 struct pio_device *pio = container_of(chip, struct pio_device, chip);
233 u32 mask = 1 << offset;
236 pio_writel(pio, SODR, mask);
238 pio_writel(pio, CODR, mask);
241 /*--------------------------------------------------------------------------*/
243 /* GPIO IRQ support */
245 static void gpio_irq_mask(unsigned irq)
247 unsigned gpio = irq_to_gpio(irq);
248 struct pio_device *pio = &pio_dev[gpio >> 5];
250 pio_writel(pio, IDR, 1 << (gpio & 0x1f));
253 static void gpio_irq_unmask(unsigned irq)
255 unsigned gpio = irq_to_gpio(irq);
256 struct pio_device *pio = &pio_dev[gpio >> 5];
258 pio_writel(pio, IER, 1 << (gpio & 0x1f));
261 static int gpio_irq_type(unsigned irq, unsigned type)
263 if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE)
269 static struct irq_chip gpio_irqchip = {
271 .mask = gpio_irq_mask,
272 .unmask = gpio_irq_unmask,
273 .set_type = gpio_irq_type,
276 static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
278 struct pio_device *pio = get_irq_chip_data(irq);
281 gpio_irq = (unsigned) get_irq_data(irq);
286 /* ack pending GPIO interrupts */
287 isr = pio_readl(pio, ISR) & pio_readl(pio, IMR);
305 gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq)
309 set_irq_chip_data(irq, pio);
310 set_irq_data(irq, (void *) gpio_irq);
312 for (i = 0; i < 32; i++, gpio_irq++) {
313 set_irq_chip_data(gpio_irq, pio);
314 set_irq_chip_and_handler(gpio_irq, &gpio_irqchip,
318 set_irq_chained_handler(irq, gpio_irq_handler);
321 /*--------------------------------------------------------------------------*/
323 #ifdef CONFIG_DEBUG_FS
325 #include <linux/seq_file.h>
328 * This shows more info than the generic gpio dump code:
329 * pullups, deglitching, open drain drive.
331 static void pio_bank_show(struct seq_file *s, struct gpio_chip *chip)
333 struct pio_device *pio = container_of(chip, struct pio_device, chip);
334 u32 psr, osr, imr, pdsr, pusr, ifsr, mdsr;
339 psr = pio_readl(pio, PSR);
340 osr = pio_readl(pio, OSR);
341 imr = pio_readl(pio, IMR);
342 pdsr = pio_readl(pio, PDSR);
343 pusr = pio_readl(pio, PUSR);
344 ifsr = pio_readl(pio, IFSR);
345 mdsr = pio_readl(pio, MDSR);
347 bank = 'A' + pio->pdev->id;
349 for (i = 0, mask = 1; i < 32; i++, mask <<= 1) {
352 label = gpiochip_is_requested(chip, i);
353 if (!label && (imr & mask))
358 seq_printf(s, " gpio-%-3d P%c%-2d (%-12s) %s %s %s",
359 chip->base + i, bank, i,
361 (osr & mask) ? "out" : "in ",
362 (mask & pdsr) ? "hi" : "lo",
363 (mask & pusr) ? " " : "up");
365 seq_printf(s, " deglitch");
366 if ((osr & mdsr) & mask)
367 seq_printf(s, " open-drain");
369 seq_printf(s, " irq-%d edge-both",
370 gpio_to_irq(chip->base + i));
376 #define pio_bank_show NULL
380 /*--------------------------------------------------------------------------*/
382 static int __init pio_probe(struct platform_device *pdev)
384 struct pio_device *pio = NULL;
385 int irq = platform_get_irq(pdev, 0);
386 int gpio_irq_base = GPIO_IRQ_BASE + pdev->id * 32;
388 BUG_ON(pdev->id >= MAX_NR_PIO_DEVICES);
389 pio = &pio_dev[pdev->id];
392 pio->chip.label = pio->name;
393 pio->chip.base = pdev->id * 32;
394 pio->chip.ngpio = 32;
395 pio->chip.dev = &pdev->dev;
396 pio->chip.owner = THIS_MODULE;
398 pio->chip.direction_input = direction_input;
399 pio->chip.get = gpio_get;
400 pio->chip.direction_output = direction_output;
401 pio->chip.set = gpio_set;
402 pio->chip.dbg_show = pio_bank_show;
404 gpiochip_add(&pio->chip);
406 gpio_irq_setup(pio, irq, gpio_irq_base);
408 platform_set_drvdata(pdev, pio);
410 printk(KERN_DEBUG "%s: base 0x%p, irq %d chains %d..%d\n",
411 pio->name, pio->regs, irq, gpio_irq_base, gpio_irq_base + 31);
416 static struct platform_driver pio_driver = {
422 static int __init pio_init(void)
424 return platform_driver_probe(&pio_driver, pio_probe);
426 postcore_initcall(pio_init);
428 void __init at32_init_pio(struct platform_device *pdev)
430 struct resource *regs;
431 struct pio_device *pio;
433 if (pdev->id > MAX_NR_PIO_DEVICES) {
434 dev_err(&pdev->dev, "only %d PIO devices supported\n",
439 pio = &pio_dev[pdev->id];
440 snprintf(pio->name, sizeof(pio->name), "pio%d", pdev->id);
442 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
444 dev_err(&pdev->dev, "no mmio resource defined\n");
448 pio->clk = clk_get(&pdev->dev, "mck");
449 if (IS_ERR(pio->clk))
451 * This is a fatal error, but if we continue we might
452 * be so lucky that we manage to initialize the
453 * console and display this message...
455 dev_err(&pdev->dev, "no mck clock defined\n");
457 clk_enable(pio->clk);
460 pio->regs = ioremap(regs->start, regs->end - regs->start + 1);
462 /* start with irqs disabled and acked */
463 pio_writel(pio, IDR, ~0UL);
464 (void) pio_readl(pio, ISR);