2 * linux/arch/arm/mach-mmp/pxa168.c
4 * Code specific to PXA168
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/list.h>
16 #include <linux/clk.h>
18 #include <asm/mach/time.h>
19 #include <mach/addr-map.h>
20 #include <mach/cputype.h>
21 #include <mach/regs-apbc.h>
22 #include <mach/irqs.h>
23 #include <mach/gpio.h>
25 #include <mach/devices.h>
31 #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
33 static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
35 MFP_ADDR_X(GPIO0, GPIO36, 0x04c),
36 MFP_ADDR_X(GPIO37, GPIO55, 0x000),
37 MFP_ADDR_X(GPIO56, GPIO123, 0x0e0),
38 MFP_ADDR_X(GPIO124, GPIO127, 0x0f4),
43 #define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
45 static void __init pxa168_init_gpio(void)
49 /* enable GPIO clock */
50 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO);
52 /* unmask GPIO edge detection for all 4 banks - APMASKx */
53 for (i = 0; i < 4; i++)
54 __raw_writel(0xffffffff, APMASK(i));
56 pxa_init_gpio(IRQ_PXA168_GPIOX, 0, 127, NULL);
59 void __init pxa168_init_irq(void)
65 /* APB peripheral clocks */
66 static APBC_CLK(uart1, PXA168_UART1, 1, 14745600);
67 static APBC_CLK(uart2, PXA168_UART2, 1, 14745600);
68 static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000);
69 static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000);
71 /* device and clock bindings */
72 static struct clk_lookup pxa168_clkregs[] = {
73 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
74 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
75 INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
76 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
79 static int __init pxa168_init(void)
81 if (cpu_is_pxa168()) {
82 mfp_init_base(MFPR_VIRT_BASE);
83 mfp_init_addr(pxa168_mfp_addr_map);
84 pxa_init_dma(IRQ_PXA168_DMA_INT0, 32);
85 clks_register(ARRAY_AND_SIZE(pxa168_clkregs));
90 postcore_initcall(pxa168_init);
92 /* system timer - clock enabled, 3.25MHz */
93 #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
95 static void __init pxa168_timer_init(void)
97 /* this is early, we have to initialize the CCU registers by
98 * ourselves instead of using clk_* API. Clock rate is defined
99 * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
101 __raw_writel(APBC_APBCLK | APBC_RST, APBC_PXA168_TIMERS);
103 /* 3.25MHz, bus/functional clock enabled, release reset */
104 __raw_writel(TIMER_CLK_RST, APBC_PXA168_TIMERS);
106 timer_init(IRQ_PXA168_TIMER1);
109 struct sys_timer pxa168_timer = {
110 .init = pxa168_timer_init,
113 /* on-chip devices */
114 PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
115 PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
116 PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
117 PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);