1 /* $Id: serial.c,v 1.25 2004/09/29 10:33:49 starvik Exp $
3 * Serial port driver for the ETRAX 100LX chip
5 * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB
7 * Many, many authors. Based once upon a time on serial.c for 16x50.
10 * Revision 1.25 2004/09/29 10:33:49 starvik
11 * Resolved a dealock when printing debug from kernel.
13 * Revision 1.24 2004/08/27 23:25:59 johana
14 * rs_set_termios() must call change_speed() if c_iflag has changed or
15 * automatic XOFF handling will be enabled and transmitter will stop
16 * if 0x13 is received.
18 * Revision 1.23 2004/08/24 06:57:13 starvik
19 * More whitespace cleanup
21 * Revision 1.22 2004/08/24 06:12:20 starvik
24 * Revision 1.20 2004/05/24 12:00:20 starvik
25 * Big merge of stuff from Linux 2.4 (e.g. manual mode for the serial port).
27 * Revision 1.19 2004/05/17 13:12:15 starvik
29 * Big merge from Linux 2.4 still pending.
31 * Revision 1.18 2003/10/28 07:18:30 starvik
32 * Compiles with debug info
34 * Revision 1.17 2003/07/04 08:27:37 starvik
35 * Merge of Linux 2.5.74
37 * Revision 1.16 2003/06/13 10:05:19 johana
38 * Help the user to avoid trouble by:
39 * Forcing mixed mode for status/control lines if not all pins are used.
41 * Revision 1.15 2003/06/13 09:43:01 johana
42 * Merged in the following changes from os/linux/arch/cris/drivers/serial.c
43 * + some minor changes to reduce diff.
45 * Revision 1.49 2003/05/30 11:31:54 johana
46 * Merged in change-branch--serial9bit that adds CMSPAR support for sticky
49 * Revision 1.48 2003/05/30 11:03:57 johana
50 * Implemented rs_send_xchar() by disabling the DMA and writing manually.
51 * Added e100_disable_txdma_channel() and e100_enable_txdma_channel().
52 * Fixed rs_throttle() and rs_unthrottle() to properly call rs_send_xchar
53 * instead of setting info->x_char and check the CRTSCTS flag before
54 * controlling the rts pin.
56 * Revision 1.14 2003/04/09 08:12:44 pkj
57 * Corrected typo changes made upstream.
59 * Revision 1.13 2003/04/09 05:20:47 starvik
60 * Merge of Linux 2.5.67
62 * Revision 1.11 2003/01/22 06:48:37 starvik
63 * Fixed warnings issued by GCC 3.2.1
65 * Revision 1.9 2002/12/13 09:07:47 starvik
66 * Alert user that RX_TIMEOUT_TICKS==0 doesn't work
68 * Revision 1.8 2002/12/11 13:13:57 starvik
69 * Added arch/ to v10 specific includes
70 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
72 * Revision 1.7 2002/12/06 07:13:57 starvik
73 * Corrected work queue stuff
74 * Removed CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
76 * Revision 1.6 2002/11/21 07:17:46 starvik
77 * Change static inline to extern inline where otherwise outlined with gcc-3.2
79 * Revision 1.5 2002/11/14 15:59:49 starvik
80 * Linux 2.5 port of the latest serial driver from 2.4. The work queue stuff
81 * probably doesn't work yet.
83 * Revision 1.42 2002/11/05 09:08:47 johana
84 * Better implementation of rs_stop() and rs_start() that uses the XOFF
85 * register to start/stop transmission.
86 * change_speed() also initilises XOFF register correctly so that
87 * auto_xoff is enabled when IXON flag is set by user.
88 * This gives fast XOFF response times.
90 * Revision 1.41 2002/11/04 18:40:57 johana
91 * Implemented rs_stop() and rs_start().
92 * Simple tests using hwtestserial indicates that this should be enough
95 * Revision 1.40 2002/10/14 05:33:18 starvik
96 * RS-485 uses fast timers even if SERIAL_FAST_TIMER is disabled
98 * Revision 1.39 2002/09/30 21:00:57 johana
99 * Support for CONFIG_ETRAX_SERx_DTR_RI_DSR_CD_MIXED where the status and
100 * control pins can be mixed between PA and PB.
101 * If no serial port uses MIXED old solution is used
102 * (saves a few bytes and cycles).
103 * control_pins struct uses masks instead of bit numbers.
104 * Corrected dummy values and polarity in line_info() so
105 * /proc/tty/driver/serial is now correct.
106 * (the E100_xxx_GET() macros is really active low - perhaps not obvious)
108 * Revision 1.38 2002/08/23 11:01:36 starvik
109 * Check that serial port is enabled in all interrupt handlers to avoid
110 * restarts of DMA channels not assigned to serial ports
112 * Revision 1.37 2002/08/13 13:02:37 bjornw
113 * Removed some warnings because of unused code
115 * Revision 1.36 2002/08/08 12:50:01 starvik
116 * Serial interrupt is shared with synchronous serial port driver
118 * Revision 1.35 2002/06/03 10:40:49 starvik
119 * Increased RS-485 RTS toggle timer to 2 characters
121 * Revision 1.34 2002/05/28 18:59:36 johana
122 * Whitespace and comment fixing to be more like etrax100ser.c 1.71.
124 * Revision 1.33 2002/05/28 17:55:43 johana
125 * RS-485 uses FAST_TIMER if enabled, and starts a short (one char time)
126 * timer from tranismit_chars (interrupt context).
127 * The timer toggles RTS in interrupt context when expired giving minimum
130 * Revision 1.32 2002/05/22 13:58:00 johana
131 * Renamed rs_write() to raw_write() and made it inline.
132 * New rs_write() handles RS-485 if configured and enabled
133 * (moved code from e100_write_rs485()).
134 * RS-485 ioctl's uses copy_from_user() instead of verify_area().
136 * Revision 1.31 2002/04/22 11:20:03 johana
137 * Updated copyright years.
139 * Revision 1.30 2002/04/22 09:39:12 johana
140 * RS-485 support compiles.
142 * Revision 1.29 2002/01/14 16:10:01 pkj
143 * Allocate the receive buffers dynamically. The static 4kB buffer was
144 * too small for the peaks. This means that we can get rid of the extra
145 * buffer and the copying to it. It also means we require less memory
146 * under normal operations, but can use more when needed (there is a
147 * cap at 64kB for safety reasons). If there is no memory available
148 * we panic(), and die a horrible death...
150 * Revision 1.28 2001/12/18 15:04:53 johana
151 * Cleaned up write_rs485() - now it works correctly without padding extra
153 * Added sane default initialisation of rs485.
154 * Added #ifdef around dummy variables.
156 * Revision 1.27 2001/11/29 17:00:41 pkj
157 * 2kB seems to be too small a buffer when using 921600 bps,
158 * so increase it to 4kB (this was already done for the elinux
159 * version of the serial driver).
161 * Revision 1.26 2001/11/19 14:20:41 pkj
162 * Minor changes to comments and unused code.
164 * Revision 1.25 2001/11/12 20:03:43 pkj
165 * Fixed compiler warnings.
167 * Revision 1.24 2001/11/12 15:10:05 pkj
168 * Total redesign of the receiving part of the serial driver.
169 * Uses eight chained descriptors to write to a 4kB buffer.
170 * This data is then serialised into a 2kB buffer. From there it
171 * is copied into the TTY's flip buffers when they become available.
172 * A lot of copying, and the sizes of the buffers might need to be
173 * tweaked, but all in all it should work better than the previous
174 * version, without the need to modify the TTY code in any way.
175 * Also note that erroneous bytes are now correctly marked in the
176 * flag buffers (instead of always marking the first byte).
178 * Revision 1.23 2001/10/30 17:53:26 pkj
179 * * Set info->uses_dma to 0 when a port is closed.
180 * * Mark the timer1 interrupt as a fast one (SA_INTERRUPT).
181 * * Call start_flush_timer() in start_receive() if
182 * CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is defined.
184 * Revision 1.22 2001/10/30 17:44:03 pkj
185 * Use %lu for received and transmitted counters in line_info().
187 * Revision 1.21 2001/10/30 17:40:34 pkj
188 * Clean-up. The only change to functionality is that
189 * CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS(=5) is used instead of
190 * MAX_FLUSH_TIME(=8).
192 * Revision 1.20 2001/10/30 15:24:49 johana
193 * Added char_time stuff from 2.0 driver.
195 * Revision 1.19 2001/10/30 15:23:03 johana
196 * Merged with 1.13.2 branch + fixed indentation
197 * and changed CONFIG_ETRAX100_XYS to CONFIG_ETRAX_XYZ
199 * Revision 1.18 2001/09/24 09:27:22 pkj
200 * Completed ext_baud_table[] in cflag_to_baud() and cflag_to_etrax_baud().
202 * Revision 1.17 2001/08/24 11:32:49 ronny
203 * More fixes for the CONFIG_ETRAX_SERIAL_PORT0 define.
205 * Revision 1.16 2001/08/24 07:56:22 ronny
206 * Added config ifdefs around ser0 irq requests.
208 * Revision 1.15 2001/08/16 09:10:31 bjarne
209 * serial.c - corrected the initialization of rs_table, the wrong defines
211 * Corrected a test in timed_flush_handler.
212 * Changed configured to enabled.
213 * serial.h - Changed configured to enabled.
215 * Revision 1.14 2001/08/15 07:31:23 bjarne
216 * Introduced two new members to the e100_serial struct.
217 * configured - Will be set to 1 if the port has been configured in .config
218 * uses_dma - Should be set to 1 if the port uses DMA. Currently it is set
220 * when a port is opened. This is used to limit the DMA interrupt
221 * routines to only manipulate DMA channels actually used by the
224 * Revision 1.13.2.2 2001/10/17 13:57:13 starvik
225 * Receiver was broken by the break fixes
227 * Revision 1.13.2.1 2001/07/20 13:57:39 ronny
228 * Merge with new stuff from etrax100ser.c. Works but haven't checked stuff
229 * like break handling.
231 * Revision 1.13 2001/05/09 12:40:31 johana
232 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
234 * Revision 1.12 2001/04/19 12:23:07 bjornw
235 * CONFIG_RS485 -> CONFIG_ETRAX_RS485
237 * Revision 1.11 2001/04/05 14:29:48 markusl
238 * Updated according to review remarks i.e.
239 * -Use correct types in port structure to avoid compiler warnings
240 * -Try to use IO_* macros whenever possible
241 * -Open should never return -EBUSY
243 * Revision 1.10 2001/03/05 13:14:07 bjornw
244 * Another spelling fix
246 * Revision 1.9 2001/02/23 13:46:38 bjornw
249 * Revision 1.8 2001/01/23 14:56:35 markusl
250 * Made use of ser1 optional
253 * Revision 1.7 2001/01/19 16:14:48 perf
254 * Added kernel options for serial ports 234.
255 * Changed option names from CONFIG_ETRAX100_XYZ to CONFIG_ETRAX_XYZ.
257 * Revision 1.6 2000/11/22 16:36:09 bjornw
258 * Please marketing by using the correct case when spelling Etrax.
260 * Revision 1.5 2000/11/21 16:43:37 bjornw
261 * Fixed so it compiles under CONFIG_SVINTO_SIM
263 * Revision 1.4 2000/11/15 17:34:12 bjornw
264 * Added a timeout timer for flushing input channels. The interrupt-based
265 * fast flush system should be easy to merge with this later (works the same
266 * way, only with an irq instead of a system timer_list)
268 * Revision 1.3 2000/11/13 17:19:57 bjornw
269 * * Incredibly, this almost complete rewrite of serial.c worked (at least
270 * for output) the first time.
272 * Items worth noticing:
274 * No Etrax100 port 1 workarounds (does only compile on 2.4 anyway now)
275 * RS485 is not ported (why can't it be done in userspace as on x86 ?)
276 * Statistics done through async_icount - if any more stats are needed,
277 * that's the place to put them or in an arch-dep version of it.
278 * timeout_interrupt and the other fast timeout stuff not ported yet
279 * There be dragons in this 3k+ line driver
281 * Revision 1.2 2000/11/10 16:50:28 bjornw
282 * First shot at a 2.4 port, does not compile totally yet
284 * Revision 1.1 2000/11/10 16:47:32 bjornw
285 * Added verbatim copy of rev 1.49 etrax100ser.c from elinux
287 * Revision 1.49 2000/10/30 15:47:14 tobiasa
288 * Changed version number.
290 * Revision 1.48 2000/10/25 11:02:43 johana
291 * Changed %ul to %lu in printf's
293 * Revision 1.47 2000/10/18 15:06:53 pkj
294 * Compile correctly with CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST and
295 * CONFIG_ETRAX_SERIAL_PROC_ENTRY together.
296 * Some clean-up of the /proc/serial file.
298 * Revision 1.46 2000/10/16 12:59:40 johana
299 * Added CONFIG_ETRAX_SERIAL_PROC_ENTRY for statistics and debug info.
301 * Revision 1.45 2000/10/13 17:10:59 pkj
302 * Do not flush DMAs while flipping TTY buffers.
304 * Revision 1.44 2000/10/13 16:34:29 pkj
305 * Added a delay in ser_interrupt() for 2.3ms when an error is detected.
306 * We do not know why this delay is required yet, but without it the
307 * irmaflash program does not work (this was the program that needed
308 * the ser_interrupt() to be needed in the first place). This should not
309 * affect normal use of the serial ports.
311 * Revision 1.43 2000/10/13 16:30:44 pkj
312 * New version of the fast flush of serial buffers code. This time
313 * it is localized to the serial driver and uses a fast timer to
316 * Revision 1.42 2000/10/13 14:54:26 bennyo
317 * Fix for switching RTS when using rs485
319 * Revision 1.41 2000/10/12 11:43:44 pkj
320 * Cleaned up a number of comments.
322 * Revision 1.40 2000/10/10 11:58:39 johana
323 * Made RS485 support generic for all ports.
324 * Toggle rts in interrupt if no delay wanted.
325 * WARNING: No true transmitter empty check??
326 * Set d_wait bit when sending data so interrupt is delayed until
327 * fifo flushed. (Fix tcdrain() problem)
329 * Revision 1.39 2000/10/04 16:08:02 bjornw
330 * * Use virt_to_phys etc. for DMA addresses
331 * * Removed CONFIG_FLUSH_DMA_FAST hacks
334 * Revision 1.38 2000/10/02 12:27:10 mattias
335 * * added variable used when using fast flush on serial dma.
336 * (CONFIG_FLUSH_DMA_FAST)
338 * Revision 1.37 2000/09/27 09:44:24 pkj
339 * Uncomment definition of SERIAL_HANDLE_EARLY_ERRORS.
341 * Revision 1.36 2000/09/20 13:12:52 johana
342 * Support for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS:
343 * Number of timer ticks between flush of receive fifo (1 tick = 10ms).
344 * Try 0-3 for low latency applications. Approx 5 for high load
345 * applications (e.g. PPP). Maybe this should be more adaptive some day...
347 * Revision 1.35 2000/09/20 10:36:08 johana
348 * Typo in get_lsr_info()
350 * Revision 1.34 2000/09/20 10:29:59 johana
351 * Let rs_chars_in_buffer() check fifo content as well.
352 * get_lsr_info() might work now (not tested).
353 * Easier to change the port to debug.
355 * Revision 1.33 2000/09/13 07:52:11 torbjore
358 * Revision 1.32 2000/08/31 14:45:37 bjornw
359 * After sending a break we need to reset the transmit DMA channel
361 * Revision 1.31 2000/06/21 12:13:29 johana
362 * Fixed wait for all chars sent when closing port.
363 * (Used to always take 1 second!)
364 * Added shadows for directions of status/ctrl signals.
366 * Revision 1.30 2000/05/29 16:27:55 bjornw
367 * Simulator ifdef moved a bit
369 * Revision 1.29 2000/05/09 09:40:30 mattias
370 * * Added description of dma registers used in timeout_interrupt
373 * Revision 1.28 2000/05/08 16:38:58 mattias
374 * * Bugfix for flushing fifo in timeout_interrupt
375 * Problem occurs when bluetooth stack waits for a small number of bytes
376 * containing an event acknowledging free buffers in bluetooth HW
377 * As before, data was stuck in fifo until more data came on uart and
378 * flushed it up to the stack.
380 * Revision 1.27 2000/05/02 09:52:28 jonasd
381 * Added fix for peculiar etrax behaviour when eop is forced on an empty
382 * fifo. This is used when flashing the IRMA chip. Disabled by default.
384 * Revision 1.26 2000/03/29 15:32:02 bjornw
387 * Revision 1.25 2000/02/16 16:59:36 bjornw
388 * * Receive DMA directly into the flip-buffer, eliminating an intermediary
389 * receive buffer and a memcpy. Will avoid some overruns.
390 * * Error message on debug port if an overrun or flip buffer overrun occurs.
391 * * Just use the first byte in the flag flip buffer for errors.
392 * * Check for timeout on the serial ports only each 5/100 s, not 1/100.
394 * Revision 1.24 2000/02/09 18:02:28 bjornw
395 * * Clear serial errors (overrun, framing, parity) correctly. Before, the
396 * receiver would get stuck if an error occurred and we did not restart
398 * * Cosmetics (indentation, some code made into inlines)
399 * * Some more debug options
400 * * Actually shut down the serial port (DMA irq, DMA reset, receiver stop)
401 * when the last open is closed. Corresponding fixes in startup().
402 * * rs_close() "tx FIFO wait" code moved into right place, bug & -> && fixed
403 * and make a special case out of port 1 (R_DMA_CHx_STATUS is broken for that)
404 * * e100_disable_rx/enable_rx just disables/enables the receiver, not RTS
406 * Revision 1.23 2000/01/24 17:46:19 johana
407 * Wait for flush of DMA/FIFO when closing port.
409 * Revision 1.22 2000/01/20 18:10:23 johana
410 * Added TIOCMGET ioctl to return modem status.
411 * Implemented modem status/control that works with the extra signals
412 * (DTR, DSR, RI,CD) as well.
413 * 3 different modes supported:
414 * ser0 on PB (Bundy), ser1 on PB (Lisa) and ser2 on PA (Bundy)
415 * Fixed DEF_TX value that caused the serial transmitter pin (txd) to go to 0 when
416 * closing the last filehandle, NASTY!.
417 * Added break generation, not tested though!
418 * Use IRQF_SHARED when request_irq() for ser2 and ser3 (shared with) par0 and par1.
419 * You can't use them at the same time (yet..), but you can hopefully switch
420 * between ser2/par0, ser3/par1 with the same kernel config.
421 * Replaced some magic constants with defines
426 static char *serial_version = "$Revision: 1.25 $";
428 #include <linux/types.h>
429 #include <linux/errno.h>
430 #include <linux/signal.h>
431 #include <linux/sched.h>
432 #include <linux/timer.h>
433 #include <linux/interrupt.h>
434 #include <linux/tty.h>
435 #include <linux/tty_flip.h>
436 #include <linux/major.h>
437 #include <linux/string.h>
438 #include <linux/fcntl.h>
439 #include <linux/mm.h>
440 #include <linux/slab.h>
441 #include <linux/init.h>
442 #include <asm/uaccess.h>
443 #include <linux/kernel.h>
444 #include <linux/mutex.h>
448 #include <asm/system.h>
449 #include <asm/bitops.h>
450 #include <linux/delay.h>
452 #include <asm/arch/svinto.h>
454 /* non-arch dependent serial structures are in linux/serial.h */
455 #include <linux/serial.h>
456 /* while we keep our own stuff (struct e100_serial) in a local .h file */
458 #include <asm/fasttimer.h>
460 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
461 #ifndef CONFIG_ETRAX_FAST_TIMER
462 #error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
466 #if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
467 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
468 #error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
471 #if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
472 #error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
476 * All of the compatibilty code so we can compile serial.c against
477 * older kernels is hidden in serial_compat.h
479 #if defined(LOCAL_HEADERS)
480 #include "serial_compat.h"
483 struct tty_driver *serial_driver;
485 /* serial subtype definitions */
486 #ifndef SERIAL_TYPE_NORMAL
487 #define SERIAL_TYPE_NORMAL 1
490 /* number of characters left in xmit buffer before we ask for more */
491 #define WAKEUP_CHARS 256
493 //#define SERIAL_DEBUG_INTR
494 //#define SERIAL_DEBUG_OPEN
495 //#define SERIAL_DEBUG_FLOW
496 //#define SERIAL_DEBUG_DATA
497 //#define SERIAL_DEBUG_THROTTLE
498 //#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
499 //#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
501 /* Enable this to use serial interrupts to handle when you
502 expect the first received event on the serial port to
503 be an error, break or similar. Used to be able to flash IRMA
505 #define SERIAL_HANDLE_EARLY_ERRORS
507 /* Defined and used in n_tty.c, but we need it here as well */
508 #define TTY_THRESHOLD_THROTTLE 128
510 /* Due to buffersizes and threshold values, our SERIAL_DESCR_BUF_SIZE
511 * must not be to high or flow control won't work if we leave it to the tty
512 * layer so we have our own throttling in flush_to_flip
513 * TTY_FLIPBUF_SIZE=512,
514 * TTY_THRESHOLD_THROTTLE/UNTHROTTLE=128
515 * BUF_SIZE can't be > 128
517 #define CRIS_BUF_SIZE 512
519 /* Currently 16 descriptors x 128 bytes = 2048 bytes */
520 #define SERIAL_DESCR_BUF_SIZE 256
522 #define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
523 #define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
525 /* We don't want to load the system with massive fast timer interrupt
526 * on high baudrates so limit it to 250 us (4kHz) */
527 #define MIN_FLUSH_TIME_USEC 250
529 /* Add an x here to log a lot of timer stuff */
531 /* Debug details of interrupt handling */
532 #define DINTR1(x) /* irq on/off, errors */
533 #define DINTR2(x) /* tx and rx */
534 /* Debug flip buffer stuff */
536 /* Debug flow control and overview of data flow */
539 #define DLOG_INT_TRIG(x)
541 //#define DEBUG_LOG_INCLUDED
542 #ifndef DEBUG_LOG_INCLUDED
543 #define DEBUG_LOG(line, string, value)
545 struct debug_log_info
548 unsigned long timer_data;
553 #define DEBUG_LOG_SIZE 4096
555 struct debug_log_info debug_log[DEBUG_LOG_SIZE];
556 int debug_log_pos = 0;
558 #define DEBUG_LOG(_line, _string, _value) do { \
559 if ((_line) == SERIAL_DEBUG_LINE) {\
560 debug_log_func(_line, _string, _value); \
564 void debug_log_func(int line, const char *string, int value)
566 if (debug_log_pos < DEBUG_LOG_SIZE) {
567 debug_log[debug_log_pos].time = jiffies;
568 debug_log[debug_log_pos].timer_data = *R_TIMER_DATA;
569 // debug_log[debug_log_pos].line = line;
570 debug_log[debug_log_pos].string = string;
571 debug_log[debug_log_pos].value = value;
574 /*printk(string, value);*/
578 #ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
579 /* Default number of timer ticks before flushing rx fifo
580 * When using "little data, low latency applications: use 0
581 * When using "much data applications (PPP)" use ~5
583 #define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
586 unsigned long timer_data_to_ns(unsigned long timer_data);
588 static void change_speed(struct e100_serial *info);
589 static void rs_throttle(struct tty_struct * tty);
590 static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
591 static int rs_write(struct tty_struct * tty, int from_user,
592 const unsigned char *buf, int count);
593 #ifdef CONFIG_ETRAX_RS485
594 static int e100_write_rs485(struct tty_struct * tty, int from_user,
595 const unsigned char *buf, int count);
597 static int get_lsr_info(struct e100_serial * info, unsigned int *value);
600 #define DEF_BAUD 115200 /* 115.2 kbit/s */
601 #define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
602 #define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
603 /* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
604 #define DEF_TX 0x80 /* or SERIAL_CTRL_B */
606 /* offsets from R_SERIALx_CTRL */
609 #define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
610 #define REG_TR_DATA 0
612 #define REG_TR_CTRL 1
613 #define REG_REC_CTRL 2
615 #define REG_XOFF 4 /* this is a 32 bit register */
617 /* The bitfields are the same for all serial ports */
618 #define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
619 #define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
620 #define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
621 #define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
622 #define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
624 #define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
626 /* Values for info->errorcode */
627 #define ERRCODE_SET_BREAK (TTY_BREAK)
628 #define ERRCODE_INSERT 0x100
629 #define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
631 #define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
634 * General note regarding the use of IO_* macros in this file:
636 * We will use the bits defined for DMA channel 6 when using various
637 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
638 * the same for all channels (which of course they are).
640 * We will also use the bits defined for serial port 0 when writing commands
641 * to the different ports, as these bits too are the same for all ports.
645 /* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
646 static const unsigned long e100_ser_int_mask = 0
647 #ifdef CONFIG_ETRAX_SERIAL_PORT0
648 | IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready)
650 #ifdef CONFIG_ETRAX_SERIAL_PORT1
651 | IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready)
653 #ifdef CONFIG_ETRAX_SERIAL_PORT2
654 | IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready)
656 #ifdef CONFIG_ETRAX_SERIAL_PORT3
657 | IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready)
660 unsigned long r_alt_ser_baudrate_shadow = 0;
662 /* this is the data for the four serial ports in the etrax100 */
663 /* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
664 /* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
666 static struct e100_serial rs_table[] = {
668 .port = (unsigned char *)R_SERIAL0_CTRL,
669 .irq = 1U << 12, /* uses DMA 6 and 7 */
670 .oclrintradr = R_DMA_CH6_CLR_INTR,
671 .ofirstadr = R_DMA_CH6_FIRST,
672 .ocmdadr = R_DMA_CH6_CMD,
673 .ostatusadr = R_DMA_CH6_STATUS,
674 .iclrintradr = R_DMA_CH7_CLR_INTR,
675 .ifirstadr = R_DMA_CH7_FIRST,
676 .icmdadr = R_DMA_CH7_CMD,
677 .idescradr = R_DMA_CH7_DESCR,
682 #ifdef CONFIG_ETRAX_SERIAL_PORT0
684 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
685 .dma_out_enabled = 1,
687 .dma_out_enabled = 0,
689 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
696 .dma_out_enabled = 0,
701 #ifndef CONFIG_SVINTO_SIM
703 .port = (unsigned char *)R_SERIAL1_CTRL,
704 .irq = 1U << 16, /* uses DMA 8 and 9 */
705 .oclrintradr = R_DMA_CH8_CLR_INTR,
706 .ofirstadr = R_DMA_CH8_FIRST,
707 .ocmdadr = R_DMA_CH8_CMD,
708 .ostatusadr = R_DMA_CH8_STATUS,
709 .iclrintradr = R_DMA_CH9_CLR_INTR,
710 .ifirstadr = R_DMA_CH9_FIRST,
711 .icmdadr = R_DMA_CH9_CMD,
712 .idescradr = R_DMA_CH9_DESCR,
717 #ifdef CONFIG_ETRAX_SERIAL_PORT1
719 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
720 .dma_out_enabled = 1,
722 .dma_out_enabled = 0,
724 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
731 .dma_out_enabled = 0,
737 .port = (unsigned char *)R_SERIAL2_CTRL,
738 .irq = 1U << 4, /* uses DMA 2 and 3 */
739 .oclrintradr = R_DMA_CH2_CLR_INTR,
740 .ofirstadr = R_DMA_CH2_FIRST,
741 .ocmdadr = R_DMA_CH2_CMD,
742 .ostatusadr = R_DMA_CH2_STATUS,
743 .iclrintradr = R_DMA_CH3_CLR_INTR,
744 .ifirstadr = R_DMA_CH3_FIRST,
745 .icmdadr = R_DMA_CH3_CMD,
746 .idescradr = R_DMA_CH3_DESCR,
751 #ifdef CONFIG_ETRAX_SERIAL_PORT2
753 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
754 .dma_out_enabled = 1,
756 .dma_out_enabled = 0,
758 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
765 .dma_out_enabled = 0,
771 .port = (unsigned char *)R_SERIAL3_CTRL,
772 .irq = 1U << 8, /* uses DMA 4 and 5 */
773 .oclrintradr = R_DMA_CH4_CLR_INTR,
774 .ofirstadr = R_DMA_CH4_FIRST,
775 .ocmdadr = R_DMA_CH4_CMD,
776 .ostatusadr = R_DMA_CH4_STATUS,
777 .iclrintradr = R_DMA_CH5_CLR_INTR,
778 .ifirstadr = R_DMA_CH5_FIRST,
779 .icmdadr = R_DMA_CH5_CMD,
780 .idescradr = R_DMA_CH5_DESCR,
785 #ifdef CONFIG_ETRAX_SERIAL_PORT3
787 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
788 .dma_out_enabled = 1,
790 .dma_out_enabled = 0,
792 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
799 .dma_out_enabled = 0,
807 #define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
809 static struct ktermios *serial_termios[NR_PORTS];
810 static struct ktermios *serial_termios_locked[NR_PORTS];
811 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
812 static struct fast_timer fast_timers[NR_PORTS];
815 #ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
816 #define PROCSTAT(x) x
817 struct ser_statistics_type {
819 int early_errors_cnt;
822 unsigned long int processing_flip;
823 unsigned long processing_flip_still_room;
824 unsigned long int timeout_flush_cnt;
831 static struct ser_statistics_type ser_stat[NR_PORTS];
837 #endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
840 #if defined(CONFIG_ETRAX_RS485)
841 #ifdef CONFIG_ETRAX_FAST_TIMER
842 static struct fast_timer fast_timers_rs485[NR_PORTS];
844 #if defined(CONFIG_ETRAX_RS485_ON_PA)
845 static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
847 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
848 static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT;
852 /* Info and macros needed for each ports extra control/status signals. */
853 #define E100_STRUCT_PORT(line, pinname) \
854 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
855 (R_PORT_PA_DATA): ( \
856 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
857 (R_PORT_PB_DATA):&dummy_ser[line]))
859 #define E100_STRUCT_SHADOW(line, pinname) \
860 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
861 (&port_pa_data_shadow): ( \
862 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
863 (&port_pb_data_shadow):&dummy_ser[line]))
864 #define E100_STRUCT_MASK(line, pinname) \
865 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
866 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
867 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
868 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
870 #define DUMMY_DTR_MASK 1
871 #define DUMMY_RI_MASK 2
872 #define DUMMY_DSR_MASK 4
873 #define DUMMY_CD_MASK 8
874 static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
876 /* If not all status pins are used or disabled, use mixed mode */
877 #ifdef CONFIG_ETRAX_SERIAL_PORT0
879 #define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
881 #if SER0_PA_BITSUM != -4
882 # if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
883 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
884 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
887 # if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
888 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
889 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
892 # if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
893 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
894 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
897 # if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
898 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
899 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
904 #define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
906 #if SER0_PB_BITSUM != -4
907 # if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
908 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
909 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
912 # if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
913 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
914 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
917 # if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
918 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
919 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
922 # if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
923 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
924 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
932 #ifdef CONFIG_ETRAX_SERIAL_PORT1
934 #define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
936 #if SER1_PA_BITSUM != -4
937 # if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
938 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
939 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
942 # if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
943 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
944 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
947 # if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
948 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
949 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
952 # if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
953 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
954 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
959 #define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
961 #if SER1_PB_BITSUM != -4
962 # if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
963 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
964 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
967 # if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
968 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
969 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
972 # if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
973 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
974 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
977 # if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
978 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
979 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
986 #ifdef CONFIG_ETRAX_SERIAL_PORT2
988 #define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
990 #if SER2_PA_BITSUM != -4
991 # if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
992 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
993 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
996 # if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
997 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
998 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1001 # if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
1002 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1003 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1006 # if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
1007 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1008 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1013 #define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
1015 #if SER2_PB_BITSUM != -4
1016 # if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
1017 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1018 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1021 # if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
1022 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1023 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1026 # if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
1027 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1028 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1031 # if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
1032 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1033 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1040 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1042 #define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
1044 #if SER3_PA_BITSUM != -4
1045 # if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
1046 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1047 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1050 # if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
1051 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1052 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1055 # if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
1056 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1057 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1060 # if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
1061 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1062 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1067 #define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
1069 #if SER3_PB_BITSUM != -4
1070 # if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
1071 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1072 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1075 # if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
1076 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1077 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1080 # if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
1081 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1082 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1085 # if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
1086 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1087 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1095 #if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
1096 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
1097 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
1098 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
1099 #define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1102 #ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1103 /* The pins can be mixed on PA and PB */
1104 #define CONTROL_PINS_PORT_NOT_USED(line) \
1105 &dummy_ser[line], &dummy_ser[line], \
1106 &dummy_ser[line], &dummy_ser[line], \
1107 &dummy_ser[line], &dummy_ser[line], \
1108 &dummy_ser[line], &dummy_ser[line], \
1109 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1114 volatile unsigned char *dtr_port;
1115 unsigned char *dtr_shadow;
1116 volatile unsigned char *ri_port;
1117 unsigned char *ri_shadow;
1118 volatile unsigned char *dsr_port;
1119 unsigned char *dsr_shadow;
1120 volatile unsigned char *cd_port;
1121 unsigned char *cd_shadow;
1123 unsigned char dtr_mask;
1124 unsigned char ri_mask;
1125 unsigned char dsr_mask;
1126 unsigned char cd_mask;
1129 static const struct control_pins e100_modem_pins[NR_PORTS] =
1133 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1134 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1135 E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI),
1136 E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
1137 E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD),
1138 E100_STRUCT_MASK(0,DTR),
1139 E100_STRUCT_MASK(0,RI),
1140 E100_STRUCT_MASK(0,DSR),
1141 E100_STRUCT_MASK(0,CD)
1143 CONTROL_PINS_PORT_NOT_USED(0)
1149 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1150 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1151 E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI),
1152 E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
1153 E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD),
1154 E100_STRUCT_MASK(1,DTR),
1155 E100_STRUCT_MASK(1,RI),
1156 E100_STRUCT_MASK(1,DSR),
1157 E100_STRUCT_MASK(1,CD)
1159 CONTROL_PINS_PORT_NOT_USED(1)
1165 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1166 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1167 E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI),
1168 E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
1169 E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD),
1170 E100_STRUCT_MASK(2,DTR),
1171 E100_STRUCT_MASK(2,RI),
1172 E100_STRUCT_MASK(2,DSR),
1173 E100_STRUCT_MASK(2,CD)
1175 CONTROL_PINS_PORT_NOT_USED(2)
1181 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1182 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1183 E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI),
1184 E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
1185 E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD),
1186 E100_STRUCT_MASK(3,DTR),
1187 E100_STRUCT_MASK(3,RI),
1188 E100_STRUCT_MASK(3,DSR),
1189 E100_STRUCT_MASK(3,CD)
1191 CONTROL_PINS_PORT_NOT_USED(3)
1195 #else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1197 /* All pins are on either PA or PB for each serial port */
1198 #define CONTROL_PINS_PORT_NOT_USED(line) \
1199 &dummy_ser[line], &dummy_ser[line], \
1200 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1205 volatile unsigned char *port;
1206 unsigned char *shadow;
1208 unsigned char dtr_mask;
1209 unsigned char ri_mask;
1210 unsigned char dsr_mask;
1211 unsigned char cd_mask;
1214 #define dtr_port port
1215 #define dtr_shadow shadow
1216 #define ri_port port
1217 #define ri_shadow shadow
1218 #define dsr_port port
1219 #define dsr_shadow shadow
1220 #define cd_port port
1221 #define cd_shadow shadow
1223 static const struct control_pins e100_modem_pins[NR_PORTS] =
1227 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1228 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1229 E100_STRUCT_MASK(0,DTR),
1230 E100_STRUCT_MASK(0,RI),
1231 E100_STRUCT_MASK(0,DSR),
1232 E100_STRUCT_MASK(0,CD)
1234 CONTROL_PINS_PORT_NOT_USED(0)
1240 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1241 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1242 E100_STRUCT_MASK(1,DTR),
1243 E100_STRUCT_MASK(1,RI),
1244 E100_STRUCT_MASK(1,DSR),
1245 E100_STRUCT_MASK(1,CD)
1247 CONTROL_PINS_PORT_NOT_USED(1)
1253 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1254 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1255 E100_STRUCT_MASK(2,DTR),
1256 E100_STRUCT_MASK(2,RI),
1257 E100_STRUCT_MASK(2,DSR),
1258 E100_STRUCT_MASK(2,CD)
1260 CONTROL_PINS_PORT_NOT_USED(2)
1266 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1267 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1268 E100_STRUCT_MASK(3,DTR),
1269 E100_STRUCT_MASK(3,RI),
1270 E100_STRUCT_MASK(3,DSR),
1271 E100_STRUCT_MASK(3,CD)
1273 CONTROL_PINS_PORT_NOT_USED(3)
1277 #endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1279 #define E100_RTS_MASK 0x20
1280 #define E100_CTS_MASK 0x40
1282 /* All serial port signals are active low:
1283 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
1284 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
1286 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
1290 #define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
1292 #define E100_CTS_GET(info) ((info)->port[REG_STATUS] & E100_CTS_MASK)
1294 /* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
1296 #define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
1298 /* Normally inputs */
1299 #define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
1300 #define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
1303 #define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
1307 * tmp_buf is used as a temporary buffer by serial_write. We need to
1308 * lock it in case the memcpy_fromfs blocks while swapping in a page,
1309 * and some other program tries to do a serial write at the same time.
1310 * Since the lock will only come under contention when the system is
1311 * swapping and available memory is low, it makes sense to share one
1312 * buffer across all the serial ports, since it significantly saves
1313 * memory if large numbers of serial ports are open.
1315 static unsigned char *tmp_buf;
1316 static DEFINE_MUTEX(tmp_buf_mutex);
1318 /* Calculate the chartime depending on baudrate, numbor of bits etc. */
1319 static void update_char_time(struct e100_serial * info)
1321 tcflag_t cflags = info->tty->termios->c_cflag;
1324 /* calc. number of bits / data byte */
1325 /* databits + startbit and 1 stopbit */
1326 if ((cflags & CSIZE) == CS7)
1331 if (cflags & CSTOPB) /* 2 stopbits ? */
1334 if (cflags & PARENB) /* parity bit ? */
1338 info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
1339 info->flush_time_usec = 4*info->char_time_usec;
1340 if (info->flush_time_usec < MIN_FLUSH_TIME_USEC)
1341 info->flush_time_usec = MIN_FLUSH_TIME_USEC;
1346 * This function maps from the Bxxxx defines in asm/termbits.h into real
1351 cflag_to_baud(unsigned int cflag)
1353 static int baud_table[] = {
1354 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
1355 4800, 9600, 19200, 38400 };
1357 static int ext_baud_table[] = {
1358 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
1359 0, 0, 0, 0, 0, 0, 0, 0 };
1361 if (cflag & CBAUDEX)
1362 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1364 return baud_table[cflag & CBAUD];
1367 /* and this maps to an etrax100 hardware baud constant */
1369 static unsigned char
1370 cflag_to_etrax_baud(unsigned int cflag)
1374 static char baud_table[] = {
1375 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1377 static char ext_baud_table[] = {
1378 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1380 if (cflag & CBAUDEX)
1381 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1383 retval = baud_table[cflag & CBAUD];
1386 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
1387 retval = 5; /* choose default 9600 instead */
1390 return retval | (retval << 4); /* choose same for both TX and RX */
1394 /* Various static support functions */
1396 /* Functions to set or clear DTR/RTS on the requested line */
1397 /* It is complicated by the fact that RTS is a serial port register, while
1398 * DTR might not be implemented in the HW at all, and if it is, it can be on
1404 e100_dtr(struct e100_serial *info, int set)
1406 #ifndef CONFIG_SVINTO_SIM
1407 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1409 #ifdef SERIAL_DEBUG_IO
1410 printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
1411 printk("ser%i shadow before 0x%02X get: %i\n",
1412 info->line, *e100_modem_pins[info->line].dtr_shadow,
1413 E100_DTR_GET(info));
1415 /* DTR is active low */
1417 unsigned long flags;
1421 *e100_modem_pins[info->line].dtr_shadow &= ~mask;
1422 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
1423 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
1424 restore_flags(flags);
1427 #ifdef SERIAL_DEBUG_IO
1428 printk("ser%i shadow after 0x%02X get: %i\n",
1429 info->line, *e100_modem_pins[info->line].dtr_shadow,
1430 E100_DTR_GET(info));
1435 /* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1439 e100_rts(struct e100_serial *info, int set)
1441 #ifndef CONFIG_SVINTO_SIM
1442 unsigned long flags;
1445 info->rx_ctrl &= ~E100_RTS_MASK;
1446 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
1447 info->port[REG_REC_CTRL] = info->rx_ctrl;
1448 restore_flags(flags);
1449 #ifdef SERIAL_DEBUG_IO
1450 printk("ser%i rts %i\n", info->line, set);
1456 /* If this behaves as a modem, RI and CD is an output */
1458 e100_ri_out(struct e100_serial *info, int set)
1460 #ifndef CONFIG_SVINTO_SIM
1461 /* RI is active low */
1463 unsigned char mask = e100_modem_pins[info->line].ri_mask;
1464 unsigned long flags;
1468 *e100_modem_pins[info->line].ri_shadow &= ~mask;
1469 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
1470 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1471 restore_flags(flags);
1476 e100_cd_out(struct e100_serial *info, int set)
1478 #ifndef CONFIG_SVINTO_SIM
1479 /* CD is active low */
1481 unsigned char mask = e100_modem_pins[info->line].cd_mask;
1482 unsigned long flags;
1486 *e100_modem_pins[info->line].cd_shadow &= ~mask;
1487 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
1488 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1489 restore_flags(flags);
1495 e100_disable_rx(struct e100_serial *info)
1497 #ifndef CONFIG_SVINTO_SIM
1498 /* disable the receiver */
1499 info->port[REG_REC_CTRL] =
1500 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1505 e100_enable_rx(struct e100_serial *info)
1507 #ifndef CONFIG_SVINTO_SIM
1508 /* enable the receiver */
1509 info->port[REG_REC_CTRL] =
1510 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1514 /* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1517 e100_disable_rxdma_irq(struct e100_serial *info)
1519 #ifdef SERIAL_DEBUG_INTR
1520 printk("rxdma_irq(%d): 0\n",info->line);
1522 DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line));
1523 *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
1527 e100_enable_rxdma_irq(struct e100_serial *info)
1529 #ifdef SERIAL_DEBUG_INTR
1530 printk("rxdma_irq(%d): 1\n",info->line);
1532 DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line));
1533 *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
1536 /* the tx DMA uses only dma_descr interrupt */
1538 static void e100_disable_txdma_irq(struct e100_serial *info)
1540 #ifdef SERIAL_DEBUG_INTR
1541 printk("txdma_irq(%d): 0\n",info->line);
1543 DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line));
1544 *R_IRQ_MASK2_CLR = info->irq;
1547 static void e100_enable_txdma_irq(struct e100_serial *info)
1549 #ifdef SERIAL_DEBUG_INTR
1550 printk("txdma_irq(%d): 1\n",info->line);
1552 DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line));
1553 *R_IRQ_MASK2_SET = info->irq;
1556 static void e100_disable_txdma_channel(struct e100_serial *info)
1558 unsigned long flags;
1560 /* Disable output DMA channel for the serial port in question
1561 * ( set to something other then serialX)
1565 DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
1566 if (info->line == 0) {
1567 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
1568 IO_STATE(R_GEN_CONFIG, dma6, serial0)) {
1569 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1570 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
1572 } else if (info->line == 1) {
1573 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) ==
1574 IO_STATE(R_GEN_CONFIG, dma8, serial1)) {
1575 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1576 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
1578 } else if (info->line == 2) {
1579 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) ==
1580 IO_STATE(R_GEN_CONFIG, dma2, serial2)) {
1581 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1582 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
1584 } else if (info->line == 3) {
1585 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) ==
1586 IO_STATE(R_GEN_CONFIG, dma4, serial3)) {
1587 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1588 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
1591 *R_GEN_CONFIG = genconfig_shadow;
1592 restore_flags(flags);
1596 static void e100_enable_txdma_channel(struct e100_serial *info)
1598 unsigned long flags;
1602 DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
1603 /* Enable output DMA channel for the serial port in question */
1604 if (info->line == 0) {
1605 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1606 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
1607 } else if (info->line == 1) {
1608 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1609 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
1610 } else if (info->line == 2) {
1611 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1612 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
1613 } else if (info->line == 3) {
1614 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1615 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
1617 *R_GEN_CONFIG = genconfig_shadow;
1618 restore_flags(flags);
1621 static void e100_disable_rxdma_channel(struct e100_serial *info)
1623 unsigned long flags;
1625 /* Disable input DMA channel for the serial port in question
1626 * ( set to something other then serialX)
1630 if (info->line == 0) {
1631 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
1632 IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
1633 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1634 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused);
1636 } else if (info->line == 1) {
1637 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) ==
1638 IO_STATE(R_GEN_CONFIG, dma9, serial1)) {
1639 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1640 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb);
1642 } else if (info->line == 2) {
1643 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) ==
1644 IO_STATE(R_GEN_CONFIG, dma3, serial2)) {
1645 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1646 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
1648 } else if (info->line == 3) {
1649 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) ==
1650 IO_STATE(R_GEN_CONFIG, dma5, serial3)) {
1651 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1652 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
1655 *R_GEN_CONFIG = genconfig_shadow;
1656 restore_flags(flags);
1660 static void e100_enable_rxdma_channel(struct e100_serial *info)
1662 unsigned long flags;
1666 /* Enable input DMA channel for the serial port in question */
1667 if (info->line == 0) {
1668 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1669 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0);
1670 } else if (info->line == 1) {
1671 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1672 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1);
1673 } else if (info->line == 2) {
1674 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1675 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2);
1676 } else if (info->line == 3) {
1677 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1678 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
1680 *R_GEN_CONFIG = genconfig_shadow;
1681 restore_flags(flags);
1684 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1685 /* in order to detect and fix errors on the first byte
1686 we have to use the serial interrupts as well. */
1689 e100_disable_serial_data_irq(struct e100_serial *info)
1691 #ifdef SERIAL_DEBUG_INTR
1692 printk("ser_irq(%d): 0\n",info->line);
1694 DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line));
1695 *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
1699 e100_enable_serial_data_irq(struct e100_serial *info)
1701 #ifdef SERIAL_DEBUG_INTR
1702 printk("ser_irq(%d): 1\n",info->line);
1703 printk("**** %d = %d\n",
1705 (1U << (8+2*info->line)));
1707 DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line));
1708 *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
1713 e100_disable_serial_tx_ready_irq(struct e100_serial *info)
1715 #ifdef SERIAL_DEBUG_INTR
1716 printk("ser_tx_irq(%d): 0\n",info->line);
1718 DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line));
1719 *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line));
1723 e100_enable_serial_tx_ready_irq(struct e100_serial *info)
1725 #ifdef SERIAL_DEBUG_INTR
1726 printk("ser_tx_irq(%d): 1\n",info->line);
1727 printk("**** %d = %d\n",
1729 (1U << (8+1+2*info->line)));
1731 DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line));
1732 *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line));
1735 static inline void e100_enable_rx_irq(struct e100_serial *info)
1737 if (info->uses_dma_in)
1738 e100_enable_rxdma_irq(info);
1740 e100_enable_serial_data_irq(info);
1742 static inline void e100_disable_rx_irq(struct e100_serial *info)
1744 if (info->uses_dma_in)
1745 e100_disable_rxdma_irq(info);
1747 e100_disable_serial_data_irq(info);
1750 #if defined(CONFIG_ETRAX_RS485)
1751 /* Enable RS-485 mode on selected port. This is UGLY. */
1753 e100_enable_rs485(struct tty_struct *tty,struct rs485_control *r)
1755 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1757 #if defined(CONFIG_ETRAX_RS485_ON_PA)
1758 *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
1760 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1761 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1762 rs485_port_g_bit, 1);
1764 #if defined(CONFIG_ETRAX_RS485_LTC1387)
1765 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1766 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1);
1767 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1768 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1);
1771 info->rs485.rts_on_send = 0x01 & r->rts_on_send;
1772 info->rs485.rts_after_sent = 0x01 & r->rts_after_sent;
1773 if (r->delay_rts_before_send >= 1000)
1774 info->rs485.delay_rts_before_send = 1000;
1776 info->rs485.delay_rts_before_send = r->delay_rts_before_send;
1777 info->rs485.enabled = r->enabled;
1778 /* printk("rts: on send = %i, after = %i, enabled = %i",
1779 info->rs485.rts_on_send,
1780 info->rs485.rts_after_sent,
1788 e100_write_rs485(struct tty_struct *tty, int from_user,
1789 const unsigned char *buf, int count)
1791 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1792 int old_enabled = info->rs485.enabled;
1794 /* rs485 is always implicitly enabled if we're using the ioctl()
1795 * but it doesn't have to be set in the rs485_control
1796 * (to be backward compatible with old apps)
1797 * So we store, set and restore it.
1799 info->rs485.enabled = 1;
1800 /* rs_write now deals with RS485 if enabled */
1801 count = rs_write(tty, from_user, buf, count);
1802 info->rs485.enabled = old_enabled;
1806 #ifdef CONFIG_ETRAX_FAST_TIMER
1807 /* Timer function to toggle RTS when using FAST_TIMER */
1808 static void rs485_toggle_rts_timer_function(unsigned long data)
1810 struct e100_serial *info = (struct e100_serial *)data;
1812 fast_timers_rs485[info->line].function = NULL;
1813 e100_rts(info, info->rs485.rts_after_sent);
1814 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1815 e100_enable_rx(info);
1816 e100_enable_rx_irq(info);
1820 #endif /* CONFIG_ETRAX_RS485 */
1823 * ------------------------------------------------------------
1824 * rs_stop() and rs_start()
1826 * This routines are called before setting or resetting tty->stopped.
1827 * They enable or disable transmitter using the XOFF registers, as necessary.
1828 * ------------------------------------------------------------
1832 rs_stop(struct tty_struct *tty)
1834 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1836 unsigned long flags;
1839 save_flags(flags); cli();
1840 DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
1841 CIRC_CNT(info->xmit.head,
1842 info->xmit.tail,SERIAL_XMIT_SIZE)));
1844 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
1845 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
1846 if (tty->termios->c_iflag & IXON ) {
1847 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1850 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1851 restore_flags(flags);
1856 rs_start(struct tty_struct *tty)
1858 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1860 unsigned long flags;
1863 save_flags(flags); cli();
1864 DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
1865 CIRC_CNT(info->xmit.head,
1866 info->xmit.tail,SERIAL_XMIT_SIZE)));
1867 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
1868 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
1869 if (tty->termios->c_iflag & IXON ) {
1870 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1873 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1874 if (!info->uses_dma_out &&
1875 info->xmit.head != info->xmit.tail && info->xmit.buf)
1876 e100_enable_serial_tx_ready_irq(info);
1878 restore_flags(flags);
1883 * ----------------------------------------------------------------------
1885 * Here starts the interrupt handling routines. All of the following
1886 * subroutines are declared as inline and are folded into
1887 * rs_interrupt(). They were separated out for readability's sake.
1889 * Note: rs_interrupt() is a "fast" interrupt, which means that it
1890 * runs with interrupts turned off. People who may want to modify
1891 * rs_interrupt() should try to keep the interrupt handler as fast as
1892 * possible. After you are done making modifications, it is not a bad
1895 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1897 * and look at the resulting assemble code in serial.s.
1899 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
1900 * -----------------------------------------------------------------------
1904 * This routine is used by the interrupt handler to schedule
1905 * processing in the software interrupt portion of the driver.
1907 static void rs_sched_event(struct e100_serial *info, int event)
1909 if (info->event & (1 << event))
1911 info->event |= 1 << event;
1912 schedule_work(&info->work);
1915 /* The output DMA channel is free - use it to send as many chars as possible
1917 * We don't pay attention to info->x_char, which means if the TTY wants to
1918 * use XON/XOFF it will set info->x_char but we won't send any X char!
1920 * To implement this, we'd just start a DMA send of 1 byte pointing at a
1921 * buffer containing the X char, and skip updating xmit. We'd also have to
1922 * check if the last sent char was the X char when we enter this function
1923 * the next time, to avoid updating xmit with the sent X value.
1927 transmit_chars_dma(struct e100_serial *info)
1929 unsigned int c, sentl;
1930 struct etrax_dma_descr *descr;
1932 #ifdef CONFIG_SVINTO_SIM
1933 /* This will output too little if tail is not 0 always since
1934 * we don't reloop to send the other part. Anyway this SHOULD be a
1935 * no-op - transmit_chars_dma would never really be called during sim
1936 * since rs_write does not write into the xmit buffer then.
1938 if (info->xmit.tail)
1939 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1940 if (info->xmit.head != info->xmit.tail) {
1941 SIMCOUT(info->xmit.buf + info->xmit.tail,
1942 CIRC_CNT(info->xmit.head,
1945 info->xmit.head = info->xmit.tail; /* move back head */
1946 info->tr_running = 0;
1950 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1951 *info->oclrintradr =
1952 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1953 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1955 #ifdef SERIAL_DEBUG_INTR
1956 if (info->line == SERIAL_DEBUG_LINE)
1959 if (!info->tr_running) {
1960 /* weirdo... we shouldn't get here! */
1961 printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n");
1965 descr = &info->tr_descr;
1967 /* first get the amount of bytes sent during the last DMA transfer,
1968 and update xmit accordingly */
1970 /* if the stop bit was not set, all data has been sent */
1971 if (!(descr->status & d_stop)) {
1972 sentl = descr->sw_len;
1974 /* otherwise we find the amount of data sent here */
1975 sentl = descr->hw_len;
1977 DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl));
1980 info->icount.tx += sentl;
1982 /* update xmit buffer */
1983 info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
1985 /* if there is only a few chars left in the buf, wake up the blocked
1987 if (CIRC_CNT(info->xmit.head,
1989 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
1990 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
1992 /* find out the largest amount of consecutive bytes we want to send now */
1994 c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
1996 /* Don't send all in one DMA transfer - divide it so we wake up
1997 * application before all is sent
2000 if (c >= 4*WAKEUP_CHARS)
2004 /* our job here is done, don't schedule any new DMA transfer */
2005 info->tr_running = 0;
2007 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2008 if (info->rs485.enabled) {
2009 /* Set a short timer to toggle RTS */
2010 start_one_shot_timer(&fast_timers_rs485[info->line],
2011 rs485_toggle_rts_timer_function,
2012 (unsigned long)info,
2013 info->char_time_usec*2,
2020 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
2021 /* set up the descriptor correctly for output */
2022 DFLOW(DEBUG_LOG(info->line, "TX %i\n", c));
2023 descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */
2025 descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
2028 *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */
2029 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2031 /* DMA is now running (hopefully) */
2032 } /* transmit_chars_dma */
2035 start_transmit(struct e100_serial *info)
2038 if (info->line == SERIAL_DEBUG_LINE)
2042 info->tr_descr.sw_len = 0;
2043 info->tr_descr.hw_len = 0;
2044 info->tr_descr.status = 0;
2045 info->tr_running = 1;
2046 if (info->uses_dma_out)
2047 transmit_chars_dma(info);
2049 e100_enable_serial_tx_ready_irq(info);
2050 } /* start_transmit */
2052 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2053 static int serial_fast_timer_started = 0;
2054 static int serial_fast_timer_expired = 0;
2055 static void flush_timeout_function(unsigned long data);
2056 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
2057 unsigned long timer_flags; \
2058 save_flags(timer_flags); \
2060 if (fast_timers[info->line].function == NULL) { \
2061 serial_fast_timer_started++; \
2062 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
2063 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
2064 start_one_shot_timer(&fast_timers[info->line], \
2065 flush_timeout_function, \
2066 (unsigned long)info, \
2071 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
2073 restore_flags(timer_flags); \
2075 #define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
2078 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
2079 #define START_FLUSH_FAST_TIMER(info, string)
2082 static struct etrax_recv_buffer *
2083 alloc_recv_buffer(unsigned int size)
2085 struct etrax_recv_buffer *buffer;
2087 if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
2090 buffer->next = NULL;
2092 buffer->error = TTY_NORMAL;
2098 append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
2100 unsigned long flags;
2105 if (!info->first_recv_buffer)
2106 info->first_recv_buffer = buffer;
2108 info->last_recv_buffer->next = buffer;
2110 info->last_recv_buffer = buffer;
2112 info->recv_cnt += buffer->length;
2113 if (info->recv_cnt > info->max_recv_cnt)
2114 info->max_recv_cnt = info->recv_cnt;
2116 restore_flags(flags);
2120 add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
2122 struct etrax_recv_buffer *buffer;
2123 if (info->uses_dma_in) {
2124 if (!(buffer = alloc_recv_buffer(4)))
2128 buffer->error = flag;
2129 buffer->buffer[0] = data;
2131 append_recv_buffer(info, buffer);
2135 struct tty_struct *tty = info->tty;
2136 *tty->flip.char_buf_ptr = data;
2137 *tty->flip.flag_buf_ptr = flag;
2138 tty->flip.flag_buf_ptr++;
2139 tty->flip.char_buf_ptr++;
2147 static unsigned int handle_descr_data(struct e100_serial *info,
2148 struct etrax_dma_descr *descr,
2151 struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
2153 if (info->recv_cnt + recvl > 65536) {
2155 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __FUNCTION__, recvl);
2159 buffer->length = recvl;
2161 if (info->errorcode == ERRCODE_SET_BREAK)
2162 buffer->error = TTY_BREAK;
2163 info->errorcode = 0;
2165 append_recv_buffer(info, buffer);
2167 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2168 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2170 descr->buf = virt_to_phys(buffer->buffer);
2175 static unsigned int handle_all_descr_data(struct e100_serial *info)
2177 struct etrax_dma_descr *descr;
2179 unsigned int ret = 0;
2183 descr = &info->rec_descr[info->cur_rec_descr];
2185 if (descr == phys_to_virt(*info->idescradr))
2188 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
2189 info->cur_rec_descr = 0;
2191 /* find out how many bytes were read */
2193 /* if the eop bit was not set, all data has been received */
2194 if (!(descr->status & d_eop)) {
2195 recvl = descr->sw_len;
2197 /* otherwise we find the amount of data received here */
2198 recvl = descr->hw_len;
2201 /* Reset the status information */
2204 DFLOW( DEBUG_LOG(info->line, "RX %lu\n", recvl);
2205 if (info->tty->stopped) {
2206 unsigned char *buf = phys_to_virt(descr->buf);
2207 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]);
2208 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]);
2209 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]);
2214 info->icount.rx += recvl;
2216 ret += handle_descr_data(info, descr, recvl);
2222 static void receive_chars_dma(struct e100_serial *info)
2224 struct tty_struct *tty;
2225 unsigned char rstat;
2227 #ifdef CONFIG_SVINTO_SIM
2228 /* No receive in the simulator. Will probably be when the rest of
2229 * the serial interface works, and this piece will just be removed.
2234 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
2235 *info->iclrintradr =
2236 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2237 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2240 if (!tty) /* Something wrong... */
2243 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2244 if (info->uses_dma_in)
2245 e100_enable_serial_data_irq(info);
2248 if (info->errorcode == ERRCODE_INSERT_BREAK)
2249 add_char_and_flag(info, '\0', TTY_BREAK);
2251 handle_all_descr_data(info);
2253 /* Read the status register to detect errors */
2254 rstat = info->port[REG_STATUS];
2255 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2256 DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat));
2259 if (rstat & SER_ERROR_MASK) {
2260 /* If we got an error, we must reset it by reading the
2263 unsigned char data = info->port[REG_DATA];
2265 PROCSTAT(ser_stat[info->line].errors_cnt++);
2266 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
2267 ((rstat & SER_ERROR_MASK) << 8) | data);
2269 if (rstat & SER_PAR_ERR_MASK)
2270 add_char_and_flag(info, data, TTY_PARITY);
2271 else if (rstat & SER_OVERRUN_MASK)
2272 add_char_and_flag(info, data, TTY_OVERRUN);
2273 else if (rstat & SER_FRAMING_ERR_MASK)
2274 add_char_and_flag(info, data, TTY_FRAME);
2277 START_FLUSH_FAST_TIMER(info, "receive_chars");
2279 /* Restart the receiving DMA */
2280 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2283 static int start_recv_dma(struct e100_serial *info)
2285 struct etrax_dma_descr *descr = info->rec_descr;
2286 struct etrax_recv_buffer *buffer;
2289 /* Set up the receiving descriptors */
2290 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
2291 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2292 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2294 descr[i].ctrl = d_int;
2295 descr[i].buf = virt_to_phys(buffer->buffer);
2296 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
2297 descr[i].hw_len = 0;
2298 descr[i].status = 0;
2299 descr[i].next = virt_to_phys(&descr[i+1]);
2302 /* Link the last descriptor to the first */
2303 descr[i-1].next = virt_to_phys(&descr[0]);
2305 /* Start with the first descriptor in the list */
2306 info->cur_rec_descr = 0;
2309 *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
2310 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2312 /* Input DMA should be running now */
2317 start_receive(struct e100_serial *info)
2319 #ifdef CONFIG_SVINTO_SIM
2320 /* No receive in the simulator. Will probably be when the rest of
2321 * the serial interface works, and this piece will just be removed.
2325 info->tty->flip.count = 0;
2326 if (info->uses_dma_in) {
2327 /* reset the input dma channel to be sure it works */
2329 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2330 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
2331 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2333 start_recv_dma(info);
2338 /* the bits in the MASK2 register are laid out like this:
2339 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
2340 where I is the input channel and O is the output channel for the port.
2341 info->irq is the bit number for the DMAO_DESCR so to check the others we
2342 shift info->irq to the left.
2345 /* dma output channel interrupt handler
2346 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
2347 DMA8(ser1) when they have finished a descriptor with the intr flag set.
2351 tr_interrupt(int irq, void *dev_id)
2353 struct e100_serial *info;
2358 #ifdef CONFIG_SVINTO_SIM
2359 /* No receive in the simulator. Will probably be when the rest of
2360 * the serial interface works, and this piece will just be removed.
2363 const char *s = "What? tr_interrupt in simulator??\n";
2364 SIMCOUT(s,strlen(s));
2369 /* find out the line that caused this irq and get it from rs_table */
2371 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2373 for (i = 0; i < NR_PORTS; i++) {
2374 info = rs_table + i;
2375 if (!info->enabled || !info->uses_dma_out)
2377 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
2378 if (ireg & info->irq) {
2380 /* we can send a new dma bunch. make it so. */
2381 DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i));
2382 /* Read jiffies_usec first,
2383 * we want this time to be as late as possible
2385 PROCSTAT(ser_stat[info->line].tx_dma_ints++);
2386 info->last_tx_active_usec = GET_JIFFIES_USEC();
2387 info->last_tx_active = jiffies;
2388 transmit_chars_dma(info);
2391 /* FIXME: here we should really check for a change in the
2392 status lines and if so call status_handle(info) */
2394 return IRQ_RETVAL(handled);
2395 } /* tr_interrupt */
2397 /* dma input channel interrupt handler */
2400 rec_interrupt(int irq, void *dev_id)
2402 struct e100_serial *info;
2407 #ifdef CONFIG_SVINTO_SIM
2408 /* No receive in the simulator. Will probably be when the rest of
2409 * the serial interface works, and this piece will just be removed.
2412 const char *s = "What? rec_interrupt in simulator??\n";
2413 SIMCOUT(s,strlen(s));
2418 /* find out the line that caused this irq and get it from rs_table */
2420 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2422 for (i = 0; i < NR_PORTS; i++) {
2423 info = rs_table + i;
2424 if (!info->enabled || !info->uses_dma_in)
2426 /* check for both dma_eop and dma_descr for the input dma channel */
2427 if (ireg & ((info->irq << 2) | (info->irq << 3))) {
2429 /* we have received something */
2430 receive_chars_dma(info);
2433 /* FIXME: here we should really check for a change in the
2434 status lines and if so call status_handle(info) */
2436 return IRQ_RETVAL(handled);
2437 } /* rec_interrupt */
2439 static int force_eop_if_needed(struct e100_serial *info)
2441 /* We check data_avail bit to determine if data has
2442 * arrived since last time
2444 unsigned char rstat = info->port[REG_STATUS];
2446 /* error or datavail? */
2447 if (rstat & SER_ERROR_MASK) {
2448 /* Some error has occurred. If there has been valid data, an
2449 * EOP interrupt will be made automatically. If no data, the
2450 * normal ser_interrupt should be enabled and handle it.
2453 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
2454 rstat | (info->line << 8));
2458 if (rstat & SER_DATA_AVAIL_MASK) {
2459 /* Ok data, no error, count it */
2460 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
2461 rstat | (info->line << 8)));
2462 /* Read data to clear status flags */
2463 (void)info->port[REG_DATA];
2465 info->forced_eop = 0;
2466 START_FLUSH_FAST_TIMER(info, "magic");
2470 /* hit the timeout, force an EOP for the input
2471 * dma channel if we haven't already
2473 if (!info->forced_eop) {
2474 info->forced_eop = 1;
2475 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
2476 TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line));
2483 static void flush_to_flip_buffer(struct e100_serial *info)
2485 struct tty_struct *tty;
2486 struct etrax_recv_buffer *buffer;
2487 unsigned int length;
2488 unsigned long flags;
2491 if (!info->first_recv_buffer)
2497 if (!(tty = info->tty)) {
2498 restore_flags(flags);
2502 while ((buffer = info->first_recv_buffer) != NULL) {
2503 unsigned int count = buffer->length;
2505 count = tty_buffer_request_room(tty, count);
2506 if (count == 0) /* Throttle ?? */
2510 tty_insert_flip_strings(tty, buffer->buffer, count - 1);
2511 tty_insert_flip_char(tty, buffer->buffer[count-1], buffer->error);
2513 info->recv_cnt -= count;
2515 if (count == buffer->length) {
2516 info->first_recv_buffer = buffer->next;
2519 buffer->length -= count;
2520 memmove(buffer->buffer, buffer->buffer + count, buffer->length);
2521 buffer->error = TTY_NORMAL;
2525 if (!info->first_recv_buffer)
2526 info->last_recv_buffer = NULL;
2528 restore_flags(flags);
2532 DEBUG_LOG(info->line, "*** rxtot %i\n", info->icount.rx);
2533 DEBUG_LOG(info->line, "ldisc %lu\n", tty->ldisc.chars_in_buffer(tty));
2534 DEBUG_LOG(info->line, "room %lu\n", tty->ldisc.receive_room(tty));
2539 /* this includes a check for low-latency */
2540 tty_flip_buffer_push(tty);
2543 static void check_flush_timeout(struct e100_serial *info)
2545 /* Flip what we've got (if we can) */
2546 flush_to_flip_buffer(info);
2548 /* We might need to flip later, but not to fast
2549 * since the system is busy processing input... */
2550 if (info->first_recv_buffer)
2551 START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000);
2553 /* Force eop last, since data might have come while we're processing
2554 * and if we started the slow timer above, we won't start a fast
2557 force_eop_if_needed(info);
2560 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2561 static void flush_timeout_function(unsigned long data)
2563 struct e100_serial *info = (struct e100_serial *)data;
2565 fast_timers[info->line].function = NULL;
2566 serial_fast_timer_expired++;
2567 TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line));
2568 TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
2569 check_flush_timeout(info);
2574 /* dma fifo/buffer timeout handler
2575 forces an end-of-packet for the dma input channel if no chars
2576 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2579 static struct timer_list flush_timer;
2582 timed_flush_handler(unsigned long ptr)
2584 struct e100_serial *info;
2587 #ifdef CONFIG_SVINTO_SIM
2591 for (i = 0; i < NR_PORTS; i++) {
2592 info = rs_table + i;
2593 if (info->uses_dma_in)
2594 check_flush_timeout(info);
2597 /* restart flush timer */
2598 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
2602 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2604 /* If there is an error (ie break) when the DMA is running and
2605 * there are no bytes in the fifo the DMA is stopped and we get no
2606 * eop interrupt. Thus we have to monitor the first bytes on a DMA
2607 * transfer, and if it is without error we can turn the serial
2612 BREAK handling on ETRAX 100:
2613 ETRAX will generate interrupt although there is no stop bit between the
2616 Depending on how long the break sequence is, the end of the breaksequence
2617 will look differently:
2618 | indicates start/end of a character.
2620 B= Break character (0x00) with framing error.
2621 E= Error byte with parity error received after B characters.
2622 F= "Faked" valid byte received immediately after B characters.
2626 B BL ___________________________ V
2627 .._|__________|__________| |valid data |
2629 Multiple frame errors with data == 0x00 (B),
2630 the timing matches up "perfectly" so no extra ending char is detected.
2631 The RXD pin is 1 in the last interrupt, in that case
2632 we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2633 know if another byte will come and this really is case 2. below
2634 (e.g F=0xFF or 0xFE)
2635 If RXD pin is 0 we can expect another character (see 2. below).
2640 B B E or F__________________..__ V
2641 .._|__________|__________|______ | |valid data
2645 Multiple frame errors with data == 0x00 (B),
2646 but the part of the break trigs is interpreted as a start bit (and possibly
2647 some 0 bits followed by a number of 1 bits and a stop bit).
2648 Depending on parity settings etc. this last character can be either
2649 a fake "valid" char (F) or have a parity error (E).
2651 If the character is valid it will be put in the buffer,
2652 we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2653 will set the flags so the tty will handle it,
2654 if it's an error byte it will not be put in the buffer
2655 and we set info->errorcode = ERRCODE_INSERT_BREAK.
2657 To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2658 of the last faulty char (B) and compares it with the current time:
2659 If the time elapsed time is less then 2*char_time_usec we will assume
2660 it's a faked F char and not a Valid char and set
2661 info->errorcode = ERRCODE_SET_BREAK.
2663 Flaws in the above solution:
2664 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2665 We use the timer to distinguish a F character from a V character,
2666 if a V character is to close after the break we might make the wrong decision.
2668 TODO: The break will be delayed until an F or V character is received.
2673 struct e100_serial * handle_ser_rx_interrupt_no_dma(struct e100_serial *info)
2675 unsigned long data_read;
2676 struct tty_struct *tty = info->tty;
2679 printk("!NO TTY!\n");
2682 if (tty->flip.count >= CRIS_BUF_SIZE - TTY_THRESHOLD_THROTTLE) {
2683 /* check TTY_THROTTLED first so it indicates our state */
2684 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2685 DFLOW(DEBUG_LOG(info->line, "rs_throttle flip.count: %i\n", tty->flip.count));
2689 if (tty->flip.count >= CRIS_BUF_SIZE) {
2690 DEBUG_LOG(info->line, "force FLIP! %i\n", tty->flip.count);
2691 tty->flip.work.func((void *) tty);
2692 if (tty->flip.count >= CRIS_BUF_SIZE) {
2693 DEBUG_LOG(info->line, "FLIP FULL! %i\n", tty->flip.count);
2694 return info; /* if TTY_DONT_FLIP is set */
2697 /* Read data and status at the same time */
2698 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2700 if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) {
2701 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2703 DINTR2(DEBUG_LOG(info->line, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)));
2705 if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) |
2706 IO_MASK(R_SERIAL0_READ, par_err) |
2707 IO_MASK(R_SERIAL0_READ, overrun) )) {
2709 info->last_rx_active_usec = GET_JIFFIES_USEC();
2710 info->last_rx_active = jiffies;
2711 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read));
2713 if (!log_int_trig1_pos) {
2714 log_int_trig1_pos = log_int_pos;
2715 log_int(rdpc(), 0, 0);
2720 if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) &&
2721 (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) {
2722 /* Most likely a break, but we get interrupts over and
2726 if (!info->break_detected_cnt) {
2727 DEBUG_LOG(info->line, "#BRK start\n", 0);
2729 if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) {
2730 /* The RX pin is high now, so the break
2731 * must be over, but....
2732 * we can't really know if we will get another
2733 * last byte ending the break or not.
2734 * And we don't know if the byte (if any) will
2735 * have an error or look valid.
2737 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2738 info->errorcode = ERRCODE_INSERT_BREAK;
2740 info->break_detected_cnt++;
2742 /* The error does not look like a break, but could be
2745 if (info->break_detected_cnt) {
2746 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2747 info->errorcode = ERRCODE_INSERT_BREAK;
2749 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2751 *tty->flip.char_buf_ptr = 0;
2752 *tty->flip.flag_buf_ptr = TTY_BREAK;
2753 tty->flip.flag_buf_ptr++;
2754 tty->flip.char_buf_ptr++;
2758 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2760 if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
2761 info->icount.parity++;
2762 *tty->flip.flag_buf_ptr = TTY_PARITY;
2763 } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
2764 info->icount.overrun++;
2765 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
2766 } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
2767 info->icount.frame++;
2768 *tty->flip.flag_buf_ptr = TTY_FRAME;
2770 info->errorcode = 0;
2772 info->break_detected_cnt = 0;
2774 } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2777 if (!log_int_trig1_pos) {
2778 if (log_int_pos >= log_int_size) {
2781 log_int_trig0_pos = log_int_pos;
2782 log_int(rdpc(), 0, 0);
2785 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2786 *tty->flip.flag_buf_ptr = 0;
2788 DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
2792 tty->flip.flag_buf_ptr++;
2793 tty->flip.char_buf_ptr++;
2796 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2797 if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2798 DEBUG_LOG(info->line, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read));
2802 tty_flip_buffer_push(info->tty);
2806 static struct e100_serial* handle_ser_rx_interrupt(struct e100_serial *info)
2808 unsigned char rstat;
2810 #ifdef SERIAL_DEBUG_INTR
2811 printk("Interrupt from serport %d\n", i);
2813 /* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2814 if (!info->uses_dma_in) {
2815 return handle_ser_rx_interrupt_no_dma(info);
2818 rstat = info->port[REG_STATUS];
2819 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2820 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2823 if (rstat & SER_ERROR_MASK) {
2826 info->last_rx_active_usec = GET_JIFFIES_USEC();
2827 info->last_rx_active = jiffies;
2828 /* If we got an error, we must reset it by reading the
2831 data = info->port[REG_DATA];
2832 DINTR1(DEBUG_LOG(info->line, "ser_rx! %c\n", data));
2833 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat));
2834 if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
2835 /* Most likely a break, but we get interrupts over and
2839 if (!info->break_detected_cnt) {
2840 DEBUG_LOG(info->line, "#BRK start\n", 0);
2842 if (rstat & SER_RXD_MASK) {
2843 /* The RX pin is high now, so the break
2844 * must be over, but....
2845 * we can't really know if we will get another
2846 * last byte ending the break or not.
2847 * And we don't know if the byte (if any) will
2848 * have an error or look valid.
2850 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2851 info->errorcode = ERRCODE_INSERT_BREAK;
2853 info->break_detected_cnt++;
2855 /* The error does not look like a break, but could be
2858 if (info->break_detected_cnt) {
2859 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2860 info->errorcode = ERRCODE_INSERT_BREAK;
2862 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2864 add_char_and_flag(info, '\0', TTY_BREAK);
2867 if (rstat & SER_PAR_ERR_MASK) {
2868 info->icount.parity++;
2869 add_char_and_flag(info, data, TTY_PARITY);
2870 } else if (rstat & SER_OVERRUN_MASK) {
2871 info->icount.overrun++;
2872 add_char_and_flag(info, data, TTY_OVERRUN);
2873 } else if (rstat & SER_FRAMING_ERR_MASK) {
2874 info->icount.frame++;
2875 add_char_and_flag(info, data, TTY_FRAME);
2878 info->errorcode = 0;
2880 info->break_detected_cnt = 0;
2881 DEBUG_LOG(info->line, "#iERR s d %04X\n",
2882 ((rstat & SER_ERROR_MASK) << 8) | data);
2884 PROCSTAT(ser_stat[info->line].early_errors_cnt++);
2885 } else { /* It was a valid byte, now let the DMA do the rest */
2886 unsigned long curr_time_u = GET_JIFFIES_USEC();
2887 unsigned long curr_time = jiffies;
2889 if (info->break_detected_cnt) {
2890 /* Detect if this character is a new valid char or the
2891 * last char in a break sequence: If LSBits are 0 and
2892 * MSBits are high AND the time is close to the
2893 * previous interrupt we should discard it.
2896 (curr_time - info->last_rx_active) * (1000000/HZ) +
2897 curr_time_u - info->last_rx_active_usec;
2898 if (elapsed_usec < 2*info->char_time_usec) {
2899 DEBUG_LOG(info->line, "FBRK %i\n", info->line);
2900 /* Report as BREAK (error) and let
2901 * receive_chars_dma() handle it
2903 info->errorcode = ERRCODE_SET_BREAK;
2905 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
2907 DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
2910 #ifdef SERIAL_DEBUG_INTR
2911 printk("** OK, disabling ser_interrupts\n");
2913 e100_disable_serial_data_irq(info);
2914 DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line));
2915 info->break_detected_cnt = 0;
2917 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
2919 /* Restarting the DMA never hurts */
2920 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2921 START_FLUSH_FAST_TIMER(info, "ser_int");
2923 } /* handle_ser_rx_interrupt */
2925 static void handle_ser_tx_interrupt(struct e100_serial *info)
2927 unsigned long flags;
2930 unsigned char rstat;
2931 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
2932 save_flags(flags); cli();
2933 rstat = info->port[REG_STATUS];
2934 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2936 info->port[REG_TR_DATA] = info->x_char;
2939 /* We must enable since it is disabled in ser_interrupt */
2940 e100_enable_serial_tx_ready_irq(info);
2941 restore_flags(flags);
2944 if (info->uses_dma_out) {
2945 unsigned char rstat;
2947 /* We only use normal tx interrupt when sending x_char */
2948 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
2949 save_flags(flags); cli();
2950 rstat = info->port[REG_STATUS];
2951 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2952 e100_disable_serial_tx_ready_irq(info);
2953 if (info->tty->stopped)
2955 /* Enable the DMA channel and tell it to continue */
2956 e100_enable_txdma_channel(info);
2957 /* Wait 12 cycles before doing the DMA command */
2958 for(i = 6; i > 0; i--)
2961 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
2962 restore_flags(flags);
2965 /* Normal char-by-char interrupt */
2966 if (info->xmit.head == info->xmit.tail
2967 || info->tty->stopped
2968 || info->tty->hw_stopped) {
2969 DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n", info->tty->stopped));
2970 e100_disable_serial_tx_ready_irq(info);
2971 info->tr_running = 0;
2974 DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
2975 /* Send a byte, rs485 timing is critical so turn of ints */
2976 save_flags(flags); cli();
2977 info->port[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
2978 info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
2980 if (info->xmit.head == info->xmit.tail) {
2981 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2982 if (info->rs485.enabled) {
2983 /* Set a short timer to toggle RTS */
2984 start_one_shot_timer(&fast_timers_rs485[info->line],
2985 rs485_toggle_rts_timer_function,
2986 (unsigned long)info,
2987 info->char_time_usec*2,
2991 info->last_tx_active_usec = GET_JIFFIES_USEC();
2992 info->last_tx_active = jiffies;
2993 e100_disable_serial_tx_ready_irq(info);
2994 info->tr_running = 0;
2995 DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0));
2997 /* We must enable since it is disabled in ser_interrupt */
2998 e100_enable_serial_tx_ready_irq(info);
3000 restore_flags(flags);
3002 if (CIRC_CNT(info->xmit.head,
3004 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
3005 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
3007 } /* handle_ser_tx_interrupt */
3009 /* result of time measurements:
3010 * RX duration 54-60 us when doing something, otherwise 6-9 us
3011 * ser_int duration: just sending: 8-15 us normally, up to 73 us
3014 ser_interrupt(int irq, void *dev_id)
3016 static volatile int tx_started = 0;
3017 struct e100_serial *info;
3019 unsigned long flags;
3020 unsigned long irq_mask1_rd;
3021 unsigned long data_mask = (1 << (8+2*0)); /* ser0 data_avail */
3023 static volatile unsigned long reentered_ready_mask = 0;
3025 save_flags(flags); cli();
3026 irq_mask1_rd = *R_IRQ_MASK1_RD;
3027 /* First handle all rx interrupts with ints disabled */
3029 irq_mask1_rd &= e100_ser_int_mask;
3030 for (i = 0; i < NR_PORTS; i++) {
3031 /* Which line caused the data irq? */
3032 if (irq_mask1_rd & data_mask) {
3034 handle_ser_rx_interrupt(info);
3039 /* Handle tx interrupts with interrupts enabled so we
3040 * can take care of new data interrupts while transmitting
3041 * We protect the tx part with the tx_started flag.
3042 * We disable the tr_ready interrupts we are about to handle and
3043 * unblock the serial interrupt so new serial interrupts may come.
3045 * If we get a new interrupt:
3046 * - it migth be due to synchronous serial ports.
3047 * - serial irq will be blocked by general irq handler.
3048 * - async data will be handled above (sync will be ignored).
3049 * - tx_started flag will prevent us from trying to send again and
3050 * we will exit fast - no need to unblock serial irq.
3051 * - Next (sync) serial interrupt handler will be runned with
3052 * disabled interrupt due to restore_flags() at end of function,
3053 * so sync handler will not be preempted or reentered.
3056 unsigned long ready_mask;
3059 /* Only the tr_ready interrupts left */
3060 irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3061 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3062 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3063 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3064 while (irq_mask1_rd) {
3065 /* Disable those we are about to handle */
3066 *R_IRQ_MASK1_CLR = irq_mask1_rd;
3067 /* Unblock the serial interrupt */
3068 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
3071 ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
3073 for (i = 0; i < NR_PORTS; i++) {
3074 /* Which line caused the ready irq? */
3075 if (irq_mask1_rd & ready_mask) {
3077 handle_ser_tx_interrupt(info);
3082 /* handle_ser_tx_interrupt enables tr_ready interrupts */
3084 /* Handle reentered TX interrupt */
3085 irq_mask1_rd = reentered_ready_mask;
3090 unsigned long ready_mask;
3091 ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3092 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3093 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3094 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3096 reentered_ready_mask |= ready_mask;
3097 /* Disable those we are about to handle */
3098 *R_IRQ_MASK1_CLR = ready_mask;
3099 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask));
3103 restore_flags(flags);
3104 return IRQ_RETVAL(handled);
3105 } /* ser_interrupt */
3109 * -------------------------------------------------------------------
3110 * Here ends the serial interrupt routines.
3111 * -------------------------------------------------------------------
3115 * This routine is used to handle the "bottom half" processing for the
3116 * serial driver, known also the "software interrupt" processing.
3117 * This processing is done at the kernel interrupt level, after the
3118 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
3119 * is where time-consuming activities which can not be done in the
3120 * interrupt driver proper are done; the interrupt driver schedules
3121 * them using rs_sched_event(), and they get done here.
3124 do_softint(void *private_)
3126 struct e100_serial *info = (struct e100_serial *) private_;
3127 struct tty_struct *tty;
3133 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
3138 startup(struct e100_serial * info)
3140 unsigned long flags;
3141 unsigned long xmit_page;
3144 xmit_page = get_zeroed_page(GFP_KERNEL);
3151 /* if it was already initialized, skip this */
3153 if (info->flags & ASYNC_INITIALIZED) {
3154 restore_flags(flags);
3155 free_page(xmit_page);
3160 free_page(xmit_page);
3162 info->xmit.buf = (unsigned char *) xmit_page;
3164 #ifdef SERIAL_DEBUG_OPEN
3165 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
3168 #ifdef CONFIG_SVINTO_SIM
3169 /* Bits and pieces collected from below. Better to have them
3170 in one ifdef:ed clause than to mix in a lot of ifdefs,
3173 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3175 info->xmit.head = info->xmit.tail = 0;
3176 info->first_recv_buffer = info->last_recv_buffer = NULL;
3177 info->recv_cnt = info->max_recv_cnt = 0;
3179 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3180 info->rec_descr[i].buf = NULL;
3182 /* No real action in the simulator, but may set info important
3188 * Clear the FIFO buffers and disable them
3189 * (they will be reenabled in change_speed())
3193 * Reset the DMA channels and make sure their interrupts are cleared
3196 if (info->dma_in_enabled) {
3197 info->uses_dma_in = 1;
3198 e100_enable_rxdma_channel(info);
3200 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3202 /* Wait until reset cycle is complete */
3203 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
3204 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3206 /* Make sure the irqs are cleared */
3207 *info->iclrintradr =
3208 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3209 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3211 e100_disable_rxdma_channel(info);
3214 if (info->dma_out_enabled) {
3215 info->uses_dma_out = 1;
3216 e100_enable_txdma_channel(info);
3217 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3219 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
3220 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3222 /* Make sure the irqs are cleared */
3223 *info->oclrintradr =
3224 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3225 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3227 e100_disable_txdma_channel(info);
3231 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3233 info->xmit.head = info->xmit.tail = 0;
3234 info->first_recv_buffer = info->last_recv_buffer = NULL;
3235 info->recv_cnt = info->max_recv_cnt = 0;
3237 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3238 info->rec_descr[i].buf = 0;
3241 * and set the speed and other flags of the serial port
3242 * this will start the rx/tx as well
3244 #ifdef SERIAL_HANDLE_EARLY_ERRORS
3245 e100_enable_serial_data_irq(info);
3249 /* dummy read to reset any serial errors */
3251 (void)info->port[REG_DATA];
3253 /* enable the interrupts */
3254 if (info->uses_dma_out)
3255 e100_enable_txdma_irq(info);
3257 e100_enable_rx_irq(info);
3259 info->tr_running = 0; /* to be sure we don't lock up the transmitter */
3261 /* setup the dma input descriptor and start dma */
3263 start_receive(info);
3265 /* for safety, make sure the descriptors last result is 0 bytes written */
3267 info->tr_descr.sw_len = 0;
3268 info->tr_descr.hw_len = 0;
3269 info->tr_descr.status = 0;
3271 /* enable RTS/DTR last */
3276 #endif /* CONFIG_SVINTO_SIM */
3278 info->flags |= ASYNC_INITIALIZED;
3280 restore_flags(flags);
3285 * This routine will shutdown a serial port; interrupts are disabled, and
3286 * DTR is dropped if the hangup on close termio flag is on.
3289 shutdown(struct e100_serial * info)
3291 unsigned long flags;
3292 struct etrax_dma_descr *descr = info->rec_descr;
3293 struct etrax_recv_buffer *buffer;
3296 #ifndef CONFIG_SVINTO_SIM
3297 /* shut down the transmitter and receiver */
3298 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
3299 e100_disable_rx(info);
3300 info->port[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
3302 /* disable interrupts, reset dma channels */
3303 if (info->uses_dma_in) {
3304 e100_disable_rxdma_irq(info);
3305 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3306 info->uses_dma_in = 0;
3308 e100_disable_serial_data_irq(info);
3311 if (info->uses_dma_out) {
3312 e100_disable_txdma_irq(info);
3313 info->tr_running = 0;
3314 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3315 info->uses_dma_out = 0;
3317 e100_disable_serial_tx_ready_irq(info);
3318 info->tr_running = 0;
3321 #endif /* CONFIG_SVINTO_SIM */
3323 if (!(info->flags & ASYNC_INITIALIZED))
3326 #ifdef SERIAL_DEBUG_OPEN
3327 printk("Shutting down serial port %d (irq %d)....\n", info->line,
3332 cli(); /* Disable interrupts */
3334 if (info->xmit.buf) {
3335 free_page((unsigned long)info->xmit.buf);
3336 info->xmit.buf = NULL;
3339 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3341 buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
3346 if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
3347 /* hang up DTR and RTS if HUPCL is enabled */
3349 e100_rts(info, 0); /* could check CRTSCTS before doing this */
3353 set_bit(TTY_IO_ERROR, &info->tty->flags);
3355 info->flags &= ~ASYNC_INITIALIZED;
3356 restore_flags(flags);
3360 /* change baud rate and other assorted parameters */
3363 change_speed(struct e100_serial *info)
3367 unsigned long flags;
3368 /* first some safety checks */
3370 if (!info->tty || !info->tty->termios)
3375 cflag = info->tty->termios->c_cflag;
3377 /* possibly, the tx/rx should be disabled first to do this safely */
3379 /* change baud-rate and write it to the hardware */
3380 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) {
3381 /* Special baudrate */
3382 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3383 unsigned long alt_source =
3384 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3385 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3386 /* R_ALT_SER_BAUDRATE selects the source */
3387 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
3388 (unsigned long)info->baud_base, info->custom_divisor));
3389 if (info->baud_base == SERIAL_PRESCALE_BASE) {
3390 /* 0, 2-65535 (0=65536) */
3391 u16 divisor = info->custom_divisor;
3392 /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
3393 /* baudrate is 3.125MHz/custom_divisor */
3395 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) |
3396 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale);
3398 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor));
3399 *R_SERIAL_PRESCALE = divisor;
3400 info->baud = SERIAL_PRESCALE_BASE/divisor;
3402 #ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
3403 else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 &&
3404 info->custom_divisor == 1) ||
3405 (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ &&
3406 info->custom_divisor == 8)) {
3407 /* ext_clk selected */
3409 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) |
3410 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern);
3411 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8));
3412 info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8;
3418 /* Bad baudbase, we don't support using timer0
3421 printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n",
3422 (unsigned long)info->baud_base, info->custom_divisor);
3424 r_alt_ser_baudrate_shadow &= ~mask;
3425 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3426 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3428 /* Normal baudrate */
3429 /* Make sure we use normal baudrate */
3430 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3431 unsigned long alt_source =
3432 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3433 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3434 r_alt_ser_baudrate_shadow &= ~mask;
3435 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3436 #ifndef CONFIG_SVINTO_SIM
3437 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3438 #endif /* CONFIG_SVINTO_SIM */
3440 info->baud = cflag_to_baud(cflag);
3441 #ifndef CONFIG_SVINTO_SIM
3442 info->port[REG_BAUD] = cflag_to_etrax_baud(cflag);
3443 #endif /* CONFIG_SVINTO_SIM */
3446 #ifndef CONFIG_SVINTO_SIM
3447 /* start with default settings and then fill in changes */
3450 /* 8 bit, no/even parity */
3451 info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
3452 IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
3453 IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
3455 /* 8 bit, no/even parity, 1 stop bit, no cts */
3456 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
3457 IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
3458 IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
3459 IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
3460 IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
3462 if ((cflag & CSIZE) == CS7) {
3463 /* set 7 bit mode */
3464 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
3465 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
3468 if (cflag & CSTOPB) {
3469 /* set 2 stop bit mode */
3470 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
3473 if (cflag & PARENB) {
3475 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
3476 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
3479 if (cflag & CMSPAR) {
3480 /* enable stick parity, PARODD mean Mark which matches ETRAX */
3481 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
3482 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
3484 if (cflag & PARODD) {
3485 /* set odd parity (or Mark if CMSPAR) */
3486 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
3487 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
3490 if (cflag & CRTSCTS) {
3491 /* enable automatic CTS handling */
3492 DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0));
3493 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
3496 /* make sure the tx and rx are enabled */
3498 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
3499 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
3501 /* actually write the control regs to the hardware */
3503 info->port[REG_TR_CTRL] = info->tx_ctrl;
3504 info->port[REG_REC_CTRL] = info->rx_ctrl;
3505 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
3506 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
3507 if (info->tty->termios->c_iflag & IXON ) {
3508 DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n", STOP_CHAR(info->tty)));
3509 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
3512 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
3513 restore_flags(flags);
3514 #endif /* !CONFIG_SVINTO_SIM */
3516 update_char_time(info);
3518 } /* change_speed */
3520 /* start transmitting chars NOW */
3523 rs_flush_chars(struct tty_struct *tty)
3525 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3526 unsigned long flags;
3528 if (info->tr_running ||
3529 info->xmit.head == info->xmit.tail ||
3535 #ifdef SERIAL_DEBUG_FLOW
3536 printk("rs_flush_chars\n");
3539 /* this protection might not exactly be necessary here */
3543 start_transmit(info);
3544 restore_flags(flags);
3547 static int rs_raw_write(struct tty_struct * tty, int from_user,
3548 const unsigned char *buf, int count)
3551 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3552 unsigned long flags;
3554 /* first some sanity checks */
3556 if (!tty || !info->xmit.buf || !tmp_buf)
3559 #ifdef SERIAL_DEBUG_DATA
3560 if (info->line == SERIAL_DEBUG_LINE)
3561 printk("rs_raw_write (%d), status %d\n",
3562 count, info->port[REG_STATUS]);
3565 #ifdef CONFIG_SVINTO_SIM
3566 /* Really simple. The output is here and now. */
3567 SIMCOUT(buf, count);
3571 DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3572 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
3575 /* the cli/restore_flags pairs below are needed because the
3576 * DMA interrupt handler moves the info->xmit values. the memcpy
3577 * needs to be in the critical region unfortunately, because we
3578 * need to read xmit values, memcpy, write xmit values in one
3579 * atomic operation... this could perhaps be avoided by more clever
3583 mutex_lock(&tmp_buf_mutex);
3586 c = CIRC_SPACE_TO_END(info->xmit.head,
3594 c -= copy_from_user(tmp_buf, buf, c);
3601 c1 = CIRC_SPACE_TO_END(info->xmit.head,
3606 memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c);
3607 info->xmit.head = ((info->xmit.head + c) &
3608 (SERIAL_XMIT_SIZE-1));
3609 restore_flags(flags);
3614 mutex_unlock(&tmp_buf_mutex);
3618 c = CIRC_SPACE_TO_END(info->xmit.head,
3627 memcpy(info->xmit.buf + info->xmit.head, buf, c);
3628 info->xmit.head = (info->xmit.head + c) &
3629 (SERIAL_XMIT_SIZE-1);
3634 restore_flags(flags);
3637 /* enable transmitter if not running, unless the tty is stopped
3638 * this does not need IRQ protection since if tr_running == 0
3639 * the IRQ's are not running anyway for this port.
3641 DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret));
3643 if (info->xmit.head != info->xmit.tail &&
3646 !info->tr_running) {
3647 start_transmit(info);
3651 } /* raw_raw_write() */
3654 rs_write(struct tty_struct * tty, int from_user,
3655 const unsigned char *buf, int count)
3657 #if defined(CONFIG_ETRAX_RS485)
3658 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3660 if (info->rs485.enabled)
3662 /* If we are in RS-485 mode, we need to toggle RTS and disable
3663 * the receiver before initiating a DMA transfer
3665 #ifdef CONFIG_ETRAX_FAST_TIMER
3666 /* Abort any started timer */
3667 fast_timers_rs485[info->line].function = NULL;
3668 del_fast_timer(&fast_timers_rs485[info->line]);
3670 e100_rts(info, info->rs485.rts_on_send);
3671 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3672 e100_disable_rx(info);
3673 e100_enable_rx_irq(info);
3676 if (info->rs485.delay_rts_before_send > 0)
3677 msleep(info->rs485.delay_rts_before_send);
3679 #endif /* CONFIG_ETRAX_RS485 */
3681 count = rs_raw_write(tty, from_user, buf, count);
3683 #if defined(CONFIG_ETRAX_RS485)
3684 if (info->rs485.enabled)
3687 /* If we are in RS-485 mode the following has to be done:
3688 * wait until DMA is ready
3689 * wait on transmit shift register
3691 * enable the receiver
3694 /* Sleep until all sent */
3695 tty_wait_until_sent(tty, 0);
3696 #ifdef CONFIG_ETRAX_FAST_TIMER
3697 /* Now sleep a little more so that shift register is empty */
3698 schedule_usleep(info->char_time_usec * 2);
3700 /* wait on transmit shift register */
3702 get_lsr_info(info, &val);
3703 }while (!(val & TIOCSER_TEMT));
3705 e100_rts(info, info->rs485.rts_after_sent);
3707 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3708 e100_enable_rx(info);
3709 e100_enable_rxdma_irq(info);
3712 #endif /* CONFIG_ETRAX_RS485 */
3718 /* how much space is available in the xmit buffer? */
3721 rs_write_room(struct tty_struct *tty)
3723 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3725 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3728 /* How many chars are in the xmit buffer?
3729 * This does not include any chars in the transmitter FIFO.
3730 * Use wait_until_sent for waiting for FIFO drain.
3734 rs_chars_in_buffer(struct tty_struct *tty)
3736 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3738 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3741 /* discard everything in the xmit buffer */
3744 rs_flush_buffer(struct tty_struct *tty)
3746 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3747 unsigned long flags;
3751 info->xmit.head = info->xmit.tail = 0;
3752 restore_flags(flags);
3758 * This function is used to send a high-priority XON/XOFF character to
3761 * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
3762 * but we do it in handle_ser_tx_interrupt().
3763 * We disable DMA channel and enable tx ready interrupt and write the
3764 * character when possible.
3766 static void rs_send_xchar(struct tty_struct *tty, char ch)
3768 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3769 unsigned long flags;
3770 save_flags(flags); cli();
3771 if (info->uses_dma_out) {
3772 /* Put the DMA on hold and disable the channel */
3773 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
3774 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) !=
3775 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold));
3776 e100_disable_txdma_channel(info);
3779 /* Must make sure transmitter is not stopped before we can transmit */
3783 /* Enable manual transmit interrupt and send from there */
3784 DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
3786 e100_enable_serial_tx_ready_irq(info);
3787 restore_flags(flags);
3791 * ------------------------------------------------------------
3794 * This routine is called by the upper-layer tty layer to signal that
3795 * incoming characters should be throttled.
3796 * ------------------------------------------------------------
3799 rs_throttle(struct tty_struct * tty)
3801 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3802 #ifdef SERIAL_DEBUG_THROTTLE
3805 printk("throttle %s: %lu....\n", tty_name(tty, buf),
3806 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3808 DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty)));
3810 /* Do RTS before XOFF since XOFF might take some time */
3811 if (tty->termios->c_cflag & CRTSCTS) {
3812 /* Turn off RTS line */
3816 rs_send_xchar(tty, STOP_CHAR(tty));
3821 rs_unthrottle(struct tty_struct * tty)
3823 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3824 #ifdef SERIAL_DEBUG_THROTTLE
3827 printk("unthrottle %s: %lu....\n", tty_name(tty, buf),
3828 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3830 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty)));
3831 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count));
3832 /* Do RTS before XOFF since XOFF might take some time */
3833 if (tty->termios->c_cflag & CRTSCTS) {
3834 /* Assert RTS line */
3842 rs_send_xchar(tty, START_CHAR(tty));
3848 * ------------------------------------------------------------
3849 * rs_ioctl() and friends
3850 * ------------------------------------------------------------
3854 get_serial_info(struct e100_serial * info,
3855 struct serial_struct * retinfo)
3857 struct serial_struct tmp;
3859 /* this is all probably wrong, there are a lot of fields
3860 * here that we don't have in e100_serial and maybe we
3861 * should set them to something else than 0.
3866 memset(&tmp, 0, sizeof(tmp));
3867 tmp.type = info->type;
3868 tmp.line = info->line;
3869 tmp.port = (int)info->port;
3870 tmp.irq = info->irq;
3871 tmp.flags = info->flags;
3872 tmp.baud_base = info->baud_base;
3873 tmp.close_delay = info->close_delay;
3874 tmp.closing_wait = info->closing_wait;
3875 tmp.custom_divisor = info->custom_divisor;
3876 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
3882 set_serial_info(struct e100_serial *info,
3883 struct serial_struct *new_info)
3885 struct serial_struct new_serial;
3886 struct e100_serial old_info;
3889 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
3894 if (!capable(CAP_SYS_ADMIN)) {
3895 if ((new_serial.type != info->type) ||
3896 (new_serial.close_delay != info->close_delay) ||
3897 ((new_serial.flags & ~ASYNC_USR_MASK) !=
3898 (info->flags & ~ASYNC_USR_MASK)))
3900 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
3901 (new_serial.flags & ASYNC_USR_MASK));
3902 goto check_and_exit;
3905 if (info->count > 1)
3909 * OK, past this point, all the error checking has been done.
3910 * At this point, we start making changes.....
3913 info->baud_base = new_serial.baud_base;
3914 info->flags = ((info->flags & ~ASYNC_FLAGS) |
3915 (new_serial.flags & ASYNC_FLAGS));
3916 info->custom_divisor = new_serial.custom_divisor;
3917 info->type = new_serial.type;
3918 info->close_delay = new_serial.close_delay;
3919 info->closing_wait = new_serial.closing_wait;
3920 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
3923 if (info->flags & ASYNC_INITIALIZED) {
3926 retval = startup(info);
3931 * get_lsr_info - get line status register info
3933 * Purpose: Let user call ioctl() to get info when the UART physically
3934 * is emptied. On bus types like RS485, the transmitter must
3935 * release the bus after transmitting. This must be done when
3936 * the transmit shift register is empty, not be done when the
3937 * transmit holding register is empty. This functionality
3938 * allows an RS485 driver to be written in user space.
3941 get_lsr_info(struct e100_serial * info, unsigned int *value)
3943 unsigned int result = TIOCSER_TEMT;
3944 #ifndef CONFIG_SVINTO_SIM
3945 unsigned long curr_time = jiffies;
3946 unsigned long curr_time_usec = GET_JIFFIES_USEC();
3947 unsigned long elapsed_usec =
3948 (curr_time - info->last_tx_active) * 1000000/HZ +
3949 curr_time_usec - info->last_tx_active_usec;
3951 if (info->xmit.head != info->xmit.tail ||
3952 elapsed_usec < 2*info->char_time_usec) {
3957 if (copy_to_user(value, &result, sizeof(int)))
3962 #ifdef SERIAL_DEBUG_IO
3969 const struct state_str control_state_str[] = {
3970 {TIOCM_DTR, "DTR" },
3974 {TIOCM_CTS, "CTS" },
3977 {TIOCM_DSR, "DSR" },
3981 char *get_control_state_str(int MLines, char *s)
3986 while (control_state_str[i].str != NULL) {
3987 if (MLines & control_state_str[i].state) {
3991 strcat(s, control_state_str[i].str);
4000 get_modem_info(struct e100_serial * info, unsigned int *value)
4002 unsigned int result;
4003 /* Polarity isn't verified */
4004 #if 0 /*def SERIAL_DEBUG_IO */
4006 printk("get_modem_info: RTS: %i DTR: %i CD: %i RI: %i DSR: %i CTS: %i\n",
4012 E100_CTS_GET(info));
4016 (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
4017 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
4018 | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
4019 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
4020 | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
4021 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
4023 #ifdef SERIAL_DEBUG_IO
4024 printk("e100ser: modem state: %i 0x%08X\n", result, result);
4028 get_control_state_str(result, s);
4029 printk("state: %s\n", s);
4032 if (copy_to_user(value, &result, sizeof(int)))
4039 set_modem_info(struct e100_serial * info, unsigned int cmd,
4040 unsigned int *value)
4044 if (copy_from_user(&arg, value, sizeof(int)))
4049 if (arg & TIOCM_RTS) {
4052 if (arg & TIOCM_DTR) {
4055 /* Handle FEMALE behaviour */
4056 if (arg & TIOCM_RI) {
4057 e100_ri_out(info, 1);
4059 if (arg & TIOCM_CD) {
4060 e100_cd_out(info, 1);
4064 if (arg & TIOCM_RTS) {
4067 if (arg & TIOCM_DTR) {
4070 /* Handle FEMALE behaviour */
4071 if (arg & TIOCM_RI) {
4072 e100_ri_out(info, 0);
4074 if (arg & TIOCM_CD) {
4075 e100_cd_out(info, 0);
4079 e100_rts(info, arg & TIOCM_RTS);
4080 e100_dtr(info, arg & TIOCM_DTR);
4081 /* Handle FEMALE behaviour */
4082 e100_ri_out(info, arg & TIOCM_RI);
4083 e100_cd_out(info, arg & TIOCM_CD);
4093 rs_break(struct tty_struct *tty, int break_state)
4095 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4096 unsigned long flags;
4103 if (break_state == -1) {
4104 /* Go to manual mode and set the txd pin to 0 */
4105 info->tx_ctrl &= 0x3F; /* Clear bit 7 (txd) and 6 (tr_enable) */
4107 info->tx_ctrl |= (0x80 | 0x40); /* Set bit 7 (txd) and 6 (tr_enable) */
4109 info->port[REG_TR_CTRL] = info->tx_ctrl;
4110 restore_flags(flags);
4114 rs_ioctl(struct tty_struct *tty, struct file * file,
4115 unsigned int cmd, unsigned long arg)
4117 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4119 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
4120 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
4121 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
4122 if (tty->flags & (1 << TTY_IO_ERROR))
4128 return get_modem_info(info, (unsigned int *) arg);
4132 return set_modem_info(info, cmd, (unsigned int *) arg);
4134 return get_serial_info(info,
4135 (struct serial_struct *) arg);
4137 return set_serial_info(info,
4138 (struct serial_struct *) arg);
4139 case TIOCSERGETLSR: /* Get line status register */
4140 return get_lsr_info(info, (unsigned int *) arg);
4142 case TIOCSERGSTRUCT:
4143 if (copy_to_user((struct e100_serial *) arg,
4144 info, sizeof(struct e100_serial)))
4148 #if defined(CONFIG_ETRAX_RS485)
4149 case TIOCSERSETRS485:
4151 struct rs485_control rs485ctrl;
4152 if (copy_from_user(&rs485ctrl, (struct rs485_control*)arg, sizeof(rs485ctrl)))
4155 return e100_enable_rs485(tty, &rs485ctrl);
4158 case TIOCSERWRRS485:
4160 struct rs485_write rs485wr;
4161 if (copy_from_user(&rs485wr, (struct rs485_write*)arg, sizeof(rs485wr)))
4164 return e100_write_rs485(tty, 1, rs485wr.outc, rs485wr.outc_size);
4169 return -ENOIOCTLCMD;
4175 rs_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
4177 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4179 if (tty->termios->c_cflag == old_termios->c_cflag &&
4180 tty->termios->c_iflag == old_termios->c_iflag)
4185 /* Handle turning off CRTSCTS */
4186 if ((old_termios->c_cflag & CRTSCTS) &&
4187 !(tty->termios->c_cflag & CRTSCTS)) {
4188 tty->hw_stopped = 0;
4194 /* In debugport.c - register a console write function that uses the normal
4197 typedef int (*debugport_write_function)(int i, const char *buf, unsigned int len);
4199 extern debugport_write_function debug_write_function;
4201 static int rs_debug_write_function(int i, const char *buf, unsigned int len)
4205 struct tty_struct *tty;
4206 static int recurse_cnt = 0;
4208 tty = rs_table[i].tty;
4210 unsigned long flags;
4211 if (recurse_cnt > 5) /* We skip this debug output */
4214 local_irq_save(flags);
4216 local_irq_restore(flags);
4218 cnt = rs_write(tty, 0, buf + written, len);
4226 local_irq_save(flags);
4228 local_irq_restore(flags);
4235 * ------------------------------------------------------------
4238 * This routine is called when the serial port gets closed. First, we
4239 * wait for the last remaining data to be sent. Then, we unlink its
4240 * S structure from the interrupt chain if necessary, and we free
4241 * that IRQ if nothing is left in the chain.
4242 * ------------------------------------------------------------
4245 rs_close(struct tty_struct *tty, struct file * filp)
4247 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4248 unsigned long flags;
4253 /* interrupts are disabled for this entire function */
4258 if (tty_hung_up_p(filp)) {
4259 restore_flags(flags);
4263 #ifdef SERIAL_DEBUG_OPEN
4264 printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
4265 info->line, info->count);
4267 if ((tty->count == 1) && (info->count != 1)) {
4269 * Uh, oh. tty->count is 1, which means that the tty
4270 * structure will be freed. Info->count should always
4271 * be one in these conditions. If it's greater than
4272 * one, we've got real problems, since it means the
4273 * serial port won't be shutdown.
4276 "rs_close: bad serial port count; tty->count is 1, "
4277 "info->count is %d\n", info->count);
4280 if (--info->count < 0) {
4281 printk(KERN_CRIT "rs_close: bad serial port count for ttyS%d: %d\n",
4282 info->line, info->count);
4286 restore_flags(flags);
4289 info->flags |= ASYNC_CLOSING;
4291 * Save the termios structure, since this port may have
4292 * separate termios for callout and dialin.
4294 if (info->flags & ASYNC_NORMAL_ACTIVE)
4295 info->normal_termios = *tty->termios;
4297 * Now we wait for the transmit buffer to clear; and we notify
4298 * the line discipline to only process XON/XOFF characters.
4301 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
4302 tty_wait_until_sent(tty, info->closing_wait);
4304 * At this point we stop accepting input. To do this, we
4305 * disable the serial receiver and the DMA receive interrupt.
4307 #ifdef SERIAL_HANDLE_EARLY_ERRORS
4308 e100_disable_serial_data_irq(info);
4311 #ifndef CONFIG_SVINTO_SIM
4312 e100_disable_rx(info);
4313 e100_disable_rx_irq(info);
4315 if (info->flags & ASYNC_INITIALIZED) {
4317 * Before we drop DTR, make sure the UART transmitter
4318 * has completely drained; this is especially
4319 * important as we have a transmit FIFO!
4321 rs_wait_until_sent(tty, HZ);
4326 if (tty->driver->flush_buffer)
4327 tty->driver->flush_buffer(tty);
4328 if (tty->ldisc.flush_buffer)
4329 tty->ldisc.flush_buffer(tty);
4333 if (info->blocked_open) {
4334 if (info->close_delay)
4335 schedule_timeout_interruptible(info->close_delay);
4336 wake_up_interruptible(&info->open_wait);
4338 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
4339 wake_up_interruptible(&info->close_wait);
4340 restore_flags(flags);
4344 #if defined(CONFIG_ETRAX_RS485)
4345 if (info->rs485.enabled) {
4346 info->rs485.enabled = 0;
4347 #if defined(CONFIG_ETRAX_RS485_ON_PA)
4348 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
4350 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4351 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4352 rs485_port_g_bit, 0);
4354 #if defined(CONFIG_ETRAX_RS485_LTC1387)
4355 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4356 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0);
4357 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4358 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0);
4365 * rs_wait_until_sent() --- wait until the transmitter is empty
4367 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
4369 unsigned long orig_jiffies;
4370 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4371 unsigned long curr_time = jiffies;
4372 unsigned long curr_time_usec = GET_JIFFIES_USEC();
4374 (curr_time - info->last_tx_active) * (1000000/HZ) +
4375 curr_time_usec - info->last_tx_active_usec;
4378 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
4379 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
4381 orig_jiffies = jiffies;
4382 while (info->xmit.head != info->xmit.tail || /* More in send queue */
4383 (*info->ostatusadr & 0x007f) || /* more in FIFO */
4384 (elapsed_usec < 2*info->char_time_usec)) {
4385 schedule_timeout_interruptible(1);
4386 if (signal_pending(current))
4388 if (timeout && time_after(jiffies, orig_jiffies + timeout))
4390 curr_time = jiffies;
4391 curr_time_usec = GET_JIFFIES_USEC();
4393 (curr_time - info->last_tx_active) * (1000000/HZ) +
4394 curr_time_usec - info->last_tx_active_usec;
4396 set_current_state(TASK_RUNNING);
4400 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
4403 rs_hangup(struct tty_struct *tty)
4405 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4407 rs_flush_buffer(tty);
4411 info->flags &= ~ASYNC_NORMAL_ACTIVE;
4413 wake_up_interruptible(&info->open_wait);
4417 * ------------------------------------------------------------
4418 * rs_open() and friends
4419 * ------------------------------------------------------------
4422 block_til_ready(struct tty_struct *tty, struct file * filp,
4423 struct e100_serial *info)
4425 DECLARE_WAITQUEUE(wait, current);
4426 unsigned long flags;
4428 int do_clocal = 0, extra_count = 0;
4431 * If the device is in the middle of being closed, then block
4432 * until it's done, and then try again.
4434 if (tty_hung_up_p(filp) ||
4435 (info->flags & ASYNC_CLOSING)) {
4436 if (info->flags & ASYNC_CLOSING)
4437 interruptible_sleep_on(&info->close_wait);
4438 #ifdef SERIAL_DO_RESTART
4439 if (info->flags & ASYNC_HUP_NOTIFY)
4442 return -ERESTARTSYS;
4449 * If non-blocking mode is set, or the port is not enabled,
4450 * then make the check up front and then exit.
4452 if ((filp->f_flags & O_NONBLOCK) ||
4453 (tty->flags & (1 << TTY_IO_ERROR))) {
4454 info->flags |= ASYNC_NORMAL_ACTIVE;
4458 if (tty->termios->c_cflag & CLOCAL) {
4463 * Block waiting for the carrier detect and the line to become
4464 * free (i.e., not in use by the callout). While we are in
4465 * this loop, info->count is dropped by one, so that
4466 * rs_close() knows when to free things. We restore it upon
4467 * exit, either normal or abnormal.
4470 add_wait_queue(&info->open_wait, &wait);
4471 #ifdef SERIAL_DEBUG_OPEN
4472 printk("block_til_ready before block: ttyS%d, count = %d\n",
4473 info->line, info->count);
4477 if (!tty_hung_up_p(filp)) {
4481 restore_flags(flags);
4482 info->blocked_open++;
4486 /* assert RTS and DTR */
4489 restore_flags(flags);
4490 set_current_state(TASK_INTERRUPTIBLE);
4491 if (tty_hung_up_p(filp) ||
4492 !(info->flags & ASYNC_INITIALIZED)) {
4493 #ifdef SERIAL_DO_RESTART
4494 if (info->flags & ASYNC_HUP_NOTIFY)
4497 retval = -ERESTARTSYS;
4503 if (!(info->flags & ASYNC_CLOSING) && do_clocal)
4504 /* && (do_clocal || DCD_IS_ASSERTED) */
4506 if (signal_pending(current)) {
4507 retval = -ERESTARTSYS;
4510 #ifdef SERIAL_DEBUG_OPEN
4511 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4512 info->line, info->count);
4516 set_current_state(TASK_RUNNING);
4517 remove_wait_queue(&info->open_wait, &wait);
4520 info->blocked_open--;
4521 #ifdef SERIAL_DEBUG_OPEN
4522 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
4523 info->line, info->count);
4527 info->flags |= ASYNC_NORMAL_ACTIVE;
4532 * This routine is called whenever a serial port is opened.
4533 * It performs the serial-specific initialization for the tty structure.
4536 rs_open(struct tty_struct *tty, struct file * filp)
4538 struct e100_serial *info;
4542 /* find which port we want to open */
4546 if (line < 0 || line >= NR_PORTS)
4549 /* find the corresponding e100_serial struct in the table */
4550 info = rs_table + line;
4552 /* don't allow the opening of ports that are not enabled in the HW config */
4556 #ifdef SERIAL_DEBUG_OPEN
4557 printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
4562 tty->driver_data = info;
4565 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
4568 page = get_zeroed_page(GFP_KERNEL);
4575 tmp_buf = (unsigned char *) page;
4579 * If the port is in the middle of closing, bail out now
4581 if (tty_hung_up_p(filp) ||
4582 (info->flags & ASYNC_CLOSING)) {
4583 if (info->flags & ASYNC_CLOSING)
4584 interruptible_sleep_on(&info->close_wait);
4585 #ifdef SERIAL_DO_RESTART
4586 return ((info->flags & ASYNC_HUP_NOTIFY) ?
4587 -EAGAIN : -ERESTARTSYS);
4594 * Start up the serial port
4597 retval = startup(info);
4601 retval = block_til_ready(tty, filp, info);
4603 #ifdef SERIAL_DEBUG_OPEN
4604 printk("rs_open returning after block_til_ready with %d\n",
4610 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
4611 *tty->termios = info->normal_termios;
4615 #ifdef SERIAL_DEBUG_OPEN
4616 printk("rs_open ttyS%d successful...\n", info->line);
4618 DLOG_INT_TRIG( log_int_pos = 0);
4620 DFLIP( if (info->line == SERIAL_DEBUG_LINE) {
4621 info->icount.rx = 0;
4628 * /proc fs routines....
4631 static int line_info(char *buf, struct e100_serial *info)
4637 ret = sprintf(buf, "%d: uart:E100 port:%lX irq:%d",
4638 info->line, (unsigned long)info->port, info->irq);
4640 if (!info->port || (info->type == PORT_UNKNOWN)) {
4641 ret += sprintf(buf+ret, "\n");
4647 if (!E100_RTS_GET(info))
4648 strcat(stat_buf, "|RTS");
4649 if (!E100_CTS_GET(info))
4650 strcat(stat_buf, "|CTS");
4651 if (!E100_DTR_GET(info))
4652 strcat(stat_buf, "|DTR");
4653 if (!E100_DSR_GET(info))
4654 strcat(stat_buf, "|DSR");
4655 if (!E100_CD_GET(info))
4656 strcat(stat_buf, "|CD");
4657 if (!E100_RI_GET(info))
4658 strcat(stat_buf, "|RI");
4660 ret += sprintf(buf+ret, " baud:%d", info->baud);
4662 ret += sprintf(buf+ret, " tx:%lu rx:%lu",
4663 (unsigned long)info->icount.tx,
4664 (unsigned long)info->icount.rx);
4665 tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
4667 ret += sprintf(buf+ret, " tx_pend:%lu/%lu",
4669 (unsigned long)SERIAL_XMIT_SIZE);
4672 ret += sprintf(buf+ret, " rx_pend:%lu/%lu",
4673 (unsigned long)info->recv_cnt,
4674 (unsigned long)info->max_recv_cnt);
4679 if (info->tty->stopped)
4680 ret += sprintf(buf+ret, " stopped:%i",
4681 (int)info->tty->stopped);
4682 if (info->tty->hw_stopped)
4683 ret += sprintf(buf+ret, " hw_stopped:%i",
4684 (int)info->tty->hw_stopped);
4688 unsigned char rstat = info->port[REG_STATUS];
4689 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) )
4690 ret += sprintf(buf+ret, " xoff_detect:1");
4698 if (info->icount.frame)
4699 ret += sprintf(buf+ret, " fe:%lu",
4700 (unsigned long)info->icount.frame);
4702 if (info->icount.parity)
4703 ret += sprintf(buf+ret, " pe:%lu",
4704 (unsigned long)info->icount.parity);
4706 if (info->icount.brk)
4707 ret += sprintf(buf+ret, " brk:%lu",
4708 (unsigned long)info->icount.brk);
4710 if (info->icount.overrun)
4711 ret += sprintf(buf+ret, " oe:%lu",
4712 (unsigned long)info->icount.overrun);
4715 * Last thing is the RS-232 status lines
4717 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
4721 int rs_read_proc(char *page, char **start, off_t off, int count,
4722 int *eof, void *data)
4727 len += sprintf(page, "serinfo:1.0 driver:%s\n",
4729 for (i = 0; i < NR_PORTS && len < 4000; i++) {
4730 if (!rs_table[i].enabled)
4732 l = line_info(page + len, &rs_table[i]);
4734 if (len+begin > off+count)
4736 if (len+begin < off) {
4741 #ifdef DEBUG_LOG_INCLUDED
4742 for (i = 0; i < debug_log_pos; i++) {
4743 len += sprintf(page + len, "%-4i %lu.%lu ", i, debug_log[i].time, timer_data_to_ns(debug_log[i].timer_data));
4744 len += sprintf(page + len, debug_log[i].string, debug_log[i].value);
4745 if (len+begin > off+count)
4747 if (len+begin < off) {
4752 len += sprintf(page + len, "debug_log %i/%i %li bytes\n",
4753 i, DEBUG_LOG_SIZE, begin+len);
4759 if (off >= len+begin)
4761 *start = page + (off-begin);
4762 return ((count < begin+len-off) ? count : begin+len-off);
4765 /* Finally, routines used to initialize the serial driver. */
4768 show_serial_version(void)
4771 "ETRAX 100LX serial-driver %s, (c) 2000-2004 Axis Communications AB\r\n",
4772 &serial_version[11]); /* "$Revision: x.yy" */
4775 /* rs_init inits the driver at boot (using the module_init chain) */
4777 static const struct tty_operations rs_ops = {
4781 .flush_chars = rs_flush_chars,
4782 .write_room = rs_write_room,
4783 .chars_in_buffer = rs_chars_in_buffer,
4784 .flush_buffer = rs_flush_buffer,
4786 .throttle = rs_throttle,
4787 .unthrottle = rs_unthrottle,
4788 .set_termios = rs_set_termios,
4791 .hangup = rs_hangup,
4792 .break_ctl = rs_break,
4793 .send_xchar = rs_send_xchar,
4794 .wait_until_sent = rs_wait_until_sent,
4795 .read_proc = rs_read_proc,
4802 struct e100_serial *info;
4803 struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
4808 show_serial_version();
4810 /* Setup the timed flush handler system */
4812 #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4813 init_timer(&flush_timer);
4814 flush_timer.function = timed_flush_handler;
4815 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
4818 /* Initialize the tty_driver structure */
4820 driver->driver_name = "serial";
4821 driver->name = "ttyS";
4822 driver->major = TTY_MAJOR;
4823 driver->minor_start = 64;
4824 driver->type = TTY_DRIVER_TYPE_SERIAL;
4825 driver->subtype = SERIAL_TYPE_NORMAL;
4826 driver->init_termios = tty_std_termios;
4827 driver->init_termios.c_cflag =
4828 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
4829 driver->init_termios.c_ispeed = 115200;
4830 driver->init_termios.c_ospeed = 115200;
4831 driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
4832 driver->termios = serial_termios;
4833 driver->termios_locked = serial_termios_locked;
4835 tty_set_operations(driver, &rs_ops);
4836 serial_driver = driver;
4837 if (tty_register_driver(driver))
4838 panic("Couldn't register serial driver\n");
4839 /* do some initializing for the separate ports */
4841 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
4842 info->uses_dma_in = 0;
4843 info->uses_dma_out = 0;
4846 info->type = PORT_ETRAX;
4847 info->tr_running = 0;
4848 info->forced_eop = 0;
4849 info->baud_base = DEF_BAUD_BASE;
4850 info->custom_divisor = 0;
4852 info->close_delay = 5*HZ/10;
4853 info->closing_wait = 30*HZ;
4857 info->blocked_open = 0;
4858 info->normal_termios = driver->init_termios;
4859 init_waitqueue_head(&info->open_wait);
4860 init_waitqueue_head(&info->close_wait);
4861 info->xmit.buf = NULL;
4862 info->xmit.tail = info->xmit.head = 0;
4863 info->first_recv_buffer = info->last_recv_buffer = NULL;
4864 info->recv_cnt = info->max_recv_cnt = 0;
4865 info->last_tx_active_usec = 0;
4866 info->last_tx_active = 0;
4868 #if defined(CONFIG_ETRAX_RS485)
4869 /* Set sane defaults */
4870 info->rs485.rts_on_send = 0;
4871 info->rs485.rts_after_sent = 1;
4872 info->rs485.delay_rts_before_send = 0;
4873 info->rs485.enabled = 0;
4875 INIT_WORK(&info->work, do_softint, info);
4877 if (info->enabled) {
4878 printk(KERN_INFO "%s%d at 0x%x is a builtin UART with DMA\n",
4879 serial_driver->name, info->line, (unsigned int)info->port);
4882 #ifdef CONFIG_ETRAX_FAST_TIMER
4883 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4884 memset(fast_timers, 0, sizeof(fast_timers));
4886 #ifdef CONFIG_ETRAX_RS485
4887 memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
4892 #ifndef CONFIG_SVINTO_SIM
4893 /* Not needed in simulator. May only complicate stuff. */
4894 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4896 if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial ", NULL))
4899 #ifdef CONFIG_ETRAX_SERIAL_PORT0
4900 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
4901 if (request_irq(SER0_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_DISABLED, "serial 0 dma tr", NULL))
4904 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
4905 if (request_irq(SER0_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_DISABLED, "serial 0 dma rec", NULL))
4910 #ifdef CONFIG_ETRAX_SERIAL_PORT1
4911 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
4912 if (request_irq(SER1_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_DISABLED, "serial 1 dma tr", NULL))
4915 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
4916 if (request_irq(SER1_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_DISABLED, "serial 1 dma rec", NULL))
4920 #ifdef CONFIG_ETRAX_SERIAL_PORT2
4921 /* DMA Shared with par0 (and SCSI0 and ATA) */
4922 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
4923 if (request_irq(SER2_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 2 dma tr", NULL))
4926 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
4927 if (request_irq(SER2_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 2 dma rec", NULL))
4931 #ifdef CONFIG_ETRAX_SERIAL_PORT3
4932 /* DMA Shared with par1 (and SCSI1 and Extern DMA 0) */
4933 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
4934 if (request_irq(SER3_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 3 dma tr", NULL))
4937 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
4938 if (request_irq(SER3_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 3 dma rec", NULL))
4943 #ifdef CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
4944 if (request_irq(TIMER1_IRQ_NBR, timeout_interrupt, IRQF_SHARED | IRQF_DISABLED,
4945 "fast serial dma timeout", NULL)) {
4946 printk(KERN_CRIT "err: timer1 irq\n");
4949 #endif /* CONFIG_SVINTO_SIM */
4950 debug_write_function = rs_debug_write_function;
4954 /* this makes sure that rs_init is called during kernel boot */
4956 module_init(rs_init);