1 /* linux/arch/arm/mach-s3c2410/s3c2410-dma.c
3 * (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 DMA selection
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/sysdev.h>
20 #include <asm/arch/dma.h>
25 #include <asm/arch/regs-serial.h>
26 #include <asm/arch/regs-gpio.h>
27 #include <asm/arch/regs-ac97.h>
28 #include <asm/arch/regs-mem.h>
29 #include <asm/arch/regs-lcd.h>
30 #include <asm/arch/regs-sdi.h>
31 #include <asm/arch/regs-iis.h>
32 #include <asm/arch/regs-spi.h>
34 static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
37 .channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,
41 .channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,
45 .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
46 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
47 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
48 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
49 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
53 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
54 .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
55 .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
59 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
60 .hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT,
61 .hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT,
65 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
66 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
67 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
71 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
72 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
73 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
77 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
78 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
79 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
83 .channels[0] = S3C2410_DCON_CH0_TIMER | DMA_CH_VALID,
84 .channels[2] = S3C2410_DCON_CH2_TIMER | DMA_CH_VALID,
85 .channels[3] = S3C2410_DCON_CH3_TIMER | DMA_CH_VALID,
89 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
90 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
91 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
95 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
96 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
100 .channels[0] = S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID,
104 .channels[1] = S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID,
108 .channels[2] = S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID,
112 .channels[3] =S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID,
116 static void s3c2410_dma_select(struct s3c2410_dma_chan *chan,
117 struct s3c24xx_dma_map *map)
119 chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID;
122 static struct s3c24xx_dma_selection __initdata s3c2410_dma_sel = {
123 .select = s3c2410_dma_select,
124 .dcon_mask = 7 << 24,
125 .map = s3c2410_dma_mappings,
126 .map_size = ARRAY_SIZE(s3c2410_dma_mappings),
129 static int s3c2410_dma_add(struct sys_device *sysdev)
131 return s3c24xx_dma_init_map(&s3c2410_dma_sel);
134 static struct sysdev_driver s3c2410_dma_driver = {
135 .add = s3c2410_dma_add,
138 static int __init s3c2410_dma_init(void)
140 return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_dma_driver);
143 arch_initcall(s3c2410_dma_init);
145 /* S3C2442 DMA contains the same selection table as the S3C2410 */
147 static struct sysdev_driver s3c2442_dma_driver = {
148 .add = s3c2410_dma_add,
151 static int __init s3c2442_dma_init(void)
153 return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_dma_driver);
156 arch_initcall(s3c2442_dma_init);