1 /* This is the single file included by all MPC8xx build options.
2 * Since there are many different boards and no standard configuration,
3 * we have a unique include file for each. Rather than change every
4 * file that has to include MPC8xx configuration, they all include
5 * this one and the configuration switching is done here.
8 #ifndef __CONFIG_8xx_DEFS
9 #define __CONFIG_8xx_DEFS
15 #include <platforms/mbx.h>
19 #include <platforms/fads.h>
23 #include <platforms/rpxlite.h>
27 #include <platforms/bseip.h>
30 #ifdef CONFIG_RPXCLASSIC
31 #include <platforms/rpxclassic.h>
34 #if defined(CONFIG_TQM8xxL)
35 #include <platforms/tqm8xx.h>
38 #if defined(CONFIG_IVMS8) || defined(CONFIG_IVML24)
39 #include <platforms/ivms8.h>
42 #if defined(CONFIG_HERMES_PRO)
43 #include <platforms/hermes.h>
46 #if defined(CONFIG_IP860)
47 #include <platforms/ip860.h>
50 #if defined(CONFIG_LWMON)
51 #include <platforms/lwmon.h>
54 #if defined(CONFIG_PCU_E)
55 #include <platforms/pcu_e.h>
58 #if defined(CONFIG_CCM)
59 #include <platforms/ccm.h>
62 #if defined(CONFIG_LANTEC)
63 #include <platforms/lantec.h>
66 #if defined(CONFIG_MPC885ADS)
67 #include <platforms/mpc885ads.h>
70 /* Currently, all 8xx boards that support a processor to PCI/ISA bridge
71 * use the same memory map.
74 #if defined(CONFIG_PCI) && defined(PCI_ISA_IO_ADDR)
75 #define _IO_BASE PCI_ISA_IO_ADDR
76 #define _ISA_MEM_BASE PCI_ISA_MEM_ADDR
77 #define PCI_DRAM_OFFSET 0x80000000
80 #define _ISA_MEM_BASE 0
81 #define PCI_DRAM_OFFSET 0
84 #if !defined(_IO_BASE) /* defined in board specific header */
87 #define _ISA_MEM_BASE 0
88 #define PCI_DRAM_OFFSET 0
92 /* The "residual" data board information structure the boot loader
95 extern unsigned char __res[];
99 enum ppc_sys_devices {
116 #define PPC_PIN_SIZE (24 * 1024 * 1024) /* 24Mbytes of data pinned */
118 #ifndef BOARD_CHIP_NAME
119 #define BOARD_CHIP_NAME ""
122 #endif /* !__ASSEMBLY__ */
123 #endif /* CONFIG_8xx */
124 #endif /* __CONFIG_8xx_DEFS */
125 #endif /* __KERNEL__ */