[POWERPC] 86xx: Add aliases node to 8641hpcn DTS file.
[linux-2.6] / arch / powerpc / boot / dts / prpmc2800.dts
1 /* Device Tree Source for Motorola PrPMC2800
2  *
3  * Author: Mark A. Greer <mgreer@mvista.com>
4  *
5  * 2007 (c) MontaVista, Software, Inc.  This file is licensed under
6  * the terms of the GNU General Public License version 2.  This program
7  * is licensed "as is" without any warranty of any kind, whether express
8  * or implied.
9  *
10  * Property values that are labeled as "Default" will be updated by bootwrapper
11  * if it can determine the exact PrPMC type.
12  */
13
14 / {
15         #address-cells = <1>;
16         #size-cells = <1>;
17         model = "PrPMC280/PrPMC2800"; /* Default */
18         compatible = "motorola,PrPMC2800";
19         coherency-off;
20
21         cpus {
22                 #address-cells = <1>;
23                 #size-cells = <0>;
24
25                 PowerPC,7447 {
26                         device_type = "cpu";
27                         reg = <0>;
28                         clock-frequency = <2bb0b140>;   /* Default (733 MHz) */
29                         bus-frequency = <7f28155>;      /* 133.333333 MHz */
30                         timebase-frequency = <1fca055>; /* 33.333333 MHz */
31                         i-cache-line-size = <20>;
32                         d-cache-line-size = <20>;
33                         i-cache-size = <8000>;
34                         d-cache-size = <8000>;
35                 };
36         };
37
38         memory {
39                 device_type = "memory";
40                 reg = <00000000 20000000>;      /* Default (512MB) */
41         };
42
43         mv64x60@f1000000 { /* Marvell Discovery */
44                 #address-cells = <1>;
45                 #size-cells = <1>;
46                 model = "mv64360";                      /* Default */
47                 compatible = "marvell,mv64x60";
48                 clock-frequency = <7f28155>;            /* 133.333333 MHz */
49                 reg = <f1000000 00010000>;
50                 virtual-reg = <f1000000>;
51                 ranges = <88000000 88000000 01000000    /* PCI 0 I/O Space */
52                           80000000 80000000 08000000    /* PCI 0 MEM Space */
53                           a0000000 a0000000 04000000    /* User FLASH */
54                           00000000 f1000000 00010000    /* Bridge's regs */
55                           f2000000 f2000000 00040000>;  /* Integrated SRAM */
56
57                 flash@a0000000 {
58                         device_type = "rom";
59                         compatible = "direct-mapped";
60                         reg = <a0000000 4000000>; /* Default (64MB) */
61                         probe-type = "CFI";
62                         bank-width = <4>;
63                         partitions = <00000000 00100000 /* RO */
64                                       00100000 00040001 /* RW */
65                                       00140000 00400000 /* RO */
66                                       00540000 039c0000 /* RO */
67                                       03f00000 00100000>; /* RO */
68                         partition-names = "FW Image A", "FW Config Data", "Kernel Image", "Filesystem", "FW Image B";
69                 };
70
71                 mdio {
72                         #address-cells = <1>;
73                         #size-cells = <0>;
74                         device_type = "mdio";
75                         compatible = "marvell,mv64x60-mdio";
76                         ethernet-phy@1 {
77                                 device_type = "ethernet-phy";
78                                 compatible = "broadcom,bcm5421";
79                                 interrupts = <4c>;      /* GPP 12 */
80                                 interrupt-parent = <&/mv64x60/pic>;
81                                 reg = <1>;
82                         };
83                         ethernet-phy@3 {
84                                 device_type = "ethernet-phy";
85                                 compatible = "broadcom,bcm5421";
86                                 interrupts = <4c>;      /* GPP 12 */
87                                 interrupt-parent = <&/mv64x60/pic>;
88                                 reg = <3>;
89                         };
90                 };
91
92                 ethernet@2000 {
93                         reg = <2000 2000>;
94                         eth0 {
95                                 device_type = "network";
96                                 compatible = "marvell,mv64x60-eth";
97                                 block-index = <0>;
98                                 interrupts = <20>;
99                                 interrupt-parent = <&/mv64x60/pic>;
100                                 phy = <&/mv64x60/mdio/ethernet-phy@1>;
101                                 local-mac-address = [ 00 00 00 00 00 00 ];
102                         };
103                         eth1 {
104                                 device_type = "network";
105                                 compatible = "marvell,mv64x60-eth";
106                                 block-index = <1>;
107                                 interrupts = <21>;
108                                 interrupt-parent = <&/mv64x60/pic>;
109                                 phy = <&/mv64x60/mdio/ethernet-phy@3>;
110                                 local-mac-address = [ 00 00 00 00 00 00 ];
111                         };
112                 };
113
114                 sdma@4000 {
115                         device_type = "dma";
116                         compatible = "marvell,mv64x60-sdma";
117                         reg = <4000 c18>;
118                         virtual-reg = <f1004000>;
119                         interrupt-base = <0>;
120                         interrupts = <24>;
121                         interrupt-parent = <&/mv64x60/pic>;
122                 };
123
124                 sdma@6000 {
125                         device_type = "dma";
126                         compatible = "marvell,mv64x60-sdma";
127                         reg = <6000 c18>;
128                         virtual-reg = <f1006000>;
129                         interrupt-base = <0>;
130                         interrupts = <26>;
131                         interrupt-parent = <&/mv64x60/pic>;
132                 };
133
134                 brg@b200 {
135                         compatible = "marvell,mv64x60-brg";
136                         reg = <b200 8>;
137                         clock-src = <8>;
138                         clock-frequency = <7ed6b40>;
139                         current-speed = <2580>;
140                         bcr = <0>;
141                 };
142
143                 brg@b208 {
144                         compatible = "marvell,mv64x60-brg";
145                         reg = <b208 8>;
146                         clock-src = <8>;
147                         clock-frequency = <7ed6b40>;
148                         current-speed = <2580>;
149                         bcr = <0>;
150                 };
151
152                 cunit@f200 {
153                         reg = <f200 200>;
154                 };
155
156                 mpscrouting@b400 {
157                         reg = <b400 c>;
158                 };
159
160                 mpscintr@b800 {
161                         reg = <b800 100>;
162                         virtual-reg = <f100b800>;
163                 };
164
165                 mpsc@8000 {
166                         device_type = "serial";
167                         compatible = "marvell,mpsc";
168                         reg = <8000 38>;
169                         virtual-reg = <f1008000>;
170                         sdma = <&/mv64x60/sdma@4000>;
171                         brg = <&/mv64x60/brg@b200>;
172                         cunit = <&/mv64x60/cunit@f200>;
173                         mpscrouting = <&/mv64x60/mpscrouting@b400>;
174                         mpscintr = <&/mv64x60/mpscintr@b800>;
175                         block-index = <0>;
176                         max_idle = <28>;
177                         chr_1 = <0>;
178                         chr_2 = <0>;
179                         chr_10 = <3>;
180                         mpcr = <0>;
181                         interrupts = <28>;
182                         interrupt-parent = <&/mv64x60/pic>;
183                 };
184
185                 mpsc@9000 {
186                         device_type = "serial";
187                         compatible = "marvell,mpsc";
188                         reg = <9000 38>;
189                         virtual-reg = <f1009000>;
190                         sdma = <&/mv64x60/sdma@6000>;
191                         brg = <&/mv64x60/brg@b208>;
192                         cunit = <&/mv64x60/cunit@f200>;
193                         mpscrouting = <&/mv64x60/mpscrouting@b400>;
194                         mpscintr = <&/mv64x60/mpscintr@b800>;
195                         block-index = <1>;
196                         max_idle = <28>;
197                         chr_1 = <0>;
198                         chr_2 = <0>;
199                         chr_10 = <3>;
200                         mpcr = <0>;
201                         interrupts = <2a>;
202                         interrupt-parent = <&/mv64x60/pic>;
203                 };
204
205                 wdt@b410 {                      /* watchdog timer */
206                         compatible = "marvell,mv64x60-wdt";
207                         reg = <b410 8>;
208                         timeout = <a>;          /* wdt timeout in seconds */
209                 };
210
211                 i2c@c000 {
212                         device_type = "i2c";
213                         compatible = "marvell,mv64x60-i2c";
214                         reg = <c000 20>;
215                         virtual-reg = <f100c000>;
216                         freq_m = <8>;
217                         freq_n = <3>;
218                         timeout = <3e8>;                /* 1000 = 1 second */
219                         retries = <1>;
220                         interrupts = <25>;
221                         interrupt-parent = <&/mv64x60/pic>;
222                 };
223
224                 pic {
225                         #interrupt-cells = <1>;
226                         #address-cells = <0>;
227                         compatible = "marvell,mv64x60-pic";
228                         reg = <0000 88>;
229                         interrupt-controller;
230                 };
231
232                 mpp@f000 {
233                         compatible = "marvell,mv64x60-mpp";
234                         reg = <f000 10>;
235                 };
236
237                 gpp@f100 {
238                         compatible = "marvell,mv64x60-gpp";
239                         reg = <f100 20>;
240                 };
241
242                 pci@80000000 {
243                         #address-cells = <3>;
244                         #size-cells = <2>;
245                         #interrupt-cells = <1>;
246                         device_type = "pci";
247                         compatible = "marvell,mv64x60-pci";
248                         reg = <0cf8 8>;
249                         ranges = <01000000 0        0 88000000 0 01000000
250                                   02000000 0 80000000 80000000 0 08000000>;
251                         bus-range = <0 ff>;
252                         clock-frequency = <3EF1480>;
253                         interrupt-pci-iack = <0c34>;
254                         interrupt-parent = <&/mv64x60/pic>;
255                         interrupt-map-mask = <f800 0 0 7>;
256                         interrupt-map = <
257                                 /* IDSEL 0x0a */
258                                 5000 0 0 1 &/mv64x60/pic 50
259                                 5000 0 0 2 &/mv64x60/pic 51
260                                 5000 0 0 3 &/mv64x60/pic 5b
261                                 5000 0 0 4 &/mv64x60/pic 5d
262
263                                 /* IDSEL 0x0b */
264                                 5800 0 0 1 &/mv64x60/pic 5b
265                                 5800 0 0 2 &/mv64x60/pic 5d
266                                 5800 0 0 3 &/mv64x60/pic 50
267                                 5800 0 0 4 &/mv64x60/pic 51
268
269                                 /* IDSEL 0x0c */
270                                 6000 0 0 1 &/mv64x60/pic 5b
271                                 6000 0 0 2 &/mv64x60/pic 5d
272                                 6000 0 0 3 &/mv64x60/pic 50
273                                 6000 0 0 4 &/mv64x60/pic 51
274
275                                 /* IDSEL 0x0d */
276                                 6800 0 0 1 &/mv64x60/pic 5d
277                                 6800 0 0 2 &/mv64x60/pic 50
278                                 6800 0 0 3 &/mv64x60/pic 51
279                                 6800 0 0 4 &/mv64x60/pic 5b
280                         >;
281                 };
282
283                 cpu-error@0070 {
284                         compatible = "marvell,mv64x60-cpu-error";
285                         reg = <0070 10 0128 28>;
286                         interrupts = <03>;
287                         interrupt-parent = <&/mv64x60/pic>;
288                 };
289
290                 sram-ctrl@0380 {
291                         compatible = "marvell,mv64x60-sram-ctrl";
292                         reg = <0380 80>;
293                         interrupts = <0d>;
294                         interrupt-parent = <&/mv64x60/pic>;
295                 };
296
297                 pci-error@1d40 {
298                         compatible = "marvell,mv64x60-pci-error";
299                         reg = <1d40 40 0c28 4>;
300                         interrupts = <0c>;
301                         interrupt-parent = <&/mv64x60/pic>;
302                 };
303
304                 mem-ctrl@1400 {
305                         compatible = "marvell,mv64x60-mem-ctrl";
306                         reg = <1400 60>;
307                         interrupts = <11>;
308                         interrupt-parent = <&/mv64x60/pic>;
309                 };
310         };
311
312         chosen {
313                 bootargs = "ip=on";
314                 linux,stdout-path = "/mv64x60@f1000000/mpsc@8000";
315         };
316 };