2 * linux/arch/arm/mach-realview/realview_pb1176.c
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/sysdev.h>
25 #include <linux/amba/bus.h>
28 #include <mach/hardware.h>
31 #include <asm/mach-types.h>
32 #include <asm/hardware/gic.h>
33 #include <asm/hardware/icst307.h>
34 #include <asm/hardware/cache-l2x0.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/flash.h>
38 #include <asm/mach/map.h>
39 #include <asm/mach/mmc.h>
40 #include <asm/mach/time.h>
42 #include <mach/board-pb1176.h>
43 #include <mach/irqs.h>
48 static struct map_desc realview_pb1176_io_desc[] __initdata = {
50 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
51 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
55 .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
56 .pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
60 .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
61 .pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
65 .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
66 .pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
70 .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
71 .pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
75 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
76 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
80 .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
81 .pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
85 .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
86 .pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
90 .virtual = IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
91 .pfn = __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
95 #ifdef CONFIG_DEBUG_LL
97 .virtual = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
98 .pfn = __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
105 static void __init realview_pb1176_map_io(void)
107 iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
111 * RealView PB1176 AMBA devices
113 #define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ }
114 #define GPIO2_DMA { 0, 0 }
115 #define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ }
116 #define GPIO3_DMA { 0, 0 }
117 #define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ }
118 #define AACI_DMA { 0x80, 0x81 }
119 #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
120 #define MMCI0_DMA { 0x84, 0 }
121 #define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ }
122 #define KMI0_DMA { 0, 0 }
123 #define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ }
124 #define KMI1_DMA { 0, 0 }
125 #define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ }
126 #define PB1176_SMC_DMA { 0, 0 }
127 #define MPMC_IRQ { NO_IRQ, NO_IRQ }
128 #define MPMC_DMA { 0, 0 }
129 #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ }
130 #define PB1176_CLCD_DMA { 0, 0 }
131 #define DMAC_IRQ { IRQ_PB1176_DMAC, NO_IRQ }
132 #define DMAC_DMA { 0, 0 }
133 #define SCTL_IRQ { NO_IRQ, NO_IRQ }
134 #define SCTL_DMA { 0, 0 }
135 #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ }
136 #define PB1176_WATCHDOG_DMA { 0, 0 }
137 #define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ }
138 #define PB1176_GPIO0_DMA { 0, 0 }
139 #define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ }
140 #define GPIO1_DMA { 0, 0 }
141 #define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ }
142 #define PB1176_RTC_DMA { 0, 0 }
143 #define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ }
144 #define SCI_DMA { 7, 6 }
145 #define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ }
146 #define PB1176_UART0_DMA { 15, 14 }
147 #define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ }
148 #define PB1176_UART1_DMA { 13, 12 }
149 #define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ }
150 #define PB1176_UART2_DMA { 11, 10 }
151 #define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ }
152 #define PB1176_UART3_DMA { 0x86, 0x87 }
153 #define PB1176_SSP_IRQ { IRQ_PB1176_SSP, NO_IRQ }
154 #define PB1176_SSP_DMA { 9, 8 }
156 /* FPGA Primecells */
157 AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
158 AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
159 AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
160 AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
161 AMBA_DEVICE(uart3, "fpga:09", PB1176_UART3, NULL);
163 /* DevChip Primecells */
164 AMBA_DEVICE(smc, "dev:00", PB1176_SMC, NULL);
165 AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
166 AMBA_DEVICE(wdog, "dev:e1", PB1176_WATCHDOG, NULL);
167 AMBA_DEVICE(gpio0, "dev:e4", PB1176_GPIO0, NULL);
168 AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
169 AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
170 AMBA_DEVICE(rtc, "dev:e8", PB1176_RTC, NULL);
171 AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
172 AMBA_DEVICE(uart0, "dev:f1", PB1176_UART0, NULL);
173 AMBA_DEVICE(uart1, "dev:f2", PB1176_UART1, NULL);
174 AMBA_DEVICE(uart2, "dev:f3", PB1176_UART2, NULL);
175 AMBA_DEVICE(ssp0, "dev:f4", PB1176_SSP, NULL);
177 /* Primecells on the NEC ISSP chip */
178 AMBA_DEVICE(clcd, "issp:20", PB1176_CLCD, &clcd_plat_data);
179 //AMBA_DEVICE(dmac, "issp:30", PB1176_DMAC, NULL);
181 static struct amba_device *amba_devs[] __initdata = {
204 * RealView PB1176 platform devices
206 static struct resource realview_pb1176_flash_resource = {
207 .start = REALVIEW_PB1176_FLASH_BASE,
208 .end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
209 .flags = IORESOURCE_MEM,
212 static struct resource realview_pb1176_smsc911x_resources[] = {
214 .start = REALVIEW_PB1176_ETH_BASE,
215 .end = REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
216 .flags = IORESOURCE_MEM,
219 .start = IRQ_PB1176_ETH,
220 .end = IRQ_PB1176_ETH,
221 .flags = IORESOURCE_IRQ,
225 static void __init gic_init_irq(void)
227 /* ARM1176 DevChip GIC, primary */
228 gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE);
229 gic_dist_init(0, __io_address(REALVIEW_DC1176_GIC_DIST_BASE), IRQ_DC1176_GIC_START);
230 gic_cpu_init(0, gic_cpu_base_addr);
232 /* board GIC, secondary */
233 gic_dist_init(1, __io_address(REALVIEW_PB1176_GIC_DIST_BASE), IRQ_PB1176_GIC_START);
234 gic_cpu_init(1, __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
235 gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
238 static void __init realview_pb1176_timer_init(void)
240 timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
241 timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
242 timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
243 timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;
245 realview_timer_init(IRQ_DC1176_TIMER0);
248 static struct sys_timer realview_pb1176_timer = {
249 .init = realview_pb1176_timer_init,
252 static void __init realview_pb1176_init(void)
256 #ifdef CONFIG_CACHE_L2X0
257 /* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
258 l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
261 realview_flash_register(&realview_pb1176_flash_resource, 1);
262 realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
264 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
265 struct amba_device *d = amba_devs[i];
266 amba_device_register(d, &iomem_resource);
270 leds_event = realview_leds_event;
274 MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
275 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
276 .phys_io = REALVIEW_PB1176_UART0_BASE,
277 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
278 .boot_params = PHYS_OFFSET + 0x00000100,
279 .map_io = realview_pb1176_map_io,
280 .init_irq = gic_init_irq,
281 .timer = &realview_pb1176_timer,
282 .init_machine = realview_pb1176_init,