git.oblomov.eu Git - linux-2.6/blob - drivers/ieee1394/dv1394.c

   1 /*
   2  * dv1394.c - DV input/output over IEEE 1394 on OHCI chips
   3  *   Copyright (C)2001 Daniel Maas <dmaas@dcine.com>
   4  *     receive by Dan Dennedy <dan@dennedy.org>
   5  *
   6  * based on:
   7  *  video1394.c - video driver for OHCI 1394 boards
   8  *  Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software Foundation,
  22  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  23  */
  24
  25 /*
  26   OVERVIEW
  27
  28   I designed dv1394 as a "pipe" that you can use to shoot DV onto a
  29   FireWire bus. In transmission mode, dv1394 does the following:
  30
  31    1. accepts contiguous frames of DV data from user-space, via write()
  32       or mmap() (see dv1394.h for the complete API)
  33    2. wraps IEC 61883 packets around the DV data, inserting
  34       empty synchronization packets as necessary
  35    3. assigns accurate SYT timestamps to the outgoing packets
  36    4. shoots them out using the OHCI card's IT DMA engine
  37
  38    Thanks to Dan Dennedy, we now have a receive mode that does the following:
  39
  40    1. accepts raw IEC 61883 packets from the OHCI card
  41    2. re-assembles the DV data payloads into contiguous frames,
  42       discarding empty packets
  43    3. sends the DV data to user-space via read() or mmap()
  44 */
  45
  46 /*
  47   TODO:
  48
  49   - tunable frame-drop behavior: either loop last frame, or halt transmission
  50
  51   - use a scatter/gather buffer for DMA programs (f->descriptor_pool)
  52     so that we don't rely on allocating 64KB of contiguous kernel memory
  53     via pci_alloc_consistent()
  54
  55   DONE:
  56   - during reception, better handling of dropped frames and continuity errors
  57   - during reception, prevent DMA from bypassing the irq tasklets
  58   - reduce irq rate during reception (1/250 packets).
  59   - add many more internal buffers during reception with scatter/gather dma.
  60   - add dbc (continuity) checking on receive, increment status.dropped_frames
  61     if not continuous.
  62   - restart IT DMA after a bus reset
  63   - safely obtain and release ISO Tx channels in cooperation with OHCI driver
  64   - map received DIF blocks to their proper location in DV frame (ensure
  65     recovery if dropped packet)
  66   - handle bus resets gracefully (OHCI card seems to take care of this itself(!))
  67   - do not allow resizing the user_buf once allocated; eliminate nuke_buffer_mappings
  68   - eliminated #ifdef DV1394_DEBUG_LEVEL by inventing macros debug_printk and irq_printk
  69   - added wmb() and mb() to places where PCI read/write ordering needs to be enforced
  70   - set video->id correctly
  71   - store video_cards in an array indexed by OHCI card ID, rather than a list
  72   - implement DMA context allocation to cooperate with other users of the OHCI
  73   - fix all XXX showstoppers
  74   - disable IR/IT DMA interrupts on shutdown
  75   - flush pci writes to the card by issuing a read
  76   - devfs and character device dispatching (* needs testing with Linux 2.2.x)
  77   - switch over to the new kernel DMA API (pci_map_*()) (* needs testing on platforms with IOMMU!)
  78   - keep all video_cards in a list (for open() via chardev), set file->private_data = video
  79   - dv1394_poll should indicate POLLIN when receiving buffers are available
  80   - add proc fs interface to set cip_n, cip_d, syt_offset, and video signal
  81   - expose xmit and recv as separate devices (not exclusive)
  82   - expose NTSC and PAL as separate devices (can be overridden)
  83
  84 */
  85
  86 #include <linux/config.h>
  87 #include <linux/kernel.h>
  88 #include <linux/list.h>
  89 #include <linux/slab.h>
  90 #include <linux/interrupt.h>
  91 #include <linux/wait.h>
  92 #include <linux/errno.h>
  93 #include <linux/module.h>
  94 #include <linux/init.h>
  95 #include <linux/pci.h>
  96 #include <linux/fs.h>
  97 #include <linux/poll.h>
  98 #include <linux/smp_lock.h>
  99 #include <linux/bitops.h>
 100 #include <asm/byteorder.h>
 101 #include <asm/atomic.h>
 102 #include <asm/io.h>
 103 #include <asm/uaccess.h>
 104 #include <linux/delay.h>
 105 #include <asm/pgtable.h>
 106 #include <asm/page.h>
 107 #include <linux/sched.h>
 108 #include <linux/types.h>
 109 #include <linux/vmalloc.h>
 110 #include <linux/string.h>
 111 #include <linux/ioctl32.h>
 112 #include <linux/compat.h>
 113 #include <linux/cdev.h>
 114
 115 #include "ieee1394.h"
 116 #include "ieee1394_types.h"
 117 #include "nodemgr.h"
 118 #include "hosts.h"
 119 #include "ieee1394_core.h"
 120 #include "highlevel.h"
 121 #include "dv1394.h"
 122 #include "dv1394-private.h"
 123
 124 #include "ohci1394.h"
 125
 126 #ifndef virt_to_page
 127 #define virt_to_page(x) MAP_NR(x)
 128 #endif
 129
 130 #ifndef vmalloc_32
 131 #define vmalloc_32(x) vmalloc(x)
 132 #endif
 133
 134
 135 /* DEBUG LEVELS:
 136    0 - no debugging messages
 137    1 - some debugging messages, but none during DMA frame transmission
 138    2 - lots of messages, including during DMA frame transmission
 139        (will cause undeflows if your machine is too slow!)
 140 */
 141
 142 #define DV1394_DEBUG_LEVEL 0
 143
 144 /* for debugging use ONLY: allow more than one open() of the device */
 145 /* #define DV1394_ALLOW_MORE_THAN_ONE_OPEN 1 */
 146
 147 #if DV1394_DEBUG_LEVEL >= 2
 148 #define irq_printk( args... ) printk( args )
 149 #else
 150 #define irq_printk( args... )
 151 #endif
 152
 153 #if DV1394_DEBUG_LEVEL >= 1
 154 #define debug_printk( args... ) printk( args)
 155 #else
 156 #define debug_printk( args... )
 157 #endif
 158
 159 /* issue a dummy PCI read to force the preceding write
 160    to be posted to the PCI bus immediately */
 161
 162 static inline void flush_pci_write(struct ti_ohci *ohci)
 163 {
 164         mb();
 165         reg_read(ohci, OHCI1394_IsochronousCycleTimer);
 166 }
 167
 168 static void it_tasklet_func(unsigned long data);
 169 static void ir_tasklet_func(unsigned long data);
 170
 171 #ifdef CONFIG_COMPAT
 172 static long dv1394_compat_ioctl(struct file *file, unsigned int cmd,
 173                                unsigned long arg);
 174 #endif
 175
 176 /* GLOBAL DATA */
 177
 178 /* list of all video_cards */
 179 static LIST_HEAD(dv1394_cards);
 180 static DEFINE_SPINLOCK(dv1394_cards_lock);
 181
 182 /* translate from a struct file* to the corresponding struct video_card* */
 183
 184 static inline struct video_card* file_to_video_card(struct file *file)
 185 {
 186         return (struct video_card*) file->private_data;
 187 }
 188
 189 /*** FRAME METHODS *********************************************************/
 190
 191 static void frame_reset(struct frame *f)
 192 {
 193         f->state = FRAME_CLEAR;
 194         f->done = 0;
 195         f->n_packets = 0;
 196         f->frame_begin_timestamp = NULL;
 197         f->assigned_timestamp = 0;
 198         f->cip_syt1 = NULL;
 199         f->cip_syt2 = NULL;
 200         f->mid_frame_timestamp = NULL;
 201         f->frame_end_timestamp = NULL;
 202         f->frame_end_branch = NULL;
 203 }
 204
 205 static struct frame* frame_new(unsigned int frame_num, struct video_card *video)
 206 {
 207         struct frame *f = kmalloc(sizeof(*f), GFP_KERNEL);
 208         if (!f)
 209                 return NULL;
 210
 211         f->video = video;
 212         f->frame_num = frame_num;
 213
 214         f->header_pool = pci_alloc_consistent(f->video->ohci->dev, PAGE_SIZE, &f->header_pool_dma);
 215         if (!f->header_pool) {
 216                 printk(KERN_ERR "dv1394: failed to allocate CIP header pool\n");
 217                 kfree(f);
 218                 return NULL;
 219         }
 220
 221         debug_printk("dv1394: frame_new: allocated CIP header pool at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
 222                      (unsigned long) f->header_pool, (unsigned long) f->header_pool_dma, PAGE_SIZE);
 223
 224         f->descriptor_pool_size = MAX_PACKETS * sizeof(struct DMA_descriptor_block);
 225         /* make it an even # of pages */
 226         f->descriptor_pool_size += PAGE_SIZE - (f->descriptor_pool_size%PAGE_SIZE);
 227
 228         f->descriptor_pool = pci_alloc_consistent(f->video->ohci->dev,
 229                                                   f->descriptor_pool_size,
 230                                                   &f->descriptor_pool_dma);
 231         if (!f->descriptor_pool) {
 232                 pci_free_consistent(f->video->ohci->dev, PAGE_SIZE, f->header_pool, f->header_pool_dma);
 233                 kfree(f);
 234                 return NULL;
 235         }
 236
 237         debug_printk("dv1394: frame_new: allocated DMA program memory at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
 238                      (unsigned long) f->descriptor_pool, (unsigned long) f->descriptor_pool_dma, f->descriptor_pool_size);
 239
 240         f->data = 0;
 241         frame_reset(f);
 242
 243         return f;
 244 }
 245
 246 static void frame_delete(struct frame *f)
 247 {
 248         pci_free_consistent(f->video->ohci->dev, PAGE_SIZE, f->header_pool, f->header_pool_dma);
 249         pci_free_consistent(f->video->ohci->dev, f->descriptor_pool_size, f->descriptor_pool, f->descriptor_pool_dma);
 250         kfree(f);
 251 }
 252
 253
 254
 255
 256 /*
 257    frame_prepare() - build the DMA program for transmitting
 258
 259    Frame_prepare() must be called OUTSIDE the video->spinlock.
 260    However, frame_prepare() must still be serialized, so
 261    it should be called WITH the video->sem taken.
 262  */
 263
 264 static void frame_prepare(struct video_card *video, unsigned int this_frame)
 265 {
 266         struct frame *f = video->frames[this_frame];
 267         int last_frame;
 268
 269         struct DMA_descriptor_block *block;
 270         dma_addr_t block_dma;
 271         struct CIP_header *cip;
 272         dma_addr_t cip_dma;
 273
 274         unsigned int n_descriptors, full_packets, packets_per_frame, payload_size;
 275
 276         /* these flags denote packets that need special attention */
 277         int empty_packet, first_packet, last_packet, mid_packet;
 278
 279         u32 *branch_address, *last_branch_address = NULL;
 280         unsigned long data_p;
 281         int first_packet_empty = 0;
 282         u32 cycleTimer, ct_sec, ct_cyc, ct_off;
 283         unsigned long irq_flags;
 284
 285         irq_printk("frame_prepare( %d ) ---------------------\n", this_frame);
 286
 287         full_packets = 0;
 288
 289
 290
 291         if (video->pal_or_ntsc == DV1394_PAL)
 292                 packets_per_frame = DV1394_PAL_PACKETS_PER_FRAME;
 293         else
 294                 packets_per_frame = DV1394_NTSC_PACKETS_PER_FRAME;
 295
 296         while ( full_packets < packets_per_frame ) {
 297                 empty_packet = first_packet = last_packet = mid_packet = 0;
 298
 299                 data_p = f->data + full_packets * 480;
 300
 301                 /************************************************/
 302                 /* allocate a descriptor block and a CIP header */
 303                 /************************************************/
 304
 305                 /* note: these should NOT cross a page boundary (DMA restriction) */
 306
 307                 if (f->n_packets >= MAX_PACKETS) {
 308                         printk(KERN_ERR "dv1394: FATAL ERROR: max packet count exceeded\n");
 309                         return;
 310                 }
 311
 312                 /* the block surely won't cross a page boundary,
 313                    since an even number of descriptor_blocks fit on a page */
 314                 block = &(f->descriptor_pool[f->n_packets]);
 315
 316                 /* DMA address of the block = offset of block relative
 317                     to the kernel base address of the descriptor pool
 318                     + DMA base address of the descriptor pool */
 319                 block_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
 320
 321
 322                 /* the whole CIP pool fits on one page, so no worries about boundaries */
 323                 if ( ((unsigned long) &(f->header_pool[f->n_packets]) - (unsigned long) f->header_pool)
 324                     > PAGE_SIZE) {
 325                         printk(KERN_ERR "dv1394: FATAL ERROR: no room to allocate CIP header\n");
 326                         return;
 327                 }
 328
 329                 cip = &(f->header_pool[f->n_packets]);
 330
 331                 /* DMA address of the CIP header = offset of cip
 332                    relative to kernel base address of the header pool
 333                    + DMA base address of the header pool */
 334                 cip_dma = (unsigned long) cip % PAGE_SIZE + f->header_pool_dma;
 335
 336                 /* is this an empty packet? */
 337
 338                 if (video->cip_accum > (video->cip_d - video->cip_n)) {
 339                         empty_packet = 1;
 340                         payload_size = 8;
 341                         video->cip_accum -= (video->cip_d - video->cip_n);
 342                 } else {
 343                         payload_size = 488;
 344                         video->cip_accum += video->cip_n;
 345                 }
 346
 347                 /* there are three important packets each frame:
 348
 349                    the first packet in the frame - we ask the card to record the timestamp when
 350                                                    this packet is actually sent, so we can monitor
 351                                                    how accurate our timestamps are. Also, the first
 352                                                    packet serves as a semaphore to let us know that
 353                                                    it's OK to free the *previous* frame's DMA buffer
 354
 355                    the last packet in the frame -  this packet is used to detect buffer underflows.
 356                                                    if this is the last ready frame, the last DMA block
 357                                                    will have a branch back to the beginning of the frame
 358                                                    (so that the card will re-send the frame on underflow).
 359                                                    if this branch gets taken, we know that at least one
 360                                                    frame has been dropped. When the next frame is ready,
 361                                                    the branch is pointed to its first packet, and the
 362                                                    semaphore is disabled.
 363
 364                    a "mid" packet slightly before the end of the frame - this packet should trigger
 365                                    an interrupt so we can go and assign a timestamp to the first packet
 366                                    in the next frame. We don't use the very last packet in the frame
 367                                    for this purpose, because that would leave very little time to set
 368                                    the timestamp before DMA starts on the next frame.
 369                 */
 370
 371                 if (f->n_packets == 0) {
 372                         first_packet = 1;
 373                 } else if ( full_packets == (packets_per_frame-1) ) {
 374                         last_packet = 1;
 375                 } else if (f->n_packets == packets_per_frame) {
 376                         mid_packet = 1;
 377                 }
 378
 379
 380                 /********************/
 381                 /* setup CIP header */
 382                 /********************/
 383
 384                 /* the timestamp will be written later from the
 385                    mid-frame interrupt handler. For now we just
 386                    store the address of the CIP header(s) that
 387                    need a timestamp. */
 388
 389                 /* first packet in the frame needs a timestamp */
 390                 if (first_packet) {
 391                         f->cip_syt1 = cip;
 392                         if (empty_packet)
 393                                 first_packet_empty = 1;
 394
 395                 } else if (first_packet_empty && (f->n_packets == 1) ) {
 396                         /* if the first packet was empty, the second
 397                            packet's CIP header also needs a timestamp */
 398                         f->cip_syt2 = cip;
 399                 }
 400
 401                 fill_cip_header(cip,
 402                                 /* the node ID number of the OHCI card */
 403                                 reg_read(video->ohci, OHCI1394_NodeID) & 0x3F,
 404                                 video->continuity_counter,
 405                                 video->pal_or_ntsc,
 406                                 0xFFFF /* the timestamp is filled in later */);
 407
 408                 /* advance counter, only for full packets */
 409                 if ( ! empty_packet )
 410                         video->continuity_counter++;
 411
 412                 /******************************/
 413                 /* setup DMA descriptor block */
 414                 /******************************/
 415
 416                 /* first descriptor - OUTPUT_MORE_IMMEDIATE, for the controller's IT header */
 417                 fill_output_more_immediate( &(block->u.out.omi), 1, video->channel, 0, payload_size);
 418
 419                 if (empty_packet) {
 420                         /* second descriptor - OUTPUT_LAST for CIP header */
 421                         fill_output_last( &(block->u.out.u.empty.ol),
 422
 423                                           /* want completion status on all interesting packets */
 424                                           (first_packet || mid_packet || last_packet) ? 1 : 0,
 425
 426                                           /* want interrupts on all interesting packets */
 427                                           (first_packet || mid_packet || last_packet) ? 1 : 0,
 428
 429                                           sizeof(struct CIP_header), /* data size */
 430                                           cip_dma);
 431
 432                         if (first_packet)
 433                                 f->frame_begin_timestamp = &(block->u.out.u.empty.ol.q[3]);
 434                         else if (mid_packet)
 435                                 f->mid_frame_timestamp = &(block->u.out.u.empty.ol.q[3]);
 436                         else if (last_packet) {
 437                                 f->frame_end_timestamp = &(block->u.out.u.empty.ol.q[3]);
 438                                 f->frame_end_branch = &(block->u.out.u.empty.ol.q[2]);
 439                         }
 440
 441                         branch_address = &(block->u.out.u.empty.ol.q[2]);
 442                         n_descriptors = 3;
 443                         if (first_packet)
 444                                 f->first_n_descriptors = n_descriptors;
 445
 446                 } else { /* full packet */
 447
 448                         /* second descriptor - OUTPUT_MORE for CIP header */
 449                         fill_output_more( &(block->u.out.u.full.om),
 450                                           sizeof(struct CIP_header), /* data size */
 451                                           cip_dma);
 452
 453
 454                         /* third (and possibly fourth) descriptor - for DV data */
 455                         /* the 480-byte payload can cross a page boundary; if so,
 456                            we need to split it into two DMA descriptors */
 457
 458                         /* does the 480-byte data payload cross a page boundary? */
 459                         if ( (PAGE_SIZE- ((unsigned long)data_p % PAGE_SIZE) ) < 480 ) {
 460
 461                                 /* page boundary crossed */
 462
 463                                 fill_output_more( &(block->u.out.u.full.u.cross.om),
 464                                                   /* data size - how much of data_p fits on the first page */
 465                                                   PAGE_SIZE - (data_p % PAGE_SIZE),
 466
 467                                                   /* DMA address of data_p */
 468                                                   dma_region_offset_to_bus(&video->dv_buf,
 469                                                                            data_p - (unsigned long) video->dv_buf.kvirt));
 470
 471                                 fill_output_last( &(block->u.out.u.full.u.cross.ol),
 472
 473                                                   /* want completion status on all interesting packets */
 474                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 475
 476                                                   /* want interrupt on all interesting packets */
 477                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 478
 479                                                   /* data size - remaining portion of data_p */
 480                                                   480 - (PAGE_SIZE - (data_p % PAGE_SIZE)),
 481
 482                                                   /* DMA address of data_p + PAGE_SIZE - (data_p % PAGE_SIZE) */
 483                                                   dma_region_offset_to_bus(&video->dv_buf,
 484                                                                            data_p + PAGE_SIZE - (data_p % PAGE_SIZE) - (unsigned long) video->dv_buf.kvirt));
 485
 486                                 if (first_packet)
 487                                         f->frame_begin_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
 488                                 else if (mid_packet)
 489                                         f->mid_frame_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
 490                                 else if (last_packet) {
 491                                         f->frame_end_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
 492                                         f->frame_end_branch = &(block->u.out.u.full.u.cross.ol.q[2]);
 493                                 }
 494
 495                                 branch_address = &(block->u.out.u.full.u.cross.ol.q[2]);
 496
 497                                 n_descriptors = 5;
 498                                 if (first_packet)
 499                                         f->first_n_descriptors = n_descriptors;
 500
 501                                 full_packets++;
 502
 503                         } else {
 504                                 /* fits on one page */
 505
 506                                 fill_output_last( &(block->u.out.u.full.u.nocross.ol),
 507
 508                                                   /* want completion status on all interesting packets */
 509                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 510
 511                                                   /* want interrupt on all interesting packets */
 512                                                   (first_packet || mid_packet || last_packet) ? 1 : 0,
 513
 514                                                   480, /* data size (480 bytes of DV data) */
 515
 516
 517                                                   /* DMA address of data_p */
 518                                                   dma_region_offset_to_bus(&video->dv_buf,
 519                                                                            data_p - (unsigned long) video->dv_buf.kvirt));
 520
 521                                 if (first_packet)
 522                                         f->frame_begin_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
 523                                 else if (mid_packet)
 524                                         f->mid_frame_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
 525                                 else if (last_packet) {
 526                                         f->frame_end_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
 527                                         f->frame_end_branch = &(block->u.out.u.full.u.nocross.ol.q[2]);
 528                                 }
 529
 530                                 branch_address = &(block->u.out.u.full.u.nocross.ol.q[2]);
 531
 532                                 n_descriptors = 4;
 533                                 if (first_packet)
 534                                         f->first_n_descriptors = n_descriptors;
 535
 536                                 full_packets++;
 537                         }
 538                 }
 539
 540                 /* link this descriptor block into the DMA program by filling in
 541                    the branch address of the previous block */
 542
 543                 /* note: we are not linked into the active DMA chain yet */
 544
 545                 if (last_branch_address) {
 546                         *(last_branch_address) = cpu_to_le32(block_dma | n_descriptors);
 547                 }
 548
 549                 last_branch_address = branch_address;
 550
 551
 552                 f->n_packets++;
 553
 554         }
 555
 556         /* when we first assemble a new frame, set the final branch
 557            to loop back up to the top */
 558         *(f->frame_end_branch) = cpu_to_le32(f->descriptor_pool_dma | f->first_n_descriptors);
 559
 560         /* make the latest version of this frame visible to the PCI card */
 561         dma_region_sync_for_device(&video->dv_buf, f->data - (unsigned long) video->dv_buf.kvirt, video->frame_size);
 562
 563         /* lock against DMA interrupt */
 564         spin_lock_irqsave(&video->spinlock, irq_flags);
 565
 566         f->state = FRAME_READY;
 567
 568         video->n_clear_frames--;
 569
 570         last_frame = video->first_clear_frame - 1;
 571         if (last_frame == -1)
 572                 last_frame = video->n_frames-1;
 573
 574         video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
 575
 576         irq_printk("   frame %d prepared, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n last=%d\n",
 577                    this_frame, video->active_frame, video->n_clear_frames, video->first_clear_frame, last_frame);
 578
 579         irq_printk("   begin_ts %08lx mid_ts %08lx end_ts %08lx end_br %08lx\n",
 580                    (unsigned long) f->frame_begin_timestamp,
 581                    (unsigned long) f->mid_frame_timestamp,
 582                    (unsigned long) f->frame_end_timestamp,
 583                    (unsigned long) f->frame_end_branch);
 584
 585         if (video->active_frame != -1) {
 586
 587                 /* if DMA is already active, we are almost done */
 588                 /* just link us onto the active DMA chain */
 589                 if (video->frames[last_frame]->frame_end_branch) {
 590                         u32 temp;
 591
 592                         /* point the previous frame's tail to this frame's head */
 593                         *(video->frames[last_frame]->frame_end_branch) = cpu_to_le32(f->descriptor_pool_dma | f->first_n_descriptors);
 594
 595                         /* this write MUST precede the next one, or we could silently drop frames */
 596                         wmb();
 597
 598                         /* disable the want_status semaphore on the last packet */
 599                         temp = le32_to_cpu(*(video->frames[last_frame]->frame_end_branch - 2));
 600                         temp &= 0xF7CFFFFF;
 601                         *(video->frames[last_frame]->frame_end_branch - 2) = cpu_to_le32(temp);
 602
 603                         /* flush these writes to memory ASAP */
 604                         flush_pci_write(video->ohci);
 605
 606                         /* NOTE:
 607                            ideally the writes should be "atomic": if
 608                            the OHCI card reads the want_status flag in
 609                            between them, we'll falsely report a
 610                            dropped frame. Hopefully this window is too
 611                            small to really matter, and the consequence
 612                            is rather harmless. */
 613
 614
 615                         irq_printk("     new frame %d linked onto DMA chain\n", this_frame);
 616
 617                 } else {
 618                         printk(KERN_ERR "dv1394: last frame not ready???\n");
 619                 }
 620
 621         } else {
 622
 623                 u32 transmit_sec, transmit_cyc;
 624                 u32 ts_cyc, ts_off;
 625
 626                 /* DMA is stopped, so this is the very first frame */
 627                 video->active_frame = this_frame;
 628
 629                 /* set CommandPtr to address and size of first descriptor block */
 630                 reg_write(video->ohci, video->ohci_IsoXmitCommandPtr,
 631                           video->frames[video->active_frame]->descriptor_pool_dma |
 632                           f->first_n_descriptors);
 633
 634                 /* assign a timestamp based on the current cycle time...
 635                    We'll tell the card to begin DMA 100 cycles from now,
 636                    and assign a timestamp 103 cycles from now */
 637
 638                 cycleTimer = reg_read(video->ohci, OHCI1394_IsochronousCycleTimer);
 639
 640                 ct_sec = cycleTimer >> 25;
 641                 ct_cyc = (cycleTimer >> 12) & 0x1FFF;
 642                 ct_off = cycleTimer & 0xFFF;
 643
 644                 transmit_sec = ct_sec;
 645                 transmit_cyc = ct_cyc + 100;
 646
 647                 transmit_sec += transmit_cyc/8000;
 648                 transmit_cyc %= 8000;
 649
 650                 ts_off = ct_off;
 651                 ts_cyc = transmit_cyc + 3;
 652                 ts_cyc %= 8000;
 653
 654                 f->assigned_timestamp = (ts_cyc&0xF) << 12;
 655
 656                 /* now actually write the timestamp into the appropriate CIP headers */
 657                 if (f->cip_syt1) {
 658                         f->cip_syt1->b[6] = f->assigned_timestamp >> 8;
 659                         f->cip_syt1->b[7] = f->assigned_timestamp & 0xFF;
 660                 }
 661                 if (f->cip_syt2) {
 662                         f->cip_syt2->b[6] = f->assigned_timestamp >> 8;
 663                         f->cip_syt2->b[7] = f->assigned_timestamp & 0xFF;
 664                 }
 665
 666                 /* --- start DMA --- */
 667
 668                 /* clear all bits in ContextControl register */
 669
 670                 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, 0xFFFFFFFF);
 671                 wmb();
 672
 673                 /* the OHCI card has the ability to start ISO transmission on a
 674                    particular cycle (start-on-cycle). This way we can ensure that
 675                    the first DV frame will have an accurate timestamp.
 676
 677                    However, start-on-cycle only appears to work if the OHCI card
 678                    is cycle master! Since the consequences of messing up the first
 679                    timestamp are minimal*, just disable start-on-cycle for now.
 680
 681                    * my DV deck drops the first few frames before it "locks in;"
 682                      so the first frame having an incorrect timestamp is inconsequential.
 683                 */
 684
 685 #if 0
 686                 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet,
 687                           (1 << 31) /* enable start-on-cycle */
 688                           | ( (transmit_sec & 0x3) << 29)
 689                           | (transmit_cyc << 16));
 690                 wmb();
 691 #endif
 692
 693                 video->dma_running = 1;
 694
 695                 /* set the 'run' bit */
 696                 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, 0x8000);
 697                 flush_pci_write(video->ohci);
 698
 699                 /* --- DMA should be running now --- */
 700
 701                 debug_printk("    Cycle = %4u ContextControl = %08x CmdPtr = %08x\n",
 702                              (reg_read(video->ohci, OHCI1394_IsochronousCycleTimer) >> 12) & 0x1FFF,
 703                              reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
 704                              reg_read(video->ohci, video->ohci_IsoXmitCommandPtr));
 705
 706                 debug_printk("    DMA start - current cycle %4u, transmit cycle %4u (%2u), assigning ts cycle %2u\n",
 707                              ct_cyc, transmit_cyc, transmit_cyc & 0xF, ts_cyc & 0xF);
 708
 709 #if DV1394_DEBUG_LEVEL >= 2
 710                 {
 711                         /* check if DMA is really running */
 712                         int i = 0;
 713                         while (i < 20) {
 714                                 mb();
 715                                 mdelay(1);
 716                                 if (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) {
 717                                         printk("DMA ACTIVE after %d msec\n", i);
 718                                         break;
 719                                 }
 720                                 i++;
 721                         }
 722
 723                         printk("set = %08x, cmdPtr = %08x\n",
 724                                reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
 725                                reg_read(video->ohci, video->ohci_IsoXmitCommandPtr)
 726                                );
 727
 728                         if ( ! (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) &  (1 << 10)) ) {
 729                                 printk("DMA did NOT go active after 20ms, event = %x\n",
 730                                        reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & 0x1F);
 731                         } else
 732                                 printk("DMA is RUNNING!\n");
 733                 }
 734 #endif
 735
 736         }
 737
 738
 739         spin_unlock_irqrestore(&video->spinlock, irq_flags);
 740 }
 741
 742
 743
 744 /*** RECEIVE FUNCTIONS *****************************************************/
 745
 746 /*
 747         frame method put_packet
 748
 749         map and copy the packet data to its location in the frame
 750         based upon DIF section and sequence
 751 */
 752
 753 static void inline
 754 frame_put_packet (struct frame *f, struct packet *p)
 755 {
 756         int section_type = p->data[0] >> 5;           /* section type is in bits 5 - 7 */
 757         int dif_sequence = p->data[1] >> 4;           /* dif sequence number is in bits 4 - 7 */
 758         int dif_block = p->data[2];
 759
 760         /* sanity check */
 761         if (dif_sequence > 11 || dif_block > 149) return;
 762
 763         switch (section_type) {
 764         case 0:           /* 1 Header block */
 765                 memcpy( (void *) f->data + dif_sequence * 150 * 80, p->data, 480);
 766                 break;
 767
 768         case 1:           /* 2 Subcode blocks */
 769                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (1 + dif_block) * 80, p->data, 480);
 770                 break;
 771
 772         case 2:           /* 3 VAUX blocks */
 773                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (3 + dif_block) * 80, p->data, 480);
 774                 break;
 775
 776         case 3:           /* 9 Audio blocks interleaved with video */
 777                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (6 + dif_block * 16) * 80, p->data, 480);
 778                 break;
 779
 780         case 4:           /* 135 Video blocks interleaved with audio */
 781                 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (7 + (dif_block / 15) + dif_block) * 80, p->data, 480);
 782                 break;
 783
 784         default:           /* we can not handle any other data */
 785                 break;
 786         }
 787 }
 788
 789
 790 static void start_dma_receive(struct video_card *video)
 791 {
 792         if (video->first_run == 1) {
 793                 video->first_run = 0;
 794
 795                 /* start DMA once all of the frames are READY */
 796                 video->n_clear_frames = 0;
 797                 video->first_clear_frame = -1;
 798                 video->current_packet = 0;
 799                 video->active_frame = 0;
 800
 801                 /* reset iso recv control register */
 802                 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, 0xFFFFFFFF);
 803                 wmb();
 804
 805                 /* clear bufferFill, set isochHeader and speed (0=100) */
 806                 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x40000000);
 807
 808                 /* match on all tags, listen on channel */
 809                 reg_write(video->ohci, video->ohci_IsoRcvContextMatch, 0xf0000000 | video->channel);
 810
 811                 /* address and first descriptor block + Z=1 */
 812                 reg_write(video->ohci, video->ohci_IsoRcvCommandPtr,
 813                           video->frames[0]->descriptor_pool_dma | 1); /* Z=1 */
 814                 wmb();
 815
 816                 video->dma_running = 1;
 817
 818                 /* run */
 819                 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x8000);
 820                 flush_pci_write(video->ohci);
 821
 822                 debug_printk("dv1394: DMA started\n");
 823
 824 #if DV1394_DEBUG_LEVEL >= 2
 825                 {
 826                         int i;
 827
 828                         for (i = 0; i < 1000; ++i) {
 829                                 mdelay(1);
 830                                 if (reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 10)) {
 831                                         printk("DMA ACTIVE after %d msec\n", i);
 832                                         break;
 833                                 }
 834                         }
 835                         if ( reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) &  (1 << 11) ) {
 836                                 printk("DEAD, event = %x\n",
 837                                            reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & 0x1F);
 838                         } else
 839                                 printk("RUNNING!\n");
 840                 }
 841 #endif
 842         } else if ( reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) &  (1 << 11) ) {
 843                 debug_printk("DEAD, event = %x\n",
 844                              reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & 0x1F);
 845
 846                 /* wake */
 847                 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
 848         }
 849 }
 850
 851
 852 /*
 853    receive_packets() - build the DMA program for receiving
 854 */
 855
 856 static void receive_packets(struct video_card *video)
 857 {
 858         struct DMA_descriptor_block *block = NULL;
 859         dma_addr_t block_dma = 0;
 860         struct packet *data = NULL;
 861         dma_addr_t data_dma = 0;
 862         u32 *last_branch_address = NULL;
 863         unsigned long irq_flags;
 864         int want_interrupt = 0;
 865         struct frame *f = NULL;
 866         int i, j;
 867
 868         spin_lock_irqsave(&video->spinlock, irq_flags);
 869
 870         for (j = 0; j < video->n_frames; j++) {
 871
 872                 /* connect frames */
 873                 if (j > 0 && f != NULL && f->frame_end_branch != NULL)
 874                         *(f->frame_end_branch) = cpu_to_le32(video->frames[j]->descriptor_pool_dma | 1); /* set Z=1 */
 875
 876                 f = video->frames[j];
 877
 878                 for (i = 0; i < MAX_PACKETS; i++) {
 879                         /* locate a descriptor block and packet from the buffer */
 880                         block = &(f->descriptor_pool[i]);
 881                         block_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
 882
 883                         data = ((struct packet*)video->packet_buf.kvirt) + f->frame_num * MAX_PACKETS + i;
 884                         data_dma = dma_region_offset_to_bus( &video->packet_buf,
 885                                                              ((unsigned long) data - (unsigned long) video->packet_buf.kvirt) );
 886
 887                         /* setup DMA descriptor block */
 888                         want_interrupt = ((i % (MAX_PACKETS/2)) == 0 || i == (MAX_PACKETS-1));
 889                         fill_input_last( &(block->u.in.il), want_interrupt, 512, data_dma);
 890
 891                         /* link descriptors */
 892                         last_branch_address = f->frame_end_branch;
 893
 894                         if (last_branch_address != NULL)
 895                                 *(last_branch_address) = cpu_to_le32(block_dma | 1); /* set Z=1 */
 896
 897                         f->frame_end_branch = &(block->u.in.il.q[2]);
 898                 }
 899
 900         } /* next j */
 901
 902         spin_unlock_irqrestore(&video->spinlock, irq_flags);
 903
 904 }
 905
 906
 907
 908 /*** MANAGEMENT FUNCTIONS **************************************************/
 909
 910 static int do_dv1394_init(struct video_card *video, struct dv1394_init *init)
 911 {
 912         unsigned long flags, new_buf_size;
 913         int i;
 914         u64 chan_mask;
 915         int retval = -EINVAL;
 916
 917         debug_printk("dv1394: initialising %d\n", video->id);
 918         if (init->api_version != DV1394_API_VERSION)
 919                 return -EINVAL;
 920
 921         /* first sanitize all the parameters */
 922         if ( (init->n_frames < 2) || (init->n_frames > DV1394_MAX_FRAMES) )
 923                 return -EINVAL;
 924
 925         if ( (init->format != DV1394_NTSC) && (init->format != DV1394_PAL) )
 926                 return -EINVAL;
 927
 928         if ( (init->syt_offset == 0) || (init->syt_offset > 50) )
 929                 /* default SYT offset is 3 cycles */
 930                 init->syt_offset = 3;
 931
 932         if ( (init->channel > 63) || (init->channel < 0) )
 933                 init->channel = 63;
 934
 935         chan_mask = (u64)1 << init->channel;
 936
 937         /* calculate what size DMA buffer is needed */
 938         if (init->format == DV1394_NTSC)
 939                 new_buf_size = DV1394_NTSC_FRAME_SIZE * init->n_frames;
 940         else
 941                 new_buf_size = DV1394_PAL_FRAME_SIZE * init->n_frames;
 942
 943         /* round up to PAGE_SIZE */
 944         if (new_buf_size % PAGE_SIZE) new_buf_size += PAGE_SIZE - (new_buf_size % PAGE_SIZE);
 945
 946         /* don't allow the user to allocate the DMA buffer more than once */
 947         if (video->dv_buf.kvirt && video->dv_buf_size != new_buf_size) {
 948                 printk("dv1394: re-sizing the DMA buffer is not allowed\n");
 949                 return -EINVAL;
 950         }
 951
 952         /* shutdown the card if it's currently active */
 953         /* (the card should not be reset if the parameters are screwy) */
 954
 955         do_dv1394_shutdown(video, 0);
 956
 957         /* try to claim the ISO channel */
 958         spin_lock_irqsave(&video->ohci->IR_channel_lock, flags);
 959         if (video->ohci->ISO_channel_usage & chan_mask) {
 960                 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
 961                 retval = -EBUSY;
 962                 goto err;
 963         }
 964         video->ohci->ISO_channel_usage |= chan_mask;
 965         spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
 966
 967         video->channel = init->channel;
 968
 969         /* initialize misc. fields of video */
 970         video->n_frames = init->n_frames;
 971         video->pal_or_ntsc = init->format;
 972
 973         video->cip_accum = 0;
 974         video->continuity_counter = 0;
 975
 976         video->active_frame = -1;
 977         video->first_clear_frame = 0;
 978         video->n_clear_frames = video->n_frames;
 979         video->dropped_frames = 0;
 980
 981         video->write_off = 0;
 982
 983         video->first_run = 1;
 984         video->current_packet = -1;
 985         video->first_frame = 0;
 986
 987         if (video->pal_or_ntsc == DV1394_NTSC) {
 988                 video->cip_n = init->cip_n != 0 ? init->cip_n : CIP_N_NTSC;
 989                 video->cip_d = init->cip_d != 0 ? init->cip_d : CIP_D_NTSC;
 990                 video->frame_size = DV1394_NTSC_FRAME_SIZE;
 991         } else {
 992                 video->cip_n = init->cip_n != 0 ? init->cip_n : CIP_N_PAL;
 993                 video->cip_d = init->cip_d != 0 ? init->cip_d : CIP_D_PAL;
 994                 video->frame_size = DV1394_PAL_FRAME_SIZE;
 995         }
 996
 997         video->syt_offset = init->syt_offset;
 998
 999         /* find and claim DMA contexts on the OHCI card */
1000
1001         if (video->ohci_it_ctx == -1) {
1002                 ohci1394_init_iso_tasklet(&video->it_tasklet, OHCI_ISO_TRANSMIT,
1003                                           it_tasklet_func, (unsigned long) video);
1004
1005                 if (ohci1394_register_iso_tasklet(video->ohci, &video->it_tasklet) < 0) {
1006                         printk(KERN_ERR "dv1394: could not find an available IT DMA context\n");
1007                         retval = -EBUSY;
1008                         goto err;
1009                 }
1010
1011                 video->ohci_it_ctx = video->it_tasklet.context;
1012                 debug_printk("dv1394: claimed IT DMA context %d\n", video->ohci_it_ctx);
1013         }
1014
1015         if (video->ohci_ir_ctx == -1) {
1016                 ohci1394_init_iso_tasklet(&video->ir_tasklet, OHCI_ISO_RECEIVE,
1017                                           ir_tasklet_func, (unsigned long) video);
1018
1019                 if (ohci1394_register_iso_tasklet(video->ohci, &video->ir_tasklet) < 0) {
1020                         printk(KERN_ERR "dv1394: could not find an available IR DMA context\n");
1021                         retval = -EBUSY;
1022                         goto err;
1023                 }
1024                 video->ohci_ir_ctx = video->ir_tasklet.context;
1025                 debug_printk("dv1394: claimed IR DMA context %d\n", video->ohci_ir_ctx);
1026         }
1027
1028         /* allocate struct frames */
1029         for (i = 0; i < init->n_frames; i++) {
1030                 video->frames[i] = frame_new(i, video);
1031
1032                 if (!video->frames[i]) {
1033                         printk(KERN_ERR "dv1394: Cannot allocate frame structs\n");
1034                         retval = -ENOMEM;
1035                         goto err;
1036                 }
1037         }
1038
1039         if (!video->dv_buf.kvirt) {
1040                 /* allocate the ringbuffer */
1041                 retval = dma_region_alloc(&video->dv_buf, new_buf_size, video->ohci->dev, PCI_DMA_TODEVICE);
1042                 if (retval)
1043                         goto err;
1044
1045                 video->dv_buf_size = new_buf_size;
1046
1047                 debug_printk("dv1394: Allocated %d frame buffers, total %u pages (%u DMA pages), %lu bytes\n",
1048                              video->n_frames, video->dv_buf.n_pages,
1049                              video->dv_buf.n_dma_pages, video->dv_buf_size);
1050         }
1051
1052         /* set up the frame->data pointers */
1053         for (i = 0; i < video->n_frames; i++)
1054                 video->frames[i]->data = (unsigned long) video->dv_buf.kvirt + i * video->frame_size;
1055
1056         if (!video->packet_buf.kvirt) {
1057                 /* allocate packet buffer */
1058                 video->packet_buf_size = sizeof(struct packet) * video->n_frames * MAX_PACKETS;
1059                 if (video->packet_buf_size % PAGE_SIZE)
1060                         video->packet_buf_size += PAGE_SIZE - (video->packet_buf_size % PAGE_SIZE);
1061
1062                 retval = dma_region_alloc(&video->packet_buf, video->packet_buf_size,
1063                                           video->ohci->dev, PCI_DMA_FROMDEVICE);
1064                 if (retval)
1065                         goto err;
1066
1067                 debug_printk("dv1394: Allocated %d packets in buffer, total %u pages (%u DMA pages), %lu bytes\n",
1068                                  video->n_frames*MAX_PACKETS, video->packet_buf.n_pages,
1069                                  video->packet_buf.n_dma_pages, video->packet_buf_size);
1070         }
1071
1072         /* set up register offsets for IT context */
1073         /* IT DMA context registers are spaced 16 bytes apart */
1074         video->ohci_IsoXmitContextControlSet = OHCI1394_IsoXmitContextControlSet+16*video->ohci_it_ctx;
1075         video->ohci_IsoXmitContextControlClear = OHCI1394_IsoXmitContextControlClear+16*video->ohci_it_ctx;
1076         video->ohci_IsoXmitCommandPtr = OHCI1394_IsoXmitCommandPtr+16*video->ohci_it_ctx;
1077
1078         /* enable interrupts for IT context */
1079         reg_write(video->ohci, OHCI1394_IsoXmitIntMaskSet, (1 << video->ohci_it_ctx));
1080         debug_printk("dv1394: interrupts enabled for IT context %d\n", video->ohci_it_ctx);
1081
1082         /* set up register offsets for IR context */
1083         /* IR DMA context registers are spaced 32 bytes apart */
1084         video->ohci_IsoRcvContextControlSet = OHCI1394_IsoRcvContextControlSet+32*video->ohci_ir_ctx;
1085         video->ohci_IsoRcvContextControlClear = OHCI1394_IsoRcvContextControlClear+32*video->ohci_ir_ctx;
1086         video->ohci_IsoRcvCommandPtr = OHCI1394_IsoRcvCommandPtr+32*video->ohci_ir_ctx;
1087         video->ohci_IsoRcvContextMatch = OHCI1394_IsoRcvContextMatch+32*video->ohci_ir_ctx;
1088
1089         /* enable interrupts for IR context */
1090         reg_write(video->ohci, OHCI1394_IsoRecvIntMaskSet, (1 << video->ohci_ir_ctx) );
1091         debug_printk("dv1394: interrupts enabled for IR context %d\n", video->ohci_ir_ctx);
1092
1093         return 0;
1094
1095 err:
1096         do_dv1394_shutdown(video, 1);
1097         return retval;
1098 }
1099
1100 /* if the user doesn't bother to call ioctl(INIT) before starting
1101    mmap() or read()/write(), just give him some default values */
1102
1103 static int do_dv1394_init_default(struct video_card *video)
1104 {
1105         struct dv1394_init init;
1106
1107         init.api_version = DV1394_API_VERSION;
1108         init.n_frames = DV1394_MAX_FRAMES / 4;
1109         /* the following are now set via devfs */
1110         init.channel = video->channel;
1111         init.format = video->pal_or_ntsc;
1112         init.cip_n = video->cip_n;
1113         init.cip_d = video->cip_d;
1114         init.syt_offset = video->syt_offset;
1115
1116         return do_dv1394_init(video, &init);
1117 }
1118
1119 /* do NOT call from interrupt context */
1120 static void stop_dma(struct video_card *video)
1121 {
1122         unsigned long flags;
1123         int i;
1124
1125         /* no interrupts */
1126         spin_lock_irqsave(&video->spinlock, flags);
1127
1128         video->dma_running = 0;
1129
1130         if ( (video->ohci_it_ctx == -1) && (video->ohci_ir_ctx == -1) )
1131                 goto out;
1132
1133         /* stop DMA if in progress */
1134         if ( (video->active_frame != -1) ||
1135             (reg_read(video->ohci, video->ohci_IsoXmitContextControlClear) & (1 << 10)) ||
1136             (reg_read(video->ohci, video->ohci_IsoRcvContextControlClear) &  (1 << 10)) ) {
1137
1138                 /* clear the .run bits */
1139                 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, (1 << 15));
1140                 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, (1 << 15));
1141                 flush_pci_write(video->ohci);
1142
1143                 video->active_frame = -1;
1144                 video->first_run = 1;
1145
1146                 /* wait until DMA really stops */
1147                 i = 0;
1148                 while (i < 1000) {
1149
1150                         /* wait 0.1 millisecond */
1151                         udelay(100);
1152
1153                         if ( (reg_read(video->ohci, video->ohci_IsoXmitContextControlClear) & (1 << 10)) ||
1154                             (reg_read(video->ohci, video->ohci_IsoRcvContextControlClear)  & (1 << 10)) ) {
1155                                 /* still active */
1156                                 debug_printk("dv1394: stop_dma: DMA not stopped yet\n" );
1157                                 mb();
1158                         } else {
1159                                 debug_printk("dv1394: stop_dma: DMA stopped safely after %d ms\n", i/10);
1160                                 break;
1161                         }
1162
1163                         i++;
1164                 }
1165
1166                 if (i == 1000) {
1167                         printk(KERN_ERR "dv1394: stop_dma: DMA still going after %d ms!\n", i/10);
1168                 }
1169         }
1170         else
1171                 debug_printk("dv1394: stop_dma: already stopped.\n");
1172
1173 out:
1174         spin_unlock_irqrestore(&video->spinlock, flags);
1175 }
1176
1177
1178
1179 static void do_dv1394_shutdown(struct video_card *video, int free_dv_buf)
1180 {
1181         int i;
1182
1183         debug_printk("dv1394: shutdown...\n");
1184
1185         /* stop DMA if in progress */
1186         stop_dma(video);
1187
1188         /* release the DMA contexts */
1189         if (video->ohci_it_ctx != -1) {
1190                 video->ohci_IsoXmitContextControlSet = 0;
1191                 video->ohci_IsoXmitContextControlClear = 0;
1192                 video->ohci_IsoXmitCommandPtr = 0;
1193
1194                 /* disable interrupts for IT context */
1195                 reg_write(video->ohci, OHCI1394_IsoXmitIntMaskClear, (1 << video->ohci_it_ctx));
1196
1197                 /* remove tasklet */
1198                 ohci1394_unregister_iso_tasklet(video->ohci, &video->it_tasklet);
1199                 debug_printk("dv1394: IT context %d released\n", video->ohci_it_ctx);
1200                 video->ohci_it_ctx = -1;
1201         }
1202
1203         if (video->ohci_ir_ctx != -1) {
1204                 video->ohci_IsoRcvContextControlSet = 0;
1205                 video->ohci_IsoRcvContextControlClear = 0;
1206                 video->ohci_IsoRcvCommandPtr = 0;
1207                 video->ohci_IsoRcvContextMatch = 0;
1208
1209                 /* disable interrupts for IR context */
1210                 reg_write(video->ohci, OHCI1394_IsoRecvIntMaskClear, (1 << video->ohci_ir_ctx));
1211
1212                 /* remove tasklet */
1213                 ohci1394_unregister_iso_tasklet(video->ohci, &video->ir_tasklet);
1214                 debug_printk("dv1394: IR context %d released\n", video->ohci_ir_ctx);
1215                 video->ohci_ir_ctx = -1;
1216         }
1217
1218         /* release the ISO channel */
1219         if (video->channel != -1) {
1220                 u64 chan_mask;
1221                 unsigned long flags;
1222
1223                 chan_mask = (u64)1 << video->channel;
1224
1225                 spin_lock_irqsave(&video->ohci->IR_channel_lock, flags);
1226                 video->ohci->ISO_channel_usage &= ~(chan_mask);
1227                 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
1228
1229                 video->channel = -1;
1230         }
1231
1232         /* free the frame structs */
1233         for (i = 0; i < DV1394_MAX_FRAMES; i++) {
1234                 if (video->frames[i])
1235                         frame_delete(video->frames[i]);
1236                 video->frames[i] = NULL;
1237         }
1238
1239         video->n_frames = 0;
1240
1241         /* we can't free the DMA buffer unless it is guaranteed that
1242            no more user-space mappings exist */
1243
1244         if (free_dv_buf) {
1245                 dma_region_free(&video->dv_buf);
1246                 video->dv_buf_size = 0;
1247         }
1248
1249         /* free packet buffer */
1250         dma_region_free(&video->packet_buf);
1251         video->packet_buf_size = 0;
1252
1253         debug_printk("dv1394: shutdown OK\n");
1254 }
1255
1256 /*
1257        **********************************
1258        *** MMAP() THEORY OF OPERATION ***
1259        **********************************
1260
1261         The ringbuffer cannot be re-allocated or freed while
1262         a user program maintains a mapping of it. (note that a mapping
1263         can persist even after the device fd is closed!)
1264
1265         So, only let the user process allocate the DMA buffer once.
1266         To resize or deallocate it, you must close the device file
1267         and open it again.
1268
1269         Previously Dan M. hacked out a scheme that allowed the DMA
1270         buffer to change by forcefully unmapping it from the user's
1271         address space. It was prone to error because it's very hard to
1272         track all the places the buffer could have been mapped (we
1273         would have had to walk the vma list of every process in the
1274         system to be sure we found all the mappings!). Instead, we
1275         force the user to choose one buffer size and stick with
1276         it. This small sacrifice is worth the huge reduction in
1277         error-prone code in dv1394.
1278 */
1279
1280 static int dv1394_mmap(struct file *file, struct vm_area_struct *vma)
1281 {
1282         struct video_card *video = file_to_video_card(file);
1283         int retval = -EINVAL;
1284
1285         /* serialize mmap */
1286         down(&video->sem);
1287
1288         if ( ! video_card_initialized(video) ) {
1289                 retval = do_dv1394_init_default(video);
1290                 if (retval)
1291                         goto out;
1292         }
1293
1294         retval = dma_region_mmap(&video->dv_buf, file, vma);
1295 out:
1296         up(&video->sem);
1297         return retval;
1298 }
1299
1300 /*** DEVICE FILE INTERFACE *************************************************/
1301
1302 /* no need to serialize, multiple threads OK */
1303 static unsigned int dv1394_poll(struct file *file, struct poll_table_struct *wait)
1304 {
1305         struct video_card *video = file_to_video_card(file);
1306         unsigned int mask = 0;
1307         unsigned long flags;
1308
1309         poll_wait(file, &video->waitq, wait);
1310
1311         spin_lock_irqsave(&video->spinlock, flags);
1312         if ( video->n_frames == 0 ) {
1313
1314         } else if ( video->active_frame == -1 ) {
1315                 /* nothing going on */
1316                 mask |= POLLOUT;
1317         } else {
1318                 /* any clear/ready buffers? */
1319                 if (video->n_clear_frames >0)
1320                         mask |= POLLOUT | POLLIN;
1321         }
1322         spin_unlock_irqrestore(&video->spinlock, flags);
1323
1324         return mask;
1325 }
1326
1327 static int dv1394_fasync(int fd, struct file *file, int on)
1328 {
1329         /* I just copied this code verbatim from Alan Cox's mouse driver example
1330            (Documentation/DocBook/) */
1331
1332         struct video_card *video = file_to_video_card(file);
1333
1334         int retval = fasync_helper(fd, file, on, &video->fasync);
1335
1336         if (retval < 0)
1337                 return retval;
1338         return 0;
1339 }
1340
1341 static ssize_t dv1394_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1342 {
1343         struct video_card *video = file_to_video_card(file);
1344         DECLARE_WAITQUEUE(wait, current);
1345         ssize_t ret;
1346         size_t cnt;
1347         unsigned long flags;
1348         int target_frame;
1349
1350         /* serialize this to prevent multi-threaded mayhem */
1351         if (file->f_flags & O_NONBLOCK) {
1352                 if (down_trylock(&video->sem))
1353                         return -EAGAIN;
1354         } else {
1355                 if (down_interruptible(&video->sem))
1356                         return -ERESTARTSYS;
1357         }
1358
1359         if ( !video_card_initialized(video) ) {
1360                 ret = do_dv1394_init_default(video);
1361                 if (ret) {
1362                         up(&video->sem);
1363                         return ret;
1364                 }
1365         }
1366
1367         ret = 0;
1368         add_wait_queue(&video->waitq, &wait);
1369
1370         while (count > 0) {
1371
1372                 /* must set TASK_INTERRUPTIBLE *before* checking for free
1373                    buffers; otherwise we could miss a wakeup if the interrupt
1374                    fires between the check and the schedule() */
1375
1376                 set_current_state(TASK_INTERRUPTIBLE);
1377
1378                 spin_lock_irqsave(&video->spinlock, flags);
1379
1380                 target_frame = video->first_clear_frame;
1381
1382                 spin_unlock_irqrestore(&video->spinlock, flags);
1383
1384                 if (video->frames[target_frame]->state == FRAME_CLEAR) {
1385
1386                         /* how much room is left in the target frame buffer */
1387                         cnt = video->frame_size - (video->write_off - target_frame * video->frame_size);
1388
1389                 } else {
1390                         /* buffer is already used */
1391                         cnt = 0;
1392                 }
1393
1394                 if (cnt > count)
1395                         cnt = count;
1396
1397                 if (cnt <= 0) {
1398                         /* no room left, gotta wait */
1399                         if (file->f_flags & O_NONBLOCK) {
1400                                 if (!ret)
1401                                         ret = -EAGAIN;
1402                                 break;
1403                         }
1404                         if (signal_pending(current)) {
1405                                 if (!ret)
1406                                         ret = -ERESTARTSYS;
1407                                 break;
1408                         }
1409
1410                         schedule();
1411
1412                         continue; /* start over from 'while(count > 0)...' */
1413                 }
1414
1415                 if (copy_from_user(video->dv_buf.kvirt + video->write_off, buffer, cnt)) {
1416                         if (!ret)
1417                                 ret = -EFAULT;
1418                         break;
1419                 }
1420
1421                 video->write_off = (video->write_off + cnt) % (video->n_frames * video->frame_size);
1422
1423                 count -= cnt;
1424                 buffer += cnt;
1425                 ret += cnt;
1426
1427                 if (video->write_off == video->frame_size * ((target_frame + 1) % video->n_frames))
1428                                 frame_prepare(video, target_frame);
1429         }
1430
1431         remove_wait_queue(&video->waitq, &wait);
1432         set_current_state(TASK_RUNNING);
1433         up(&video->sem);
1434         return ret;
1435 }
1436
1437
1438 static ssize_t dv1394_read(struct file *file,  char __user *buffer, size_t count, loff_t *ppos)
1439 {
1440         struct video_card *video = file_to_video_card(file);
1441         DECLARE_WAITQUEUE(wait, current);
1442         ssize_t ret;
1443         size_t cnt;
1444         unsigned long flags;
1445         int target_frame;
1446
1447         /* serialize this to prevent multi-threaded mayhem */
1448         if (file->f_flags & O_NONBLOCK) {
1449                 if (down_trylock(&video->sem))
1450                         return -EAGAIN;
1451         } else {
1452                 if (down_interruptible(&video->sem))
1453                         return -ERESTARTSYS;
1454         }
1455
1456         if ( !video_card_initialized(video) ) {
1457                 ret = do_dv1394_init_default(video);
1458                 if (ret) {
1459                         up(&video->sem);
1460                         return ret;
1461                 }
1462                 video->continuity_counter = -1;
1463
1464                 receive_packets(video);
1465
1466                 start_dma_receive(video);
1467         }
1468
1469         ret = 0;
1470         add_wait_queue(&video->waitq, &wait);
1471
1472         while (count > 0) {
1473
1474                 /* must set TASK_INTERRUPTIBLE *before* checking for free
1475                    buffers; otherwise we could miss a wakeup if the interrupt
1476                    fires between the check and the schedule() */
1477
1478                 set_current_state(TASK_INTERRUPTIBLE);
1479
1480                 spin_lock_irqsave(&video->spinlock, flags);
1481
1482                 target_frame = video->first_clear_frame;
1483
1484                 spin_unlock_irqrestore(&video->spinlock, flags);
1485
1486                 if (target_frame >= 0 &&
1487                         video->n_clear_frames > 0 &&
1488                         video->frames[target_frame]->state == FRAME_CLEAR) {
1489
1490                         /* how much room is left in the target frame buffer */
1491                         cnt = video->frame_size - (video->write_off - target_frame * video->frame_size);
1492
1493                 } else {
1494                         /* buffer is already used */
1495                         cnt = 0;
1496                 }
1497
1498                 if (cnt > count)
1499                         cnt = count;
1500
1501                 if (cnt <= 0) {
1502                         /* no room left, gotta wait */
1503                         if (file->f_flags & O_NONBLOCK) {
1504                                 if (!ret)
1505                                         ret = -EAGAIN;
1506                                 break;
1507                         }
1508                         if (signal_pending(current)) {
1509                                 if (!ret)
1510                                         ret = -ERESTARTSYS;
1511                                 break;
1512                         }
1513
1514                         schedule();
1515
1516                         continue; /* start over from 'while(count > 0)...' */
1517                 }
1518
1519                 if (copy_to_user(buffer, video->dv_buf.kvirt + video->write_off, cnt)) {
1520                                 if (!ret)
1521                                         ret = -EFAULT;
1522                                 break;
1523                 }
1524
1525                 video->write_off = (video->write_off + cnt) % (video->n_frames * video->frame_size);
1526
1527                 count -= cnt;
1528                 buffer += cnt;
1529                 ret += cnt;
1530
1531                 if (video->write_off == video->frame_size * ((target_frame + 1) % video->n_frames)) {
1532                         spin_lock_irqsave(&video->spinlock, flags);
1533                         video->n_clear_frames--;
1534                         video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
1535                         spin_unlock_irqrestore(&video->spinlock, flags);
1536                 }
1537         }
1538
1539         remove_wait_queue(&video->waitq, &wait);
1540         set_current_state(TASK_RUNNING);
1541         up(&video->sem);
1542         return ret;
1543 }
1544
1545
1546 /*** DEVICE IOCTL INTERFACE ************************************************/
1547
1548 static long dv1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1549 {
1550         struct video_card *video;
1551         unsigned long flags;
1552         int ret = -EINVAL;
1553         void __user *argp = (void __user *)arg;
1554
1555         DECLARE_WAITQUEUE(wait, current);
1556
1557         lock_kernel();
1558         video = file_to_video_card(file);
1559
1560         /* serialize this to prevent multi-threaded mayhem */
1561         if (file->f_flags & O_NONBLOCK) {
1562                 if (down_trylock(&video->sem)) {
1563                         unlock_kernel();
1564                         return -EAGAIN;
1565                 }
1566         } else {
1567                 if (down_interruptible(&video->sem)) {
1568                         unlock_kernel();
1569                         return -ERESTARTSYS;
1570                 }
1571         }
1572
1573         switch(cmd)
1574         {
1575         case DV1394_IOC_SUBMIT_FRAMES: {
1576                 unsigned int n_submit;
1577
1578                 if ( !video_card_initialized(video) ) {
1579                         ret = do_dv1394_init_default(video);
1580                         if (ret)
1581                                 goto out;
1582                 }
1583
1584                 n_submit = (unsigned int) arg;
1585
1586                 if (n_submit > video->n_frames) {
1587                         ret = -EINVAL;
1588                         goto out;
1589                 }
1590
1591                 while (n_submit > 0) {
1592
1593                         add_wait_queue(&video->waitq, &wait);
1594                         set_current_state(TASK_INTERRUPTIBLE);
1595
1596                         spin_lock_irqsave(&video->spinlock, flags);
1597
1598                         /* wait until video->first_clear_frame is really CLEAR */
1599                         while (video->frames[video->first_clear_frame]->state != FRAME_CLEAR) {
1600
1601                                 spin_unlock_irqrestore(&video->spinlock, flags);
1602
1603                                 if (signal_pending(current)) {
1604                                         remove_wait_queue(&video->waitq, &wait);
1605                                         set_current_state(TASK_RUNNING);
1606                                         ret = -EINTR;
1607                                         goto out;
1608                                 }
1609
1610                                 schedule();
1611                                 set_current_state(TASK_INTERRUPTIBLE);
1612
1613                                 spin_lock_irqsave(&video->spinlock, flags);
1614                         }
1615                         spin_unlock_irqrestore(&video->spinlock, flags);
1616
1617                         remove_wait_queue(&video->waitq, &wait);
1618                         set_current_state(TASK_RUNNING);
1619
1620                         frame_prepare(video, video->first_clear_frame);
1621
1622                         n_submit--;
1623                 }
1624
1625                 ret = 0;
1626                 break;
1627         }
1628
1629         case DV1394_IOC_WAIT_FRAMES: {
1630                 unsigned int n_wait;
1631
1632                 if ( !video_card_initialized(video) ) {
1633                         ret = -EINVAL;
1634                         goto out;
1635                 }
1636
1637                 n_wait = (unsigned int) arg;
1638
1639                 /* since we re-run the last frame on underflow, we will
1640                    never actually have n_frames clear frames; at most only
1641                    n_frames - 1 */
1642
1643                 if (n_wait > (video->n_frames-1) ) {
1644                         ret = -EINVAL;
1645                         goto out;
1646                 }
1647
1648                 add_wait_queue(&video->waitq, &wait);
1649                 set_current_state(TASK_INTERRUPTIBLE);
1650
1651                 spin_lock_irqsave(&video->spinlock, flags);
1652
1653                 while (video->n_clear_frames < n_wait) {
1654
1655                         spin_unlock_irqrestore(&video->spinlock, flags);
1656
1657                         if (signal_pending(current)) {
1658                                 remove_wait_queue(&video->waitq, &wait);
1659                                 set_current_state(TASK_RUNNING);
1660                                 ret = -EINTR;
1661                                 goto out;
1662                         }
1663
1664                         schedule();
1665                         set_current_state(TASK_INTERRUPTIBLE);
1666
1667                         spin_lock_irqsave(&video->spinlock, flags);
1668                 }
1669
1670                 spin_unlock_irqrestore(&video->spinlock, flags);
1671
1672                 remove_wait_queue(&video->waitq, &wait);
1673                 set_current_state(TASK_RUNNING);
1674                 ret = 0;
1675                 break;
1676         }
1677
1678         case DV1394_IOC_RECEIVE_FRAMES: {
1679                 unsigned int n_recv;
1680
1681                 if ( !video_card_initialized(video) ) {
1682                         ret = -EINVAL;
1683                         goto out;
1684                 }
1685
1686                 n_recv = (unsigned int) arg;
1687
1688                 /* at least one frame must be active */
1689                 if (n_recv > (video->n_frames-1) ) {
1690                         ret = -EINVAL;
1691                         goto out;
1692                 }
1693
1694                 spin_lock_irqsave(&video->spinlock, flags);
1695
1696                 /* release the clear frames */
1697                 video->n_clear_frames -= n_recv;
1698
1699                 /* advance the clear frame cursor */
1700                 video->first_clear_frame = (video->first_clear_frame + n_recv) % video->n_frames;
1701
1702                 /* reset dropped_frames */
1703                 video->dropped_frames = 0;
1704
1705                 spin_unlock_irqrestore(&video->spinlock, flags);
1706
1707                 ret = 0;
1708                 break;
1709         }
1710
1711         case DV1394_IOC_START_RECEIVE: {
1712                 if ( !video_card_initialized(video) ) {
1713                         ret = do_dv1394_init_default(video);
1714                         if (ret)
1715                                 goto out;
1716                 }
1717
1718                 video->continuity_counter = -1;
1719
1720                 receive_packets(video);
1721
1722                 start_dma_receive(video);
1723
1724                 ret = 0;
1725                 break;
1726         }
1727
1728         case DV1394_IOC_INIT: {
1729                 struct dv1394_init init;
1730                 if (!argp) {
1731                         ret = do_dv1394_init_default(video);
1732                 } else {
1733                         if (copy_from_user(&init, argp, sizeof(init))) {
1734                                 ret = -EFAULT;
1735                                 goto out;
1736                         }
1737                         ret = do_dv1394_init(video, &init);
1738                 }
1739                 break;
1740         }
1741
1742         case DV1394_IOC_SHUTDOWN:
1743                 do_dv1394_shutdown(video, 0);
1744                 ret = 0;
1745                 break;
1746
1747
1748         case DV1394_IOC_GET_STATUS: {
1749                 struct dv1394_status status;
1750
1751                 if ( !video_card_initialized(video) ) {
1752                         ret = -EINVAL;
1753                         goto out;
1754                 }
1755
1756                 status.init.api_version = DV1394_API_VERSION;
1757                 status.init.channel = video->channel;
1758                 status.init.n_frames = video->n_frames;
1759                 status.init.format = video->pal_or_ntsc;
1760                 status.init.cip_n = video->cip_n;
1761                 status.init.cip_d = video->cip_d;
1762                 status.init.syt_offset = video->syt_offset;
1763
1764                 status.first_clear_frame = video->first_clear_frame;
1765
1766                 /* the rest of the fields need to be locked against the interrupt */
1767                 spin_lock_irqsave(&video->spinlock, flags);
1768
1769                 status.active_frame = video->active_frame;
1770                 status.n_clear_frames = video->n_clear_frames;
1771
1772                 status.dropped_frames = video->dropped_frames;
1773
1774                 /* reset dropped_frames */
1775                 video->dropped_frames = 0;
1776
1777                 spin_unlock_irqrestore(&video->spinlock, flags);
1778
1779                 if (copy_to_user(argp, &status, sizeof(status))) {
1780                         ret = -EFAULT;
1781                         goto out;
1782                 }
1783
1784                 ret = 0;
1785                 break;
1786         }
1787
1788         default:
1789                 break;
1790         }
1791
1792  out:
1793         up(&video->sem);
1794         unlock_kernel();
1795         return ret;
1796 }
1797
1798 /*** DEVICE FILE INTERFACE CONTINUED ***************************************/
1799
1800 static int dv1394_open(struct inode *inode, struct file *file)
1801 {
1802         struct video_card *video = NULL;
1803
1804         /* if the device was opened through devfs, then file->private_data
1805            has already been set to video by devfs */
1806         if (file->private_data) {
1807                 video = (struct video_card*) file->private_data;
1808
1809         } else {
1810                 /* look up the card by ID */
1811                 unsigned long flags;
1812
1813                 spin_lock_irqsave(&dv1394_cards_lock, flags);
1814                 if (!list_empty(&dv1394_cards)) {
1815                         struct video_card *p;
1816                         list_for_each_entry(p, &dv1394_cards, list) {
1817                                 if ((p->id) == ieee1394_file_to_instance(file)) {
1818                                         video = p;
1819                                         break;
1820                                 }
1821                         }
1822                 }
1823                 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
1824
1825                 if (!video) {
1826                         debug_printk("dv1394: OHCI card %d not found", ieee1394_file_to_instance(file));
1827                         return -ENODEV;
1828                 }
1829
1830                 file->private_data = (void*) video;
1831         }
1832
1833 #ifndef DV1394_ALLOW_MORE_THAN_ONE_OPEN
1834
1835         if ( test_and_set_bit(0, &video->open) ) {
1836                 /* video is already open by someone else */
1837                 return -EBUSY;
1838         }
1839
1840 #endif
1841
1842         return 0;
1843 }
1844
1845
1846 static int dv1394_release(struct inode *inode, struct file *file)
1847 {
1848         struct video_card *video = file_to_video_card(file);
1849
1850         /* OK to free the DMA buffer, no more mappings can exist */
1851         do_dv1394_shutdown(video, 1);
1852
1853         /* clean up async I/O users */
1854         dv1394_fasync(-1, file, 0);
1855
1856         /* give someone else a turn */
1857         clear_bit(0, &video->open);
1858
1859         return 0;
1860 }
1861
1862
1863 /*** DEVICE DRIVER HANDLERS ************************************************/
1864
1865 static void it_tasklet_func(unsigned long data)
1866 {
1867         int wake = 0;
1868         struct video_card *video = (struct video_card*) data;
1869
1870         spin_lock(&video->spinlock);
1871
1872         if (!video->dma_running)
1873                 goto out;
1874
1875         irq_printk("ContextControl = %08x, CommandPtr = %08x\n",
1876                reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
1877                reg_read(video->ohci, video->ohci_IsoXmitCommandPtr)
1878                );
1879
1880
1881         if ( (video->ohci_it_ctx != -1) &&
1882             (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) ) {
1883
1884                 struct frame *f;
1885                 unsigned int frame, i;
1886
1887
1888                 if (video->active_frame == -1)
1889                         frame = 0;
1890                 else
1891                         frame = video->active_frame;
1892
1893                 /* check all the DMA-able frames */
1894                 for (i = 0; i < video->n_frames; i++, frame = (frame+1) % video->n_frames) {
1895
1896                         irq_printk("IRQ checking frame %d...", frame);
1897                         f = video->frames[frame];
1898                         if (f->state != FRAME_READY) {
1899                                 irq_printk("clear, skipping\n");
1900                                 /* we don't own this frame */
1901                                 continue;
1902                         }
1903
1904                         irq_printk("DMA\n");
1905
1906                         /* check the frame begin semaphore to see if we can free the previous frame */
1907                         if ( *(f->frame_begin_timestamp) ) {
1908                                 int prev_frame;
1909                                 struct frame *prev_f;
1910
1911
1912
1913                                 /* don't reset, need this later *(f->frame_begin_timestamp) = 0; */
1914                                 irq_printk("  BEGIN\n");
1915
1916                                 prev_frame = frame - 1;
1917                                 if (prev_frame == -1)
1918                                         prev_frame += video->n_frames;
1919                                 prev_f = video->frames[prev_frame];
1920
1921                                 /* make sure we can actually garbage collect
1922                                    this frame */
1923                                 if ( (prev_f->state == FRAME_READY) &&
1924                                     prev_f->done && (!f->done) )
1925                                 {
1926                                         frame_reset(prev_f);
1927                                         video->n_clear_frames++;
1928                                         wake = 1;
1929                                         video->active_frame = frame;
1930
1931                                         irq_printk("  BEGIN - freeing previous frame %d, new active frame is %d\n", prev_frame, frame);
1932                                 } else {
1933                                         irq_printk("  BEGIN - can't free yet\n");
1934                                 }
1935
1936                                 f->done = 1;
1937                         }
1938
1939
1940                         /* see if we need to set the timestamp for the next frame */
1941                         if ( *(f->mid_frame_timestamp) ) {
1942                                 struct frame *next_frame;
1943                                 u32 begin_ts, ts_cyc, ts_off;
1944
1945                                 *(f->mid_frame_timestamp) = 0;
1946
1947                                 begin_ts = le32_to_cpu(*(f->frame_begin_timestamp));
1948
1949                                 irq_printk("  MIDDLE - first packet was sent at cycle %4u (%2u), assigned timestamp was (%2u) %4u\n",
1950                                            begin_ts & 0x1FFF, begin_ts & 0xF,
1951                                            f->assigned_timestamp >> 12, f->assigned_timestamp & 0xFFF);
1952
1953                                 /* prepare next frame and assign timestamp */
1954                                 next_frame = video->frames[ (frame+1) % video->n_frames ];
1955
1956                                 if (next_frame->state == FRAME_READY) {
1957                                         irq_printk("  MIDDLE - next frame is ready, good\n");
1958                                 } else {
1959                                         debug_printk("dv1394: Underflow! At least one frame has been dropped.\n");
1960                                         next_frame = f;
1961                                 }
1962
1963                                 /* set the timestamp to the timestamp of the last frame sent,
1964                                    plus the length of the last frame sent, plus the syt latency */
1965                                 ts_cyc = begin_ts & 0xF;
1966                                 /* advance one frame, plus syt latency (typically 2-3) */
1967                                 ts_cyc += f->n_packets + video->syt_offset ;
1968
1969                                 ts_off = 0;
1970
1971                                 ts_cyc += ts_off/3072;
1972                                 ts_off %= 3072;
1973
1974                                 next_frame->assigned_timestamp = ((ts_cyc&0xF) << 12) + ts_off;
1975                                 if (next_frame->cip_syt1) {
1976                                         next_frame->cip_syt1->b[6] = next_frame->assigned_timestamp >> 8;
1977                                         next_frame->cip_syt1->b[7] = next_frame->assigned_timestamp & 0xFF;
1978                                 }
1979                                 if (next_frame->cip_syt2) {
1980                                         next_frame->cip_syt2->b[6] = next_frame->assigned_timestamp >> 8;
1981                                         next_frame->cip_syt2->b[7] = next_frame->assigned_timestamp & 0xFF;
1982                                 }
1983
1984                         }
1985
1986                         /* see if the frame looped */
1987                         if ( *(f->frame_end_timestamp) ) {
1988
1989                                 *(f->frame_end_timestamp) = 0;
1990
1991                                 debug_printk("  END - the frame looped at least once\n");
1992
1993                                 video->dropped_frames++;
1994                         }
1995
1996                 } /* for (each frame) */
1997         }
1998
1999         if (wake) {
2000                 kill_fasync(&video->fasync, SIGIO, POLL_OUT);
2001
2002                 /* wake readers/writers/ioctl'ers */
2003                 wake_up_interruptible(&video->waitq);
2004         }
2005
2006 out:
2007         spin_unlock(&video->spinlock);
2008 }
2009
2010 static void ir_tasklet_func(unsigned long data)
2011 {
2012         int wake = 0;
2013         struct video_card *video = (struct video_card*) data;
2014
2015         spin_lock(&video->spinlock);
2016
2017         if (!video->dma_running)
2018                 goto out;
2019
2020         if ( (video->ohci_ir_ctx != -1) &&
2021             (reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 10)) ) {
2022
2023                 int sof=0; /* start-of-frame flag */
2024                 struct frame *f;
2025                 u16 packet_length, packet_time;
2026                 int i, dbc=0;
2027                 struct DMA_descriptor_block *block = NULL;
2028                 u16 xferstatus;
2029
2030                 int next_i, prev_i;
2031                 struct DMA_descriptor_block *next = NULL;
2032                 dma_addr_t next_dma = 0;
2033                 struct DMA_descriptor_block *prev = NULL;
2034
2035                 /* loop over all descriptors in all frames */
2036                 for (i = 0; i < video->n_frames*MAX_PACKETS; i++) {
2037                         struct packet *p = dma_region_i(&video->packet_buf, struct packet, video->current_packet);
2038
2039                         /* make sure we are seeing the latest changes to p */
2040                         dma_region_sync_for_cpu(&video->packet_buf,
2041                                                 (unsigned long) p - (unsigned long) video->packet_buf.kvirt,
2042                                                 sizeof(struct packet));
2043
2044                         packet_length = le16_to_cpu(p->data_length);
2045                         packet_time   = le16_to_cpu(p->timestamp);
2046
2047                         irq_printk("received packet %02d, timestamp=%04x, length=%04x, sof=%02x%02x\n", video->current_packet,
2048                                    packet_time, packet_length,
2049                                    p->data[0], p->data[1]);
2050
2051                         /* get the descriptor based on packet_buffer cursor */
2052                         f = video->frames[video->current_packet / MAX_PACKETS];
2053                         block = &(f->descriptor_pool[video->current_packet % MAX_PACKETS]);
2054                         xferstatus = le32_to_cpu(block->u.in.il.q[3]) >> 16;
2055                         xferstatus &= 0x1F;
2056                         irq_printk("ir_tasklet_func: xferStatus/resCount [%d] = 0x%08x\n", i, le32_to_cpu(block->u.in.il.q[3]) );
2057
2058                         /* get the current frame */
2059                         f = video->frames[video->active_frame];
2060
2061                         /* exclude empty packet */
2062                         if (packet_length > 8 && xferstatus == 0x11) {
2063                                 /* check for start of frame */
2064                                 /* DRD> Changed to check section type ([0]>>5==0)
2065                                    and dif sequence ([1]>>4==0) */
2066                                 sof = ( (p->data[0] >> 5) == 0 && (p->data[1] >> 4) == 0);
2067
2068                                 dbc = (int) (p->cip_h1 >> 24);
2069                                 if ( video->continuity_counter != -1 && dbc > ((video->continuity_counter + 1) % 256) )
2070                                 {
2071                                         printk(KERN_WARNING "dv1394: discontinuity detected, dropping all frames\n" );
2072                                         video->dropped_frames += video->n_clear_frames + 1;
2073                                         video->first_frame = 0;
2074                                         video->n_clear_frames = 0;
2075                                         video->first_clear_frame = -1;
2076                                 }
2077                                 video->continuity_counter = dbc;
2078
2079                                 if (!video->first_frame) {
2080                                         if (sof) {
2081                                                 video->first_frame = 1;
2082                                         }
2083
2084                                 } else if (sof) {
2085                                         /* close current frame */
2086                                         frame_reset(f);  /* f->state = STATE_CLEAR */
2087                                         video->n_clear_frames++;
2088                                         if (video->n_clear_frames > video->n_frames) {
2089                                                 video->dropped_frames++;
2090                                                 printk(KERN_WARNING "dv1394: dropped a frame during reception\n" );
2091                                                 video->n_clear_frames = video->n_frames-1;
2092                                                 video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
2093                                         }
2094                                         if (video->first_clear_frame == -1)
2095                                                 video->first_clear_frame = video->active_frame;
2096
2097                                         /* get the next frame */
2098                                         video->active_frame = (video->active_frame + 1) % video->n_frames;
2099                                         f = video->frames[video->active_frame];
2100                                         irq_printk("   frame received, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n",
2101                                                    video->active_frame, video->n_clear_frames, video->first_clear_frame);
2102                                 }
2103                                 if (video->first_frame) {
2104                                         if (sof) {
2105                                                 /* open next frame */
2106                                                 f->state = FRAME_READY;
2107                                         }
2108
2109                                         /* copy to buffer */
2110                                         if (f->n_packets > (video->frame_size / 480)) {
2111                                                 printk(KERN_ERR "frame buffer overflow during receive\n");
2112                                         }
2113
2114                                         frame_put_packet(f, p);
2115
2116                                 } /* first_frame */
2117                         }
2118
2119                         /* stop, end of ready packets */
2120                         else if (xferstatus == 0) {
2121                                 break;
2122                         }
2123
2124                         /* reset xferStatus & resCount */
2125                         block->u.in.il.q[3] = cpu_to_le32(512);
2126
2127                         /* terminate dma chain at this (next) packet */
2128                         next_i = video->current_packet;
2129                         f = video->frames[next_i / MAX_PACKETS];
2130                         next = &(f->descriptor_pool[next_i % MAX_PACKETS]);
2131                         next_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
2132                         next->u.in.il.q[0] |= 3 << 20; /* enable interrupt */
2133                         next->u.in.il.q[2] = 0; /* disable branch */
2134
2135                         /* link previous to next */
2136                         prev_i = (next_i == 0) ? (MAX_PACKETS * video->n_frames - 1) : (next_i - 1);
2137                         f = video->frames[prev_i / MAX_PACKETS];
2138                         prev = &(f->descriptor_pool[prev_i % MAX_PACKETS]);
2139                         if (prev_i % (MAX_PACKETS/2)) {
2140                                 prev->u.in.il.q[0] &= ~(3 << 20); /* no interrupt */
2141                         } else {
2142                                 prev->u.in.il.q[0] |= 3 << 20; /* enable interrupt */
2143                         }
2144                         prev->u.in.il.q[2] = cpu_to_le32(next_dma | 1); /* set Z=1 */
2145                         wmb();
2146
2147                         /* wake up DMA in case it fell asleep */
2148                         reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
2149
2150                         /* advance packet_buffer cursor */
2151                         video->current_packet = (video->current_packet + 1) % (MAX_PACKETS * video->n_frames);
2152
2153                 } /* for all packets */
2154
2155                 wake = 1; /* why the hell not? */
2156
2157         } /* receive interrupt */
2158
2159         if (wake) {
2160                 kill_fasync(&video->fasync, SIGIO, POLL_IN);
2161
2162                 /* wake readers/writers/ioctl'ers */
2163                 wake_up_interruptible(&video->waitq);
2164         }
2165
2166 out:
2167         spin_unlock(&video->spinlock);
2168 }
2169
2170 static struct cdev dv1394_cdev;
2171 static struct file_operations dv1394_fops=
2172 {
2173         .owner =        THIS_MODULE,
2174         .poll =         dv1394_poll,
2175         .unlocked_ioctl = dv1394_ioctl,
2176 #ifdef CONFIG_COMPAT
2177         .compat_ioctl = dv1394_compat_ioctl,
2178 #endif
2179         .mmap =         dv1394_mmap,
2180         .open =         dv1394_open,
2181         .write =        dv1394_write,
2182         .read =         dv1394_read,
2183         .release =      dv1394_release,
2184         .fasync =       dv1394_fasync,
2185 };
2186
2187
2188 /*** HOTPLUG STUFF **********************************************************/
2189 /*
2190  * Export information about protocols/devices supported by this driver.
2191  */
2192 static struct ieee1394_device_id dv1394_id_table[] = {
2193         {
2194                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
2195                 .specifier_id   = AVC_UNIT_SPEC_ID_ENTRY & 0xffffff,
2196                 .version        = AVC_SW_VERSION_ENTRY & 0xffffff
2197         },
2198         { }
2199 };
2200
2201 MODULE_DEVICE_TABLE(ieee1394, dv1394_id_table);
2202
2203 static struct hpsb_protocol_driver dv1394_driver = {
2204         .name           = "DV/1394 Driver",
2205         .id_table       = dv1394_id_table,
2206         .driver         = {
2207                 .name   = "dv1394",
2208                 .bus    = &ieee1394_bus_type,
2209         },
2210 };
2211
2212
2213 /*** IEEE1394 HPSB CALLBACKS ***********************************************/
2214
2215 static int dv1394_init(struct ti_ohci *ohci, enum pal_or_ntsc format, enum modes mode)
2216 {
2217         struct video_card *video;
2218         unsigned long flags;
2219         int i;
2220
2221         video = kmalloc(sizeof(struct video_card), GFP_KERNEL);
2222         if (!video) {
2223                 printk(KERN_ERR "dv1394: cannot allocate video_card\n");
2224                 goto err;
2225         }
2226
2227         memset(video, 0, sizeof(struct video_card));
2228
2229         video->ohci = ohci;
2230         /* lower 2 bits of id indicate which of four "plugs"
2231            per host */
2232         video->id = ohci->host->id << 2;
2233         if (format == DV1394_NTSC)
2234                 video->id |= mode;
2235         else
2236                 video->id |= 2 + mode;
2237
2238         video->ohci_it_ctx = -1;
2239         video->ohci_ir_ctx = -1;
2240
2241         video->ohci_IsoXmitContextControlSet = 0;
2242         video->ohci_IsoXmitContextControlClear = 0;
2243         video->ohci_IsoXmitCommandPtr = 0;
2244
2245         video->ohci_IsoRcvContextControlSet = 0;
2246         video->ohci_IsoRcvContextControlClear = 0;
2247         video->ohci_IsoRcvCommandPtr = 0;
2248         video->ohci_IsoRcvContextMatch = 0;
2249
2250         video->n_frames = 0; /* flag that video is not initialized */
2251         video->channel = 63; /* default to broadcast channel */
2252         video->active_frame = -1;
2253
2254         /* initialize the following */
2255         video->pal_or_ntsc = format;
2256         video->cip_n = 0; /* 0 = use builtin default */
2257         video->cip_d = 0;
2258         video->syt_offset = 0;
2259         video->mode = mode;
2260
2261         for (i = 0; i < DV1394_MAX_FRAMES; i++)
2262                 video->frames[i] = NULL;
2263
2264         dma_region_init(&video->dv_buf);
2265         video->dv_buf_size = 0;
2266         dma_region_init(&video->packet_buf);
2267         video->packet_buf_size = 0;
2268
2269         clear_bit(0, &video->open);
2270         spin_lock_init(&video->spinlock);
2271         video->dma_running = 0;
2272         init_MUTEX(&video->sem);
2273         init_waitqueue_head(&video->waitq);
2274         video->fasync = NULL;
2275
2276         spin_lock_irqsave(&dv1394_cards_lock, flags);
2277         INIT_LIST_HEAD(&video->list);
2278         list_add_tail(&video->list, &dv1394_cards);
2279         spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2280
2281         if (devfs_mk_cdev(MKDEV(IEEE1394_MAJOR,
2282                                 IEEE1394_MINOR_BLOCK_DV1394*16 + video->id),
2283                         S_IFCHR|S_IRUGO|S_IWUGO,
2284                          "ieee1394/dv/host%d/%s/%s",
2285                          (video->id>>2),
2286                          (video->pal_or_ntsc == DV1394_NTSC ? "NTSC" : "PAL"),
2287                          (video->mode == MODE_RECEIVE ? "in" : "out")) < 0)
2288                         goto err_free;
2289
2290         debug_printk("dv1394: dv1394_init() OK on ID %d\n", video->id);
2291
2292         return 0;
2293
2294  err_free:
2295         kfree(video);
2296  err:
2297         return -1;
2298 }
2299
2300 static void dv1394_un_init(struct video_card *video)
2301 {
2302         char buf[32];
2303
2304         /* obviously nobody has the driver open at this point */
2305         do_dv1394_shutdown(video, 1);
2306         snprintf(buf, sizeof(buf), "dv/host%d/%s/%s", (video->id >> 2),
2307                 (video->pal_or_ntsc == DV1394_NTSC ? "NTSC" : "PAL"),
2308                 (video->mode == MODE_RECEIVE ? "in" : "out")
2309                 );
2310
2311         devfs_remove("ieee1394/%s", buf);
2312         kfree(video);
2313 }
2314
2315
2316 static void dv1394_remove_host (struct hpsb_host *host)
2317 {
2318         struct video_card *video;
2319         unsigned long flags;
2320         int id = host->id;
2321
2322         /* We only work with the OHCI-1394 driver */
2323         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2324                 return;
2325
2326         /* find the corresponding video_cards */
2327         do {
2328                 struct video_card *tmp_vid;
2329
2330                 video = NULL;
2331
2332                 spin_lock_irqsave(&dv1394_cards_lock, flags);
2333                 list_for_each_entry(tmp_vid, &dv1394_cards, list) {
2334                         if ((tmp_vid->id >> 2) == id) {
2335                                 list_del(&tmp_vid->list);
2336                                 video = tmp_vid;
2337                                 break;
2338                         }
2339                 }
2340                 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2341
2342                 if (video)
2343                         dv1394_un_init(video);
2344         } while (video != NULL);
2345
2346         class_simple_device_remove(MKDEV(
2347                 IEEE1394_MAJOR, IEEE1394_MINOR_BLOCK_DV1394 * 16 + (id<<2)));
2348         devfs_remove("ieee1394/dv/host%d/NTSC", id);
2349         devfs_remove("ieee1394/dv/host%d/PAL", id);
2350         devfs_remove("ieee1394/dv/host%d", id);
2351 }
2352
2353 static void dv1394_add_host (struct hpsb_host *host)
2354 {
2355         struct ti_ohci *ohci;
2356         int id = host->id;
2357
2358         /* We only work with the OHCI-1394 driver */
2359         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2360                 return;
2361
2362         ohci = (struct ti_ohci *)host->hostdata;
2363
2364         class_simple_device_add(hpsb_protocol_class, MKDEV(
2365                 IEEE1394_MAJOR, IEEE1394_MINOR_BLOCK_DV1394 * 16 + (id<<2)),
2366                 NULL, "dv1394-%d", id);
2367         devfs_mk_dir("ieee1394/dv/host%d", id);
2368         devfs_mk_dir("ieee1394/dv/host%d/NTSC", id);
2369         devfs_mk_dir("ieee1394/dv/host%d/PAL", id);
2370
2371         dv1394_init(ohci, DV1394_NTSC, MODE_RECEIVE);
2372         dv1394_init(ohci, DV1394_NTSC, MODE_TRANSMIT);
2373         dv1394_init(ohci, DV1394_PAL, MODE_RECEIVE);
2374         dv1394_init(ohci, DV1394_PAL, MODE_TRANSMIT);
2375 }
2376
2377
2378 /* Bus reset handler. In the event of a bus reset, we may need to
2379    re-start the DMA contexts - otherwise the user program would
2380    end up waiting forever.
2381 */
2382
2383 static void dv1394_host_reset(struct hpsb_host *host)
2384 {
2385         struct ti_ohci *ohci;
2386         struct video_card *video = NULL, *tmp_vid;
2387         unsigned long flags;
2388
2389         /* We only work with the OHCI-1394 driver */
2390         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2391                 return;
2392
2393         ohci = (struct ti_ohci *)host->hostdata;
2394
2395
2396         /* find the corresponding video_cards */
2397         spin_lock_irqsave(&dv1394_cards_lock, flags);
2398         list_for_each_entry(tmp_vid, &dv1394_cards, list) {
2399                 if ((tmp_vid->id >> 2) == host->id) {
2400                         video = tmp_vid;
2401                         break;
2402                 }
2403         }
2404         spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2405
2406         if (!video)
2407                 return;
2408
2409
2410         spin_lock_irqsave(&video->spinlock, flags);
2411
2412         if (!video->dma_running)
2413                 goto out;
2414
2415         /* check IT context */
2416         if (video->ohci_it_ctx != -1) {
2417                 u32 ctx;
2418
2419                 ctx = reg_read(video->ohci, video->ohci_IsoXmitContextControlSet);
2420
2421                 /* if (RUN but not ACTIVE) */
2422                 if ( (ctx & (1<<15)) &&
2423                     !(ctx & (1<<10)) ) {
2424
2425                         debug_printk("dv1394: IT context stopped due to bus reset; waking it up\n");
2426
2427                         /* to be safe, assume a frame has been dropped. User-space programs
2428                            should handle this condition like an underflow. */
2429                         video->dropped_frames++;
2430
2431                         /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2432
2433                         /* clear RUN */
2434                         reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, (1 << 15));
2435                         flush_pci_write(video->ohci);
2436
2437                         /* set RUN */
2438                         reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, (1 << 15));
2439                         flush_pci_write(video->ohci);
2440
2441                         /* set the WAKE bit (just in case; this isn't strictly necessary) */
2442                         reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, (1 << 12));
2443                         flush_pci_write(video->ohci);
2444
2445                         irq_printk("dv1394: AFTER IT restart ctx 0x%08x ptr 0x%08x\n",
2446                                    reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
2447                                    reg_read(video->ohci, video->ohci_IsoXmitCommandPtr));
2448                 }
2449         }
2450
2451         /* check IR context */
2452         if (video->ohci_ir_ctx != -1) {
2453                 u32 ctx;
2454
2455                 ctx = reg_read(video->ohci, video->ohci_IsoRcvContextControlSet);
2456
2457                 /* if (RUN but not ACTIVE) */
2458                 if ( (ctx & (1<<15)) &&
2459                     !(ctx & (1<<10)) ) {
2460
2461                         debug_printk("dv1394: IR context stopped due to bus reset; waking it up\n");
2462
2463                         /* to be safe, assume a frame has been dropped. User-space programs
2464                            should handle this condition like an overflow. */
2465                         video->dropped_frames++;
2466
2467                         /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2468                         /* XXX this doesn't work for me, I can't get IR DMA to restart :[ */
2469
2470                         /* clear RUN */
2471                         reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, (1 << 15));
2472                         flush_pci_write(video->ohci);
2473
2474                         /* set RUN */
2475                         reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 15));
2476                         flush_pci_write(video->ohci);
2477
2478                         /* set the WAKE bit (just in case; this isn't strictly necessary) */
2479                         reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
2480                         flush_pci_write(video->ohci);
2481
2482                         irq_printk("dv1394: AFTER IR restart ctx 0x%08x ptr 0x%08x\n",
2483                                    reg_read(video->ohci, video->ohci_IsoRcvContextControlSet),
2484                                    reg_read(video->ohci, video->ohci_IsoRcvCommandPtr));
2485                 }
2486         }
2487
2488 out:
2489         spin_unlock_irqrestore(&video->spinlock, flags);
2490
2491         /* wake readers/writers/ioctl'ers */
2492         wake_up_interruptible(&video->waitq);
2493 }
2494
2495 static struct hpsb_highlevel dv1394_highlevel = {
2496         .name =         "dv1394",
2497         .add_host =     dv1394_add_host,
2498         .remove_host =  dv1394_remove_host,
2499         .host_reset =   dv1394_host_reset,
2500 };
2501
2502 #ifdef CONFIG_COMPAT
2503
2504 #define DV1394_IOC32_INIT       _IOW('#', 0x06, struct dv1394_init32)
2505 #define DV1394_IOC32_GET_STATUS _IOR('#', 0x0c, struct dv1394_status32)
2506
2507 struct dv1394_init32 {
2508         u32 api_version;
2509         u32 channel;
2510         u32 n_frames;
2511         u32 format;
2512         u32 cip_n;
2513         u32 cip_d;
2514         u32 syt_offset;
2515 };
2516
2517 struct dv1394_status32 {
2518         struct dv1394_init32 init;
2519         s32 active_frame;
2520         u32 first_clear_frame;
2521         u32 n_clear_frames;
2522         u32 dropped_frames;
2523 };
2524
2525 /* RED-PEN: this should use compat_alloc_userspace instead */
2526
2527 static int handle_dv1394_init(struct file *file, unsigned int cmd, unsigned long arg)
2528 {
2529         struct dv1394_init32 dv32;
2530         struct dv1394_init dv;
2531         mm_segment_t old_fs;
2532         int ret;
2533
2534         if (file->f_op->unlocked_ioctl != dv1394_ioctl)
2535                 return -EFAULT;
2536
2537         if (copy_from_user(&dv32, (void __user *)arg, sizeof(dv32)))
2538                 return -EFAULT;
2539
2540         dv.api_version = dv32.api_version;
2541         dv.channel = dv32.channel;
2542         dv.n_frames = dv32.n_frames;
2543         dv.format = dv32.format;
2544         dv.cip_n = (unsigned long)dv32.cip_n;
2545         dv.cip_d = (unsigned long)dv32.cip_d;
2546         dv.syt_offset = dv32.syt_offset;
2547
2548         old_fs = get_fs();
2549         set_fs(KERNEL_DS);
2550         ret = dv1394_ioctl(file, DV1394_IOC_INIT, (unsigned long)&dv);
2551         set_fs(old_fs);
2552
2553         return ret;
2554 }
2555
2556 static int handle_dv1394_get_status(struct file *file, unsigned int cmd, unsigned long arg)
2557 {
2558         struct dv1394_status32 dv32;
2559         struct dv1394_status dv;
2560         mm_segment_t old_fs;
2561         int ret;
2562
2563         if (file->f_op->unlocked_ioctl != dv1394_ioctl)
2564                 return -EFAULT;
2565
2566         old_fs = get_fs();
2567         set_fs(KERNEL_DS);
2568         ret = dv1394_ioctl(file, DV1394_IOC_GET_STATUS, (unsigned long)&dv);
2569         set_fs(old_fs);
2570
2571         if (!ret) {
2572                 dv32.init.api_version = dv.init.api_version;
2573                 dv32.init.channel = dv.init.channel;
2574                 dv32.init.n_frames = dv.init.n_frames;
2575                 dv32.init.format = dv.init.format;
2576                 dv32.init.cip_n = (u32)dv.init.cip_n;
2577                 dv32.init.cip_d = (u32)dv.init.cip_d;
2578                 dv32.init.syt_offset = dv.init.syt_offset;
2579                 dv32.active_frame = dv.active_frame;
2580                 dv32.first_clear_frame = dv.first_clear_frame;
2581                 dv32.n_clear_frames = dv.n_clear_frames;
2582                 dv32.dropped_frames = dv.dropped_frames;
2583
2584                 if (copy_to_user((struct dv1394_status32 __user *)arg, &dv32, sizeof(dv32)))
2585                         ret = -EFAULT;
2586         }
2587
2588         return ret;
2589 }
2590
2591
2592
2593 static long dv1394_compat_ioctl(struct file *file, unsigned int cmd,
2594                                unsigned long arg)
2595 {
2596         switch (cmd) {
2597         case DV1394_IOC_SHUTDOWN:
2598         case DV1394_IOC_SUBMIT_FRAMES:
2599         case DV1394_IOC_WAIT_FRAMES:
2600         case DV1394_IOC_RECEIVE_FRAMES:
2601         case DV1394_IOC_START_RECEIVE:
2602                 return dv1394_ioctl(file, cmd, arg);
2603
2604         case DV1394_IOC32_INIT:
2605                 return handle_dv1394_init(file, cmd, arg);
2606         case DV1394_IOC32_GET_STATUS:
2607                 return handle_dv1394_get_status(file, cmd, arg);
2608         default:
2609                 return -ENOIOCTLCMD;
2610         }
2611 }
2612
2613 #endif /* CONFIG_COMPAT */
2614
2615
2616 /*** KERNEL MODULE HANDLERS ************************************************/
2617
2618 MODULE_AUTHOR("Dan Maas <dmaas@dcine.com>, Dan Dennedy <dan@dennedy.org>");
2619 MODULE_DESCRIPTION("driver for DV input/output on OHCI board");
2620 MODULE_SUPPORTED_DEVICE("dv1394");
2621 MODULE_LICENSE("GPL");
2622
2623 static void __exit dv1394_exit_module(void)
2624 {
2625         hpsb_unregister_protocol(&dv1394_driver);
2626
2627         hpsb_unregister_highlevel(&dv1394_highlevel);
2628         cdev_del(&dv1394_cdev);
2629         devfs_remove("ieee1394/dv");
2630 }
2631
2632 static int __init dv1394_init_module(void)
2633 {
2634         int ret;
2635
2636         cdev_init(&dv1394_cdev, &dv1394_fops);
2637         dv1394_cdev.owner = THIS_MODULE;
2638         kobject_set_name(&dv1394_cdev.kobj, "dv1394");
2639         ret = cdev_add(&dv1394_cdev, IEEE1394_DV1394_DEV, 16);
2640         if (ret) {
2641                 printk(KERN_ERR "dv1394: unable to register character device\n");
2642                 return ret;
2643         }
2644
2645         devfs_mk_dir("ieee1394/dv");
2646
2647         hpsb_register_highlevel(&dv1394_highlevel);
2648
2649         ret = hpsb_register_protocol(&dv1394_driver);
2650         if (ret) {
2651                 printk(KERN_ERR "dv1394: failed to register protocol\n");
2652                 hpsb_unregister_highlevel(&dv1394_highlevel);
2653                 devfs_remove("ieee1394/dv");
2654                 cdev_del(&dv1394_cdev);
2655                 return ret;
2656         }
2657
2658         return 0;
2659 }
2660
2661 module_init(dv1394_init_module);
2662 module_exit(dv1394_exit_module);
2663 MODULE_ALIAS_CHARDEV(IEEE1394_MAJOR, IEEE1394_MINOR_BLOCK_DV1394 * 16);