powerpc/44x: Warp DTS changes for board updates
[linux-2.6] / arch / powerpc / boot / dts / mpc8641_hpcn.dts
1 /*
2  * MPC8641 HPCN Device Tree Source
3  *
4  * Copyright 2006 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         model = "MPC8641HPCN";
16         compatible = "fsl,mpc8641hpcn";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         aliases {
21                 ethernet0 = &enet0;
22                 ethernet1 = &enet1;
23                 ethernet2 = &enet2;
24                 ethernet3 = &enet3;
25                 serial0 = &serial0;
26                 serial1 = &serial1;
27                 pci0 = &pci0;
28                 pci1 = &pci1;
29                 rapidio0 = &rapidio0;
30         };
31
32         cpus {
33                 #address-cells = <1>;
34                 #size-cells = <0>;
35
36                 PowerPC,8641@0 {
37                         device_type = "cpu";
38                         reg = <0>;
39                         d-cache-line-size = <32>;
40                         i-cache-line-size = <32>;
41                         d-cache-size = <32768>;         // L1
42                         i-cache-size = <32768>;         // L1
43                         timebase-frequency = <0>;       // From uboot
44                         bus-frequency = <0>;            // From uboot
45                         clock-frequency = <0>;          // From uboot
46                 };
47                 PowerPC,8641@1 {
48                         device_type = "cpu";
49                         reg = <1>;
50                         d-cache-line-size = <32>;
51                         i-cache-line-size = <32>;
52                         d-cache-size = <32768>;
53                         i-cache-size = <32768>;
54                         timebase-frequency = <0>;       // From uboot
55                         bus-frequency = <0>;            // From uboot
56                         clock-frequency = <0>;          // From uboot
57                 };
58         };
59
60         memory {
61                 device_type = "memory";
62                 reg = <0x00000000 0x40000000>;  // 1G at 0x0
63         };
64
65         localbus@f8005000 {
66                 #address-cells = <2>;
67                 #size-cells = <1>;
68                 compatible = "fsl,mpc8641-localbus", "simple-bus";
69                 reg = <0xf8005000 0x1000>;
70                 interrupts = <19 2>;
71                 interrupt-parent = <&mpic>;
72
73                 ranges = <0 0 0xff800000 0x00800000
74                           1 0 0xfe000000 0x01000000
75                           2 0 0xf8200000 0x00100000
76                           3 0 0xf8100000 0x00100000>;
77
78                 flash@0,0 {
79                         compatible = "cfi-flash";
80                         reg = <0 0 0x00800000>;
81                         bank-width = <2>;
82                         device-width = <2>;
83                         #address-cells = <1>;
84                         #size-cells = <1>;
85                         partition@0 {
86                                 label = "kernel";
87                                 reg = <0x00000000 0x00300000>;
88                         };
89                         partition@300000 {
90                                 label = "firmware b";
91                                 reg = <0x00300000 0x00100000>;
92                                 read-only;
93                         };
94                         partition@400000 {
95                                 label = "fs";
96                                 reg = <0x00400000 0x00300000>;
97                         };
98                         partition@700000 {
99                                 label = "firmware a";
100                                 reg = <0x00700000 0x00100000>;
101                                 read-only;
102                         };
103                 };
104         };
105
106         soc8641@f8000000 {
107                 #address-cells = <1>;
108                 #size-cells = <1>;
109                 device_type = "soc";
110                 compatible = "simple-bus";
111                 ranges = <0x00000000 0xf8000000 0x00100000>;
112                 reg = <0xf8000000 0x00001000>;  // CCSRBAR
113                 bus-frequency = <0>;
114
115                 i2c@3000 {
116                         #address-cells = <1>;
117                         #size-cells = <0>;
118                         cell-index = <0>;
119                         compatible = "fsl-i2c";
120                         reg = <0x3000 0x100>;
121                         interrupts = <43 2>;
122                         interrupt-parent = <&mpic>;
123                         dfsrr;
124                 };
125
126                 i2c@3100 {
127                         #address-cells = <1>;
128                         #size-cells = <0>;
129                         cell-index = <1>;
130                         compatible = "fsl-i2c";
131                         reg = <0x3100 0x100>;
132                         interrupts = <43 2>;
133                         interrupt-parent = <&mpic>;
134                         dfsrr;
135                 };
136
137                 dma@21300 {
138                         #address-cells = <1>;
139                         #size-cells = <1>;
140                         compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
141                         reg = <0x21300 0x4>;
142                         ranges = <0x0 0x21100 0x200>;
143                         cell-index = <0>;
144                         dma-channel@0 {
145                                 compatible = "fsl,mpc8641-dma-channel",
146                                                 "fsl,eloplus-dma-channel";
147                                 reg = <0x0 0x80>;
148                                 cell-index = <0>;
149                                 interrupt-parent = <&mpic>;
150                                 interrupts = <20 2>;
151                         };
152                         dma-channel@80 {
153                                 compatible = "fsl,mpc8641-dma-channel",
154                                                 "fsl,eloplus-dma-channel";
155                                 reg = <0x80 0x80>;
156                                 cell-index = <1>;
157                                 interrupt-parent = <&mpic>;
158                                 interrupts = <21 2>;
159                         };
160                         dma-channel@100 {
161                                 compatible = "fsl,mpc8641-dma-channel",
162                                                 "fsl,eloplus-dma-channel";
163                                 reg = <0x100 0x80>;
164                                 cell-index = <2>;
165                                 interrupt-parent = <&mpic>;
166                                 interrupts = <22 2>;
167                         };
168                         dma-channel@180 {
169                                 compatible = "fsl,mpc8641-dma-channel",
170                                                 "fsl,eloplus-dma-channel";
171                                 reg = <0x180 0x80>;
172                                 cell-index = <3>;
173                                 interrupt-parent = <&mpic>;
174                                 interrupts = <23 2>;
175                         };
176                 };
177
178                 mdio@24520 {
179                         #address-cells = <1>;
180                         #size-cells = <0>;
181                         compatible = "fsl,gianfar-mdio";
182                         reg = <0x24520 0x20>;
183
184                         phy0: ethernet-phy@0 {
185                                 interrupt-parent = <&mpic>;
186                                 interrupts = <10 1>;
187                                 reg = <0>;
188                                 device_type = "ethernet-phy";
189                         };
190                         phy1: ethernet-phy@1 {
191                                 interrupt-parent = <&mpic>;
192                                 interrupts = <10 1>;
193                                 reg = <1>;
194                                 device_type = "ethernet-phy";
195                         };
196                         phy2: ethernet-phy@2 {
197                                 interrupt-parent = <&mpic>;
198                                 interrupts = <10 1>;
199                                 reg = <2>;
200                                 device_type = "ethernet-phy";
201                         };
202                         phy3: ethernet-phy@3 {
203                                 interrupt-parent = <&mpic>;
204                                 interrupts = <10 1>;
205                                 reg = <3>;
206                                 device_type = "ethernet-phy";
207                         };
208                 };
209
210                 enet0: ethernet@24000 {
211                         cell-index = <0>;
212                         device_type = "network";
213                         model = "TSEC";
214                         compatible = "gianfar";
215                         reg = <0x24000 0x1000>;
216                         local-mac-address = [ 00 00 00 00 00 00 ];
217                         interrupts = <29 2 30  2 34 2>;
218                         interrupt-parent = <&mpic>;
219                         phy-handle = <&phy0>;
220                         phy-connection-type = "rgmii-id";
221                 };
222
223                 enet1: ethernet@25000 {
224                         cell-index = <1>;
225                         device_type = "network";
226                         model = "TSEC";
227                         compatible = "gianfar";
228                         reg = <0x25000 0x1000>;
229                         local-mac-address = [ 00 00 00 00 00 00 ];
230                         interrupts = <35 2 36 2 40 2>;
231                         interrupt-parent = <&mpic>;
232                         phy-handle = <&phy1>;
233                         phy-connection-type = "rgmii-id";
234                 };
235                 
236                 enet2: ethernet@26000 {
237                         cell-index = <2>;
238                         device_type = "network";
239                         model = "TSEC";
240                         compatible = "gianfar";
241                         reg = <0x26000 0x1000>;
242                         local-mac-address = [ 00 00 00 00 00 00 ];
243                         interrupts = <31 2 32 2 33 2>;
244                         interrupt-parent = <&mpic>;
245                         phy-handle = <&phy2>;
246                         phy-connection-type = "rgmii-id";
247                 };
248
249                 enet3: ethernet@27000 {
250                         cell-index = <3>;
251                         device_type = "network";
252                         model = "TSEC";
253                         compatible = "gianfar";
254                         reg = <0x27000 0x1000>;
255                         local-mac-address = [ 00 00 00 00 00 00 ];
256                         interrupts = <37 2 38 2 39 2>;
257                         interrupt-parent = <&mpic>;
258                         phy-handle = <&phy3>;
259                         phy-connection-type = "rgmii-id";
260                 };
261
262                 serial0: serial@4500 {
263                         cell-index = <0>;
264                         device_type = "serial";
265                         compatible = "ns16550";
266                         reg = <0x4500 0x100>;
267                         clock-frequency = <0>;
268                         interrupts = <42 2>;
269                         interrupt-parent = <&mpic>;
270                 };
271
272                 serial1: serial@4600 {
273                         cell-index = <1>;
274                         device_type = "serial";
275                         compatible = "ns16550";
276                         reg = <0x4600 0x100>;
277                         clock-frequency = <0>;
278                         interrupts = <28 2>;
279                         interrupt-parent = <&mpic>;
280                 };
281
282                 mpic: pic@40000 {
283                         interrupt-controller;
284                         #address-cells = <0>;
285                         #interrupt-cells = <2>;
286                         reg = <0x40000 0x40000>;
287                         compatible = "chrp,open-pic";
288                         device_type = "open-pic";
289                 };
290
291                 global-utilities@e0000 {
292                         compatible = "fsl,mpc8641-guts";
293                         reg = <0xe0000 0x1000>;
294                         fsl,has-rstcr;
295                 };
296         };
297
298         pci0: pcie@f8008000 {
299                 cell-index = <0>;
300                 compatible = "fsl,mpc8641-pcie";
301                 device_type = "pci";
302                 #interrupt-cells = <1>;
303                 #size-cells = <2>;
304                 #address-cells = <3>;
305                 reg = <0xf8008000 0x1000>;
306                 bus-range = <0x0 0xff>;
307                 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
308                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
309                 clock-frequency = <33333333>;
310                 interrupt-parent = <&mpic>;
311                 interrupts = <24 2>;
312                 interrupt-map-mask = <0xff00 0 0 7>;
313                 interrupt-map = <
314                         /* IDSEL 0x11 func 0 - PCI slot 1 */
315                         0x8800 0 0 1 &mpic 2 1
316                         0x8800 0 0 2 &mpic 3 1
317                         0x8800 0 0 3 &mpic 4 1
318                         0x8800 0 0 4 &mpic 1 1
319
320                         /* IDSEL 0x11 func 1 - PCI slot 1 */
321                         0x8900 0 0 1 &mpic 2 1
322                         0x8900 0 0 2 &mpic 3 1
323                         0x8900 0 0 3 &mpic 4 1
324                         0x8900 0 0 4 &mpic 1 1
325
326                         /* IDSEL 0x11 func 2 - PCI slot 1 */
327                         0x8a00 0 0 1 &mpic 2 1
328                         0x8a00 0 0 2 &mpic 3 1
329                         0x8a00 0 0 3 &mpic 4 1
330                         0x8a00 0 0 4 &mpic 1 1
331
332                         /* IDSEL 0x11 func 3 - PCI slot 1 */
333                         0x8b00 0 0 1 &mpic 2 1
334                         0x8b00 0 0 2 &mpic 3 1
335                         0x8b00 0 0 3 &mpic 4 1
336                         0x8b00 0 0 4 &mpic 1 1
337
338                         /* IDSEL 0x11 func 4 - PCI slot 1 */
339                         0x8c00 0 0 1 &mpic 2 1
340                         0x8c00 0 0 2 &mpic 3 1
341                         0x8c00 0 0 3 &mpic 4 1
342                         0x8c00 0 0 4 &mpic 1 1
343
344                         /* IDSEL 0x11 func 5 - PCI slot 1 */
345                         0x8d00 0 0 1 &mpic 2 1
346                         0x8d00 0 0 2 &mpic 3 1
347                         0x8d00 0 0 3 &mpic 4 1
348                         0x8d00 0 0 4 &mpic 1 1
349
350                         /* IDSEL 0x11 func 6 - PCI slot 1 */
351                         0x8e00 0 0 1 &mpic 2 1
352                         0x8e00 0 0 2 &mpic 3 1
353                         0x8e00 0 0 3 &mpic 4 1
354                         0x8e00 0 0 4 &mpic 1 1
355
356                         /* IDSEL 0x11 func 7 - PCI slot 1 */
357                         0x8f00 0 0 1 &mpic 2 1
358                         0x8f00 0 0 2 &mpic 3 1
359                         0x8f00 0 0 3 &mpic 4 1
360                         0x8f00 0 0 4 &mpic 1 1
361
362                         /* IDSEL 0x12 func 0 - PCI slot 2 */
363                         0x9000 0 0 1 &mpic 3 1
364                         0x9000 0 0 2 &mpic 4 1
365                         0x9000 0 0 3 &mpic 1 1
366                         0x9000 0 0 4 &mpic 2 1
367
368                         /* IDSEL 0x12 func 1 - PCI slot 2 */
369                         0x9100 0 0 1 &mpic 3 1
370                         0x9100 0 0 2 &mpic 4 1
371                         0x9100 0 0 3 &mpic 1 1
372                         0x9100 0 0 4 &mpic 2 1
373
374                         /* IDSEL 0x12 func 2 - PCI slot 2 */
375                         0x9200 0 0 1 &mpic 3 1
376                         0x9200 0 0 2 &mpic 4 1
377                         0x9200 0 0 3 &mpic 1 1
378                         0x9200 0 0 4 &mpic 2 1
379
380                         /* IDSEL 0x12 func 3 - PCI slot 2 */
381                         0x9300 0 0 1 &mpic 3 1
382                         0x9300 0 0 2 &mpic 4 1
383                         0x9300 0 0 3 &mpic 1 1
384                         0x9300 0 0 4 &mpic 2 1
385
386                         /* IDSEL 0x12 func 4 - PCI slot 2 */
387                         0x9400 0 0 1 &mpic 3 1
388                         0x9400 0 0 2 &mpic 4 1
389                         0x9400 0 0 3 &mpic 1 1
390                         0x9400 0 0 4 &mpic 2 1
391
392                         /* IDSEL 0x12 func 5 - PCI slot 2 */
393                         0x9500 0 0 1 &mpic 3 1
394                         0x9500 0 0 2 &mpic 4 1
395                         0x9500 0 0 3 &mpic 1 1
396                         0x9500 0 0 4 &mpic 2 1
397
398                         /* IDSEL 0x12 func 6 - PCI slot 2 */
399                         0x9600 0 0 1 &mpic 3 1
400                         0x9600 0 0 2 &mpic 4 1
401                         0x9600 0 0 3 &mpic 1 1
402                         0x9600 0 0 4 &mpic 2 1
403
404                         /* IDSEL 0x12 func 7 - PCI slot 2 */
405                         0x9700 0 0 1 &mpic 3 1
406                         0x9700 0 0 2 &mpic 4 1
407                         0x9700 0 0 3 &mpic 1 1
408                         0x9700 0 0 4 &mpic 2 1
409
410                         // IDSEL 0x1c  USB
411                         0xe000 0 0 1 &i8259 12 2
412                         0xe100 0 0 2 &i8259 9 2
413                         0xe200 0 0 3 &i8259 10 2
414                         0xe300 0 0 4 &i8259 112
415
416                         // IDSEL 0x1d  Audio
417                         0xe800 0 0 1 &i8259 6 2
418
419                         // IDSEL 0x1e Legacy
420                         0xf000 0 0 1 &i8259 7 2
421                         0xf100 0 0 1 &i8259 7 2
422
423                         // IDSEL 0x1f IDE/SATA
424                         0xf800 0 0 1 &i8259 14 2
425                         0xf900 0 0 1 &i8259 5 2
426                         >;
427
428                 pcie@0 {
429                         reg = <0 0 0 0 0>;
430                         #size-cells = <2>;
431                         #address-cells = <3>;
432                         device_type = "pci";
433                         ranges = <0x02000000 0x0 0x80000000
434                                   0x02000000 0x0 0x80000000
435                                   0x0 0x20000000
436
437                                   0x01000000 0x0 0x00000000
438                                   0x01000000 0x0 0x00000000
439                                   0x0 0x00100000>;
440                         uli1575@0 {
441                                 reg = <0 0 0 0 0>;
442                                 #size-cells = <2>;
443                                 #address-cells = <3>;
444                                 ranges = <0x02000000 0x0 0x80000000
445                                           0x02000000 0x0 0x80000000
446                                           0x0 0x20000000
447                                           0x01000000 0x0 0x00000000
448                                           0x01000000 0x0 0x00000000
449                                           0x0 0x00100000>;
450                                 isa@1e {
451                                         device_type = "isa";
452                                         #interrupt-cells = <2>;
453                                         #size-cells = <1>;
454                                         #address-cells = <2>;
455                                         reg = <0xf000 0 0 0 0>;
456                                         ranges = <1 0 0x01000000 0 0
457                                                   0x00001000>;
458                                         interrupt-parent = <&i8259>;
459
460                                         i8259: interrupt-controller@20 {
461                                                 reg = <1 0x20 2
462                                                        1 0xa0 2
463                                                        1 0x4d0 2>;
464                                                 interrupt-controller;
465                                                 device_type = "interrupt-controller";
466                                                 #address-cells = <0>;
467                                                 #interrupt-cells = <2>;
468                                                 compatible = "chrp,iic";
469                                                 interrupts = <9 2>;
470                                                 interrupt-parent = <&mpic>;
471                                         };
472
473                                         i8042@60 {
474                                                 #size-cells = <0>;
475                                                 #address-cells = <1>;
476                                                 reg = <1 0x60 1 1 0x64 1>;
477                                                 interrupts = <1 3 12 3>;
478                                                 interrupt-parent =
479                                                         <&i8259>;
480
481                                                 keyboard@0 {
482                                                         reg = <0>;
483                                                         compatible = "pnpPNP,303";
484                                                 };
485
486                                                 mouse@1 {
487                                                         reg = <1>;
488                                                         compatible = "pnpPNP,f03";
489                                                 };
490                                         };
491
492                                         rtc@70 {
493                                                 compatible =
494                                                         "pnpPNP,b00";
495                                                 reg = <1 0x70 2>;
496                                         };
497
498                                         gpio@400 {
499                                                 reg = <1 0x400 0x80>;
500                                         };
501                                 };
502                         };
503                 };
504
505         };
506
507         pci1: pcie@f8009000 {
508                 cell-index = <1>;
509                 compatible = "fsl,mpc8641-pcie";
510                 device_type = "pci";
511                 #interrupt-cells = <1>;
512                 #size-cells = <2>;
513                 #address-cells = <3>;
514                 reg = <0xf8009000 0x1000>;
515                 bus-range = <0 0xff>;
516                 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
517                           0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
518                 clock-frequency = <33333333>;
519                 interrupt-parent = <&mpic>;
520                 interrupts = <25 2>;
521                 interrupt-map-mask = <0xf800 0 0 7>;
522                 interrupt-map = <
523                         /* IDSEL 0x0 */
524                         0x0000 0 0 1 &mpic 4 1
525                         0x0000 0 0 2 &mpic 5 1
526                         0x0000 0 0 3 &mpic 6 1
527                         0x0000 0 0 4 &mpic 7 1
528                         >;
529                 pcie@0 {
530                         reg = <0 0 0 0 0>;
531                         #size-cells = <2>;
532                         #address-cells = <3>;
533                         device_type = "pci";
534                         ranges = <0x02000000 0x0 0xa0000000
535                                   0x02000000 0x0 0xa0000000
536                                   0x0 0x20000000
537
538                                   0x01000000 0x0 0x00000000
539                                   0x01000000 0x0 0x00000000
540                                   0x0 0x00100000>;
541                 };
542         };
543         rapidio0: rapidio@f80c0000 {
544                 #address-cells = <2>;
545                 #size-cells = <2>;
546                 compatible = "fsl,rapidio-delta";
547                 reg = <0xf80c0000 0x20000>;
548                 ranges = <0 0 0xc0000000 0 0x20000000>;
549                 interrupt-parent = <&mpic>;
550                 /* err_irq bell_outb_irq bell_inb_irq
551                         msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq */
552                 interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
553         };
554 };