2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
4 * FIXME According to the usermanual the status bits in the status register
5 * are only updated when the peripherals access the FIFO and not when the
6 * CPU access them. So since we use this bits to know when we stop writing
7 * and reading, they may not be updated in-time and a race condition may
8 * exists. But I haven't be able to prove this and I don't care. But if
9 * any problem arises, it might worth checking. The TX/RX FIFO Stats
10 * registers should be used in addition.
11 * Update: Actually, they seem updated ... At least the bits we use.
14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
16 * Some of the code has been inspired/copied from the 2.4 code written
17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
19 * Copyright (C) 2008 Freescale Semiconductor Inc.
20 * John Rigby <jrigby@gmail.com>
21 * Added support for MPC5121
22 * Copyright (C) 2006 Secret Lab Technologies Ltd.
23 * Grant Likely <grant.likely@secretlab.ca>
24 * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
25 * Copyright (C) 2003 MontaVista, Software, Inc.
27 * This file is licensed under the terms of the GNU General Public License
28 * version 2. This program is licensed "as is" without any warranty of any
29 * kind, whether express or implied.
32 /* Platform device Usage :
34 * Since PSCs can have multiple function, the correct driver for each one
35 * is selected by calling mpc52xx_match_psc_function(...). The function
36 * handled by this driver is "uart".
38 * The driver init all necessary registers to place the PSC in uart mode without
39 * DCD. However, the pin multiplexing aren't changed and should be set either
40 * by the bootloader or in the platform init code.
42 * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
43 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
44 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
45 * fpr the console code : without this 1:1 mapping, at early boot time, when we
46 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
50 /* OF Platform device Usage :
52 * This driver is only used for PSCs configured in uart mode. The device
53 * tree will have a node for each PSC in uart mode w/ device_type = "serial"
54 * and "mpc52xx-psc-uart" in the compatible string
56 * By default, PSC devices are enumerated in the order they are found. However
57 * a particular PSC number can be forces by adding 'device_no = <port#>'
60 * The driver init all necessary registers to place the PSC in uart mode without
61 * DCD. However, the pin multiplexing aren't changed and should be set either
62 * by the bootloader or in the platform init code.
67 #include <linux/device.h>
68 #include <linux/module.h>
69 #include <linux/tty.h>
70 #include <linux/serial.h>
71 #include <linux/sysrq.h>
72 #include <linux/console.h>
73 #include <linux/delay.h>
76 #include <linux/of_platform.h>
78 #include <asm/mpc52xx.h>
79 #include <asm/mpc512x.h>
80 #include <asm/mpc52xx_psc.h>
82 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
86 #include <linux/serial_core.h>
89 /* We've been assigned a range on the "Low-density serial ports" major */
90 #define SERIAL_PSC_MAJOR 204
91 #define SERIAL_PSC_MINOR 148
94 #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
97 static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
98 /* Rem: - We use the read_status_mask as a shadow of
99 * psc->mpc52xx_psc_imr
100 * - It's important that is array is all zero on start as we
101 * use it to know if it's initialized or not ! If it's not sure
102 * it's cleared, then a memset(...,0,...) should be added to
106 /* lookup table for matching device nodes to index numbers */
107 static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
109 static void mpc52xx_uart_of_enumerate(void);
112 #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
115 /* Forward declaration of the interruption handling routine */
116 static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
119 /* Simple macro to test if a port is console or not. This one is taken
120 * for serial_core.c and maybe should be moved to serial_core.h ? */
121 #ifdef CONFIG_SERIAL_CORE_CONSOLE
122 #define uart_console(port) \
123 ((port)->cons && (port)->cons->index == (port)->line)
125 #define uart_console(port) (0)
128 /* ======================================================================== */
129 /* PSC fifo operations for isolating differences between 52xx and 512x */
130 /* ======================================================================== */
133 void (*fifo_init)(struct uart_port *port);
134 int (*raw_rx_rdy)(struct uart_port *port);
135 int (*raw_tx_rdy)(struct uart_port *port);
136 int (*rx_rdy)(struct uart_port *port);
137 int (*tx_rdy)(struct uart_port *port);
138 int (*tx_empty)(struct uart_port *port);
139 void (*stop_rx)(struct uart_port *port);
140 void (*start_tx)(struct uart_port *port);
141 void (*stop_tx)(struct uart_port *port);
142 void (*rx_clr_irq)(struct uart_port *port);
143 void (*tx_clr_irq)(struct uart_port *port);
144 void (*write_char)(struct uart_port *port, unsigned char c);
145 unsigned char (*read_char)(struct uart_port *port);
146 void (*cw_disable_ints)(struct uart_port *port);
147 void (*cw_restore_ints)(struct uart_port *port);
148 unsigned long (*getuartclk)(void *p);
151 #ifdef CONFIG_PPC_MPC52xx
152 #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
153 static void mpc52xx_psc_fifo_init(struct uart_port *port)
155 struct mpc52xx_psc __iomem *psc = PSC(port);
156 struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
159 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
161 out_8(&fifo->rfcntl, 0x00);
162 out_be16(&fifo->rfalarm, 0x1ff);
163 out_8(&fifo->tfcntl, 0x07);
164 out_be16(&fifo->tfalarm, 0x80);
166 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
167 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
170 static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
172 return in_be16(&PSC(port)->mpc52xx_psc_status)
173 & MPC52xx_PSC_SR_RXRDY;
176 static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
178 return in_be16(&PSC(port)->mpc52xx_psc_status)
179 & MPC52xx_PSC_SR_TXRDY;
183 static int mpc52xx_psc_rx_rdy(struct uart_port *port)
185 return in_be16(&PSC(port)->mpc52xx_psc_isr)
186 & port->read_status_mask
187 & MPC52xx_PSC_IMR_RXRDY;
190 static int mpc52xx_psc_tx_rdy(struct uart_port *port)
192 return in_be16(&PSC(port)->mpc52xx_psc_isr)
193 & port->read_status_mask
194 & MPC52xx_PSC_IMR_TXRDY;
197 static int mpc52xx_psc_tx_empty(struct uart_port *port)
199 return in_be16(&PSC(port)->mpc52xx_psc_status)
200 & MPC52xx_PSC_SR_TXEMP;
203 static void mpc52xx_psc_start_tx(struct uart_port *port)
205 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
206 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
209 static void mpc52xx_psc_stop_tx(struct uart_port *port)
211 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
212 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
215 static void mpc52xx_psc_stop_rx(struct uart_port *port)
217 port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
218 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
221 static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
225 static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
229 static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
231 out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
234 static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
236 return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
239 static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
241 out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
244 static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
246 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
249 /* Search for bus-frequency property in this node or a parent */
250 static unsigned long mpc52xx_getuartclk(void *p)
253 * 5200 UARTs have a / 32 prescaler
254 * but the generic serial code assumes 16
255 * so return ipb freq / 2
257 return mpc52xx_find_ipb_freq(p) / 2;
260 static struct psc_ops mpc52xx_psc_ops = {
261 .fifo_init = mpc52xx_psc_fifo_init,
262 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
263 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
264 .rx_rdy = mpc52xx_psc_rx_rdy,
265 .tx_rdy = mpc52xx_psc_tx_rdy,
266 .tx_empty = mpc52xx_psc_tx_empty,
267 .stop_rx = mpc52xx_psc_stop_rx,
268 .start_tx = mpc52xx_psc_start_tx,
269 .stop_tx = mpc52xx_psc_stop_tx,
270 .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
271 .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
272 .write_char = mpc52xx_psc_write_char,
273 .read_char = mpc52xx_psc_read_char,
274 .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
275 .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
276 .getuartclk = mpc52xx_getuartclk,
279 #endif /* CONFIG_MPC52xx */
281 #ifdef CONFIG_PPC_MPC512x
282 #define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
283 static void mpc512x_psc_fifo_init(struct uart_port *port)
285 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
286 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
287 out_be32(&FIFO_512x(port)->txalarm, 1);
288 out_be32(&FIFO_512x(port)->tximr, 0);
290 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
291 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
292 out_be32(&FIFO_512x(port)->rxalarm, 1);
293 out_be32(&FIFO_512x(port)->rximr, 0);
295 out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
296 out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
299 static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
301 return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
304 static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
306 return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
309 static int mpc512x_psc_rx_rdy(struct uart_port *port)
311 return in_be32(&FIFO_512x(port)->rxsr)
312 & in_be32(&FIFO_512x(port)->rximr)
313 & MPC512x_PSC_FIFO_ALARM;
316 static int mpc512x_psc_tx_rdy(struct uart_port *port)
318 return in_be32(&FIFO_512x(port)->txsr)
319 & in_be32(&FIFO_512x(port)->tximr)
320 & MPC512x_PSC_FIFO_ALARM;
323 static int mpc512x_psc_tx_empty(struct uart_port *port)
325 return in_be32(&FIFO_512x(port)->txsr)
326 & MPC512x_PSC_FIFO_EMPTY;
329 static void mpc512x_psc_stop_rx(struct uart_port *port)
331 unsigned long rx_fifo_imr;
333 rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
334 rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
335 out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
338 static void mpc512x_psc_start_tx(struct uart_port *port)
340 unsigned long tx_fifo_imr;
342 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
343 tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
344 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
347 static void mpc512x_psc_stop_tx(struct uart_port *port)
349 unsigned long tx_fifo_imr;
351 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
352 tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
353 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
356 static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
358 out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
361 static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
363 out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
366 static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
368 out_8(&FIFO_512x(port)->txdata_8, c);
371 static unsigned char mpc512x_psc_read_char(struct uart_port *port)
373 return in_8(&FIFO_512x(port)->rxdata_8);
376 static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
378 port->read_status_mask =
379 in_be32(&FIFO_512x(port)->tximr) << 16 |
380 in_be32(&FIFO_512x(port)->rximr);
381 out_be32(&FIFO_512x(port)->tximr, 0);
382 out_be32(&FIFO_512x(port)->rximr, 0);
385 static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
387 out_be32(&FIFO_512x(port)->tximr,
388 (port->read_status_mask >> 16) & 0x7f);
389 out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
392 static unsigned long mpc512x_getuartclk(void *p)
394 return mpc512x_find_ips_freq(p);
397 static struct psc_ops mpc512x_psc_ops = {
398 .fifo_init = mpc512x_psc_fifo_init,
399 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
400 .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
401 .rx_rdy = mpc512x_psc_rx_rdy,
402 .tx_rdy = mpc512x_psc_tx_rdy,
403 .tx_empty = mpc512x_psc_tx_empty,
404 .stop_rx = mpc512x_psc_stop_rx,
405 .start_tx = mpc512x_psc_start_tx,
406 .stop_tx = mpc512x_psc_stop_tx,
407 .rx_clr_irq = mpc512x_psc_rx_clr_irq,
408 .tx_clr_irq = mpc512x_psc_tx_clr_irq,
409 .write_char = mpc512x_psc_write_char,
410 .read_char = mpc512x_psc_read_char,
411 .cw_disable_ints = mpc512x_psc_cw_disable_ints,
412 .cw_restore_ints = mpc512x_psc_cw_restore_ints,
413 .getuartclk = mpc512x_getuartclk,
417 static struct psc_ops *psc_ops;
419 /* ======================================================================== */
420 /* UART operations */
421 /* ======================================================================== */
424 mpc52xx_uart_tx_empty(struct uart_port *port)
426 return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
430 mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
432 /* Not implemented */
436 mpc52xx_uart_get_mctrl(struct uart_port *port)
438 /* Not implemented */
439 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
443 mpc52xx_uart_stop_tx(struct uart_port *port)
445 /* port->lock taken by caller */
446 psc_ops->stop_tx(port);
450 mpc52xx_uart_start_tx(struct uart_port *port)
452 /* port->lock taken by caller */
453 psc_ops->start_tx(port);
457 mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
460 spin_lock_irqsave(&port->lock, flags);
464 /* Make sure tx interrupts are on */
465 /* Truly necessary ??? They should be anyway */
466 psc_ops->start_tx(port);
469 spin_unlock_irqrestore(&port->lock, flags);
473 mpc52xx_uart_stop_rx(struct uart_port *port)
475 /* port->lock taken by caller */
476 psc_ops->stop_rx(port);
480 mpc52xx_uart_enable_ms(struct uart_port *port)
482 /* Not implemented */
486 mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
489 spin_lock_irqsave(&port->lock, flags);
492 out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
494 out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
496 spin_unlock_irqrestore(&port->lock, flags);
500 mpc52xx_uart_startup(struct uart_port *port)
502 struct mpc52xx_psc __iomem *psc = PSC(port);
506 ret = request_irq(port->irq, mpc52xx_uart_int,
507 IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
508 "mpc52xx_psc_uart", port);
512 /* Reset/activate the port, clear and enable interrupts */
513 out_8(&psc->command, MPC52xx_PSC_RST_RX);
514 out_8(&psc->command, MPC52xx_PSC_RST_TX);
516 out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
518 psc_ops->fifo_init(port);
520 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
521 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
527 mpc52xx_uart_shutdown(struct uart_port *port)
529 struct mpc52xx_psc __iomem *psc = PSC(port);
531 /* Shut down the port. Leave TX active if on a console port */
532 out_8(&psc->command, MPC52xx_PSC_RST_RX);
533 if (!uart_console(port))
534 out_8(&psc->command, MPC52xx_PSC_RST_TX);
536 port->read_status_mask = 0;
537 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
539 /* Release interrupt */
540 free_irq(port->irq, port);
544 mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
545 struct ktermios *old)
547 struct mpc52xx_psc __iomem *psc = PSC(port);
549 unsigned char mr1, mr2;
551 unsigned int j, baud, quot;
553 /* Prepare what we're gonna write */
556 switch (new->c_cflag & CSIZE) {
557 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
559 case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
561 case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
564 default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
567 if (new->c_cflag & PARENB) {
568 mr1 |= (new->c_cflag & PARODD) ?
569 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
571 mr1 |= MPC52xx_PSC_MODE_PARNONE;
576 if (new->c_cflag & CSTOPB)
577 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
579 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
580 MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
581 MPC52xx_PSC_MODE_ONE_STOP;
584 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
585 quot = uart_get_divisor(port, baud);
589 spin_lock_irqsave(&port->lock, flags);
591 /* Update the per-port timeout */
592 uart_update_timeout(port, new->c_cflag, baud);
594 /* Do our best to flush TX & RX, so we don't loose anything */
595 /* But we don't wait indefinitly ! */
596 j = 5000000; /* Maximum wait */
597 /* FIXME Can't receive chars since set_termios might be called at early
598 * boot for the console, all stuff is not yet ready to receive at that
599 * time and that just makes the kernel oops */
600 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
601 while (!mpc52xx_uart_tx_empty(port) && --j)
605 printk(KERN_ERR "mpc52xx_uart.c: "
606 "Unable to flush RX & TX fifos in-time in set_termios."
607 "Some chars may have been lost.\n");
609 /* Reset the TX & RX */
610 out_8(&psc->command, MPC52xx_PSC_RST_RX);
611 out_8(&psc->command, MPC52xx_PSC_RST_TX);
613 /* Send new mode settings */
614 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
615 out_8(&psc->mode, mr1);
616 out_8(&psc->mode, mr2);
617 out_8(&psc->ctur, ctr >> 8);
618 out_8(&psc->ctlr, ctr & 0xff);
620 /* Reenable TX & RX */
621 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
622 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
624 /* We're all set, release the lock */
625 spin_unlock_irqrestore(&port->lock, flags);
629 mpc52xx_uart_type(struct uart_port *port)
631 return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
635 mpc52xx_uart_release_port(struct uart_port *port)
637 /* remapped by us ? */
638 if (port->flags & UPF_IOREMAP) {
639 iounmap(port->membase);
640 port->membase = NULL;
643 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
647 mpc52xx_uart_request_port(struct uart_port *port)
651 if (port->flags & UPF_IOREMAP) /* Need to remap ? */
652 port->membase = ioremap(port->mapbase,
653 sizeof(struct mpc52xx_psc));
658 err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
659 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
661 if (err && (port->flags & UPF_IOREMAP)) {
662 iounmap(port->membase);
663 port->membase = NULL;
670 mpc52xx_uart_config_port(struct uart_port *port, int flags)
672 if ((flags & UART_CONFIG_TYPE)
673 && (mpc52xx_uart_request_port(port) == 0))
674 port->type = PORT_MPC52xx;
678 mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
680 if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
683 if ((ser->irq != port->irq) ||
684 (ser->io_type != SERIAL_IO_MEM) ||
685 (ser->baud_base != port->uartclk) ||
686 (ser->iomem_base != (void *)port->mapbase) ||
694 static struct uart_ops mpc52xx_uart_ops = {
695 .tx_empty = mpc52xx_uart_tx_empty,
696 .set_mctrl = mpc52xx_uart_set_mctrl,
697 .get_mctrl = mpc52xx_uart_get_mctrl,
698 .stop_tx = mpc52xx_uart_stop_tx,
699 .start_tx = mpc52xx_uart_start_tx,
700 .send_xchar = mpc52xx_uart_send_xchar,
701 .stop_rx = mpc52xx_uart_stop_rx,
702 .enable_ms = mpc52xx_uart_enable_ms,
703 .break_ctl = mpc52xx_uart_break_ctl,
704 .startup = mpc52xx_uart_startup,
705 .shutdown = mpc52xx_uart_shutdown,
706 .set_termios = mpc52xx_uart_set_termios,
707 /* .pm = mpc52xx_uart_pm, Not supported yet */
708 /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
709 .type = mpc52xx_uart_type,
710 .release_port = mpc52xx_uart_release_port,
711 .request_port = mpc52xx_uart_request_port,
712 .config_port = mpc52xx_uart_config_port,
713 .verify_port = mpc52xx_uart_verify_port
717 /* ======================================================================== */
718 /* Interrupt handling */
719 /* ======================================================================== */
722 mpc52xx_uart_int_rx_chars(struct uart_port *port)
724 struct tty_struct *tty = port->info->port.tty;
725 unsigned char ch, flag;
726 unsigned short status;
728 /* While we can read, do so ! */
729 while (psc_ops->raw_rx_rdy(port)) {
731 ch = psc_ops->read_char(port);
733 /* Handle sysreq char */
735 if (uart_handle_sysrq_char(port, ch)) {
746 status = in_be16(&PSC(port)->mpc52xx_psc_status);
748 if (status & (MPC52xx_PSC_SR_PE |
750 MPC52xx_PSC_SR_RB)) {
752 if (status & MPC52xx_PSC_SR_RB) {
754 uart_handle_break(port);
755 } else if (status & MPC52xx_PSC_SR_PE)
757 else if (status & MPC52xx_PSC_SR_FE)
760 /* Clear error condition */
761 out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
764 tty_insert_flip_char(tty, ch, flag);
765 if (status & MPC52xx_PSC_SR_OE) {
767 * Overrun is special, since it's
768 * reported immediately, and doesn't
769 * affect the current character
771 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
775 spin_unlock(&port->lock);
776 tty_flip_buffer_push(tty);
777 spin_lock(&port->lock);
779 return psc_ops->raw_rx_rdy(port);
783 mpc52xx_uart_int_tx_chars(struct uart_port *port)
785 struct circ_buf *xmit = &port->info->xmit;
787 /* Process out of band chars */
789 psc_ops->write_char(port, port->x_char);
795 /* Nothing to do ? */
796 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
797 mpc52xx_uart_stop_tx(port);
802 while (psc_ops->raw_tx_rdy(port)) {
803 psc_ops->write_char(port, xmit->buf[xmit->tail]);
804 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
806 if (uart_circ_empty(xmit))
811 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
812 uart_write_wakeup(port);
814 /* Maybe we're done after all */
815 if (uart_circ_empty(xmit)) {
816 mpc52xx_uart_stop_tx(port);
824 mpc52xx_uart_int(int irq, void *dev_id)
826 struct uart_port *port = dev_id;
827 unsigned long pass = ISR_PASS_LIMIT;
828 unsigned int keepgoing;
830 spin_lock(&port->lock);
832 /* While we have stuff to do, we continue */
834 /* If we don't find anything to do, we stop */
837 psc_ops->rx_clr_irq(port);
838 if (psc_ops->rx_rdy(port))
839 keepgoing |= mpc52xx_uart_int_rx_chars(port);
841 psc_ops->tx_clr_irq(port);
842 if (psc_ops->tx_rdy(port))
843 keepgoing |= mpc52xx_uart_int_tx_chars(port);
845 /* Limit number of iteration */
851 spin_unlock(&port->lock);
857 /* ======================================================================== */
858 /* Console ( if applicable ) */
859 /* ======================================================================== */
861 #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
864 mpc52xx_console_get_options(struct uart_port *port,
865 int *baud, int *parity, int *bits, int *flow)
867 struct mpc52xx_psc __iomem *psc = PSC(port);
870 pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
872 /* Read the mode registers */
873 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
874 mr1 = in_8(&psc->mode);
876 /* CT{U,L}R are write-only ! */
877 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
880 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
881 case MPC52xx_PSC_MODE_5_BITS:
884 case MPC52xx_PSC_MODE_6_BITS:
887 case MPC52xx_PSC_MODE_7_BITS:
890 case MPC52xx_PSC_MODE_8_BITS:
895 if (mr1 & MPC52xx_PSC_MODE_PARNONE)
898 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
902 mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
904 struct uart_port *port = &mpc52xx_uart_ports[co->index];
907 /* Disable interrupts */
908 psc_ops->cw_disable_ints(port);
910 /* Wait the TX buffer to be empty */
911 j = 5000000; /* Maximum wait */
912 while (!mpc52xx_uart_tx_empty(port) && --j)
915 /* Write all the chars */
916 for (i = 0; i < count; i++, s++) {
917 /* Line return handling */
919 psc_ops->write_char(port, '\r');
922 psc_ops->write_char(port, *s);
924 /* Wait the TX buffer to be empty */
925 j = 20000; /* Maximum wait */
926 while (!mpc52xx_uart_tx_empty(port) && --j)
930 /* Restore interrupt state */
931 psc_ops->cw_restore_ints(port);
936 mpc52xx_console_setup(struct console *co, char *options)
938 struct uart_port *port = &mpc52xx_uart_ports[co->index];
939 struct device_node *np = mpc52xx_uart_nodes[co->index];
940 unsigned int uartclk;
944 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
949 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
950 co, co->index, options);
952 if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
953 pr_debug("PSC%x out of range\n", co->index);
958 pr_debug("PSC%x not found in device tree\n", co->index);
962 pr_debug("Console on ttyPSC%x is %s\n",
963 co->index, mpc52xx_uart_nodes[co->index]->full_name);
965 /* Fetch register locations */
966 ret = of_address_to_resource(np, 0, &res);
968 pr_debug("Could not get resources for PSC%x\n", co->index);
972 uartclk = psc_ops->getuartclk(np);
974 pr_debug("Could not find uart clock frequency!\n");
978 /* Basic port init. Needed since we use some uart_??? func before
979 * real init for early access */
980 spin_lock_init(&port->lock);
981 port->uartclk = uartclk;
982 port->ops = &mpc52xx_uart_ops;
983 port->mapbase = res.start;
984 port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
985 port->irq = irq_of_parse_and_map(np, 0);
987 if (port->membase == NULL)
990 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
991 (void *)port->mapbase, port->membase,
992 port->irq, port->uartclk);
994 /* Setup the port parameters accoding to options */
996 uart_parse_options(options, &baud, &parity, &bits, &flow);
998 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
1000 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
1001 baud, bits, parity, flow);
1003 return uart_set_options(port, co, baud, parity, bits, flow);
1007 static struct uart_driver mpc52xx_uart_driver;
1009 static struct console mpc52xx_console = {
1011 .write = mpc52xx_console_write,
1012 .device = uart_console_device,
1013 .setup = mpc52xx_console_setup,
1014 .flags = CON_PRINTBUFFER,
1015 .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
1016 .data = &mpc52xx_uart_driver,
1021 mpc52xx_console_init(void)
1023 mpc52xx_uart_of_enumerate();
1024 register_console(&mpc52xx_console);
1028 console_initcall(mpc52xx_console_init);
1030 #define MPC52xx_PSC_CONSOLE &mpc52xx_console
1032 #define MPC52xx_PSC_CONSOLE NULL
1036 /* ======================================================================== */
1038 /* ======================================================================== */
1040 static struct uart_driver mpc52xx_uart_driver = {
1041 .driver_name = "mpc52xx_psc_uart",
1042 .dev_name = "ttyPSC",
1043 .major = SERIAL_PSC_MAJOR,
1044 .minor = SERIAL_PSC_MINOR,
1045 .nr = MPC52xx_PSC_MAXNUM,
1046 .cons = MPC52xx_PSC_CONSOLE,
1049 /* ======================================================================== */
1050 /* OF Platform Driver */
1051 /* ======================================================================== */
1053 static struct of_device_id mpc52xx_uart_of_match[] = {
1054 #ifdef CONFIG_PPC_MPC52xx
1055 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1056 /* binding used by old lite5200 device trees: */
1057 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1058 /* binding used by efika: */
1059 { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
1061 #ifdef CONFIG_PPC_MPC512x
1062 { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
1067 static int __devinit
1068 mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
1071 unsigned int uartclk;
1072 struct uart_port *port = NULL;
1073 struct resource res;
1076 dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
1078 /* Check validity & presence */
1079 for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
1080 if (mpc52xx_uart_nodes[idx] == op->node)
1082 if (idx >= MPC52xx_PSC_MAXNUM)
1084 pr_debug("Found %s assigned to ttyPSC%x\n",
1085 mpc52xx_uart_nodes[idx]->full_name, idx);
1087 uartclk = psc_ops->getuartclk(op->node);
1089 dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
1093 /* Init the port structure */
1094 port = &mpc52xx_uart_ports[idx];
1096 spin_lock_init(&port->lock);
1097 port->uartclk = uartclk;
1098 port->fifosize = 512;
1099 port->iotype = UPIO_MEM;
1100 port->flags = UPF_BOOT_AUTOCONF |
1101 (uart_console(port) ? 0 : UPF_IOREMAP);
1103 port->ops = &mpc52xx_uart_ops;
1104 port->dev = &op->dev;
1106 /* Search for IRQ and mapbase */
1107 ret = of_address_to_resource(op->node, 0, &res);
1111 port->mapbase = res.start;
1112 port->irq = irq_of_parse_and_map(op->node, 0);
1114 dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
1115 (void *)port->mapbase, port->irq, port->uartclk);
1117 if ((port->irq == NO_IRQ) || !port->mapbase) {
1118 printk(KERN_ERR "Could not allocate resources for PSC\n");
1122 /* Add the port to the uart sub-system */
1123 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1125 dev_set_drvdata(&op->dev, (void *)port);
1131 mpc52xx_uart_of_remove(struct of_device *op)
1133 struct uart_port *port = dev_get_drvdata(&op->dev);
1134 dev_set_drvdata(&op->dev, NULL);
1137 uart_remove_one_port(&mpc52xx_uart_driver, port);
1138 irq_dispose_mapping(port->irq);
1146 mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
1148 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1151 uart_suspend_port(&mpc52xx_uart_driver, port);
1157 mpc52xx_uart_of_resume(struct of_device *op)
1159 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1162 uart_resume_port(&mpc52xx_uart_driver, port);
1169 mpc52xx_uart_of_assign(struct device_node *np, int idx)
1174 /* Find the first free node */
1175 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1176 if (mpc52xx_uart_nodes[i] == NULL) {
1182 if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
1186 return; /* No free slot; abort */
1189 /* If the slot is already occupied, then swap slots */
1190 if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
1191 mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
1192 mpc52xx_uart_nodes[idx] = np;
1196 mpc52xx_uart_of_enumerate(void)
1198 static int enum_done;
1199 struct device_node *np;
1200 const unsigned int *devno;
1201 const struct of_device_id *match;
1207 for_each_node_by_type(np, "serial") {
1208 match = of_match_node(mpc52xx_uart_of_match, np);
1212 psc_ops = match->data;
1214 /* Is a particular device number requested? */
1215 devno = of_get_property(np, "port-number", NULL);
1216 mpc52xx_uart_of_assign(np, devno ? *devno : -1);
1221 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1222 if (mpc52xx_uart_nodes[i])
1223 pr_debug("%s assigned to ttyPSC%x\n",
1224 mpc52xx_uart_nodes[i]->full_name, i);
1228 MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
1230 static struct of_platform_driver mpc52xx_uart_of_driver = {
1231 .match_table = mpc52xx_uart_of_match,
1232 .probe = mpc52xx_uart_of_probe,
1233 .remove = mpc52xx_uart_of_remove,
1235 .suspend = mpc52xx_uart_of_suspend,
1236 .resume = mpc52xx_uart_of_resume,
1239 .name = "mpc52xx-psc-uart",
1244 /* ======================================================================== */
1246 /* ======================================================================== */
1249 mpc52xx_uart_init(void)
1253 printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
1255 ret = uart_register_driver(&mpc52xx_uart_driver);
1257 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
1262 mpc52xx_uart_of_enumerate();
1264 ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
1266 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
1268 uart_unregister_driver(&mpc52xx_uart_driver);
1276 mpc52xx_uart_exit(void)
1278 of_unregister_platform_driver(&mpc52xx_uart_of_driver);
1279 uart_unregister_driver(&mpc52xx_uart_driver);
1283 module_init(mpc52xx_uart_init);
1284 module_exit(mpc52xx_uart_exit);
1286 MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
1287 MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
1288 MODULE_LICENSE("GPL");