2 * arch/ppc/platforms/pmac_feature.c
4 * Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au)
5 * Ben. Herrenschmidt (benh@kernel.crashing.org)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
14 * - Replace mdelay with some schedule loop if possible
15 * - Shorten some obfuscated delays on some routines (like modem
17 * - Refcount some clocks (see darwin)
18 * - Split split split...
21 #include <linux/config.h>
22 #include <linux/types.h>
23 #include <linux/init.h>
24 #include <linux/delay.h>
25 #include <linux/kernel.h>
26 #include <linux/sched.h>
27 #include <linux/spinlock.h>
28 #include <linux/adb.h>
29 #include <linux/pmu.h>
30 #include <linux/ioport.h>
31 #include <linux/pci.h>
32 #include <asm/sections.h>
33 #include <asm/errno.h>
34 #include <asm/keylargo.h>
35 #include <asm/uninorth.h>
38 #include <asm/machdep.h>
39 #include <asm/pmac_feature.h>
40 #include <asm/dbdma.h>
41 #include <asm/pci-bridge.h>
42 #include <asm/pmac_low_i2c.h>
47 #define DBG(fmt...) printk(KERN_DEBUG fmt)
53 * We use a single global lock to protect accesses. Each driver has
54 * to take care of its own locking
56 static DEFINE_SPINLOCK(feature_lock __pmacdata);
58 #define LOCK(flags) spin_lock_irqsave(&feature_lock, flags);
59 #define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags);
63 * Instance of some macio stuffs
65 struct macio_chip macio_chips[MAX_MACIO_CHIPS] __pmacdata;
67 struct macio_chip* __pmac
68 macio_find(struct device_node* child, int type)
73 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
74 if (child == macio_chips[i].of_node &&
75 (!type || macio_chips[i].type == type))
76 return &macio_chips[i];
77 child = child->parent;
82 static const char* macio_names[] __pmacdata =
100 * Uninorth reg. access. Note that Uni-N regs are big endian
103 #define UN_REG(r) (uninorth_base + ((r) >> 2))
104 #define UN_IN(r) (in_be32(UN_REG(r)))
105 #define UN_OUT(r,v) (out_be32(UN_REG(r), (v)))
106 #define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v)))
107 #define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
109 static struct device_node* uninorth_node __pmacdata;
110 static u32* uninorth_base __pmacdata;
111 static u32 uninorth_rev __pmacdata;
114 extern struct device_node *k2_skiplist[2];
117 * For each motherboard family, we have a table of functions pointers
118 * that handle the various features.
121 typedef long (*feature_call)(struct device_node* node, long param, long value);
123 struct feature_table_entry {
124 unsigned int selector;
125 feature_call function;
130 const char* model_string;
131 const char* model_name;
133 struct feature_table_entry* features;
134 unsigned long board_flags;
136 static struct pmac_mb_def pmac_mb __pmacdata;
139 * Here are the chip specific feature functions
143 static long __pmac g5_read_gpio(struct device_node* node, long param, long value)
145 struct macio_chip* macio = &macio_chips[0];
147 return MACIO_IN8(param);
151 static long __pmac g5_write_gpio(struct device_node* node, long param, long value)
153 struct macio_chip* macio = &macio_chips[0];
155 MACIO_OUT8(param, (u8)(value & 0xff));
159 static long __pmac g5_gmac_enable(struct device_node* node, long param, long value)
161 struct macio_chip* macio = &macio_chips[0];
169 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
171 k2_skiplist[0] = NULL;
173 k2_skiplist[0] = node;
175 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
184 static long __pmac g5_fw_enable(struct device_node* node, long param, long value)
186 struct macio_chip* macio = &macio_chips[0];
194 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
196 k2_skiplist[1] = NULL;
198 k2_skiplist[1] = node;
200 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
209 static long __pmac g5_mpic_enable(struct device_node* node, long param, long value)
213 if (node->parent == NULL || strcmp(node->parent->name, "u3"))
217 UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE);
223 static long __pmac g5_eth_phy_reset(struct device_node* node, long param, long value)
225 struct macio_chip* macio = &macio_chips[0];
226 struct device_node *phy;
230 * We must not reset the combo PHYs, only the BCM5221 found in
233 phy = of_get_next_child(node, NULL);
236 need_reset = device_is_compatible(phy, "B5221");
241 /* PHY reset is GPIO 29, not in device-tree unfortunately */
242 MACIO_OUT8(K2_GPIO_EXTINT_0 + 29,
243 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
244 /* Thankfully, this is now always called at a time when we can
245 * schedule by sungem.
248 MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 0);
254 static long __pmac g5_reset_cpu(struct device_node* node, long param, long value)
256 unsigned int reset_io = 0;
258 struct macio_chip* macio;
259 struct device_node* np;
261 macio = &macio_chips[0];
262 if (macio->type != macio_keylargo2)
265 np = find_path_device("/cpus");
268 for (np = np->child; np != NULL; np = np->sibling) {
269 u32* num = (u32 *)get_property(np, "reg", NULL);
270 u32* rst = (u32 *)get_property(np, "soft-reset", NULL);
271 if (num == NULL || rst == NULL)
278 if (np == NULL || reset_io == 0)
282 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
283 (void)MACIO_IN8(reset_io);
285 MACIO_OUT8(reset_io, 0);
286 (void)MACIO_IN8(reset_io);
291 #endif /* CONFIG_SMP */
294 * This can be called from pmac_smp so isn't static
296 * This takes the second CPU off the bus on dual CPU machines
299 void __pmac g5_phy_disable_cpu1(void)
301 UN_OUT(U3_API_PHY_CONFIG_1, 0);
304 static long __pmac generic_get_mb_info(struct device_node* node, long param, long value)
307 case PMAC_MB_INFO_MODEL:
308 return pmac_mb.model_id;
309 case PMAC_MB_INFO_FLAGS:
310 return pmac_mb.board_flags;
311 case PMAC_MB_INFO_NAME:
312 /* hack hack hack... but should work */
313 *((const char **)value) = pmac_mb.model_name;
324 /* Used on any machine
326 static struct feature_table_entry any_features[] __pmacdata = {
327 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info },
333 static struct feature_table_entry g5_features[] __pmacdata = {
334 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable },
335 { PMAC_FTR_1394_ENABLE, g5_fw_enable },
336 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable },
337 { PMAC_FTR_READ_GPIO, g5_read_gpio },
338 { PMAC_FTR_WRITE_GPIO, g5_write_gpio },
339 { PMAC_FTR_GMAC_PHY_RESET, g5_eth_phy_reset },
341 { PMAC_FTR_RESET_CPU, g5_reset_cpu },
342 #endif /* CONFIG_SMP */
346 static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
347 { "PowerMac7,2", "PowerMac G5",
348 PMAC_TYPE_POWERMAC_G5, g5_features,
351 { "PowerMac7,3", "PowerMac G5",
352 PMAC_TYPE_POWERMAC_G5, g5_features,
355 { "PowerMac8,1", "iMac G5",
356 PMAC_TYPE_IMAC_G5, g5_features,
359 { "PowerMac9,1", "PowerMac G5",
360 PMAC_TYPE_POWERMAC_G5_U3L, g5_features,
363 { "RackMac3,1", "XServe G5",
364 PMAC_TYPE_XSERVE_G5, g5_features,
370 * The toplevel feature_call callback
372 long __pmac pmac_do_feature_call(unsigned int selector, ...)
374 struct device_node* node;
377 feature_call func = NULL;
380 if (pmac_mb.features)
381 for (i=0; pmac_mb.features[i].function; i++)
382 if (pmac_mb.features[i].selector == selector) {
383 func = pmac_mb.features[i].function;
387 for (i=0; any_features[i].function; i++)
388 if (any_features[i].selector == selector) {
389 func = any_features[i].function;
395 va_start(args, selector);
396 node = (struct device_node*)va_arg(args, void*);
397 param = va_arg(args, long);
398 value = va_arg(args, long);
401 return func(node, param, value);
404 static int __init probe_motherboard(void)
407 struct macio_chip* macio = &macio_chips[0];
408 const char* model = NULL;
409 struct device_node *dt;
411 /* Lookup known motherboard type in device-tree. First try an
412 * exact match on the "model" property, then try a "compatible"
413 * match is none is found.
415 dt = find_devices("device-tree");
417 model = (const char *) get_property(dt, "model", NULL);
418 for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
419 if (strcmp(model, pmac_mb_defs[i].model_string) == 0) {
420 pmac_mb = pmac_mb_defs[i];
424 for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
425 if (machine_is_compatible(pmac_mb_defs[i].model_string)) {
426 pmac_mb = pmac_mb_defs[i];
431 /* Fallback to selection depending on mac-io chip type */
432 switch(macio->type) {
433 case macio_keylargo2:
434 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2;
435 pmac_mb.model_name = "Unknown K2-based";
436 pmac_mb.features = g5_features;
442 /* Check for "mobile" machine */
443 if (model && (strncmp(model, "PowerBook", 9) == 0
444 || strncmp(model, "iBook", 5) == 0))
445 pmac_mb.board_flags |= PMAC_MB_MOBILE;
448 printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
452 /* Initialize the Core99 UniNorth host bridge and memory controller
454 static void __init probe_uninorth(void)
456 uninorth_node = of_find_node_by_name(NULL, "u3");
457 if (uninorth_node && uninorth_node->n_addrs > 0) {
458 /* Small hack until I figure out if parsing in prom.c is correct. I should
459 * get rid of those pre-parsed junk anyway
461 unsigned long address = uninorth_node->addrs[0].address;
462 uninorth_base = ioremap(address, 0x40000);
463 uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
464 u3_ht = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);
466 uninorth_node = NULL;
471 printk(KERN_INFO "Found U3 memory controller & host bridge, revision: %d\n",
473 printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base);
477 static void __init probe_one_macio(const char* name, const char* compat, int type)
479 struct device_node* node;
484 node = find_devices(name);
485 if (!node || !node->n_addrs)
489 if (device_is_compatible(node, compat))
495 for(i=0; i<MAX_MACIO_CHIPS; i++) {
496 if (!macio_chips[i].of_node)
498 if (macio_chips[i].of_node == node)
501 if (i >= MAX_MACIO_CHIPS) {
502 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
503 printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name);
506 base = (volatile u32*)ioremap(node->addrs[0].address, node->addrs[0].size);
508 printk(KERN_ERR "pmac_feature: Can't map mac-io chip !\n");
511 if (type == macio_keylargo) {
512 u32* did = (u32 *)get_property(node, "device-id", NULL);
513 if (*did == 0x00000025)
515 if (*did == 0x0000003e)
516 type = macio_intrepid;
518 macio_chips[i].of_node = node;
519 macio_chips[i].type = type;
520 macio_chips[i].base = base;
521 macio_chips[i].flags = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON;
522 macio_chips[i].name = macio_names[type];
523 revp = (u32 *)get_property(node, "revision-id", NULL);
525 macio_chips[i].rev = *revp;
526 printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
527 macio_names[type], macio_chips[i].rev, macio_chips[i].base);
533 probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2);
535 macio_chips[0].lbus.index = 0;
536 macio_chips[1].lbus.index = 1;
538 return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
542 set_initial_features(void)
544 struct device_node *np;
546 if (macio_chips[0].type == macio_keylargo2) {
548 /* On SMP machines running UP, we have the second CPU eating
549 * bus cycles. We need to take it off the bus. This is done
550 * from pmac_smp for SMP kernels running on one CPU
552 np = of_find_node_by_type(NULL, "cpu");
554 np = of_find_node_by_type(np, "cpu");
556 g5_phy_disable_cpu1();
559 #endif /* CONFIG_SMP */
560 /* Enable GMAC for now for PCI probing. It will be disabled
561 * later on after PCI probe
563 np = of_find_node_by_name(NULL, "ethernet");
565 if (device_is_compatible(np, "K2-GMAC"))
566 g5_gmac_enable(np, 0, 1);
567 np = of_find_node_by_name(np, "ethernet");
570 /* Enable FW before PCI probe. Will be disabled later on
571 * Note: We should have a batter way to check that we are
572 * dealing with uninorth internal cell and not a PCI cell
573 * on the external PCI. The code below works though.
575 np = of_find_node_by_name(NULL, "firewire");
577 if (device_is_compatible(np, "pci106b,5811")) {
578 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
579 g5_fw_enable(np, 0, 1);
581 np = of_find_node_by_name(np, "firewire");
587 pmac_feature_init(void)
589 /* Detect the UniNorth memory controller */
592 /* Probe mac-io controllers */
593 if (probe_macios()) {
594 printk(KERN_WARNING "No mac-io chip found\n");
598 /* Setup low-level i2c stuffs */
601 /* Probe machine type */
602 if (probe_motherboard())
603 printk(KERN_WARNING "Unknown PowerMac !\n");
605 /* Set some initial features (turn off some chips that will
606 * be later turned on)
608 set_initial_features();
611 int __init pmac_feature_late_init(void)
614 struct device_node* np;
616 /* Request some resources late */
618 request_OF_resource(uninorth_node, 0, NULL);
619 np = find_devices("hammerhead");
621 request_OF_resource(np, 0, NULL);
622 np = find_devices("interrupt-controller");
624 request_OF_resource(np, 0, NULL);
629 device_initcall(pmac_feature_late_init);
632 static void dump_HT_speeds(char *name, u32 cfg, u32 frq)
634 int freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 };
635 int bits[8] = { 8,16,0,32,2,4,0,0 };
636 int freq = (frq >> 8) & 0xf;
638 if (freqs[freq] == 0)
639 printk("%s: Unknown HT link frequency %x\n", name, freq);
641 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n",
643 bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]);
647 void __init pmac_check_ht_link(void)
649 #if 0 /* Disabled for now */
650 u32 ufreq, freq, ucfg, cfg;
651 struct device_node *pcix_node;
653 struct pci_controller *px_hose;
655 (void)in_be32(u3_ht + U3_HT_LINK_COMMAND);
656 ucfg = cfg = in_be32(u3_ht + U3_HT_LINK_CONFIG);
657 ufreq = freq = in_be32(u3_ht + U3_HT_LINK_FREQ);
658 dump_HT_speeds("U3 HyperTransport", cfg, freq);
660 pcix_node = of_find_compatible_node(NULL, "pci", "pci-x");
661 if (pcix_node == NULL) {
662 printk("No PCI-X bridge found\n");
665 px_hose = pcix_node->phb;
666 px_bus = pcix_node->busno;
667 px_devfn = pcix_node->devfn;
669 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg);
670 early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq);
671 dump_HT_speeds("PCI-X HT Uplink", cfg, freq);
672 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg);
673 early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq);
674 dump_HT_speeds("PCI-X HT Downlink", cfg, freq);