2 * Intel CPU Microcode Update Driver for Linux
4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
7 * This driver allows to upgrade microcode on Intel processors
8 * belonging to IA-32 family - PentiumPro, Pentium II,
9 * Pentium III, Xeon, Pentium 4, etc.
11 * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
12 * Software Developer's Manual
13 * Order Number 253668 or free download from:
15 * http://developer.intel.com/design/pentium4/manuals/253668.htm
17 * For more information, go to http://www.urbanmyth.org/microcode
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
24 * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
26 * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
27 * Added read() support + cleanups.
28 * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
29 * Added 'device trimming' support. open(O_WRONLY) zeroes
30 * and frees the saved copy of applied microcode.
31 * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
32 * Made to use devfs (/dev/cpu/microcode) + cleanups.
33 * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
34 * Added misc device support (now uses both devfs and misc).
35 * Added MICROCODE_IOCFREE ioctl to clear memory.
36 * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
37 * Messages for error cases (non Intel & no suitable microcode).
38 * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
39 * Removed ->release(). Removed exclusive open and status bitmap.
40 * Added microcode_rwsem to serialize read()/write()/ioctl().
41 * Removed global kernel lock usage.
42 * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
43 * Write 0 to 0x8B msr and then cpuid before reading revision,
44 * so that it works even if there were no update done by the
45 * BIOS. Otherwise, reading from 0x8B gives junk (which happened
46 * to be 0 on my machine which is why it worked even when I
47 * disabled update by the BIOS)
48 * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
49 * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
50 * Tigran Aivazian <tigran@veritas.com>
51 * Intel Pentium 4 processor support and bugfixes.
52 * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
53 * Bugfix for HT (Hyper-Threading) enabled processors
54 * whereby processor resources are shared by all logical processors
55 * in a single CPU package.
56 * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
57 * Tigran Aivazian <tigran@veritas.com>,
58 * Serialize updates as required on HT processors due to
59 * speculative nature of implementation.
60 * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
61 * Fix the panic when writing zero-length microcode chunk.
62 * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
63 * Jun Nakajima <jun.nakajima@intel.com>
64 * Support for the microcode updates in the new format.
65 * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
66 * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
67 * because we no longer hold a copy of applied microcode
69 * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
70 * Fix sigmatch() macro to handle old CPUs with pf == 0.
71 * Thanks to Stuart Swales for pointing out this bug.
73 #include <linux/capability.h>
74 #include <linux/kernel.h>
75 #include <linux/init.h>
76 #include <linux/sched.h>
77 #include <linux/smp_lock.h>
78 #include <linux/cpumask.h>
79 #include <linux/module.h>
80 #include <linux/slab.h>
81 #include <linux/vmalloc.h>
82 #include <linux/miscdevice.h>
83 #include <linux/spinlock.h>
86 #include <linux/mutex.h>
87 #include <linux/cpu.h>
88 #include <linux/firmware.h>
89 #include <linux/platform_device.h>
92 #include <asm/uaccess.h>
93 #include <asm/processor.h>
94 #include <asm/microcode.h>
96 MODULE_DESCRIPTION("Microcode Update Driver");
97 MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
98 MODULE_LICENSE("GPL");
100 struct microcode_header_intel {
108 unsigned int datasize;
109 unsigned int totalsize;
110 unsigned int reserved[3];
113 struct microcode_intel {
114 struct microcode_header_intel hdr;
115 unsigned int bits[0];
118 /* microcode format is extended from prescott processors */
119 struct extended_signature {
125 struct extended_sigtable {
128 unsigned int reserved[3];
129 struct extended_signature sigs[0];
132 #define DEFAULT_UCODE_DATASIZE (2000)
133 #define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
134 #define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
135 #define EXT_HEADER_SIZE (sizeof(struct extended_sigtable))
136 #define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature))
137 #define DWSIZE (sizeof(u32))
138 #define get_totalsize(mc) \
139 (((struct microcode_intel *)mc)->hdr.totalsize ? \
140 ((struct microcode_intel *)mc)->hdr.totalsize : \
141 DEFAULT_UCODE_TOTALSIZE)
143 #define get_datasize(mc) \
144 (((struct microcode_intel *)mc)->hdr.datasize ? \
145 ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
147 #define sigmatch(s1, s2, p1, p2) \
148 (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
150 #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
152 /* serialize access to the physical write to MSR 0x79 */
153 static DEFINE_SPINLOCK(microcode_update_lock);
155 static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
157 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
161 memset(csig, 0, sizeof(*csig));
163 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
164 cpu_has(c, X86_FEATURE_IA64)) {
165 printk(KERN_ERR "microcode: CPU%d not a capable Intel "
166 "processor\n", cpu_num);
170 csig->sig = cpuid_eax(0x00000001);
172 if ((c->x86_model >= 5) || (c->x86 > 6)) {
173 /* get processor flags from MSR 0x17 */
174 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
175 csig->pf = 1 << ((val[1] >> 18) & 7);
178 /* serialize access to the physical write to MSR 0x79 */
179 spin_lock_irqsave(µcode_update_lock, flags);
181 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
182 /* see notes above for revision 1.07. Apparent chip bug */
184 /* get the current revision from MSR 0x8B */
185 rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev);
186 spin_unlock_irqrestore(µcode_update_lock, flags);
188 pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
189 csig->sig, csig->pf, csig->rev);
194 static inline int update_match_cpu(struct cpu_signature *csig, int sig, int pf)
196 return (!sigmatch(sig, csig->sig, pf, csig->pf)) ? 0 : 1;
200 update_match_revision(struct microcode_header_intel *mc_header, int rev)
202 return (mc_header->rev <= rev) ? 0 : 1;
205 static int microcode_sanity_check(void *mc)
207 struct microcode_header_intel *mc_header = mc;
208 struct extended_sigtable *ext_header = NULL;
209 struct extended_signature *ext_sig;
210 unsigned long total_size, data_size, ext_table_size;
211 int sum, orig_sum, ext_sigcount = 0, i;
213 total_size = get_totalsize(mc_header);
214 data_size = get_datasize(mc_header);
215 if (data_size + MC_HEADER_SIZE > total_size) {
216 printk(KERN_ERR "microcode: error! "
217 "Bad data size in microcode data file\n");
221 if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
222 printk(KERN_ERR "microcode: error! "
223 "Unknown microcode update format\n");
226 ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
227 if (ext_table_size) {
228 if ((ext_table_size < EXT_HEADER_SIZE)
229 || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
230 printk(KERN_ERR "microcode: error! "
231 "Small exttable size in microcode data file\n");
234 ext_header = mc + MC_HEADER_SIZE + data_size;
235 if (ext_table_size != exttable_size(ext_header)) {
236 printk(KERN_ERR "microcode: error! "
237 "Bad exttable size in microcode data file\n");
240 ext_sigcount = ext_header->count;
243 /* check extended table checksum */
244 if (ext_table_size) {
245 int ext_table_sum = 0;
246 int *ext_tablep = (int *)ext_header;
248 i = ext_table_size / DWSIZE;
250 ext_table_sum += ext_tablep[i];
252 printk(KERN_WARNING "microcode: aborting, "
253 "bad extended signature table checksum\n");
258 /* calculate the checksum */
260 i = (MC_HEADER_SIZE + data_size) / DWSIZE;
262 orig_sum += ((int *)mc)[i];
264 printk(KERN_ERR "microcode: aborting, bad checksum\n");
269 /* check extended signature checksum */
270 for (i = 0; i < ext_sigcount; i++) {
271 ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
272 EXT_SIGNATURE_SIZE * i;
274 - (mc_header->sig + mc_header->pf + mc_header->cksum)
275 + (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
277 printk(KERN_ERR "microcode: aborting, bad checksum\n");
285 * return 0 - no update found
286 * return 1 - found update
289 get_matching_microcode(struct cpu_signature *cpu_sig, void *mc, int rev)
291 struct microcode_header_intel *mc_header = mc;
292 struct extended_sigtable *ext_header;
293 unsigned long total_size = get_totalsize(mc_header);
295 struct extended_signature *ext_sig;
297 if (!update_match_revision(mc_header, rev))
300 if (update_match_cpu(cpu_sig, mc_header->sig, mc_header->pf))
303 /* Look for ext. headers: */
304 if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE)
307 ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE;
308 ext_sigcount = ext_header->count;
309 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
311 for (i = 0; i < ext_sigcount; i++) {
312 if (update_match_cpu(cpu_sig, ext_sig->sig, ext_sig->pf))
319 static void apply_microcode(int cpu)
323 int cpu_num = raw_smp_processor_id();
324 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
325 struct microcode_intel *mc_intel = uci->mc;
327 /* We should bind the task to the CPU */
328 BUG_ON(cpu_num != cpu);
330 if (mc_intel == NULL)
333 /* serialize access to the physical write to MSR 0x79 */
334 spin_lock_irqsave(µcode_update_lock, flags);
336 /* write microcode via MSR 0x79 */
337 wrmsr(MSR_IA32_UCODE_WRITE,
338 (unsigned long) mc_intel->bits,
339 (unsigned long) mc_intel->bits >> 16 >> 16);
340 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
342 /* see notes above for revision 1.07. Apparent chip bug */
345 /* get the current revision from MSR 0x8B */
346 rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
348 spin_unlock_irqrestore(µcode_update_lock, flags);
349 if (val[1] != mc_intel->hdr.rev) {
350 printk(KERN_ERR "microcode: CPU%d update from revision "
351 "0x%x to 0x%x failed\n", cpu_num, uci->cpu_sig.rev, val[1]);
354 printk(KERN_INFO "microcode: CPU%d updated from revision "
355 "0x%x to 0x%x, date = %04x-%02x-%02x \n",
356 cpu_num, uci->cpu_sig.rev, val[1],
357 mc_intel->hdr.date & 0xffff,
358 mc_intel->hdr.date >> 24,
359 (mc_intel->hdr.date >> 16) & 0xff);
360 uci->cpu_sig.rev = val[1];
363 static int generic_load_microcode(int cpu, void *data, size_t size,
364 int (*get_ucode_data)(void *, const void *, size_t))
366 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
367 u8 *ucode_ptr = data, *new_mc = NULL, *mc;
368 int new_rev = uci->cpu_sig.rev;
369 unsigned int leftover = size;
372 struct microcode_header_intel mc_header;
373 unsigned int mc_size;
375 if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
378 mc_size = get_totalsize(&mc_header);
379 if (!mc_size || mc_size > leftover) {
380 printk(KERN_ERR "microcode: error!"
381 "Bad data in microcode data file\n");
385 mc = vmalloc(mc_size);
389 if (get_ucode_data(mc, ucode_ptr, mc_size) ||
390 microcode_sanity_check(mc) < 0) {
395 if (get_matching_microcode(&uci->cpu_sig, mc, new_rev)) {
398 new_rev = mc_header.rev;
403 ucode_ptr += mc_size;
411 uci->mc = (struct microcode_intel *)new_mc;
412 pr_debug("microcode: CPU%d found a matching microcode update with"
413 " version 0x%x (current=0x%x)\n",
414 cpu, new_rev, uci->cpu_sig.rev);
419 return (int)leftover;
422 static int get_ucode_fw(void *to, const void *from, size_t n)
428 static int request_microcode_fw(int cpu, struct device *device)
431 struct cpuinfo_x86 *c = &cpu_data(cpu);
432 const struct firmware *firmware;
435 /* We should bind the task to the CPU */
436 BUG_ON(cpu != raw_smp_processor_id());
437 sprintf(name, "intel-ucode/%02x-%02x-%02x",
438 c->x86, c->x86_model, c->x86_mask);
439 ret = request_firmware(&firmware, name, device);
441 pr_debug("microcode: data file %s load failed\n", name);
445 ret = generic_load_microcode(cpu, (void*)firmware->data, firmware->size,
448 release_firmware(firmware);
453 static int get_ucode_user(void *to, const void *from, size_t n)
455 return copy_from_user(to, from, n);
458 static int request_microcode_user(int cpu, const void __user *buf, size_t size)
460 /* We should bind the task to the CPU */
461 BUG_ON(cpu != raw_smp_processor_id());
463 return generic_load_microcode(cpu, (void*)buf, size, &get_ucode_user);
466 static void microcode_fini_cpu(int cpu)
468 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
474 static struct microcode_ops microcode_intel_ops = {
475 .request_microcode_user = request_microcode_user,
476 .request_microcode_fw = request_microcode_fw,
477 .collect_cpu_info = collect_cpu_info,
478 .apply_microcode = apply_microcode,
479 .microcode_fini_cpu = microcode_fini_cpu,
482 struct microcode_ops * __init init_intel_microcode(void)
484 return µcode_intel_ops;