1 #ifndef _ASM_IA64_CACHE_H
2 #define _ASM_IA64_CACHE_H
4 #include <linux/config.h>
7 * Copyright (C) 1998-2000 Hewlett-Packard Co
8 * David Mosberger-Tang <davidm@hpl.hp.com>
11 /* Bytes per L1 (data) cache line. */
12 #define L1_CACHE_SHIFT CONFIG_IA64_L1_CACHE_SHIFT
13 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
15 #define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */
18 # define SMP_CACHE_SHIFT L1_CACHE_SHIFT
19 # define SMP_CACHE_BYTES L1_CACHE_BYTES
22 * The "aligned" directive can only _increase_ alignment, so this is
23 * safe and provides an easy way to avoid wasting space on a
26 # define SMP_CACHE_SHIFT 3
27 # define SMP_CACHE_BYTES (1 << 3)
30 #endif /* _ASM_IA64_CACHE_H */