2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/cache.h>
16 #include <asm/lowcore.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/asm-offsets.h>
21 #include <asm/unistd.h>
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
28 SP_PTREGS = STACK_FRAME_OVERHEAD
29 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
30 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
31 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
32 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
33 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
34 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12
35 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
36 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20
37 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
38 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28
39 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
40 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
41 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
42 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
43 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
44 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
45 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
46 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
47 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
49 SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
50 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
52 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
53 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
54 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
56 _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
57 _TIF_SECCOMP>>8 | _TIF_SYSCALL_FTRACE>>8)
59 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
60 STACK_SIZE = 1 << STACK_SHIFT
62 #define BASED(name) name-system_call(%r13)
64 #ifdef CONFIG_TRACE_IRQFLAGS
67 l %r1,BASED(.Ltrace_irq_on_caller)
73 l %r1,BASED(.Ltrace_irq_off_caller)
77 .macro TRACE_IRQS_CHECK
79 tm SP_PSW(%r15),0x03 # irqs enabled?
81 l %r1,BASED(.Ltrace_irq_on_caller)
84 0: l %r1,BASED(.Ltrace_irq_off_caller)
90 #define TRACE_IRQS_OFF
91 #define TRACE_IRQS_CHECK
95 .macro LOCKDEP_SYS_EXIT
96 tm SP_PSW+1(%r15),0x01 # returning to user ?
98 l %r1,BASED(.Llockdep_sys_exit)
103 #define LOCKDEP_SYS_EXIT
107 * Register usage in interrupt handlers:
108 * R9 - pointer to current task structure
109 * R13 - pointer to literal pool
110 * R14 - return register for function calls
111 * R15 - kernel stack pointer
114 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
115 lm %r10,%r11,\lc_from
124 1: stm %r10,%r11,\lc_sum
127 .macro SAVE_ALL_BASE savearea
128 stm %r12,%r15,\savearea
129 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
132 .macro SAVE_ALL_SVC psworg,savearea
134 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
137 .macro SAVE_ALL_SYNC psworg,savearea
139 tm \psworg+1,0x01 # test problem state bit
140 bz BASED(2f) # skip stack setup save
141 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
142 #ifdef CONFIG_CHECK_STACK
144 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
145 bz BASED(stack_overflow)
151 .macro SAVE_ALL_ASYNC psworg,savearea
153 tm \psworg+1,0x01 # test problem state bit
154 bnz BASED(1f) # from user -> load async stack
155 clc \psworg+4(4),BASED(.Lcritical_end)
157 clc \psworg+4(4),BASED(.Lcritical_start)
159 l %r14,BASED(.Lcleanup_critical)
161 tm 1(%r12),0x01 # retest problem state after cleanup
163 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
167 1: l %r15,__LC_ASYNC_STACK
168 #ifdef CONFIG_CHECK_STACK
170 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
171 bz BASED(stack_overflow)
177 .macro CREATE_STACK_FRAME psworg,savearea
178 s %r15,BASED(.Lc_spsize) # make room for registers & psw
179 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
180 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
181 icm %r12,3,__LC_SVC_ILC
182 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
183 st %r12,SP_SVCNR(%r15)
184 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
186 st %r12,__SF_BACKCHAIN(%r15) # clear back chain
189 .macro RESTORE_ALL psworg,sync
190 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore
192 ni \psworg+1,0xfd # clear wait state bit
194 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
196 lpsw \psworg # back to caller
200 * Scheduler resume function, called by switch_to
201 * gpr2 = (task_struct *) prev
202 * gpr3 = (task_struct *) next
210 tm __THREAD_per(%r3),0xe8 # new process is using per ?
211 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine
212 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff
213 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15)
214 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's
215 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't
217 l %r4,__THREAD_info(%r2) # get thread_info of prev
218 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
219 bz __switch_to_no_mcck-__switch_to_base(%r1)
220 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
221 l %r4,__THREAD_info(%r3) # get thread_info of next
222 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
224 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
225 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
226 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
227 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
228 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct
229 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
230 l %r3,__THREAD_info(%r3) # load thread_info from task struct
231 st %r3,__LC_THREAD_INFO
233 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
238 * SVC interrupt handler routine. System calls are synchronous events and
239 * are executed with interrupts enabled.
244 stpt __LC_SYNC_ENTER_TIMER
246 SAVE_ALL_BASE __LC_SAVE_AREA
247 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
248 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
249 lh %r7,0x8a # get svc number from lowcore
251 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
253 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
255 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
257 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
258 ltr %r7,%r7 # test for svc 0
259 bnz BASED(sysc_nr_ok) # svc number > 0
260 # svc 0: system call number in %r1
261 cl %r1,BASED(.Lnr_syscalls)
262 bnl BASED(sysc_nr_ok)
263 lr %r7,%r1 # copy svc number to %r7
265 mvc SP_ARGS(4,%r15),SP_R7(%r15)
267 sth %r7,SP_SVCNR(%r15)
268 sll %r7,2 # svc number *4
269 l %r8,BASED(.Lsysc_table)
270 tm __TI_flags+2(%r9),_TIF_SYSCALL
271 l %r8,0(%r7,%r8) # get system call addr.
272 bnz BASED(sysc_tracesys)
273 basr %r14,%r8 # call sys_xxxx
274 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
277 tm __TI_flags+3(%r9),_TIF_WORK_SVC
278 bnz BASED(sysc_work) # there is work to do (signals etc.)
280 #ifdef CONFIG_TRACE_IRQFLAGS
281 la %r1,BASED(sysc_restore_trace_psw)
288 RESTORE_ALL __LC_RETURN_PSW,1
291 #ifdef CONFIG_TRACE_IRQFLAGS
293 .globl sysc_restore_trace_psw
294 sysc_restore_trace_psw:
295 .long 0, sysc_restore_trace + 0x80000000
299 # recheck if there is more work to do
302 tm __TI_flags+3(%r9),_TIF_WORK_SVC
303 bz BASED(sysc_restore) # there is no work to do
305 # One of the work bits is on. Find out which one.
308 tm SP_PSW+1(%r15),0x01 # returning to user ?
309 bno BASED(sysc_restore)
310 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
311 bo BASED(sysc_mcck_pending)
312 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
313 bo BASED(sysc_reschedule)
314 tm __TI_flags+3(%r9),_TIF_SIGPENDING
315 bnz BASED(sysc_sigpending)
316 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
317 bnz BASED(sysc_notify_resume)
318 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
319 bo BASED(sysc_restart)
320 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
321 bo BASED(sysc_singlestep)
322 b BASED(sysc_restore)
326 # _TIF_NEED_RESCHED is set, call schedule
329 l %r1,BASED(.Lschedule)
330 la %r14,BASED(sysc_work_loop)
331 br %r1 # call scheduler
334 # _TIF_MCCK_PENDING is set, call handler
337 l %r1,BASED(.Ls390_handle_mcck)
338 la %r14,BASED(sysc_work_loop)
339 br %r1 # TIF bit will be cleared by handler
342 # _TIF_SIGPENDING is set, call do_signal
345 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
346 la %r2,SP_PTREGS(%r15) # load pt_regs
347 l %r1,BASED(.Ldo_signal)
348 basr %r14,%r1 # call do_signal
349 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
350 bo BASED(sysc_restart)
351 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
352 bo BASED(sysc_singlestep)
353 b BASED(sysc_work_loop)
356 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
359 la %r2,SP_PTREGS(%r15) # load pt_regs
360 l %r1,BASED(.Ldo_notify_resume)
361 la %r14,BASED(sysc_work_loop)
362 br %r1 # call do_notify_resume
366 # _TIF_RESTART_SVC is set, set up registers and restart svc
369 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
370 l %r7,SP_R2(%r15) # load new svc number
371 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
372 lm %r2,%r6,SP_R2(%r15) # load svc arguments
373 b BASED(sysc_do_restart) # restart svc
376 # _TIF_SINGLE_STEP is set, call do_single_step
379 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
380 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
381 mvi SP_SVCNR+1(%r15),0xff
382 la %r2,SP_PTREGS(%r15) # address of register-save area
383 l %r1,BASED(.Lhandle_per) # load adr. of per handler
384 la %r14,BASED(sysc_return) # load adr. of system return
385 br %r1 # branch to do_single_step
388 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
389 # and after the system call
392 l %r1,BASED(.Ltrace_entry)
393 la %r2,SP_PTREGS(%r15) # load pt_regs
398 cl %r2,BASED(.Lnr_syscalls)
399 bnl BASED(sysc_tracenogo)
400 l %r8,BASED(.Lsysc_table)
402 sll %r7,2 # svc number *4
405 lm %r3,%r6,SP_R3(%r15)
406 l %r2,SP_ORIG_R2(%r15)
407 basr %r14,%r8 # call sys_xxx
408 st %r2,SP_R2(%r15) # store return value
410 tm __TI_flags+2(%r9),_TIF_SYSCALL
411 bz BASED(sysc_return)
412 l %r1,BASED(.Ltrace_exit)
413 la %r2,SP_PTREGS(%r15) # load pt_regs
414 la %r14,BASED(sysc_return)
418 # a new process exits the kernel with ret_from_fork
422 l %r13,__LC_SVC_NEW_PSW+4
423 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
424 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
426 st %r15,SP_R15(%r15) # store stack pointer for new kthread
427 0: l %r1,BASED(.Lschedtail)
430 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
431 b BASED(sysc_tracenogo)
434 # kernel_execve function needs to deal with pt_regs that is not
439 stm %r12,%r15,48(%r15)
441 l %r13,__LC_SVC_NEW_PSW+4
442 s %r15,BASED(.Lc_spsize)
443 st %r14,__SF_BACKCHAIN(%r15)
444 la %r12,SP_PTREGS(%r15)
445 xc 0(__PT_SIZE,%r12),0(%r12)
446 l %r1,BASED(.Ldo_execve)
451 a %r15,BASED(.Lc_spsize)
452 lm %r12,%r15,48(%r15)
455 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
456 l %r15,__LC_KERNEL_STACK # load ksp
457 s %r15,BASED(.Lc_spsize) # make room for registers & psw
458 l %r9,__LC_THREAD_INFO
459 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
460 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
461 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
462 l %r1,BASED(.Lexecve_tail)
467 * Program check handler routine
470 .globl pgm_check_handler
473 * First we need to check for a special case:
474 * Single stepping an instruction that disables the PER event mask will
475 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
476 * For a single stepped SVC the program check handler gets control after
477 * the SVC new PSW has been loaded. But we want to execute the SVC first and
478 * then handle the PER event. Therefore we update the SVC old PSW to point
479 * to the pgm_check_handler and branch to the SVC handler after we checked
480 * if we have to load the kernel stack register.
481 * For every other possible cause for PER event without the PER mask set
482 * we just ignore the PER event (FIXME: is there anything we have to do
485 stpt __LC_SYNC_ENTER_TIMER
486 SAVE_ALL_BASE __LC_SAVE_AREA
487 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
488 bnz BASED(pgm_per) # got per exception -> special case
489 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
490 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
491 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
492 bz BASED(pgm_no_vtime)
493 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
494 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
495 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
497 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
499 l %r3,__LC_PGM_ILC # load program interruption code
503 l %r7,BASED(.Ljump_table)
505 l %r7,0(%r8,%r7) # load address of handler routine
506 la %r2,SP_PTREGS(%r15) # address of register-save area
507 la %r14,BASED(sysc_return)
508 br %r7 # branch to interrupt-handler
511 # handle per exception
514 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
515 bnz BASED(pgm_per_std) # ok, normal per event from user space
516 # ok its one of the special cases, now we need to find out which one
517 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
519 # no interesting special case, ignore PER event
520 lm %r12,%r15,__LC_SAVE_AREA
524 # Normal per exception
527 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
528 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
529 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
530 bz BASED(pgm_no_vtime2)
531 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
532 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
533 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
535 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
538 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
539 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
540 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
541 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
542 tm SP_PSW+1(%r15),0x01 # kernel per event ?
544 l %r3,__LC_PGM_ILC # load program interruption code
546 nr %r8,%r3 # clear per-event-bit and ilc
547 be BASED(sysc_return) # only per or per+check ?
551 # it was a single stepped SVC that is causing all the trouble
554 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
555 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
556 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
557 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
558 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
559 lh %r7,0x8a # get svc number from lowcore
560 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
563 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
564 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
565 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
566 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
568 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
572 # per was called from kernel, must be kprobes
575 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
576 mvi SP_SVCNR+1(%r15),0xff
577 la %r2,SP_PTREGS(%r15) # address of register-save area
578 l %r1,BASED(.Lhandle_per) # load adr. of per handler
579 la %r14,BASED(sysc_restore)# load adr. of system return
580 br %r1 # branch to do_single_step
583 * IO interrupt handler routine
586 .globl io_int_handler
589 stpt __LC_ASYNC_ENTER_TIMER
590 SAVE_ALL_BASE __LC_SAVE_AREA+16
591 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
592 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
593 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
594 bz BASED(io_no_vtime)
595 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
596 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
597 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
599 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
601 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
602 la %r2,SP_PTREGS(%r15) # address of register-save area
603 basr %r14,%r1 # branch to standard irq handler
605 tm __TI_flags+3(%r9),_TIF_WORK_INT
606 bnz BASED(io_work) # there is work to do (signals etc.)
608 #ifdef CONFIG_TRACE_IRQFLAGS
609 la %r1,BASED(io_restore_trace_psw)
616 RESTORE_ALL __LC_RETURN_PSW,0
619 #ifdef CONFIG_TRACE_IRQFLAGS
621 .globl io_restore_trace_psw
622 io_restore_trace_psw:
623 .long 0, io_restore_trace + 0x80000000
627 # switch to kernel stack, then check the TIF bits
630 tm SP_PSW+1(%r15),0x01 # returning to user ?
631 #ifndef CONFIG_PREEMPT
632 bno BASED(io_restore) # no-> skip resched & signal
634 bnz BASED(io_work_user) # no -> check for preemptive scheduling
635 # check for preemptive scheduling
636 icm %r0,15,__TI_precount(%r9)
637 bnz BASED(io_restore) # preemption disabled
639 s %r1,BASED(.Lc_spsize)
640 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
641 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
644 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
645 bno BASED(io_restore)
646 l %r1,BASED(.Lpreempt_schedule_irq)
647 la %r14,BASED(io_resume_loop)
648 br %r1 # call schedule
652 l %r1,__LC_KERNEL_STACK
653 s %r1,BASED(.Lc_spsize)
654 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
655 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
658 # One of the work bits is on. Find out which one.
659 # Checked are: _TIF_SIGPENDING, _TIF_NEED_RESCHED
660 # and _TIF_MCCK_PENDING
663 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
664 bo BASED(io_mcck_pending)
665 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
666 bo BASED(io_reschedule)
667 tm __TI_flags+3(%r9),_TIF_SIGPENDING
668 bnz BASED(io_sigpending)
669 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
670 bnz BASED(io_notify_resume)
675 # _TIF_MCCK_PENDING is set, call handler
678 l %r1,BASED(.Ls390_handle_mcck)
679 basr %r14,%r1 # TIF bit will be cleared by handler
680 b BASED(io_work_loop)
683 # _TIF_NEED_RESCHED is set, call schedule
687 l %r1,BASED(.Lschedule)
688 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
689 basr %r14,%r1 # call scheduler
690 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
692 tm __TI_flags+3(%r9),_TIF_WORK_INT
693 bz BASED(io_restore) # there is no work to do
694 b BASED(io_work_loop)
697 # _TIF_SIGPENDING is set, call do_signal
701 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
702 la %r2,SP_PTREGS(%r15) # load pt_regs
703 l %r1,BASED(.Ldo_signal)
704 basr %r14,%r1 # call do_signal
705 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
707 b BASED(io_work_loop)
710 # _TIF_SIGPENDING is set, call do_signal
714 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
715 la %r2,SP_PTREGS(%r15) # load pt_regs
716 l %r1,BASED(.Ldo_notify_resume)
717 basr %r14,%r1 # call do_signal
718 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
720 b BASED(io_work_loop)
723 * External interrupt handler routine
726 .globl ext_int_handler
729 stpt __LC_ASYNC_ENTER_TIMER
730 SAVE_ALL_BASE __LC_SAVE_AREA+16
731 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
732 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
733 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
734 bz BASED(ext_no_vtime)
735 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
736 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
737 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
739 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
741 la %r2,SP_PTREGS(%r15) # address of register-save area
742 lh %r3,__LC_EXT_INT_CODE # get interruption code
743 l %r1,BASED(.Ldo_extint)
750 * Machine check handler routines
753 .globl mcck_int_handler
756 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
757 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
758 SAVE_ALL_BASE __LC_SAVE_AREA+32
759 la %r12,__LC_MCK_OLD_PSW
760 tm __LC_MCCK_CODE,0x80 # system damage?
761 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
762 mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER
763 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
764 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
766 la %r14,__LC_SYNC_ENTER_TIMER
767 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
769 la %r14,__LC_ASYNC_ENTER_TIMER
770 0: clc 0(8,%r14),__LC_EXIT_TIMER
772 la %r14,__LC_EXIT_TIMER
773 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
775 la %r14,__LC_LAST_UPDATE_TIMER
777 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
778 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
779 bno BASED(mcck_int_main) # no -> skip cleanup critical
780 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
781 bnz BASED(mcck_int_main) # from user -> load async stack
782 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
783 bhe BASED(mcck_int_main)
784 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
785 bl BASED(mcck_int_main)
786 l %r14,BASED(.Lcleanup_critical)
789 l %r14,__LC_PANIC_STACK # are we already on the panic stack?
793 l %r15,__LC_PANIC_STACK # load panic stack
794 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
795 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
796 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
797 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
798 bz BASED(mcck_no_vtime)
799 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
800 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
801 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
803 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
804 la %r2,SP_PTREGS(%r15) # load pt_regs
805 l %r1,BASED(.Ls390_mcck)
806 basr %r14,%r1 # call machine check handler
807 tm SP_PSW+1(%r15),0x01 # returning to user ?
808 bno BASED(mcck_return)
809 l %r1,__LC_KERNEL_STACK # switch to kernel stack
810 s %r1,BASED(.Lc_spsize)
811 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
812 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
814 stosm __SF_EMPTY(%r15),0x04 # turn dat on
815 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
816 bno BASED(mcck_return)
818 l %r1,BASED(.Ls390_handle_mcck)
819 basr %r14,%r1 # call machine check handler
822 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
823 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
824 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
825 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
827 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
829 lpsw __LC_RETURN_MCCK_PSW # back to caller
830 0: lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
831 lpsw __LC_RETURN_MCCK_PSW # back to caller
833 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
836 * Restart interruption handler, kick starter for additional CPUs
840 .globl restart_int_handler
844 spt restart_vtime-restart_base(%r1)
845 stck __LC_LAST_UPDATE_CLOCK
846 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
847 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
848 l %r15,__LC_SAVE_AREA+60 # load ksp
849 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
850 lam %a0,%a15,__LC_AREGS_SAVE_AREA
851 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
852 l %r1,__LC_THREAD_INFO
853 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
854 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
855 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
856 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
858 l %r14,restart_addr-.(%r14)
859 br %r14 # branch to start_secondary
861 .long start_secondary
864 .long 0x7fffffff,0xffffffff
868 * If we do not run with SMP enabled, let the new CPU crash ...
870 .globl restart_int_handler
874 lpsw restart_crash-restart_base(%r1)
877 .long 0x000a0000,0x00000000
881 #ifdef CONFIG_CHECK_STACK
883 * The synchronous or the asynchronous stack overflowed. We are dead.
884 * No need to properly save the registers, we are going to panic anyway.
885 * Setup a pt_regs so that show_trace can provide a good call trace.
888 l %r15,__LC_PANIC_STACK # change to panic stack
889 sl %r15,BASED(.Lc_spsize)
890 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
891 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
892 la %r1,__LC_SAVE_AREA
893 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ?
895 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ?
897 la %r1,__LC_SAVE_AREA+16
898 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack
899 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
900 l %r1,BASED(1f) # branch to kernel_stack_overflow
901 la %r2,SP_PTREGS(%r15) # load pt_regs
903 1: .long kernel_stack_overflow
906 cleanup_table_system_call:
907 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
908 cleanup_table_sysc_return:
909 .long sysc_return + 0x80000000, sysc_leave + 0x80000000
910 cleanup_table_sysc_leave:
911 .long sysc_leave + 0x80000000, sysc_done + 0x80000000
912 cleanup_table_sysc_work_loop:
913 .long sysc_work_loop + 0x80000000, sysc_work_done + 0x80000000
914 cleanup_table_io_return:
915 .long io_return + 0x80000000, io_leave + 0x80000000
916 cleanup_table_io_leave:
917 .long io_leave + 0x80000000, io_done + 0x80000000
918 cleanup_table_io_work_loop:
919 .long io_work_loop + 0x80000000, io_work_done + 0x80000000
922 clc 4(4,%r12),BASED(cleanup_table_system_call)
924 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
925 bl BASED(cleanup_system_call)
927 clc 4(4,%r12),BASED(cleanup_table_sysc_return)
929 clc 4(4,%r12),BASED(cleanup_table_sysc_return+4)
930 bl BASED(cleanup_sysc_return)
932 clc 4(4,%r12),BASED(cleanup_table_sysc_leave)
934 clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4)
935 bl BASED(cleanup_sysc_leave)
937 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop)
939 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4)
940 bl BASED(cleanup_sysc_return)
942 clc 4(4,%r12),BASED(cleanup_table_io_return)
944 clc 4(4,%r12),BASED(cleanup_table_io_return+4)
945 bl BASED(cleanup_io_return)
947 clc 4(4,%r12),BASED(cleanup_table_io_leave)
949 clc 4(4,%r12),BASED(cleanup_table_io_leave+4)
950 bl BASED(cleanup_io_leave)
952 clc 4(4,%r12),BASED(cleanup_table_io_work_loop)
954 clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4)
955 bl BASED(cleanup_io_return)
960 mvc __LC_RETURN_PSW(8),0(%r12)
961 c %r12,BASED(.Lmck_old_psw)
963 la %r12,__LC_SAVE_AREA+16
965 0: la %r12,__LC_SAVE_AREA+32
967 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
969 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
970 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
971 bhe BASED(cleanup_vtime)
972 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
974 mvc __LC_SAVE_AREA(16),0(%r12)
976 st %r12,__LC_SAVE_AREA+48 # argh
977 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
978 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
979 l %r12,__LC_SAVE_AREA+48 # argh
983 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
984 bhe BASED(cleanup_stime)
985 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
987 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
988 bh BASED(cleanup_update)
989 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
991 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
992 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
993 la %r12,__LC_RETURN_PSW
995 cleanup_system_call_insn:
996 .long sysc_saveall + 0x80000000
997 .long system_call + 0x80000000
998 .long sysc_vtime + 0x80000000
999 .long sysc_stime + 0x80000000
1000 .long sysc_update + 0x80000000
1002 cleanup_sysc_return:
1003 mvc __LC_RETURN_PSW(4),0(%r12)
1004 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return)
1005 la %r12,__LC_RETURN_PSW
1009 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn)
1011 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1012 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
1014 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1015 c %r12,BASED(.Lmck_old_psw)
1017 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1019 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
1020 1: lm %r0,%r11,SP_R0(%r15)
1022 2: la %r12,__LC_RETURN_PSW
1024 cleanup_sysc_leave_insn:
1025 .long sysc_done - 4 + 0x80000000
1026 .long sysc_done - 8 + 0x80000000
1029 mvc __LC_RETURN_PSW(4),0(%r12)
1030 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop)
1031 la %r12,__LC_RETURN_PSW
1035 clc 4(4,%r12),BASED(cleanup_io_leave_insn)
1037 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1038 clc 4(4,%r12),BASED(cleanup_io_leave_insn+4)
1040 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1041 c %r12,BASED(.Lmck_old_psw)
1043 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1045 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
1046 1: lm %r0,%r11,SP_R0(%r15)
1048 2: la %r12,__LC_RETURN_PSW
1050 cleanup_io_leave_insn:
1051 .long io_done - 4 + 0x80000000
1052 .long io_done - 8 + 0x80000000
1058 .Lc_spsize: .long SP_SIZE
1059 .Lc_overhead: .long STACK_FRAME_OVERHEAD
1060 .Lnr_syscalls: .long NR_syscalls
1061 .L0x018: .short 0x018
1062 .L0x020: .short 0x020
1063 .L0x028: .short 0x028
1064 .L0x030: .short 0x030
1065 .L0x038: .short 0x038
1071 .Ls390_mcck: .long s390_do_machine_check
1073 .long s390_handle_mcck
1074 .Lmck_old_psw: .long __LC_MCK_OLD_PSW
1075 .Ldo_IRQ: .long do_IRQ
1076 .Ldo_extint: .long do_extint
1077 .Ldo_signal: .long do_signal
1079 .long do_notify_resume
1080 .Lhandle_per: .long do_single_step
1081 .Ldo_execve: .long do_execve
1082 .Lexecve_tail: .long execve_tail
1083 .Ljump_table: .long pgm_check_table
1084 .Lschedule: .long schedule
1085 #ifdef CONFIG_PREEMPT
1086 .Lpreempt_schedule_irq:
1087 .long preempt_schedule_irq
1089 .Ltrace_entry: .long do_syscall_trace_enter
1090 .Ltrace_exit: .long do_syscall_trace_exit
1091 .Lschedtail: .long schedule_tail
1092 .Lsysc_table: .long sys_call_table
1093 #ifdef CONFIG_TRACE_IRQFLAGS
1094 .Ltrace_irq_on_caller:
1095 .long trace_hardirqs_on_caller
1096 .Ltrace_irq_off_caller:
1097 .long trace_hardirqs_off_caller
1099 #ifdef CONFIG_LOCKDEP
1101 .long lockdep_sys_exit
1104 .long __critical_start + 0x80000000
1106 .long __critical_end + 0x80000000
1108 .long cleanup_critical
1110 .section .rodata, "a"
1111 #define SYSCALL(esa,esame,emu) .long esa
1112 .globl sys_call_table
1114 #include "syscalls.S"