2 * saa7114 - Philips SAA7114H video decoder driver version 0.0.1
4 * Copyright (C) 2002 Maxim Yevtyushkin <max@linuxmedialabs.com>
6 * Based on saa7111 driver by Dave Perks
8 * Copyright (C) 1998 Dave Perks <dperks@ibm.net>
10 * Slight changes for video timing and attachment output by
11 * Wolfgang Scherr <scherr@net4you.net>
13 * Changes by Ronald Bultje <rbultje@ronald.bitfreak.net>
14 * - moved over to linux>=2.4.x i2c protocol (1/1/2003)
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
36 #include <linux/kernel.h>
37 #include <linux/major.h>
38 #include <linux/slab.h>
40 #include <linux/signal.h>
41 #include <linux/types.h>
42 #include <linux/i2c.h>
44 #include <asm/pgtable.h>
46 #include <asm/uaccess.h>
48 #include <linux/videodev.h>
49 #include <linux/video_decoder.h>
51 MODULE_DESCRIPTION("Philips SAA7114H video decoder driver");
52 MODULE_AUTHOR("Maxim Yevtyushkin");
53 MODULE_LICENSE("GPL");
56 #define I2C_NAME(x) (x)->name
60 module_param(debug, int, 0);
61 MODULE_PARM_DESC(debug, "Debug level (0-1)");
63 #define dprintk(num, format, args...) \
66 printk(format, ##args); \
69 /* ----------------------------------------------------------------------- */
72 unsigned char reg[0xf0 * 2];
84 #define I2C_SAA7114 0x42
85 #define I2C_SAA7114A 0x40
90 //#define SAA_7114_NTSC_HSYNC_START (-3)
91 //#define SAA_7114_NTSC_HSYNC_STOP (-18)
93 #define SAA_7114_NTSC_HSYNC_START (-17)
94 #define SAA_7114_NTSC_HSYNC_STOP (-32)
96 //#define SAA_7114_NTSC_HOFFSET (5)
97 #define SAA_7114_NTSC_HOFFSET (6)
98 #define SAA_7114_NTSC_VOFFSET (10)
99 #define SAA_7114_NTSC_WIDTH (720)
100 #define SAA_7114_NTSC_HEIGHT (250)
102 #define SAA_7114_SECAM_HSYNC_START (-17)
103 #define SAA_7114_SECAM_HSYNC_STOP (-32)
105 #define SAA_7114_SECAM_HOFFSET (2)
106 #define SAA_7114_SECAM_VOFFSET (10)
107 #define SAA_7114_SECAM_WIDTH (720)
108 #define SAA_7114_SECAM_HEIGHT (300)
110 #define SAA_7114_PAL_HSYNC_START (-17)
111 #define SAA_7114_PAL_HSYNC_STOP (-32)
113 #define SAA_7114_PAL_HOFFSET (2)
114 #define SAA_7114_PAL_VOFFSET (10)
115 #define SAA_7114_PAL_WIDTH (720)
116 #define SAA_7114_PAL_HEIGHT (300)
120 #define SAA_7114_VERTICAL_CHROMA_OFFSET 0 //0x50504040
121 #define SAA_7114_VERTICAL_LUMA_OFFSET 0
123 #define REG_ADDR(x) (((x) << 1) + 1)
124 #define LOBYTE(x) ((unsigned char)((x) & 0xff))
125 #define HIBYTE(x) ((unsigned char)(((x) >> 8) & 0xff))
126 #define LOWORD(x) ((unsigned short int)((x) & 0xffff))
127 #define HIWORD(x) ((unsigned short int)(((x) >> 16) & 0xffff))
130 /* ----------------------------------------------------------------------- */
133 saa7114_write (struct i2c_client *client,
137 return i2c_smbus_write_byte_data(client, reg, value);
141 saa7114_write_block (struct i2c_client *client,
148 /* the saa7114 has an autoincrement function, use it if
149 * the adapter understands raw I2C */
150 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
151 /* do raw I2C, not smbus compatible */
157 block_data[block_len++] = reg = data[0];
159 block_data[block_len++] = data[1];
163 } while (len >= 2 && data[0] == reg &&
165 if ((ret = i2c_master_send(client, block_data,
170 /* do some slow I2C emulation kind of thing */
173 if ((ret = saa7114_write(client, reg,
184 saa7114_read (struct i2c_client *client,
187 return i2c_smbus_read_byte_data(client, reg);
190 /* ----------------------------------------------------------------------- */
192 // initially set NTSC, composite
195 static const unsigned char init[] = {
196 0x00, 0x00, /* 00 - ID byte , chip version,
198 0x01, 0x08, /* 01 - X,X,X,X, IDEL3 to IDEL0 -
199 * horizontal increment delay,
200 * recommended position */
201 0x02, 0x00, /* 02 - FUSE=3, GUDL=2, MODE=0 ;
203 0x03, 0x10, /* 03 - HLNRS=0, VBSL=1, WPOFF=0,
204 * HOLDG=0, GAFIX=0, GAI1=256, GAI2=256 */
205 0x04, 0x90, /* 04 - GAI1=256 */
206 0x05, 0x90, /* 05 - GAI2=256 */
207 0x06, SAA_7114_NTSC_HSYNC_START, /* 06 - HSB: hsync start,
208 * depends on the video standard */
209 0x07, SAA_7114_NTSC_HSYNC_STOP, /* 07 - HSS: hsync stop, depends
210 *on the video standard */
211 0x08, 0xb8, /* 08 - AUFD=1, FSEL=1, EXFIL=0, VTRC=1,
212 * HPLL: free running in playback, locked
213 * in capture, VNOI=0 */
214 0x09, 0x80, /* 09 - BYPS=0, PREF=0, BPSS=0, VBLB=0,
215 * UPTCV=0, APER=1; depends from input */
216 0x0a, 0x80, /* 0a - BRIG=128 */
217 0x0b, 0x44, /* 0b - CONT=1.109 */
218 0x0c, 0x40, /* 0c - SATN=1.0 */
219 0x0d, 0x00, /* 0d - HUE=0 */
220 0x0e, 0x84, /* 0e - CDTO, CSTD2 to 0, DCVF, FCTC,
221 * CCOMB; depends from video standard */
222 0x0f, 0x24, /* 0f - ACGC,CGAIN6 to CGAIN0; depends
223 * from video standard */
224 0x10, 0x03, /* 10 - OFFU1 to 0, OFFV1 to 0, CHBW,
226 0x11, 0x59, /* 11 - COLO, RTP1, HEDL1 to 0, RTP0,
228 0x12, 0xc9, /* 12 - RT signal control RTSE13 to 10
230 0x13, 0x80, /* 13 - RT/X port output control */
231 0x14, 0x00, /* 14 - analog, ADC, compatibility control */
232 0x15, 0x00, /* 15 - VGATE start FID change */
233 0x16, 0xfe, /* 16 - VGATE stop */
234 0x17, 0x00, /* 17 - Misc., VGATE MSBs */
235 0x18, 0x40, /* RAWG */
236 0x19, 0x80, /* RAWO */
242 0x1f, 0x00, /* status byte, read only */
243 0x20, 0x00, /* video decoder reserved part */
259 0x30, 0xbc, /* audio clock generator */
275 0x40, 0x00, /* VBI data slicer */
299 0x58, 0x40, // framing code
300 0x59, 0x47, // horizontal offset
301 0x5a, 0x06, // vertical offset
302 0x5b, 0x83, // field offset
303 0x5c, 0x00, // reserved
304 0x5d, 0x3e, // header and data
305 0x5e, 0x00, // sliced data
306 0x5f, 0x00, // reserved
307 0x60, 0x00, /* video decoder reserved part */
323 0x70, 0x00, /* video decoder reserved part */
339 0x80, 0x00, /* X-port, I-port and scaler */
344 0x85, 0x0d, // hsync and vsync ?
355 0x90, 0x03, /* Task A definition */
359 0x94, 0x00, // window settings
371 0xa0, 0x01, /* horizontal integer prescaling ratio */
372 0xa1, 0x00, /* horizontal prescaler accumulation
374 0xa2, 0x00, /* UV FIR filter, Y FIR filter, prescaler
377 0xa4, 0x80, // luminance brightness
378 0xa5, 0x40, // luminance gain
379 0xa6, 0x40, // chrominance saturation
381 0xa8, 0x00, // horizontal luminance scaling increment
383 0xaa, 0x00, // horizontal luminance phase offset
385 0xac, 0x00, // horizontal chrominance scaling increment
387 0xae, 0x00, // horizontal chrominance phase offset
389 0xb0, 0x00, // vertical luminance scaling increment
391 0xb2, 0x00, // vertical chrominance scaling increment
405 0xc0, 0x02, // Task B definition
409 0xc4, 0x00, // window settings
421 0xd0, 0x01, // horizontal integer prescaling ratio
422 0xd1, 0x00, // horizontal prescaler accumulation sequence length
423 0xd2, 0x00, // UV FIR filter, Y FIR filter, prescaler DC gain
425 0xd4, 0x80, // luminance brightness
426 0xd5, 0x40, // luminance gain
427 0xd6, 0x40, // chrominance saturation
429 0xd8, 0x00, // horizontal luminance scaling increment
431 0xda, 0x00, // horizontal luminance phase offset
433 0xdc, 0x00, // horizontal chrominance scaling increment
435 0xde, 0x00, // horizontal chrominance phase offset
437 0xe0, 0x00, // vertical luminance scaling increment
439 0xe2, 0x00, // vertical chrominance scaling increment
456 saa7114_command (struct i2c_client *client,
460 struct saa7114 *decoder = i2c_get_clientdata(client);
465 //dprintk(1, KERN_INFO "%s: writing init\n", I2C_NAME(client));
466 //saa7114_write_block(client, init, sizeof(init));
473 dprintk(1, KERN_INFO "%s: decoder dump\n", I2C_NAME(client));
475 for (i = 0; i < 32; i += 16) {
478 printk(KERN_DEBUG "%s: %03x", I2C_NAME(client), i);
479 for (j = 0; j < 16; ++j) {
481 saa7114_read(client, i + j));
488 case DECODER_GET_CAPABILITIES:
490 struct video_decoder_capability *cap = arg;
492 dprintk(1, KERN_DEBUG "%s: decoder get capabilities\n",
495 cap->flags = VIDEO_DECODER_PAL |
504 case DECODER_GET_STATUS:
510 status = saa7114_read(client, 0x1f);
512 dprintk(1, KERN_DEBUG "%s status: 0x%02x\n", I2C_NAME(client),
515 if ((status & (1 << 6)) == 0) {
516 res |= DECODER_STATUS_GOOD;
518 switch (decoder->norm) {
519 case VIDEO_MODE_NTSC:
520 res |= DECODER_STATUS_NTSC;
523 res |= DECODER_STATUS_PAL;
525 case VIDEO_MODE_SECAM:
526 res |= DECODER_STATUS_SECAM;
529 case VIDEO_MODE_AUTO:
530 if ((status & (1 << 5)) != 0) {
531 res |= DECODER_STATUS_NTSC;
533 res |= DECODER_STATUS_PAL;
537 if ((status & (1 << 0)) != 0) {
538 res |= DECODER_STATUS_COLOR;
544 case DECODER_SET_NORM:
548 short int hoff = 0, voff = 0, w = 0, h = 0;
550 dprintk(1, KERN_DEBUG "%s: decoder set norm ",
554 case VIDEO_MODE_NTSC:
555 dprintk(1, "NTSC\n");
556 decoder->reg[REG_ADDR(0x06)] =
557 SAA_7114_NTSC_HSYNC_START;
558 decoder->reg[REG_ADDR(0x07)] =
559 SAA_7114_NTSC_HSYNC_STOP;
561 decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
563 decoder->reg[REG_ADDR(0x0e)] = 0x85;
564 decoder->reg[REG_ADDR(0x0f)] = 0x24;
566 hoff = SAA_7114_NTSC_HOFFSET;
567 voff = SAA_7114_NTSC_VOFFSET;
568 w = SAA_7114_NTSC_WIDTH;
569 h = SAA_7114_NTSC_HEIGHT;
575 decoder->reg[REG_ADDR(0x06)] =
576 SAA_7114_PAL_HSYNC_START;
577 decoder->reg[REG_ADDR(0x07)] =
578 SAA_7114_PAL_HSYNC_STOP;
580 decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
582 decoder->reg[REG_ADDR(0x0e)] = 0x81;
583 decoder->reg[REG_ADDR(0x0f)] = 0x24;
585 hoff = SAA_7114_PAL_HOFFSET;
586 voff = SAA_7114_PAL_VOFFSET;
587 w = SAA_7114_PAL_WIDTH;
588 h = SAA_7114_PAL_HEIGHT;
593 dprintk(1, " Unknown video mode!!!\n");
599 decoder->reg[REG_ADDR(0x94)] = LOBYTE(hoff); // hoffset low
600 decoder->reg[REG_ADDR(0x95)] = HIBYTE(hoff) & 0x0f; // hoffset high
601 decoder->reg[REG_ADDR(0x96)] = LOBYTE(w); // width low
602 decoder->reg[REG_ADDR(0x97)] = HIBYTE(w) & 0x0f; // width high
603 decoder->reg[REG_ADDR(0x98)] = LOBYTE(voff); // voffset low
604 decoder->reg[REG_ADDR(0x99)] = HIBYTE(voff) & 0x0f; // voffset high
605 decoder->reg[REG_ADDR(0x9a)] = LOBYTE(h + 2); // height low
606 decoder->reg[REG_ADDR(0x9b)] = HIBYTE(h + 2) & 0x0f; // height high
607 decoder->reg[REG_ADDR(0x9c)] = LOBYTE(w); // out width low
608 decoder->reg[REG_ADDR(0x9d)] = HIBYTE(w) & 0x0f; // out width high
609 decoder->reg[REG_ADDR(0x9e)] = LOBYTE(h); // out height low
610 decoder->reg[REG_ADDR(0x9f)] = HIBYTE(h) & 0x0f; // out height high
612 decoder->reg[REG_ADDR(0xc4)] = LOBYTE(hoff); // hoffset low
613 decoder->reg[REG_ADDR(0xc5)] = HIBYTE(hoff) & 0x0f; // hoffset high
614 decoder->reg[REG_ADDR(0xc6)] = LOBYTE(w); // width low
615 decoder->reg[REG_ADDR(0xc7)] = HIBYTE(w) & 0x0f; // width high
616 decoder->reg[REG_ADDR(0xc8)] = LOBYTE(voff); // voffset low
617 decoder->reg[REG_ADDR(0xc9)] = HIBYTE(voff) & 0x0f; // voffset high
618 decoder->reg[REG_ADDR(0xca)] = LOBYTE(h + 2); // height low
619 decoder->reg[REG_ADDR(0xcb)] = HIBYTE(h + 2) & 0x0f; // height high
620 decoder->reg[REG_ADDR(0xcc)] = LOBYTE(w); // out width low
621 decoder->reg[REG_ADDR(0xcd)] = HIBYTE(w) & 0x0f; // out width high
622 decoder->reg[REG_ADDR(0xce)] = LOBYTE(h); // out height low
623 decoder->reg[REG_ADDR(0xcf)] = HIBYTE(h) & 0x0f; // out height high
626 saa7114_write(client, 0x80, 0x06); // i-port and scaler back end clock selection, task A&B off
627 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
628 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
630 saa7114_write_block(client, decoder->reg + (0x06 << 1),
632 saa7114_write_block(client, decoder->reg + (0x0e << 1),
634 saa7114_write_block(client, decoder->reg + (0x5a << 1),
637 saa7114_write_block(client, decoder->reg + (0x94 << 1),
638 (0x9f + 1 - 0x94) << 1);
639 saa7114_write_block(client, decoder->reg + (0xc4 << 1),
640 (0xcf + 1 - 0xc4) << 1);
642 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
643 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
644 saa7114_write(client, 0x80, 0x36); // i-port and scaler back end clock selection
646 decoder->norm = *iarg;
650 case DECODER_SET_INPUT:
654 dprintk(1, KERN_DEBUG "%s: decoder set input (%d)\n",
655 I2C_NAME(client), *iarg);
656 if (*iarg < 0 || *iarg > 7) {
660 if (decoder->input != *iarg) {
661 dprintk(1, KERN_DEBUG "%s: now setting %s input\n",
663 *iarg >= 6 ? "S-Video" : "Composite");
664 decoder->input = *iarg;
667 decoder->reg[REG_ADDR(0x02)] =
669 reg[REG_ADDR(0x02)] & 0xf0) | (decoder->
672 saa7114_write(client, 0x02,
673 decoder->reg[REG_ADDR(0x02)]);
675 /* bypass chrominance trap for modes 6..9 */
676 decoder->reg[REG_ADDR(0x09)] =
678 reg[REG_ADDR(0x09)] & 0x7f) | (decoder->
682 saa7114_write(client, 0x09,
683 decoder->reg[REG_ADDR(0x09)]);
685 decoder->reg[REG_ADDR(0x0e)] =
688 reg[REG_ADDR(0x0e)] | 1 : decoder->
689 reg[REG_ADDR(0x0e)] & ~1;
690 saa7114_write(client, 0x0e,
691 decoder->reg[REG_ADDR(0x0e)]);
696 case DECODER_SET_OUTPUT:
700 dprintk(1, KERN_DEBUG "%s: decoder set output\n",
703 /* not much choice of outputs */
710 case DECODER_ENABLE_OUTPUT:
713 int enable = (*iarg != 0);
715 dprintk(1, KERN_DEBUG "%s: decoder %s output\n",
716 I2C_NAME(client), enable ? "enable" : "disable");
718 decoder->playback = !enable;
720 if (decoder->enable != enable) {
721 decoder->enable = enable;
723 /* RJ: If output should be disabled (for
724 * playing videos), we also need a open PLL.
725 * The input is set to 0 (where no input
726 * source is connected), although this
729 * If output should be enabled, we have to
733 if (decoder->enable) {
734 decoder->reg[REG_ADDR(0x08)] = 0xb8;
735 decoder->reg[REG_ADDR(0x12)] = 0xc9;
736 decoder->reg[REG_ADDR(0x13)] = 0x80;
737 decoder->reg[REG_ADDR(0x87)] = 0x01;
739 decoder->reg[REG_ADDR(0x08)] = 0x7c;
740 decoder->reg[REG_ADDR(0x12)] = 0x00;
741 decoder->reg[REG_ADDR(0x13)] = 0x00;
742 decoder->reg[REG_ADDR(0x87)] = 0x00;
745 saa7114_write_block(client,
746 decoder->reg + (0x12 << 1),
748 saa7114_write(client, 0x08,
749 decoder->reg[REG_ADDR(0x08)]);
750 saa7114_write(client, 0x87,
751 decoder->reg[REG_ADDR(0x87)]);
752 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
753 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
754 saa7114_write(client, 0x80, 0x36);
760 case DECODER_SET_PICTURE:
762 struct video_picture *pic = arg;
766 "%s: decoder set picture bright=%d contrast=%d saturation=%d hue=%d\n",
767 I2C_NAME(client), pic->brightness, pic->contrast,
768 pic->colour, pic->hue);
770 if (decoder->bright != pic->brightness) {
771 /* We want 0 to 255 we get 0-65535 */
772 decoder->bright = pic->brightness;
773 saa7114_write(client, 0x0a, decoder->bright >> 8);
775 if (decoder->contrast != pic->contrast) {
776 /* We want 0 to 127 we get 0-65535 */
777 decoder->contrast = pic->contrast;
778 saa7114_write(client, 0x0b,
779 decoder->contrast >> 9);
781 if (decoder->sat != pic->colour) {
782 /* We want 0 to 127 we get 0-65535 */
783 decoder->sat = pic->colour;
784 saa7114_write(client, 0x0c, decoder->sat >> 9);
786 if (decoder->hue != pic->hue) {
787 /* We want -128 to 127 we get 0-65535 */
788 decoder->hue = pic->hue;
789 saa7114_write(client, 0x0d,
790 (decoder->hue - 32768) >> 8);
802 /* ----------------------------------------------------------------------- */
806 * concerning the addresses: i2c wants 7 bit (without the r/w bit), so '>>1'
808 static unsigned short normal_i2c[] =
809 { I2C_SAA7114 >> 1, I2C_SAA7114A >> 1, I2C_CLIENT_END };
811 static unsigned short ignore = I2C_CLIENT_END;
813 static struct i2c_client_address_data addr_data = {
814 .normal_i2c = normal_i2c,
819 static struct i2c_driver i2c_driver_saa7114;
822 saa7114_detect_client (struct i2c_adapter *adapter,
827 short int hoff = SAA_7114_NTSC_HOFFSET;
828 short int voff = SAA_7114_NTSC_VOFFSET;
829 short int w = SAA_7114_NTSC_WIDTH;
830 short int h = SAA_7114_NTSC_HEIGHT;
831 struct i2c_client *client;
832 struct saa7114 *decoder;
836 "saa7114.c: detecting saa7114 client on address 0x%x\n",
839 /* Check if the adapter supports the needed features */
840 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
843 client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
846 client->addr = address;
847 client->adapter = adapter;
848 client->driver = &i2c_driver_saa7114;
849 strlcpy(I2C_NAME(client), "saa7114", sizeof(I2C_NAME(client)));
851 decoder = kzalloc(sizeof(struct saa7114), GFP_KERNEL);
852 if (decoder == NULL) {
856 decoder->norm = VIDEO_MODE_NTSC;
859 decoder->bright = 32768;
860 decoder->contrast = 32768;
861 decoder->hue = 32768;
862 decoder->sat = 32768;
863 decoder->playback = 0; // initially capture mode useda
864 i2c_set_clientdata(client, decoder);
866 memcpy(decoder->reg, init, sizeof(init));
868 decoder->reg[REG_ADDR(0x94)] = LOBYTE(hoff); // hoffset low
869 decoder->reg[REG_ADDR(0x95)] = HIBYTE(hoff) & 0x0f; // hoffset high
870 decoder->reg[REG_ADDR(0x96)] = LOBYTE(w); // width low
871 decoder->reg[REG_ADDR(0x97)] = HIBYTE(w) & 0x0f; // width high
872 decoder->reg[REG_ADDR(0x98)] = LOBYTE(voff); // voffset low
873 decoder->reg[REG_ADDR(0x99)] = HIBYTE(voff) & 0x0f; // voffset high
874 decoder->reg[REG_ADDR(0x9a)] = LOBYTE(h + 2); // height low
875 decoder->reg[REG_ADDR(0x9b)] = HIBYTE(h + 2) & 0x0f; // height high
876 decoder->reg[REG_ADDR(0x9c)] = LOBYTE(w); // out width low
877 decoder->reg[REG_ADDR(0x9d)] = HIBYTE(w) & 0x0f; // out width high
878 decoder->reg[REG_ADDR(0x9e)] = LOBYTE(h); // out height low
879 decoder->reg[REG_ADDR(0x9f)] = HIBYTE(h) & 0x0f; // out height high
881 decoder->reg[REG_ADDR(0xc4)] = LOBYTE(hoff); // hoffset low
882 decoder->reg[REG_ADDR(0xc5)] = HIBYTE(hoff) & 0x0f; // hoffset high
883 decoder->reg[REG_ADDR(0xc6)] = LOBYTE(w); // width low
884 decoder->reg[REG_ADDR(0xc7)] = HIBYTE(w) & 0x0f; // width high
885 decoder->reg[REG_ADDR(0xc8)] = LOBYTE(voff); // voffset low
886 decoder->reg[REG_ADDR(0xc9)] = HIBYTE(voff) & 0x0f; // voffset high
887 decoder->reg[REG_ADDR(0xca)] = LOBYTE(h + 2); // height low
888 decoder->reg[REG_ADDR(0xcb)] = HIBYTE(h + 2) & 0x0f; // height high
889 decoder->reg[REG_ADDR(0xcc)] = LOBYTE(w); // out width low
890 decoder->reg[REG_ADDR(0xcd)] = HIBYTE(w) & 0x0f; // out width high
891 decoder->reg[REG_ADDR(0xce)] = LOBYTE(h); // out height low
892 decoder->reg[REG_ADDR(0xcf)] = HIBYTE(h) & 0x0f; // out height high
894 decoder->reg[REG_ADDR(0xb8)] =
895 LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
896 decoder->reg[REG_ADDR(0xb9)] =
897 HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
898 decoder->reg[REG_ADDR(0xba)] =
899 LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
900 decoder->reg[REG_ADDR(0xbb)] =
901 HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
903 decoder->reg[REG_ADDR(0xbc)] =
904 LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
905 decoder->reg[REG_ADDR(0xbd)] =
906 HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
907 decoder->reg[REG_ADDR(0xbe)] =
908 LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
909 decoder->reg[REG_ADDR(0xbf)] =
910 HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
912 decoder->reg[REG_ADDR(0xe8)] =
913 LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
914 decoder->reg[REG_ADDR(0xe9)] =
915 HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
916 decoder->reg[REG_ADDR(0xea)] =
917 LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
918 decoder->reg[REG_ADDR(0xeb)] =
919 HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
921 decoder->reg[REG_ADDR(0xec)] =
922 LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
923 decoder->reg[REG_ADDR(0xed)] =
924 HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
925 decoder->reg[REG_ADDR(0xee)] =
926 LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
927 decoder->reg[REG_ADDR(0xef)] =
928 HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
931 decoder->reg[REG_ADDR(0x13)] = 0x80; // RTC0 on
932 decoder->reg[REG_ADDR(0x87)] = 0x01; // I-Port
933 decoder->reg[REG_ADDR(0x12)] = 0xc9; // RTS0
935 decoder->reg[REG_ADDR(0x02)] = 0xc0; // set composite1 input, aveasy
936 decoder->reg[REG_ADDR(0x09)] = 0x00; // chrominance trap
937 decoder->reg[REG_ADDR(0x0e)] |= 1; // combfilter on
940 dprintk(1, KERN_DEBUG "%s_attach: starting decoder init\n",
944 saa7114_write_block(client, decoder->reg + (0x20 << 1),
947 saa7114_write_block(client, decoder->reg + (0x30 << 1),
950 saa7114_write_block(client, decoder->reg + (0x63 << 1),
951 (0x7f + 1 - 0x63) << 1);
953 saa7114_write_block(client, decoder->reg + (0x89 << 1),
956 saa7114_write_block(client, decoder->reg + (0xb8 << 1),
959 saa7114_write_block(client, decoder->reg + (0xe8 << 1),
963 for (i = 0; i <= 5; i++) {
967 "%s_attach: init error %d at stage %d, leaving attach.\n",
968 I2C_NAME(client), i, err[i]);
975 for (i = 6; i < 8; i++) {
978 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
979 I2C_NAME(client), i, saa7114_read(client, i),
980 decoder->reg[REG_ADDR(i)]);
985 "%s_attach: performing decoder reset sequence\n",
988 err[6] = saa7114_write(client, 0x80, 0x06); // i-port and scaler backend clock selection, task A&B off
989 err[7] = saa7114_write(client, 0x88, 0xd8); // sw reset scaler
990 err[8] = saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
992 for (i = 6; i <= 8; i++) {
996 "%s_attach: init error %d at stage %d, leaving attach.\n",
997 I2C_NAME(client), i, err[i]);
1004 dprintk(1, KERN_INFO "%s_attach: performing the rest of init\n",
1008 err[9] = saa7114_write(client, 0x01, decoder->reg[REG_ADDR(0x01)]);
1009 err[10] = saa7114_write_block(client, decoder->reg + (0x03 << 1), (0x1e + 1 - 0x03) << 1); // big seq
1010 err[11] = saa7114_write_block(client, decoder->reg + (0x40 << 1), (0x5f + 1 - 0x40) << 1); // slicer
1011 err[12] = saa7114_write_block(client, decoder->reg + (0x81 << 1), 2 << 1); // ?
1012 err[13] = saa7114_write_block(client, decoder->reg + (0x83 << 1), 5 << 1); // ?
1013 err[14] = saa7114_write_block(client, decoder->reg + (0x90 << 1), 4 << 1); // Task A
1015 saa7114_write_block(client, decoder->reg + (0x94 << 1),
1018 saa7114_write_block(client, decoder->reg + (0xa0 << 1),
1021 saa7114_write_block(client, decoder->reg + (0xa8 << 1),
1024 saa7114_write_block(client, decoder->reg + (0xb0 << 1),
1026 err[19] = saa7114_write_block(client, decoder->reg + (0xc0 << 1), 4 << 1); // Task B
1028 saa7114_write_block(client, decoder->reg + (0xc4 << 1),
1031 saa7114_write_block(client, decoder->reg + (0xd0 << 1),
1034 saa7114_write_block(client, decoder->reg + (0xd8 << 1),
1037 saa7114_write_block(client, decoder->reg + (0xe0 << 1),
1040 for (i = 9; i <= 18; i++) {
1044 "%s_attach: init error %d at stage %d, leaving attach.\n",
1045 I2C_NAME(client), i, err[i]);
1053 for (i = 6; i < 8; i++) {
1056 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1057 I2C_NAME(client), i, saa7114_read(client, i),
1058 decoder->reg[REG_ADDR(i)]);
1062 for (i = 0x11; i <= 0x13; i++) {
1065 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1066 I2C_NAME(client), i, saa7114_read(client, i),
1067 decoder->reg[REG_ADDR(i)]);
1071 dprintk(1, KERN_DEBUG "%s_attach: setting video input\n",
1075 saa7114_write(client, 0x02, decoder->reg[REG_ADDR(0x02)]);
1077 saa7114_write(client, 0x09, decoder->reg[REG_ADDR(0x09)]);
1079 saa7114_write(client, 0x0e, decoder->reg[REG_ADDR(0x0e)]);
1081 for (i = 19; i <= 21; i++) {
1085 "%s_attach: init error %d at stage %d, leaving attach.\n",
1086 I2C_NAME(client), i, err[i]);
1095 "%s_attach: performing decoder reset sequence\n",
1098 err[22] = saa7114_write(client, 0x88, 0xd8); // sw reset scaler
1099 err[23] = saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
1100 err[24] = saa7114_write(client, 0x80, 0x36); // i-port and scaler backend clock selection, task A&B off
1103 for (i = 22; i <= 24; i++) {
1107 "%s_attach: init error %d at stage %d, leaving attach.\n",
1108 I2C_NAME(client), i, err[i]);
1115 err[25] = saa7114_write(client, 0x06, init[REG_ADDR(0x06)]);
1116 err[26] = saa7114_write(client, 0x07, init[REG_ADDR(0x07)]);
1117 err[27] = saa7114_write(client, 0x10, init[REG_ADDR(0x10)]);
1121 "%s_attach: chip version %x, decoder status 0x%02x\n",
1122 I2C_NAME(client), saa7114_read(client, 0x00) >> 4,
1123 saa7114_read(client, 0x1f));
1126 "%s_attach: power save control: 0x%02x, scaler status: 0x%02x\n",
1127 I2C_NAME(client), saa7114_read(client, 0x88),
1128 saa7114_read(client, 0x8f));
1131 for (i = 0x94; i < 0x96; i++) {
1134 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1135 I2C_NAME(client), i, saa7114_read(client, i),
1136 decoder->reg[REG_ADDR(i)]);
1139 i = i2c_attach_client(client);
1146 //i = saa7114_write_block(client, init, sizeof(init));
1149 dprintk(1, KERN_ERR "%s_attach error: init status %d\n",
1150 I2C_NAME(client), i);
1154 "%s_attach: chip version %x at address 0x%x\n",
1155 I2C_NAME(client), saa7114_read(client, 0x00) >> 4,
1163 saa7114_attach_adapter (struct i2c_adapter *adapter)
1167 "saa7114.c: starting probe for adapter %s (0x%x)\n",
1168 I2C_NAME(adapter), adapter->id);
1169 return i2c_probe(adapter, &addr_data, &saa7114_detect_client);
1173 saa7114_detach_client (struct i2c_client *client)
1175 struct saa7114 *decoder = i2c_get_clientdata(client);
1178 err = i2c_detach_client(client);
1189 /* ----------------------------------------------------------------------- */
1191 static struct i2c_driver i2c_driver_saa7114 = {
1196 .id = I2C_DRIVERID_SAA7114,
1198 .attach_adapter = saa7114_attach_adapter,
1199 .detach_client = saa7114_detach_client,
1200 .command = saa7114_command,
1206 return i2c_add_driver(&i2c_driver_saa7114);
1212 i2c_del_driver(&i2c_driver_saa7114);
1215 module_init(saa7114_init);
1216 module_exit(saa7114_exit);