Merge branch 'for-2.6.25' of git://git.secretlab.ca/git/linux-2.6-mpc52xx into for...
[linux-2.6] / arch / arm / mach-pxa / littleton.c
1 /*
2  *  linux/arch/arm/mach-pxa/littleton.c
3  *
4  *  Support for the Marvell Littleton Development Platform.
5  *
6  *  Author:     Jason Chagas (largely modified code)
7  *  Created:    Nov 20, 2006
8  *  Copyright:  (C) Copyright 2006 Marvell International Ltd.
9  *
10  *  2007-11-22  modified to align with latest kernel
11  *              eric miao <eric.miao@marvell.com>
12  *
13  *  This program is free software; you can redistribute it and/or modify
14  *  it under the terms of the GNU General Public License version 2 as
15  *  publishhed by the Free Software Foundation.
16  */
17
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/delay.h>
21 #include <linux/platform_device.h>
22 #include <linux/clk.h>
23
24 #include <asm/types.h>
25 #include <asm/setup.h>
26 #include <asm/memory.h>
27 #include <asm/mach-types.h>
28 #include <asm/hardware.h>
29 #include <asm/irq.h>
30
31 #include <asm/mach/arch.h>
32 #include <asm/mach/map.h>
33 #include <asm/mach/irq.h>
34
35 #include <asm/arch/pxa-regs.h>
36 #include <asm/arch/mfp-pxa300.h>
37 #include <asm/arch/gpio.h>
38 #include <asm/arch/pxafb.h>
39 #include <asm/arch/ssp.h>
40 #include <asm/arch/littleton.h>
41
42 #include "generic.h"
43
44 #define ARRAY_AND_SIZE(x)       (x), ARRAY_SIZE(x)
45
46 /* Littleton MFP configurations */
47 static mfp_cfg_t littleton_mfp_cfg[] __initdata = {
48         /* LCD */
49         GPIO54_LCD_LDD_0,
50         GPIO55_LCD_LDD_1,
51         GPIO56_LCD_LDD_2,
52         GPIO57_LCD_LDD_3,
53         GPIO58_LCD_LDD_4,
54         GPIO59_LCD_LDD_5,
55         GPIO60_LCD_LDD_6,
56         GPIO61_LCD_LDD_7,
57         GPIO62_LCD_LDD_8,
58         GPIO63_LCD_LDD_9,
59         GPIO64_LCD_LDD_10,
60         GPIO65_LCD_LDD_11,
61         GPIO66_LCD_LDD_12,
62         GPIO67_LCD_LDD_13,
63         GPIO68_LCD_LDD_14,
64         GPIO69_LCD_LDD_15,
65         GPIO70_LCD_LDD_16,
66         GPIO71_LCD_LDD_17,
67         GPIO72_LCD_FCLK,
68         GPIO73_LCD_LCLK,
69         GPIO74_LCD_PCLK,
70         GPIO75_LCD_BIAS,
71
72         /* SSP2 */
73         GPIO25_SSP2_SCLK,
74         GPIO17_SSP2_FRM,
75         GPIO27_SSP2_TXD,
76
77         /* Debug Ethernet */
78         GPIO90_GPIO,
79 };
80
81 static struct resource smc91x_resources[] = {
82         [0] = {
83                 .start  = (LITTLETON_ETH_PHYS + 0x300),
84                 .end    = (LITTLETON_ETH_PHYS + 0xfffff),
85                 .flags  = IORESOURCE_MEM,
86         },
87         [1] = {
88                 .start  = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)),
89                 .end    = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)),
90                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
91         }
92 };
93
94 static struct platform_device smc91x_device = {
95         .name           = "smc91x",
96         .id             = 0,
97         .num_resources  = ARRAY_SIZE(smc91x_resources),
98         .resource       = smc91x_resources,
99 };
100
101 #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULES)
102 /* use bit 30, 31 as the indicator of command parameter number */
103 #define CMD0(x)         ((0x00000000) | ((x) << 9))
104 #define CMD1(x, x1)     ((0x40000000) | ((x) << 9) | 0x100 | (x1))
105 #define CMD2(x, x1, x2) ((0x80000000) | ((x) << 18) | 0x20000 |\
106                          ((x1) << 9) | 0x100 | (x2))
107
108 static uint32_t lcd_panel_reset[] = {
109         CMD0(0x1), /* reset */
110         CMD0(0x0), /* nop */
111         CMD0(0x0), /* nop */
112         CMD0(0x0), /* nop */
113 };
114
115 static uint32_t lcd_panel_on[] = {
116         CMD0(0x29),             /* Display ON */
117         CMD2(0xB8, 0xFF, 0xF9), /* Output Control */
118         CMD0(0x11),             /* Sleep out */
119         CMD1(0xB0, 0x16),       /* Wake */
120 };
121
122 static uint32_t lcd_panel_off[] = {
123         CMD0(0x28),             /* Display OFF */
124         CMD2(0xB8, 0x80, 0x02), /* Output Control */
125         CMD0(0x10),             /* Sleep in */
126         CMD1(0xB0, 0x00),       /* Deep stand by in */
127 };
128
129 static uint32_t lcd_vga_pass_through[] = {
130         CMD1(0xB0, 0x16),
131         CMD1(0xBC, 0x80),
132         CMD1(0xE1, 0x00),
133         CMD1(0x36, 0x50),
134         CMD1(0x3B, 0x00),
135 };
136
137 static uint32_t lcd_qvga_pass_through[] = {
138         CMD1(0xB0, 0x16),
139         CMD1(0xBC, 0x81),
140         CMD1(0xE1, 0x00),
141         CMD1(0x36, 0x50),
142         CMD1(0x3B, 0x22),
143 };
144
145 static uint32_t lcd_vga_transfer[] = {
146         CMD1(0xcf, 0x02),       /* Blanking period control (1) */
147         CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
148         CMD1(0xd1, 0x01),       /* CKV timing control on/off */
149         CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */
150         CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */
151         CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */
152         CMD1(0xd5, 0x14),       /* ASW timing control (2) */
153         CMD0(0x21),             /* Invert for normally black display */
154         CMD0(0x29),             /* Display on */
155 };
156
157 static uint32_t lcd_qvga_transfer[] = {
158         CMD1(0xd6, 0x02),       /* Blanking period control (1) */
159         CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */
160         CMD1(0xd8, 0x01),       /* CKV timing control on/off */
161         CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */
162         CMD2(0xde, 0x05, 0x0a), /* OEV timing control */
163         CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */
164         CMD1(0xe0, 0x0a),       /* ASW timing control (2) */
165         CMD0(0x21),             /* Invert for normally black display */
166         CMD0(0x29),             /* Display on */
167 };
168
169 static uint32_t lcd_panel_config[] = {
170         CMD2(0xb8, 0xff, 0xf9), /* Output control */
171         CMD0(0x11),             /* sleep out */
172         CMD1(0xba, 0x01),       /* Display mode (1) */
173         CMD1(0xbb, 0x00),       /* Display mode (2) */
174         CMD1(0x3a, 0x60),       /* Display mode 18-bit RGB */
175         CMD1(0xbf, 0x10),       /* Drive system change control */
176         CMD1(0xb1, 0x56),       /* Booster operation setup */
177         CMD1(0xb2, 0x33),       /* Booster mode setup */
178         CMD1(0xb3, 0x11),       /* Booster frequency setup */
179         CMD1(0xb4, 0x02),       /* Op amp/system clock */
180         CMD1(0xb5, 0x35),       /* VCS voltage */
181         CMD1(0xb6, 0x40),       /* VCOM voltage */
182         CMD1(0xb7, 0x03),       /* External display signal */
183         CMD1(0xbd, 0x00),       /* ASW slew rate */
184         CMD1(0xbe, 0x00),       /* Dummy data for QuadData operation */
185         CMD1(0xc0, 0x11),       /* Sleep out FR count (A) */
186         CMD1(0xc1, 0x11),       /* Sleep out FR count (B) */
187         CMD1(0xc2, 0x11),       /* Sleep out FR count (C) */
188         CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */
189         CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */
190         CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */
191         CMD1(0xc6, 0xc0),       /* Sleep out FR count (G) */
192         CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */
193         CMD1(0xc8, 0x44),       /* Gamma 1 fine tuning (2) */
194         CMD1(0xc9, 0x33),       /* Gamma 1 inclination adjustment */
195         CMD1(0xca, 0x00),       /* Gamma 1 blue offset adjustment */
196         CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */
197 };
198
199 static void ssp_reconfig(struct ssp_dev *dev, int nparam)
200 {
201         static int last_nparam = -1;
202
203         /* check if it is necessary to re-config SSP */
204         if (nparam == last_nparam)
205                 return;
206
207         ssp_disable(dev);
208         ssp_config(dev, (nparam == 2) ? 0x0010058a : 0x00100581, 0x18, 0, 0);
209
210         last_nparam = nparam;
211 }
212
213 static void ssp_send_cmd(uint32_t *cmd, int num)
214 {
215         static int ssp_initialized;
216         static struct ssp_dev ssp2;
217
218         int i;
219
220         if (!ssp_initialized) {
221                 ssp_init(&ssp2, 2, SSP_NO_IRQ);
222                 ssp_initialized = 1;
223         }
224
225         clk_enable(ssp2.ssp->clk);
226         for (i = 0; i < num; i++, cmd++) {
227                 ssp_reconfig(&ssp2, (*cmd >> 30) & 0x3);
228                 ssp_write_word(&ssp2, *cmd & 0x3fffffff);
229
230                 /* FIXME: ssp_flush() is mandatory here to work */
231                 ssp_flush(&ssp2);
232         }
233         clk_disable(ssp2.ssp->clk);
234 }
235
236 static void littleton_lcd_power(int on, struct fb_var_screeninfo *var)
237 {
238         if (on) {
239                 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_on));
240                 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_reset));
241                 if (var->xres > 240) {
242                         /* VGA */
243                         ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_pass_through));
244                         ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config));
245                         ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_transfer));
246                 } else {
247                         /* QVGA */
248                         ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_pass_through));
249                         ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config));
250                         ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_transfer));
251                 }
252         } else
253                 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_off));
254 }
255
256 static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = {
257         [0] = {
258                 /* VGA */
259                 .pixclock       = 38250,
260                 .xres           = 480,
261                 .yres           = 640,
262                 .bpp            = 16,
263                 .hsync_len      = 8,
264                 .left_margin    = 8,
265                 .right_margin   = 24,
266                 .vsync_len      = 2,
267                 .upper_margin   = 2,
268                 .lower_margin   = 4,
269                 .sync           = 0,
270         },
271         [1] = {
272                 /* QVGA */
273                 .pixclock       = 153000,
274                 .xres           = 240,
275                 .yres           = 320,
276                 .bpp            = 16,
277                 .hsync_len      = 8,
278                 .left_margin    = 8,
279                 .right_margin   = 88,
280                 .vsync_len      = 2,
281                 .upper_margin   = 2,
282                 .lower_margin   = 2,
283                 .sync           = 0,
284         },
285 };
286
287 static struct pxafb_mach_info littleton_lcd_info = {
288         .modes                  = tpo_tdo24mtea1_modes,
289         .num_modes              = 2,
290         .lccr0                  = LCCR0_Act,
291         .lccr3                  = LCCR3_HSP | LCCR3_VSP,
292         .pxafb_lcd_power        = littleton_lcd_power,
293 };
294
295 static void littleton_init_lcd(void)
296 {
297         set_pxa_fb_info(&littleton_lcd_info);
298 }
299 #else
300 static inline void littleton_init_lcd(void) {};
301 #endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULES */
302
303 static void __init littleton_init(void)
304 {
305         /* initialize MFP configurations */
306         pxa3xx_mfp_config(ARRAY_AND_SIZE(littleton_mfp_cfg));
307
308         /*
309          * Note: we depend bootloader set the correct
310          * value to MSC register for SMC91x.
311          */
312         platform_device_register(&smc91x_device);
313
314         littleton_init_lcd();
315 }
316
317 MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)")
318         .phys_io        = 0x40000000,
319         .boot_params    = 0xa0000100,
320         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
321         .map_io         = pxa_map_io,
322         .init_irq       = pxa3xx_init_irq,
323         .timer          = &pxa_timer,
324         .init_machine   = littleton_init,
325 MACHINE_END