2 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
3 * Copyright (C) 1995-1998 Mark Lord
4 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
6 * May be copied or modified under the terms of the GNU General Public License
9 #include <linux/module.h>
10 #include <linux/types.h>
11 #include <linux/kernel.h>
12 #include <linux/pci.h>
13 #include <linux/init.h>
14 #include <linux/timer.h>
16 #include <linux/interrupt.h>
17 #include <linux/ide.h>
18 #include <linux/dma-mapping.h>
25 * ide_match_hwif - match a PCI IDE against an ide_hwif
26 * @io_base: I/O base of device
27 * @bootable: set if its bootable
28 * @name: name of device
30 * Match a PCI IDE port against an entry in ide_hwifs[],
31 * based on io_base port if possible. Return the matching hwif,
32 * or a new hwif. If we find an error (clashing, out of devices, etc)
35 * FIXME: we need to handle mmio matches here too
38 static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name)
44 * Look for a hwif with matching io_base specified using
45 * parameters to ide_setup().
47 for (h = 0; h < MAX_HWIFS; ++h) {
49 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
50 if (hwif->chipset == ide_forced)
51 return hwif; /* a perfect match */
55 * Look for a hwif with matching io_base default value.
56 * If chipset is "ide_unknown", then claim that hwif slot.
57 * Otherwise, some other chipset has already claimed it.. :(
59 for (h = 0; h < MAX_HWIFS; ++h) {
61 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
62 if (hwif->chipset == ide_unknown)
63 return hwif; /* match */
64 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n",
65 name, io_base, hwif->name);
66 return NULL; /* already claimed */
70 * Okay, there is no hwif matching our io_base,
71 * so we'll just claim an unassigned slot.
72 * Give preference to claiming other slots before claiming ide0/ide1,
73 * just in case there's another interface yet-to-be-scanned
74 * which uses ports 1f0/170 (the ide0/ide1 defaults).
76 * Unless there is a bootable card that does not use the standard
77 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag.
80 for (h = 0; h < MAX_HWIFS; ++h) {
82 if (hwif->chipset == ide_unknown)
83 return hwif; /* pick an unused entry */
86 for (h = 2; h < MAX_HWIFS; ++h) {
88 if (hwif->chipset == ide_unknown)
89 return hwif; /* pick an unused entry */
92 for (h = 0; h < 2 && h < MAX_HWIFS; ++h) {
94 if (hwif->chipset == ide_unknown)
95 return hwif; /* pick an unused entry */
97 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name);
102 * ide_setup_pci_baseregs - place a PCI IDE controller native
103 * @dev: PCI device of interface to switch native
104 * @name: Name of interface
106 * We attempt to place the PCI interface into PCI native mode. If
107 * we succeed the BARs are ok and the controller is in PCI mode.
108 * Returns 0 on success or an errno code.
110 * FIXME: if we program the interface and then fail to set the BARS
111 * we don't switch it back to legacy mode. Do we actually care ??
114 static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name)
119 * Place both IDE interfaces into PCI "native" mode:
121 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
123 if ((progif & 0xa) != 0xa) {
124 printk(KERN_INFO "%s: device not capable of full "
125 "native PCI mode\n", name);
128 printk("%s: placing both ports into native PCI mode\n", name);
129 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
130 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
132 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
133 "0x%04x, got 0x%04x\n",
134 name, progif|5, progif);
141 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
142 static void ide_pci_clear_simplex(unsigned long dma_base, const char *name)
144 u8 dma_stat = inb(dma_base + 2);
146 outb(dma_stat & 0x60, dma_base + 2);
147 dma_stat = inb(dma_base + 2);
149 printk(KERN_INFO "%s: simplex device: DMA forced\n", name);
153 * ide_get_or_set_dma_base - setup BMIBA
155 * @hwif: IDE interface
157 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space.
158 * Where a device has a partner that is already in DMA mode we check
159 * and enforce IDE simplex rules.
162 static unsigned long ide_get_or_set_dma_base(const struct ide_port_info *d, ide_hwif_t *hwif)
164 struct pci_dev *dev = to_pci_dev(hwif->dev);
165 unsigned long dma_base = 0;
169 return hwif->dma_base;
171 if (hwif->mate && hwif->mate->dma_base) {
172 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
174 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4;
176 dma_base = pci_resource_start(dev, baridx);
179 printk(KERN_ERR "%s: DMA base is invalid\n", d->name);
187 if (d->host_flags & IDE_HFLAG_CS5520)
190 if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) {
191 ide_pci_clear_simplex(dma_base, d->name);
196 * If the device claims "simplex" DMA, this means that only one of
197 * the two interfaces can be trusted with DMA at any point in time
198 * (so we should enable DMA only on one of the two interfaces).
200 * FIXME: At this point we haven't probed the drives so we can't make
201 * the appropriate decision. Really we should defer this problem until
202 * we tune the drive then try to grab DMA ownership if we want to be
203 * the DMA end. This has to be become dynamic to handle hot-plug.
205 dma_stat = hwif->INB(dma_base + 2);
206 if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) {
207 printk(KERN_INFO "%s: simplex device: DMA disabled\n", d->name);
213 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
215 void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d)
217 printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at "
218 " PCI slot %s\n", d->name, dev->vendor, dev->device,
219 dev->revision, pci_name(dev));
222 EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
226 * ide_pci_enable - do PCI enables
230 * Enable the IDE PCI device. We attempt to enable the device in full
231 * but if that fails then we only need IO space. The PCI code should
232 * have setup the proper resources for us already for controllers in
235 * Returns zero on success or an error code
238 static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d)
242 if (pci_enable_device(dev)) {
243 ret = pci_enable_device_io(dev);
245 printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
246 "Could not enable device.\n", d->name);
249 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name);
253 * assume all devices can do 32-bit DMA for now, we can add
254 * a DMA mask field to the struct ide_port_info if we need it
255 * (or let lower level driver set the DMA mask)
257 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK);
259 printk(KERN_ERR "%s: can't set dma mask\n", d->name);
263 /* FIXME: Temporary - until we put in the hotplug interface logic
264 Check that the bits we want are not in use by someone else. */
265 ret = pci_request_region(dev, 4, "ide_tmp");
269 pci_release_region(dev, 4);
275 * ide_pci_configure - configure an unconfigured device
279 * Enable and configure the PCI device we have been passed.
280 * Returns zero on success or an error code.
283 static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d)
287 * PnP BIOS was *supposed* to have setup this device, but we
288 * can do it ourselves, so long as the BIOS has assigned an IRQ
289 * (or possibly the device is using a "legacy header" for IRQs).
290 * Maybe the user deliberately *disabled* the device,
291 * but we'll eventually ignore it again if no drives respond.
293 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO))
295 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
298 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
299 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
302 if (!(pcicmd & PCI_COMMAND_IO)) {
303 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
310 * ide_pci_check_iomem - check a register is I/O
315 * Checks if a BAR is configured and points to MMIO space. If so
316 * print an error and return an error code. Otherwise return 0
319 static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, int bar)
321 ulong flags = pci_resource_flags(dev, bar);
324 if (!flags || pci_resource_len(dev, bar) == 0)
328 if(flags & PCI_BASE_ADDRESS_IO_MASK)
332 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported "
334 "<andre@linux-ide.org>.\n", d->name);
339 * ide_hwif_configure - configure an IDE interface
340 * @dev: PCI device holding interface
345 * Perform the initial set up for the hardware interface structure. This
346 * is done per interface port rather than per PCI device. There may be
347 * more than one port per device.
349 * Returns the new hardware interface structure, or NULL on a failure
352 static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev,
353 const struct ide_port_info *d,
354 unsigned int port, int irq)
356 unsigned long ctl = 0, base = 0;
358 u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0;
362 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
363 /* Possibly we should fail if these checks report true */
364 ide_pci_check_iomem(dev, d, 2*port);
365 ide_pci_check_iomem(dev, d, 2*port+1);
367 ctl = pci_resource_start(dev, 2*port+1);
368 base = pci_resource_start(dev, 2*port);
369 if ((ctl && !base) || (base && !ctl)) {
370 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) "
371 "for port %d, skipping\n", d->name, port);
377 /* Use default values */
378 ctl = port ? 0x374 : 0x3f4;
379 base = port ? 0x170 : 0x1f0;
381 if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL)
382 return NULL; /* no room in ide_hwifs[] */
384 memset(&hw, 0, sizeof(hw));
385 hw.irq = hwif->irq ? hwif->irq : irq;
387 hw.chipset = d->chipset ? d->chipset : ide_pci;
388 ide_std_init_ports(&hw, base, ctl | 2);
390 if (hwif->io_ports[IDE_DATA_OFFSET] == base &&
391 hwif->io_ports[IDE_CONTROL_OFFSET] == (ctl | 2))
392 oldnoprobe = hwif->noprobe;
394 ide_init_port_hw(hwif, &hw);
396 hwif->noprobe = oldnoprobe;
398 hwif->dev = &dev->dev;
404 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
406 * ide_hwif_setup_dma - configure DMA interface
407 * @hwif: IDE interface
410 * Set up the DMA base for the interface. Enable the master bits as
411 * necessary and attempt to bring the device DMA into a ready to use
415 void ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d)
417 struct pci_dev *dev = to_pci_dev(hwif->dev);
420 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
422 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 ||
423 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
424 (dev->class & 0x80))) {
425 unsigned long dma_base = ide_get_or_set_dma_base(d, hwif);
426 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) {
428 * Set up BM-DMA capability
429 * (PnP BIOS should have done this)
432 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) {
433 printk(KERN_ERR "%s: %s error updating PCICMD\n",
434 hwif->name, d->name);
440 d->init_dma(hwif, dma_base);
442 ide_setup_dma(hwif, dma_base);
445 printk(KERN_INFO "%s: %s Bus-Master DMA disabled "
446 "(BIOS)\n", hwif->name, d->name);
450 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
453 * ide_setup_pci_controller - set up IDE PCI
456 * @noisy: verbose flag
457 * @config: returned as 1 if we configured the hardware
459 * Set up the PCI and controller side of the IDE interface. This brings
460 * up the PCI side of the device, checks that the device is enabled
461 * and enables it if need be
464 static int ide_setup_pci_controller(struct pci_dev *dev, const struct ide_port_info *d, int noisy, int *config)
470 ide_setup_pci_noise(dev, d);
472 ret = ide_pci_enable(dev, d);
476 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
478 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
481 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
482 ret = ide_pci_configure(dev, d);
486 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
494 * ide_pci_setup_ports - configure ports/devices on PCI IDE
498 * @idx: ATA index table to update
500 * Scan the interfaces attached to this device and do any
501 * necessary per port setup. Attach the devices and ask the
502 * generic DMA layer to do its work for us.
504 * Normally called automaticall from do_ide_pci_setup_device,
505 * but is also used directly as a helper function by some controllers
506 * where the chipset setup is not the default PCI IDE one.
509 void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int pciirq, u8 *idx)
511 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
516 * Set up the IDE ports
519 for (port = 0; port < channels; ++port) {
520 const ide_pci_enablebit_t *e = &(d->enablebits[port]);
522 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
523 (tmp & e->mask) != e->val)) {
524 printk(KERN_INFO "%s: IDE port disabled\n", d->name);
525 continue; /* port not enabled */
528 hwif = ide_hwif_configure(dev, d, port, pciirq);
532 *(idx + port) = hwif->index;
536 EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
539 * ide_setup_pci_device() looks at the primary/secondary interfaces
540 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
541 * for use with them. This generic code works for most PCI chipsets.
543 * One thing that is not standardized is the location of the
544 * primary/secondary interface "enable/disable" bits. For chipsets that
545 * we "know" about, this information is in the struct ide_port_info;
546 * for all other chipsets, we just assume both interfaces are enabled.
548 static int do_ide_setup_pci_device(struct pci_dev *dev,
549 const struct ide_port_info *d,
552 int tried_config = 0;
555 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config);
560 * Can we trust the reported IRQ?
564 /* Is it an "IDE storage" device in non-PCI mode? */
565 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) {
567 printk(KERN_INFO "%s: not 100%% native mode: "
568 "will probe irqs later\n", d->name);
570 * This allows offboard ide-pci cards the enable a BIOS,
571 * verify interrupt settings of split-mirror pci-config
572 * space, place chipset into init-mode, and/or preserve
573 * an interrupt if the card is not native ide support.
575 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0;
579 } else if (tried_config) {
581 printk(KERN_INFO "%s: will probe irqs later\n", d->name);
583 } else if (!pciirq) {
585 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
589 if (d->init_chipset) {
590 ret = d->init_chipset(dev, d->name);
595 printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
599 /* FIXME: silent failure can happen */
601 ide_pci_setup_ports(dev, d, pciirq, idx);
606 int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d)
608 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
611 ret = do_ide_setup_pci_device(dev, d, &idx[0], 1);
614 ide_device_add(idx, d);
619 EXPORT_SYMBOL_GPL(ide_setup_pci_device);
621 int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2,
622 const struct ide_port_info *d)
624 struct pci_dev *pdev[] = { dev1, dev2 };
626 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
628 for (i = 0; i < 2; i++) {
629 ret = do_ide_setup_pci_device(pdev[i], d, &idx[i*2], !i);
631 * FIXME: Mom, mom, they stole me the helper function to undo
632 * do_ide_setup_pci_device() on the first device!
638 ide_device_add(idx, d);
643 EXPORT_SYMBOL_GPL(ide_setup_pci_devices);