tg3: WOL fixes
[linux-2.6] / drivers / net / enic / cq_enet_desc.h
1 /*
2  * Copyright 2008 Cisco Systems, Inc.  All rights reserved.
3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
4  *
5  * This program is free software; you may redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; version 2 of the License.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16  * SOFTWARE.
17  *
18  */
19
20 #ifndef _CQ_ENET_DESC_H_
21 #define _CQ_ENET_DESC_H_
22
23 #include "cq_desc.h"
24
25 /* Ethernet completion queue descriptor: 16B */
26 struct cq_enet_wq_desc {
27         __le16 completed_index;
28         __le16 q_number;
29         u8 reserved[11];
30         u8 type_color;
31 };
32
33 static inline void cq_enet_wq_desc_dec(struct cq_enet_wq_desc *desc,
34         u8 *type, u8 *color, u16 *q_number, u16 *completed_index)
35 {
36         cq_desc_dec((struct cq_desc *)desc, type,
37                 color, q_number, completed_index);
38 }
39
40 /* Completion queue descriptor: Ethernet receive queue, 16B */
41 struct cq_enet_rq_desc {
42         __le16 completed_index_flags;
43         __le16 q_number_rss_type_flags;
44         __le32 rss_hash;
45         __le16 bytes_written_flags;
46         __le16 vlan;
47         __le16 checksum_fcoe;
48         u8 flags;
49         u8 type_color;
50 };
51
52 #define CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT          (0x1 << 12)
53 #define CQ_ENET_RQ_DESC_FLAGS_FCOE                  (0x1 << 13)
54 #define CQ_ENET_RQ_DESC_FLAGS_EOP                   (0x1 << 14)
55 #define CQ_ENET_RQ_DESC_FLAGS_SOP                   (0x1 << 15)
56
57 #define CQ_ENET_RQ_DESC_RSS_TYPE_BITS               4
58 #define CQ_ENET_RQ_DESC_RSS_TYPE_MASK \
59         ((1 << CQ_ENET_RQ_DESC_RSS_TYPE_BITS) - 1)
60 #define CQ_ENET_RQ_DESC_RSS_TYPE_NONE               0
61 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv4               1
62 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4           2
63 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6               3
64 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6           4
65 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX            5
66 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX        6
67
68 #define CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC         (0x1 << 14)
69
70 #define CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS          14
71 #define CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK \
72         ((1 << CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS) - 1)
73 #define CQ_ENET_RQ_DESC_FLAGS_TRUNCATED             (0x1 << 14)
74 #define CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED         (0x1 << 15)
75
76 #define CQ_ENET_RQ_DESC_FCOE_SOF_BITS               4
77 #define CQ_ENET_RQ_DESC_FCOE_SOF_MASK \
78         ((1 << CQ_ENET_RQ_DESC_FCOE_SOF_BITS) - 1)
79 #define CQ_ENET_RQ_DESC_FCOE_EOF_BITS               8
80 #define CQ_ENET_RQ_DESC_FCOE_EOF_MASK \
81         ((1 << CQ_ENET_RQ_DESC_FCOE_EOF_BITS) - 1)
82 #define CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT              8
83
84 #define CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK       (0x1 << 0)
85 #define CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK              (0x1 << 0)
86 #define CQ_ENET_RQ_DESC_FLAGS_UDP                   (0x1 << 1)
87 #define CQ_ENET_RQ_DESC_FCOE_ENC_ERROR              (0x1 << 1)
88 #define CQ_ENET_RQ_DESC_FLAGS_TCP                   (0x1 << 2)
89 #define CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK          (0x1 << 3)
90 #define CQ_ENET_RQ_DESC_FLAGS_IPV6                  (0x1 << 4)
91 #define CQ_ENET_RQ_DESC_FLAGS_IPV4                  (0x1 << 5)
92 #define CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT         (0x1 << 6)
93 #define CQ_ENET_RQ_DESC_FLAGS_FCS_OK                (0x1 << 7)
94
95 static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc,
96         u8 *type, u8 *color, u16 *q_number, u16 *completed_index,
97         u8 *ingress_port, u8 *fcoe, u8 *eop, u8 *sop, u8 *rss_type,
98         u8 *csum_not_calc, u32 *rss_hash, u16 *bytes_written, u8 *packet_error,
99         u8 *vlan_stripped, u16 *vlan, u16 *checksum, u8 *fcoe_sof,
100         u8 *fcoe_fc_crc_ok, u8 *fcoe_enc_error, u8 *fcoe_eof,
101         u8 *tcp_udp_csum_ok, u8 *udp, u8 *tcp, u8 *ipv4_csum_ok,
102         u8 *ipv6, u8 *ipv4, u8 *ipv4_fragment, u8 *fcs_ok)
103 {
104         u16 completed_index_flags = le16_to_cpu(desc->completed_index_flags);
105         u16 q_number_rss_type_flags =
106                 le16_to_cpu(desc->q_number_rss_type_flags);
107         u16 bytes_written_flags = le16_to_cpu(desc->bytes_written_flags);
108
109         cq_desc_dec((struct cq_desc *)desc, type,
110                 color, q_number, completed_index);
111
112         *ingress_port = (completed_index_flags &
113                 CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT) ? 1 : 0;
114         *fcoe = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_FCOE) ?
115                 1 : 0;
116         *eop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_EOP) ?
117                 1 : 0;
118         *sop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_SOP) ?
119                 1 : 0;
120
121         *rss_type = (u8)((q_number_rss_type_flags >> CQ_DESC_Q_NUM_BITS) &
122                 CQ_ENET_RQ_DESC_RSS_TYPE_MASK);
123         *csum_not_calc = (q_number_rss_type_flags &
124                 CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ? 1 : 0;
125
126         *rss_hash = le32_to_cpu(desc->rss_hash);
127
128         *bytes_written = bytes_written_flags &
129                 CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;
130         *packet_error = (bytes_written_flags &
131                 CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ? 1 : 0;
132         *vlan_stripped = (bytes_written_flags &
133                 CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) ? 1 : 0;
134
135         *vlan = le16_to_cpu(desc->vlan);
136
137         if (*fcoe) {
138                 *fcoe_sof = (u8)(le16_to_cpu(desc->checksum_fcoe) &
139                         CQ_ENET_RQ_DESC_FCOE_SOF_MASK);
140                 *fcoe_fc_crc_ok = (desc->flags &
141                         CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0;
142                 *fcoe_enc_error = (desc->flags &
143                         CQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0;
144                 *fcoe_eof = (u8)((desc->checksum_fcoe >>
145                         CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) &
146                         CQ_ENET_RQ_DESC_FCOE_EOF_MASK);
147                 *checksum = 0;
148         } else {
149                 *fcoe_sof = 0;
150                 *fcoe_fc_crc_ok = 0;
151                 *fcoe_enc_error = 0;
152                 *fcoe_eof = 0;
153                 *checksum = le16_to_cpu(desc->checksum_fcoe);
154         }
155
156         *tcp_udp_csum_ok =
157                 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ? 1 : 0;
158         *udp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_UDP) ? 1 : 0;
159         *tcp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP) ? 1 : 0;
160         *ipv4_csum_ok =
161                 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ? 1 : 0;
162         *ipv6 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV6) ? 1 : 0;
163         *ipv4 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4) ? 1 : 0;
164         *ipv4_fragment =
165                 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT) ? 1 : 0;
166         *fcs_ok = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_FCS_OK) ? 1 : 0;
167 }
168
169 #endif /* _CQ_ENET_DESC_H_ */