2 * Platform device support for Au1x00 SoCs.
4 * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
6 * (C) Copyright Embedded Alley Solutions, Inc 2005
7 * Author: Pantelis Antoniou <pantelis@embeddedalley.com>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #include <linux/dma-mapping.h>
15 #include <linux/platform_device.h>
16 #include <linux/serial_8250.h>
17 #include <linux/init.h>
19 #include <asm/mach-au1x00/au1xxx.h>
21 #define PORT(_base, _irq) \
24 .membase = (void __iomem *)_base,\
25 .mapbase = CPHYSADDR(_base), \
29 .flags = UPF_SKIP_TEST \
32 static struct plat_serial8250_port au1x00_uart_data[] = {
33 #if defined(CONFIG_SERIAL_8250_AU1X00)
34 #if defined(CONFIG_SOC_AU1000)
35 PORT(UART0_ADDR, AU1000_UART0_INT),
36 PORT(UART1_ADDR, AU1000_UART1_INT),
37 PORT(UART2_ADDR, AU1000_UART2_INT),
38 PORT(UART3_ADDR, AU1000_UART3_INT),
39 #elif defined(CONFIG_SOC_AU1500)
40 PORT(UART0_ADDR, AU1500_UART0_INT),
41 PORT(UART3_ADDR, AU1500_UART3_INT),
42 #elif defined(CONFIG_SOC_AU1100)
43 PORT(UART0_ADDR, AU1100_UART0_INT),
44 PORT(UART1_ADDR, AU1100_UART1_INT),
45 PORT(UART3_ADDR, AU1100_UART3_INT),
46 #elif defined(CONFIG_SOC_AU1550)
47 PORT(UART0_ADDR, AU1550_UART0_INT),
48 PORT(UART1_ADDR, AU1550_UART1_INT),
49 PORT(UART3_ADDR, AU1550_UART3_INT),
50 #elif defined(CONFIG_SOC_AU1200)
51 PORT(UART0_ADDR, AU1200_UART0_INT),
52 PORT(UART1_ADDR, AU1200_UART1_INT),
54 #endif /* CONFIG_SERIAL_8250_AU1X00 */
58 static struct platform_device au1xx0_uart_device = {
60 .id = PLAT8250_DEV_AU1X00,
62 .platform_data = au1x00_uart_data,
66 /* OHCI (USB full speed host controller) */
67 static struct resource au1xxx_usb_ohci_resources[] = {
69 .start = USB_OHCI_BASE,
70 .end = USB_OHCI_BASE + USB_OHCI_LEN - 1,
71 .flags = IORESOURCE_MEM,
74 .start = AU1000_USB_HOST_INT,
75 .end = AU1000_USB_HOST_INT,
76 .flags = IORESOURCE_IRQ,
80 /* The dmamask must be set for OHCI to work */
81 static u64 ohci_dmamask = DMA_32BIT_MASK;
83 static struct platform_device au1xxx_usb_ohci_device = {
84 .name = "au1xxx-ohci",
87 .dma_mask = &ohci_dmamask,
88 .coherent_dma_mask = DMA_32BIT_MASK,
90 .num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
91 .resource = au1xxx_usb_ohci_resources,
94 /*** AU1100 LCD controller ***/
96 #ifdef CONFIG_FB_AU1100
97 static struct resource au1100_lcd_resources[] = {
99 .start = LCD_PHYS_ADDR,
100 .end = LCD_PHYS_ADDR + 0x800 - 1,
101 .flags = IORESOURCE_MEM,
104 .start = AU1100_LCD_INT,
105 .end = AU1100_LCD_INT,
106 .flags = IORESOURCE_IRQ,
110 static u64 au1100_lcd_dmamask = DMA_32BIT_MASK;
112 static struct platform_device au1100_lcd_device = {
113 .name = "au1100-lcd",
116 .dma_mask = &au1100_lcd_dmamask,
117 .coherent_dma_mask = DMA_32BIT_MASK,
119 .num_resources = ARRAY_SIZE(au1100_lcd_resources),
120 .resource = au1100_lcd_resources,
124 #ifdef CONFIG_SOC_AU1200
125 /* EHCI (USB high speed host controller) */
126 static struct resource au1xxx_usb_ehci_resources[] = {
128 .start = USB_EHCI_BASE,
129 .end = USB_EHCI_BASE + USB_EHCI_LEN - 1,
130 .flags = IORESOURCE_MEM,
133 .start = AU1000_USB_HOST_INT,
134 .end = AU1000_USB_HOST_INT,
135 .flags = IORESOURCE_IRQ,
139 static u64 ehci_dmamask = DMA_32BIT_MASK;
141 static struct platform_device au1xxx_usb_ehci_device = {
142 .name = "au1xxx-ehci",
145 .dma_mask = &ehci_dmamask,
146 .coherent_dma_mask = DMA_32BIT_MASK,
148 .num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
149 .resource = au1xxx_usb_ehci_resources,
152 /* Au1200 UDC (USB gadget controller) */
153 static struct resource au1xxx_usb_gdt_resources[] = {
155 .start = USB_UDC_BASE,
156 .end = USB_UDC_BASE + USB_UDC_LEN - 1,
157 .flags = IORESOURCE_MEM,
160 .start = AU1200_USB_INT,
161 .end = AU1200_USB_INT,
162 .flags = IORESOURCE_IRQ,
166 static struct resource au1xxx_mmc_resources[] = {
168 .start = SD0_PHYS_ADDR,
169 .end = SD0_PHYS_ADDR + 0x7ffff,
170 .flags = IORESOURCE_MEM,
173 .start = SD1_PHYS_ADDR,
174 .end = SD1_PHYS_ADDR + 0x7ffff,
175 .flags = IORESOURCE_MEM,
178 .start = AU1200_SD_INT,
179 .end = AU1200_SD_INT,
180 .flags = IORESOURCE_IRQ,
184 static u64 udc_dmamask = DMA_32BIT_MASK;
186 static struct platform_device au1xxx_usb_gdt_device = {
187 .name = "au1xxx-udc",
190 .dma_mask = &udc_dmamask,
191 .coherent_dma_mask = DMA_32BIT_MASK,
193 .num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
194 .resource = au1xxx_usb_gdt_resources,
197 /* Au1200 UOC (USB OTG controller) */
198 static struct resource au1xxx_usb_otg_resources[] = {
200 .start = USB_UOC_BASE,
201 .end = USB_UOC_BASE + USB_UOC_LEN - 1,
202 .flags = IORESOURCE_MEM,
205 .start = AU1200_USB_INT,
206 .end = AU1200_USB_INT,
207 .flags = IORESOURCE_IRQ,
211 static u64 uoc_dmamask = DMA_32BIT_MASK;
213 static struct platform_device au1xxx_usb_otg_device = {
214 .name = "au1xxx-uoc",
217 .dma_mask = &uoc_dmamask,
218 .coherent_dma_mask = DMA_32BIT_MASK,
220 .num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
221 .resource = au1xxx_usb_otg_resources,
224 static struct resource au1200_lcd_resources[] = {
226 .start = LCD_PHYS_ADDR,
227 .end = LCD_PHYS_ADDR + 0x800 - 1,
228 .flags = IORESOURCE_MEM,
231 .start = AU1200_LCD_INT,
232 .end = AU1200_LCD_INT,
233 .flags = IORESOURCE_IRQ,
237 static u64 au1200_lcd_dmamask = DMA_32BIT_MASK;
239 static struct platform_device au1200_lcd_device = {
240 .name = "au1200-lcd",
243 .dma_mask = &au1200_lcd_dmamask,
244 .coherent_dma_mask = DMA_32BIT_MASK,
246 .num_resources = ARRAY_SIZE(au1200_lcd_resources),
247 .resource = au1200_lcd_resources,
250 static u64 au1xxx_mmc_dmamask = DMA_32BIT_MASK;
252 static struct platform_device au1xxx_mmc_device = {
253 .name = "au1xxx-mmc",
256 .dma_mask = &au1xxx_mmc_dmamask,
257 .coherent_dma_mask = DMA_32BIT_MASK,
259 .num_resources = ARRAY_SIZE(au1xxx_mmc_resources),
260 .resource = au1xxx_mmc_resources,
262 #endif /* #ifdef CONFIG_SOC_AU1200 */
264 static struct platform_device au1x00_pcmcia_device = {
265 .name = "au1x00-pcmcia",
269 /* All Alchemy demoboards with I2C have this #define in their headers */
270 #ifdef SMBUS_PSC_BASE
271 static struct resource pbdb_smbus_resources[] = {
273 .start = CPHYSADDR(SMBUS_PSC_BASE),
274 .end = CPHYSADDR(SMBUS_PSC_BASE + 0xfffff),
275 .flags = IORESOURCE_MEM,
279 static struct platform_device pbdb_smbus_device = {
280 .name = "au1xpsc_smbus",
281 .id = 0, /* bus number */
282 .num_resources = ARRAY_SIZE(pbdb_smbus_resources),
283 .resource = pbdb_smbus_resources,
287 static struct platform_device *au1xxx_platform_devices[] __initdata = {
289 &au1xxx_usb_ohci_device,
290 &au1x00_pcmcia_device,
291 #ifdef CONFIG_FB_AU1100
294 #ifdef CONFIG_SOC_AU1200
295 &au1xxx_usb_ehci_device,
296 &au1xxx_usb_gdt_device,
297 &au1xxx_usb_otg_device,
301 #ifdef SMBUS_PSC_BASE
306 static int __init au1xxx_platform_init(void)
308 unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
311 /* Fill up uartclk. */
312 for (i = 0; au1x00_uart_data[i].flags; i++)
313 au1x00_uart_data[i].uartclk = uartclk;
315 return platform_add_devices(au1xxx_platform_devices,
316 ARRAY_SIZE(au1xxx_platform_devices));
319 arch_initcall(au1xxx_platform_init);