2 * Marvell 88SE64xx/88SE94xx main function
4 * Copyright 2007 Red Hat, Inc.
5 * Copyright 2008 Marvell. <kewei@marvell.com>
7 * This file is licensed under GPLv2.
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; version 2 of the
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
27 static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag)
29 if (task->lldd_task) {
30 struct mvs_slot_info *slot;
31 slot = (struct mvs_slot_info *) task->lldd_task;
32 *tag = slot->slot_tag;
38 void mvs_tag_clear(struct mvs_info *mvi, u32 tag)
40 void *bitmap = (void *) &mvi->tags;
41 clear_bit(tag, bitmap);
44 void mvs_tag_free(struct mvs_info *mvi, u32 tag)
46 mvs_tag_clear(mvi, tag);
49 void mvs_tag_set(struct mvs_info *mvi, unsigned int tag)
51 void *bitmap = (void *) &mvi->tags;
55 inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out)
57 unsigned int index, tag;
58 void *bitmap = (void *) &mvi->tags;
60 index = find_first_zero_bit(bitmap, mvi->tags_num);
62 if (tag >= mvi->tags_num)
63 return -SAS_QUEUE_FULL;
64 mvs_tag_set(mvi, tag);
69 void mvs_tag_init(struct mvs_info *mvi)
72 for (i = 0; i < mvi->tags_num; ++i)
73 mvs_tag_clear(mvi, i);
76 void mvs_hexdump(u32 size, u8 *data, u32 baseaddr)
84 printk(KERN_DEBUG"%08X : ", baseaddr + offset);
90 for (i = 0; i < 16; i++) {
92 printk(KERN_DEBUG"%02X ", (u32)data[i]);
94 printk(KERN_DEBUG" ");
96 printk(KERN_DEBUG": ");
97 for (i = 0; i < run; i++)
98 printk(KERN_DEBUG"%c",
99 isalnum(data[i]) ? data[i] : '.');
100 printk(KERN_DEBUG"\n");
104 printk(KERN_DEBUG"\n");
108 static void mvs_hba_sb_dump(struct mvs_info *mvi, u32 tag,
109 enum sas_protocol proto)
112 struct mvs_slot_info *slot = &mvi->slot_info[tag];
114 offset = slot->cmd_size + MVS_OAF_SZ +
115 MVS_CHIP_DISP->prd_size() * slot->n_elem;
116 dev_printk(KERN_DEBUG, mvi->dev, "+---->Status buffer[%d] :\n",
118 mvs_hexdump(32, (u8 *) slot->response,
119 (u32) slot->buf_dma + offset);
123 static void mvs_hba_memory_dump(struct mvs_info *mvi, u32 tag,
124 enum sas_protocol proto)
129 struct mvs_slot_info *slot = &mvi->slot_info[tag];
132 sz = MVS_CHIP_SLOT_SZ;
135 dev_printk(KERN_DEBUG, mvi->dev,
136 "Delivery Queue Size=%04d , WRT_PTR=%04X\n", sz, w_ptr);
137 dev_printk(KERN_DEBUG, mvi->dev,
138 "Delivery Queue Base Address=0x%llX (PA)"
139 "(tx_dma=0x%llX), Entry=%04d\n",
140 addr, (unsigned long long)mvi->tx_dma, w_ptr);
141 mvs_hexdump(sizeof(u32), (u8 *)(&mvi->tx[mvi->tx_prod]),
142 (u32) mvi->tx_dma + sizeof(u32) * w_ptr);
144 addr = mvi->slot_dma;
145 dev_printk(KERN_DEBUG, mvi->dev,
146 "Command List Base Address=0x%llX (PA)"
147 "(slot_dma=0x%llX), Header=%03d\n",
148 addr, (unsigned long long)slot->buf_dma, tag);
149 dev_printk(KERN_DEBUG, mvi->dev, "Command Header[%03d]:\n", tag);
151 mvs_hexdump(sizeof(struct mvs_cmd_hdr), (u8 *)(&mvi->slot[tag]),
152 (u32) mvi->slot_dma + tag * sizeof(struct mvs_cmd_hdr));
153 /*1.command table area */
154 dev_printk(KERN_DEBUG, mvi->dev, "+---->Command Table :\n");
155 mvs_hexdump(slot->cmd_size, (u8 *) slot->buf, (u32) slot->buf_dma);
156 /*2.open address frame area */
157 dev_printk(KERN_DEBUG, mvi->dev, "+---->Open Address Frame :\n");
158 mvs_hexdump(MVS_OAF_SZ, (u8 *) slot->buf + slot->cmd_size,
159 (u32) slot->buf_dma + slot->cmd_size);
161 mvs_hba_sb_dump(mvi, tag, proto);
163 dev_printk(KERN_DEBUG, mvi->dev, "+---->PRD table :\n");
164 mvs_hexdump(MVS_CHIP_DISP->prd_size() * slot->n_elem,
165 (u8 *) slot->buf + slot->cmd_size + MVS_OAF_SZ,
166 (u32) slot->buf_dma + slot->cmd_size + MVS_OAF_SZ);
170 static void mvs_hba_cq_dump(struct mvs_info *mvi)
174 void __iomem *regs = mvi->regs;
175 u32 entry = mvi->rx_cons + 1;
176 u32 rx_desc = le32_to_cpu(mvi->rx[entry]);
178 /*Completion Queue */
179 addr = mr32(RX_HI) << 16 << 16 | mr32(RX_LO);
180 dev_printk(KERN_DEBUG, mvi->dev, "Completion Task = 0x%p\n",
181 mvi->slot_info[rx_desc & RXQ_SLOT_MASK].task);
182 dev_printk(KERN_DEBUG, mvi->dev,
183 "Completion List Base Address=0x%llX (PA), "
184 "CQ_Entry=%04d, CQ_WP=0x%08X\n",
185 addr, entry - 1, mvi->rx[0]);
186 mvs_hexdump(sizeof(u32), (u8 *)(&rx_desc),
187 mvi->rx_dma + sizeof(u32) * entry);
191 void mvs_get_sas_addr(void *buf, u32 buflen)
193 /*memcpy(buf, "\x50\x05\x04\x30\x11\xab\x64\x40", 8);*/
196 struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
198 unsigned long i = 0, j = 0, hi = 0;
199 struct sas_ha_struct *sha = dev->port->ha;
200 struct mvs_info *mvi = NULL;
201 struct asd_sas_phy *phy;
203 while (sha->sas_port[i]) {
204 if (sha->sas_port[i] == dev->port) {
205 phy = container_of(sha->sas_port[i]->phy_list.next,
206 struct asd_sas_phy, port_phy_el);
208 while (sha->sas_phy[j]) {
209 if (sha->sas_phy[j] == phy)
217 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
218 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
225 int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)
227 unsigned long i = 0, j = 0, n = 0, num = 0;
228 struct mvs_info *mvi = mvs_find_dev_mvi(dev);
229 struct sas_ha_struct *sha = dev->port->ha;
231 while (sha->sas_port[i]) {
232 if (sha->sas_port[i] == dev->port) {
233 struct asd_sas_phy *phy;
234 list_for_each_entry(phy,
235 &sha->sas_port[i]->phy_list, port_phy_el) {
237 while (sha->sas_phy[j]) {
238 if (sha->sas_phy[j] == phy)
242 phyno[n] = (j >= mvi->chip->n_phy) ?
243 (j - mvi->chip->n_phy) : j;
254 static inline void mvs_free_reg_set(struct mvs_info *mvi,
255 struct mvs_device *dev)
258 mv_printk("device has been free.\n");
261 if (dev->runing_req != 0)
263 if (dev->taskfileset == MVS_ID_NOT_MAPPED)
265 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset);
268 static inline u8 mvs_assign_reg_set(struct mvs_info *mvi,
269 struct mvs_device *dev)
271 if (dev->taskfileset != MVS_ID_NOT_MAPPED)
273 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset);
276 void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard)
279 for_each_phy(phy_mask, phy_mask, no) {
282 MVS_CHIP_DISP->phy_reset(mvi, no, hard);
286 /* FIXME: locking? */
287 int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
290 int rc = 0, phy_id = sas_phy->id;
292 struct sas_ha_struct *sha = sas_phy->ha;
293 struct mvs_info *mvi = NULL;
295 while (sha->sas_phy[i]) {
296 if (sha->sas_phy[i] == sas_phy)
300 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
301 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
304 case PHY_FUNC_SET_LINK_RATE:
305 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata);
308 case PHY_FUNC_HARD_RESET:
309 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id);
310 if (tmp & PHY_RST_HARD)
312 MVS_CHIP_DISP->phy_reset(mvi, phy_id, 1);
315 case PHY_FUNC_LINK_RESET:
316 MVS_CHIP_DISP->phy_enable(mvi, phy_id);
317 MVS_CHIP_DISP->phy_reset(mvi, phy_id, 0);
320 case PHY_FUNC_DISABLE:
321 MVS_CHIP_DISP->phy_disable(mvi, phy_id);
323 case PHY_FUNC_RELEASE_SPINUP_HOLD:
331 void __devinit mvs_set_sas_addr(struct mvs_info *mvi, int port_id,
332 u32 off_lo, u32 off_hi, u64 sas_addr)
334 u32 lo = (u32)sas_addr;
335 u32 hi = (u32)(sas_addr>>32);
337 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo);
338 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo);
339 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi);
340 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi);
343 static void mvs_bytes_dmaed(struct mvs_info *mvi, int i)
345 struct mvs_phy *phy = &mvi->phy[i];
346 struct asd_sas_phy *sas_phy = &phy->sas_phy;
347 struct sas_ha_struct *sas_ha;
348 if (!phy->phy_attached)
351 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK)
352 && phy->phy_type & PORT_TYPE_SAS) {
357 sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
360 struct sas_phy *sphy = sas_phy->phy;
362 sphy->negotiated_linkrate = sas_phy->linkrate;
363 sphy->minimum_linkrate = phy->minimum_linkrate;
364 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
365 sphy->maximum_linkrate = phy->maximum_linkrate;
366 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate();
369 if (phy->phy_type & PORT_TYPE_SAS) {
370 struct sas_identify_frame *id;
372 id = (struct sas_identify_frame *)phy->frame_rcvd;
373 id->dev_type = phy->identify.device_type;
374 id->initiator_bits = SAS_PROTOCOL_ALL;
375 id->target_bits = phy->identify.target_port_protocols;
376 } else if (phy->phy_type & PORT_TYPE_SATA) {
379 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy);
381 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
383 mvi->sas->notify_port_event(sas_phy,
387 int mvs_slave_alloc(struct scsi_device *scsi_dev)
389 struct domain_device *dev = sdev_to_domain_dev(scsi_dev);
390 if (dev_is_sata(dev)) {
391 /* We don't need to rescan targets
392 * if REPORT_LUNS request is failed
394 if (scsi_dev->lun > 0)
396 scsi_dev->tagged_supported = 1;
399 return sas_slave_alloc(scsi_dev);
402 int mvs_slave_configure(struct scsi_device *sdev)
404 struct domain_device *dev = sdev_to_domain_dev(sdev);
405 int ret = sas_slave_configure(sdev);
409 if (dev_is_sata(dev)) {
410 /* may set PIO mode */
412 struct ata_port *ap = dev->sata_dev.ap;
413 struct ata_device *adev = ap->link.device;
414 adev->flags |= ATA_DFLAG_NCQ_OFF;
415 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, 1);
421 void mvs_scan_start(struct Scsi_Host *shost)
424 unsigned short core_nr;
425 struct mvs_info *mvi;
426 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
428 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
430 for (j = 0; j < core_nr; j++) {
431 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];
432 for (i = 0; i < mvi->chip->n_phy; ++i)
433 mvs_bytes_dmaed(mvi, i);
437 int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time)
439 /* give the phy enabling interrupt event time to come in (1s
440 * is empirically about all it takes) */
443 /* Wait for discovery to finish */
444 scsi_flush_work(shost);
448 static int mvs_task_prep_smp(struct mvs_info *mvi,
449 struct mvs_task_exec_info *tei)
452 struct sas_task *task = tei->task;
453 struct mvs_cmd_hdr *hdr = tei->hdr;
454 struct domain_device *dev = task->dev;
455 struct asd_sas_port *sas_port = dev->port;
456 struct scatterlist *sg_req, *sg_resp;
457 u32 req_len, resp_len, tag = tei->tag;
460 dma_addr_t buf_tmp_dma;
462 struct mvs_slot_info *slot = &mvi->slot_info[tag];
463 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
469 * DMA-map SMP request, response buffers
471 sg_req = &task->smp_task.smp_req;
472 elem = dma_map_sg(mvi->dev, sg_req, 1, PCI_DMA_TODEVICE);
475 req_len = sg_dma_len(sg_req);
477 sg_resp = &task->smp_task.smp_resp;
478 elem = dma_map_sg(mvi->dev, sg_resp, 1, PCI_DMA_FROMDEVICE);
483 resp_len = SB_RFB_MAX;
485 /* must be in dwords */
486 if ((req_len & 0x3) || (resp_len & 0x3)) {
492 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
495 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */
497 buf_tmp_dma = slot->buf_dma;
501 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
503 buf_tmp_dma += req_len;
504 slot->cmd_size = req_len;
506 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));
509 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
511 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
513 buf_tmp += MVS_OAF_SZ;
514 buf_tmp_dma += MVS_OAF_SZ;
516 /* region 3: PRD table *********************************** */
519 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
523 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
527 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
528 slot->response = buf_tmp;
529 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
530 if (mvi->flags & MVF_FLAG_SOC)
531 hdr->reserved[0] = 0;
534 * Fill in TX ring and command slot header
536 slot->tx = mvi->tx_prod;
537 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) |
539 (sas_port->phy_mask << TXQ_PHY_SHIFT));
542 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4));
543 hdr->tags = cpu_to_le32(tag);
546 /* generate open address frame hdr (first 12 bytes) */
547 /* initiator, SMP, ftype 1h */
548 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01;
549 buf_oaf[1] = dev->linkrate & 0xf;
550 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */
551 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
553 /* fill in PRD (scatter/gather) table, if any */
554 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
558 from = kmap_atomic(sg_page(sg_req), KM_IRQ0);
559 memcpy(buf_cmd, from + sg_req->offset, req_len);
560 kunmap_atomic(from, KM_IRQ0);
565 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1,
568 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1,
573 static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag)
575 struct ata_queued_cmd *qc = task->uldd_task;
578 if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
579 qc->tf.command == ATA_CMD_FPDMA_READ) {
588 static int mvs_task_prep_ata(struct mvs_info *mvi,
589 struct mvs_task_exec_info *tei)
591 struct sas_task *task = tei->task;
592 struct domain_device *dev = task->dev;
593 struct mvs_device *mvi_dev =
594 (struct mvs_device *)dev->lldd_dev;
595 struct mvs_cmd_hdr *hdr = tei->hdr;
596 struct asd_sas_port *sas_port = dev->port;
597 struct mvs_slot_info *slot;
599 u32 tag = tei->tag, hdr_tag;
602 u8 *buf_cmd, *buf_oaf;
603 dma_addr_t buf_tmp_dma;
604 u32 i, req_len, resp_len;
605 const u32 max_resp_len = SB_RFB_MAX;
607 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) {
608 mv_dprintk("Have not enough regiset for dev %d.\n",
612 slot = &mvi->slot_info[tag];
613 slot->tx = mvi->tx_prod;
614 del_q = TXQ_MODE_I | tag |
615 (TXQ_CMD_STP << TXQ_CMD_SHIFT) |
616 (sas_port->phy_mask << TXQ_PHY_SHIFT) |
617 (mvi_dev->taskfileset << TXQ_SRS_SHIFT);
618 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q);
620 #ifndef DISABLE_HOTPLUG_DMA_FIX
621 if (task->data_dir == DMA_FROM_DEVICE)
622 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT);
624 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
626 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
628 if (task->ata_task.use_ncq)
630 if (dev->sata_dev.command_set == ATAPI_COMMAND_SET) {
631 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI)
635 /* FIXME: fill in port multiplier number */
637 hdr->flags = cpu_to_le32(flags);
639 /* FIXME: the low order order 5 bits for the TAG if enable NCQ */
640 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag))
641 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3);
645 hdr->tags = cpu_to_le32(hdr_tag);
647 hdr->data_len = cpu_to_le32(task->total_xfer_len);
650 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
653 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */
654 buf_cmd = buf_tmp = slot->buf;
655 buf_tmp_dma = slot->buf_dma;
657 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
659 buf_tmp += MVS_ATA_CMD_SZ;
660 buf_tmp_dma += MVS_ATA_CMD_SZ;
662 slot->cmd_size = MVS_ATA_CMD_SZ;
665 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
666 /* used for STP. unused for SATA? */
668 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
670 buf_tmp += MVS_OAF_SZ;
671 buf_tmp_dma += MVS_OAF_SZ;
673 /* region 3: PRD table ********************************************* */
677 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
680 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count();
685 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
686 /* FIXME: probably unused, for SATA. kept here just in case
687 * we get a STP/SATA error information record
689 slot->response = buf_tmp;
690 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
691 if (mvi->flags & MVF_FLAG_SOC)
692 hdr->reserved[0] = 0;
694 req_len = sizeof(struct host_to_dev_fis);
695 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ -
696 sizeof(struct mvs_err_info) - i;
698 /* request, response lengths */
699 resp_len = min(resp_len, max_resp_len);
700 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
702 if (likely(!task->ata_task.device_control_reg_update))
703 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */
704 /* fill in command FIS and ATAPI CDB */
705 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis));
706 if (dev->sata_dev.command_set == ATAPI_COMMAND_SET)
707 memcpy(buf_cmd + STP_ATAPI_CMD,
708 task->ata_task.atapi_packet, 16);
710 /* generate open address frame hdr (first 12 bytes) */
711 /* initiator, STP, ftype 1h */
712 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1;
713 buf_oaf[1] = dev->linkrate & 0xf;
714 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
715 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
717 /* fill in PRD (scatter/gather) table, if any */
718 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
719 #ifndef DISABLE_HOTPLUG_DMA_FIX
720 if (task->data_dir == DMA_FROM_DEVICE)
721 MVS_CHIP_DISP->dma_fix(mvi->bulk_buffer_dma,
722 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd);
727 static int mvs_task_prep_ssp(struct mvs_info *mvi,
728 struct mvs_task_exec_info *tei, int is_tmf,
729 struct mvs_tmf_task *tmf)
731 struct sas_task *task = tei->task;
732 struct mvs_cmd_hdr *hdr = tei->hdr;
733 struct mvs_port *port = tei->port;
734 struct domain_device *dev = task->dev;
735 struct mvs_device *mvi_dev =
736 (struct mvs_device *)dev->lldd_dev;
737 struct asd_sas_port *sas_port = dev->port;
738 struct mvs_slot_info *slot;
740 struct ssp_frame_hdr *ssp_hdr;
742 u8 *buf_cmd, *buf_oaf, fburst = 0;
743 dma_addr_t buf_tmp_dma;
745 u32 resp_len, req_len, i, tag = tei->tag;
746 const u32 max_resp_len = SB_RFB_MAX;
749 slot = &mvi->slot_info[tag];
751 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap :
752 sas_port->phy_mask) & TXQ_PHY_MASK;
754 slot->tx = mvi->tx_prod;
755 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag |
756 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) |
757 (phy_mask << TXQ_PHY_SHIFT));
760 if (task->ssp_task.enable_first_burst) {
764 hdr->flags = cpu_to_le32(flags |
765 (tei->n_elem << MCH_PRD_LEN_SHIFT) |
766 (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT));
767 hdr->tags = cpu_to_le32(tag);
768 hdr->data_len = cpu_to_le32(task->total_xfer_len);
771 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
774 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */
775 buf_cmd = buf_tmp = slot->buf;
776 buf_tmp_dma = slot->buf_dma;
778 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
780 buf_tmp += MVS_SSP_CMD_SZ;
781 buf_tmp_dma += MVS_SSP_CMD_SZ;
783 slot->cmd_size = MVS_SSP_CMD_SZ;
786 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
788 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
790 buf_tmp += MVS_OAF_SZ;
791 buf_tmp_dma += MVS_OAF_SZ;
793 /* region 3: PRD table ********************************************* */
796 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
800 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
804 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
805 slot->response = buf_tmp;
806 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
807 if (mvi->flags & MVF_FLAG_SOC)
808 hdr->reserved[0] = 0;
810 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ -
811 sizeof(struct mvs_err_info) - i;
812 resp_len = min(resp_len, max_resp_len);
814 req_len = sizeof(struct ssp_frame_hdr) + 28;
816 /* request, response lengths */
817 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
819 /* generate open address frame hdr (first 12 bytes) */
820 /* initiator, SSP, ftype 1h */
821 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1;
822 buf_oaf[1] = dev->linkrate & 0xf;
823 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
824 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
826 /* fill in SSP frame header (Command Table.SSP frame header) */
827 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd;
830 ssp_hdr->frame_type = SSP_TASK;
832 ssp_hdr->frame_type = SSP_COMMAND;
834 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr,
835 HASHED_SAS_ADDR_SIZE);
836 memcpy(ssp_hdr->hashed_src_addr,
837 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE);
838 ssp_hdr->tag = cpu_to_be16(tag);
840 /* fill in IU for TASK and Command Frame */
841 buf_cmd += sizeof(*ssp_hdr);
842 memcpy(buf_cmd, &task->ssp_task.LUN, 8);
844 if (ssp_hdr->frame_type != SSP_TASK) {
845 buf_cmd[9] = fburst | task->ssp_task.task_attr |
846 (task->ssp_task.task_prio << 3);
847 memcpy(buf_cmd + 12, &task->ssp_task.cdb, 16);
849 buf_cmd[10] = tmf->tmf;
854 (tmf->tag_of_task_to_be_managed >> 8) & 0xff;
856 tmf->tag_of_task_to_be_managed & 0xff;
862 /* fill in PRD (scatter/gather) table, if any */
863 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
867 #define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == NO_DEVICE)))
868 static int mvs_task_exec(struct sas_task *task, const int num, gfp_t gfp_flags,
869 struct completion *completion, int lock,
870 int is_tmf, struct mvs_tmf_task *tmf)
872 struct domain_device *dev = task->dev;
873 struct mvs_info *mvi;
874 struct mvs_device *mvi_dev;
875 struct mvs_task_exec_info tei;
876 struct sas_task *t = task;
877 struct mvs_slot_info *slot;
878 u32 tag = 0xdeadbeef, rc, n_elem = 0;
879 u32 n = num, pass = 0;
880 unsigned long flags = 0;
883 struct task_status_struct *tsm = &t->task_status;
885 tsm->resp = SAS_TASK_UNDELIVERED;
886 tsm->stat = SAS_PHY_DOWN;
891 mvi = mvs_find_dev_mvi(task->dev);
894 spin_lock_irqsave(&mvi->lock, flags);
897 mvi_dev = (struct mvs_device *)dev->lldd_dev;
898 if (DEV_IS_GONE(mvi_dev)) {
900 mv_dprintk("device %d not ready.\n",
903 mv_dprintk("device %016llx not ready.\n",
904 SAS_ADDR(dev->sas_addr));
910 if (dev->port->id >= mvi->chip->n_phy)
911 tei.port = &mvi->port[dev->port->id - mvi->chip->n_phy];
913 tei.port = &mvi->port[dev->port->id];
915 if (!tei.port->port_attached) {
916 if (sas_protocol_ata(t->task_proto)) {
917 mv_dprintk("port %d does not"
918 "attached device.\n", dev->port->id);
922 struct task_status_struct *ts = &t->task_status;
923 ts->resp = SAS_TASK_UNDELIVERED;
924 ts->stat = SAS_PHY_DOWN;
927 t = list_entry(t->list.next,
928 struct sas_task, list);
933 if (!sas_protocol_ata(t->task_proto)) {
934 if (t->num_scatter) {
935 n_elem = dma_map_sg(mvi->dev,
945 n_elem = t->num_scatter;
948 rc = mvs_tag_alloc(mvi, &tag);
952 slot = &mvi->slot_info[tag];
956 slot->n_elem = n_elem;
957 slot->slot_tag = tag;
958 memset(slot->buf, 0, MVS_SLOT_BUF_SZ);
961 tei.hdr = &mvi->slot[tag];
964 switch (t->task_proto) {
965 case SAS_PROTOCOL_SMP:
966 rc = mvs_task_prep_smp(mvi, &tei);
968 case SAS_PROTOCOL_SSP:
969 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf);
971 case SAS_PROTOCOL_SATA:
972 case SAS_PROTOCOL_STP:
973 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
974 rc = mvs_task_prep_ata(mvi, &tei);
977 dev_printk(KERN_ERR, mvi->dev,
978 "unknown sas_task proto: 0x%x\n",
985 mv_dprintk("rc is %x\n", rc);
989 slot->port = tei.port;
990 t->lldd_task = (void *) slot;
991 list_add_tail(&slot->entry, &tei.port->list);
992 /* TODO: select normal or high priority */
993 spin_lock(&t->task_state_lock);
994 t->task_state_flags |= SAS_TASK_AT_INITIATOR;
995 spin_unlock(&t->task_state_lock);
997 mvs_hba_memory_dump(mvi, tag, t->task_proto);
998 mvi_dev->runing_req++;
1000 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1);
1002 t = list_entry(t->list.next, struct sas_task, list);
1008 mvs_tag_free(mvi, tag);
1011 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
1012 if (!sas_protocol_ata(t->task_proto))
1014 dma_unmap_sg(mvi->dev, t->scatter, n_elem,
1018 MVS_CHIP_DISP->start_delivery(mvi,
1019 (mvi->tx_prod - 1) & (MVS_CHIP_SLOT_SZ - 1));
1022 spin_unlock_irqrestore(&mvi->lock, flags);
1026 int mvs_queue_command(struct sas_task *task, const int num,
1029 return mvs_task_exec(task, num, gfp_flags, NULL, 1, 0, NULL);
1032 static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc)
1034 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
1035 mvs_tag_clear(mvi, slot_idx);
1038 static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task,
1039 struct mvs_slot_info *slot, u32 slot_idx)
1043 if (!sas_protocol_ata(task->task_proto))
1045 dma_unmap_sg(mvi->dev, task->scatter,
1046 slot->n_elem, task->data_dir);
1048 switch (task->task_proto) {
1049 case SAS_PROTOCOL_SMP:
1050 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1,
1051 PCI_DMA_FROMDEVICE);
1052 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1,
1056 case SAS_PROTOCOL_SATA:
1057 case SAS_PROTOCOL_STP:
1058 case SAS_PROTOCOL_SSP:
1063 list_del_init(&slot->entry);
1064 task->lldd_task = NULL;
1067 slot->slot_tag = 0xFFFFFFFF;
1068 mvs_slot_free(mvi, slot_idx);
1071 static void mvs_update_wideport(struct mvs_info *mvi, int i)
1073 struct mvs_phy *phy = &mvi->phy[i];
1074 struct mvs_port *port = phy->port;
1077 for_each_phy(port->wide_port_phymap, j, no) {
1079 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
1081 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
1082 port->wide_port_phymap);
1084 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
1086 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
1092 static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i)
1095 struct mvs_phy *phy = &mvi->phy[i];
1096 struct mvs_port *port = phy->port;
1098 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i);
1099 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) {
1101 phy->phy_attached = 1;
1106 if (phy->phy_type & PORT_TYPE_SAS) {
1107 port->wide_port_phymap &= ~(1U << i);
1108 if (!port->wide_port_phymap)
1109 port->port_attached = 0;
1110 mvs_update_wideport(mvi, i);
1111 } else if (phy->phy_type & PORT_TYPE_SATA)
1112 port->port_attached = 0;
1114 phy->phy_attached = 0;
1115 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA);
1120 static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf)
1122 u32 *s = (u32 *) buf;
1127 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3);
1128 s[3] = MVS_CHIP_DISP->read_port_cfg_data(mvi, i);
1130 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2);
1131 s[2] = MVS_CHIP_DISP->read_port_cfg_data(mvi, i);
1133 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1);
1134 s[1] = MVS_CHIP_DISP->read_port_cfg_data(mvi, i);
1136 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0);
1137 s[0] = MVS_CHIP_DISP->read_port_cfg_data(mvi, i);
1139 /* Workaround: take some ATAPI devices for ATA */
1140 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01))
1141 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10);
1146 static u32 mvs_is_sig_fis_received(u32 irq_status)
1148 return irq_status & PHYEV_SIG_FIS;
1151 void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st)
1153 struct mvs_phy *phy = &mvi->phy[i];
1154 struct sas_identify_frame *id;
1156 id = (struct sas_identify_frame *)phy->frame_rcvd;
1159 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i);
1160 phy->phy_status = mvs_is_phy_ready(mvi, i);
1163 if (phy->phy_status) {
1165 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy;
1167 oob_done = MVS_CHIP_DISP->oob_done(mvi, i);
1169 MVS_CHIP_DISP->fix_phy_info(mvi, i, id);
1170 if (phy->phy_type & PORT_TYPE_SATA) {
1171 phy->identify.target_port_protocols = SAS_PROTOCOL_STP;
1172 if (mvs_is_sig_fis_received(phy->irq_status)) {
1173 phy->phy_attached = 1;
1174 phy->att_dev_sas_addr =
1175 i + mvi->id * mvi->chip->n_phy;
1177 sas_phy->oob_mode = SATA_OOB_MODE;
1178 phy->frame_rcvd_size =
1179 sizeof(struct dev_to_host_fis);
1180 mvs_get_d2h_reg(mvi, i, (void *)id);
1183 dev_printk(KERN_DEBUG, mvi->dev,
1184 "Phy%d : No sig fis\n", i);
1185 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i);
1186 MVS_CHIP_DISP->write_port_irq_mask(mvi, i,
1187 tmp | PHYEV_SIG_FIS);
1188 phy->phy_attached = 0;
1189 phy->phy_type &= ~PORT_TYPE_SATA;
1190 MVS_CHIP_DISP->phy_reset(mvi, i, 0);
1193 } else if (phy->phy_type & PORT_TYPE_SAS
1194 || phy->att_dev_info & PORT_SSP_INIT_MASK) {
1195 phy->phy_attached = 1;
1196 phy->identify.device_type =
1197 phy->att_dev_info & PORT_DEV_TYPE_MASK;
1199 if (phy->identify.device_type == SAS_END_DEV)
1200 phy->identify.target_port_protocols =
1202 else if (phy->identify.device_type != NO_DEVICE)
1203 phy->identify.target_port_protocols =
1206 sas_phy->oob_mode = SAS_OOB_MODE;
1207 phy->frame_rcvd_size =
1208 sizeof(struct sas_identify_frame);
1210 memcpy(sas_phy->attached_sas_addr,
1211 &phy->att_dev_sas_addr, SAS_ADDR_SIZE);
1213 if (MVS_CHIP_DISP->phy_work_around)
1214 MVS_CHIP_DISP->phy_work_around(mvi, i);
1216 mv_dprintk("port %d attach dev info is %x\n",
1217 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info);
1218 mv_dprintk("port %d attach sas addr is %llx\n",
1219 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr);
1222 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status);
1225 static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock)
1227 struct sas_ha_struct *sas_ha = sas_phy->ha;
1228 struct mvs_info *mvi = NULL; int i = 0, hi;
1229 struct mvs_phy *phy = sas_phy->lldd_phy;
1230 struct asd_sas_port *sas_port = sas_phy->port;
1231 struct mvs_port *port;
1232 unsigned long flags = 0;
1236 while (sas_ha->sas_phy[i]) {
1237 if (sas_ha->sas_phy[i] == sas_phy)
1241 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy;
1242 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi];
1243 if (sas_port->id >= mvi->chip->n_phy)
1244 port = &mvi->port[sas_port->id - mvi->chip->n_phy];
1246 port = &mvi->port[sas_port->id];
1248 spin_lock_irqsave(&mvi->lock, flags);
1249 port->port_attached = 1;
1251 if (phy->phy_type & PORT_TYPE_SAS) {
1252 port->wide_port_phymap = sas_port->phy_mask;
1253 mv_printk("set wide port phy map %x\n", sas_port->phy_mask);
1254 mvs_update_wideport(mvi, sas_phy->id);
1257 spin_unlock_irqrestore(&mvi->lock, flags);
1260 static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock)
1266 void mvs_port_formed(struct asd_sas_phy *sas_phy)
1268 mvs_port_notify_formed(sas_phy, 1);
1271 void mvs_port_deformed(struct asd_sas_phy *sas_phy)
1273 mvs_port_notify_deformed(sas_phy, 1);
1276 struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
1279 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) {
1280 if (mvi->devices[dev].dev_type == NO_DEVICE) {
1281 mvi->devices[dev].device_id = dev;
1282 return &mvi->devices[dev];
1286 if (dev == MVS_MAX_DEVICES)
1287 mv_printk("max support %d devices, ignore ..\n",
1293 void mvs_free_dev(struct mvs_device *mvi_dev)
1295 u32 id = mvi_dev->device_id;
1296 memset(mvi_dev, 0, sizeof(*mvi_dev));
1297 mvi_dev->device_id = id;
1298 mvi_dev->dev_type = NO_DEVICE;
1299 mvi_dev->dev_status = MVS_DEV_NORMAL;
1300 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED;
1303 int mvs_dev_found_notify(struct domain_device *dev, int lock)
1305 unsigned long flags = 0;
1307 struct mvs_info *mvi = NULL;
1308 struct domain_device *parent_dev = dev->parent;
1309 struct mvs_device *mvi_device;
1311 mvi = mvs_find_dev_mvi(dev);
1314 spin_lock_irqsave(&mvi->lock, flags);
1316 mvi_device = mvs_alloc_dev(mvi);
1321 dev->lldd_dev = (void *)mvi_device;
1322 mvi_device->dev_type = dev->dev_type;
1324 if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) {
1326 u8 phy_num = parent_dev->ex_dev.num_phys;
1328 for (phy_id = 0; phy_id < phy_num; phy_id++) {
1329 phy = &parent_dev->ex_dev.ex_phy[phy_id];
1330 if (SAS_ADDR(phy->attached_sas_addr) ==
1331 SAS_ADDR(dev->sas_addr)) {
1332 mvi_device->attached_phy = phy_id;
1337 if (phy_id == phy_num) {
1338 mv_printk("Error: no attached dev:%016llx"
1340 SAS_ADDR(dev->sas_addr),
1341 SAS_ADDR(parent_dev->sas_addr));
1348 spin_unlock_irqrestore(&mvi->lock, flags);
1352 int mvs_dev_found(struct domain_device *dev)
1354 return mvs_dev_found_notify(dev, 1);
1357 void mvs_dev_gone_notify(struct domain_device *dev, int lock)
1359 unsigned long flags = 0;
1360 struct mvs_info *mvi;
1361 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1363 mvi = mvs_find_dev_mvi(dev);
1366 spin_lock_irqsave(&mvi->lock, flags);
1369 mv_dprintk("found dev[%d:%x] is gone.\n",
1370 mvi_dev->device_id, mvi_dev->dev_type);
1371 mvs_free_reg_set(mvi, mvi_dev);
1372 mvs_free_dev(mvi_dev);
1374 mv_dprintk("found dev has gone.\n");
1376 dev->lldd_dev = NULL;
1379 spin_unlock_irqrestore(&mvi->lock, flags);
1383 void mvs_dev_gone(struct domain_device *dev)
1385 mvs_dev_gone_notify(dev, 1);
1388 static struct sas_task *mvs_alloc_task(void)
1390 struct sas_task *task = kzalloc(sizeof(struct sas_task), GFP_KERNEL);
1393 INIT_LIST_HEAD(&task->list);
1394 spin_lock_init(&task->task_state_lock);
1395 task->task_state_flags = SAS_TASK_STATE_PENDING;
1396 init_timer(&task->timer);
1397 init_completion(&task->completion);
1402 static void mvs_free_task(struct sas_task *task)
1405 BUG_ON(!list_empty(&task->list));
1410 static void mvs_task_done(struct sas_task *task)
1412 if (!del_timer(&task->timer))
1414 complete(&task->completion);
1417 static void mvs_tmf_timedout(unsigned long data)
1419 struct sas_task *task = (struct sas_task *)data;
1421 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1422 complete(&task->completion);
1426 #define MVS_TASK_TIMEOUT 20
1427 static int mvs_exec_internal_tmf_task(struct domain_device *dev,
1428 void *parameter, u32 para_len, struct mvs_tmf_task *tmf)
1431 struct sas_task *task = NULL;
1433 for (retry = 0; retry < 3; retry++) {
1434 task = mvs_alloc_task();
1439 task->task_proto = dev->tproto;
1441 memcpy(&task->ssp_task, parameter, para_len);
1442 task->task_done = mvs_task_done;
1444 task->timer.data = (unsigned long) task;
1445 task->timer.function = mvs_tmf_timedout;
1446 task->timer.expires = jiffies + MVS_TASK_TIMEOUT*HZ;
1447 add_timer(&task->timer);
1449 res = mvs_task_exec(task, 1, GFP_KERNEL, NULL, 0, 1, tmf);
1452 del_timer(&task->timer);
1453 mv_printk("executing internel task failed:%d\n", res);
1457 wait_for_completion(&task->completion);
1458 res = -TMF_RESP_FUNC_FAILED;
1459 /* Even TMF timed out, return direct. */
1460 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1461 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
1462 mv_printk("TMF task[%x] timeout.\n", tmf->tmf);
1467 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1468 task->task_status.stat == SAM_GOOD) {
1469 res = TMF_RESP_FUNC_COMPLETE;
1473 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1474 task->task_status.stat == SAS_DATA_UNDERRUN) {
1475 /* no error, but return the number of bytes of
1477 res = task->task_status.residual;
1481 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1482 task->task_status.stat == SAS_DATA_OVERRUN) {
1483 mv_dprintk("blocked task error.\n");
1487 mv_dprintk(" task to dev %016llx response: 0x%x "
1489 SAS_ADDR(dev->sas_addr),
1490 task->task_status.resp,
1491 task->task_status.stat);
1492 mvs_free_task(task);
1498 BUG_ON(retry == 3 && task != NULL);
1500 mvs_free_task(task);
1504 static int mvs_debug_issue_ssp_tmf(struct domain_device *dev,
1505 u8 *lun, struct mvs_tmf_task *tmf)
1507 struct sas_ssp_task ssp_task;
1508 DECLARE_COMPLETION_ONSTACK(completion);
1509 if (!(dev->tproto & SAS_PROTOCOL_SSP))
1510 return TMF_RESP_FUNC_ESUPP;
1512 strncpy((u8 *)&ssp_task.LUN, lun, 8);
1514 return mvs_exec_internal_tmf_task(dev, &ssp_task,
1515 sizeof(ssp_task), tmf);
1519 /* Standard mandates link reset for ATA (type 0)
1520 and hard reset for SSP (type 1) , only for RECOVERY */
1521 static int mvs_debug_I_T_nexus_reset(struct domain_device *dev)
1524 struct sas_phy *phy = sas_find_local_phy(dev);
1525 int reset_type = (dev->dev_type == SATA_DEV ||
1526 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
1527 rc = sas_phy_reset(phy, reset_type);
1532 /* mandatory SAM-3 */
1533 int mvs_lu_reset(struct domain_device *dev, u8 *lun)
1535 unsigned long flags;
1536 int i, phyno[WIDE_PORT_MAX_PHY], num , rc = TMF_RESP_FUNC_FAILED;
1537 struct mvs_tmf_task tmf_task;
1538 struct mvs_info *mvi = mvs_find_dev_mvi(dev);
1539 struct mvs_device * mvi_dev = (struct mvs_device *)dev->lldd_dev;
1541 tmf_task.tmf = TMF_LU_RESET;
1542 mvi_dev->dev_status = MVS_DEV_EH;
1543 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1544 if (rc == TMF_RESP_FUNC_COMPLETE) {
1545 num = mvs_find_dev_phyno(dev, phyno);
1546 spin_lock_irqsave(&mvi->lock, flags);
1547 for (i = 0; i < num; i++)
1548 mvs_release_task(mvi, phyno[i], dev);
1549 spin_unlock_irqrestore(&mvi->lock, flags);
1551 /* If failed, fall-through I_T_Nexus reset */
1552 mv_printk("%s for device[%x]:rc= %d\n", __func__,
1553 mvi_dev->device_id, rc);
1557 int mvs_I_T_nexus_reset(struct domain_device *dev)
1559 unsigned long flags;
1560 int i, phyno[WIDE_PORT_MAX_PHY], num , rc = TMF_RESP_FUNC_FAILED;
1561 struct mvs_info *mvi = mvs_find_dev_mvi(dev);
1562 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1564 if (mvi_dev->dev_status != MVS_DEV_EH)
1565 return TMF_RESP_FUNC_COMPLETE;
1566 rc = mvs_debug_I_T_nexus_reset(dev);
1567 mv_printk("%s for device[%x]:rc= %d\n",
1568 __func__, mvi_dev->device_id, rc);
1571 num = mvs_find_dev_phyno(dev, phyno);
1572 spin_lock_irqsave(&mvi->lock, flags);
1573 for (i = 0; i < num; i++)
1574 mvs_release_task(mvi, phyno[i], dev);
1575 spin_unlock_irqrestore(&mvi->lock, flags);
1579 /* optional SAM-3 */
1580 int mvs_query_task(struct sas_task *task)
1583 struct scsi_lun lun;
1584 struct mvs_tmf_task tmf_task;
1585 int rc = TMF_RESP_FUNC_FAILED;
1587 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1588 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1589 struct domain_device *dev = task->dev;
1590 struct mvs_info *mvi = mvs_find_dev_mvi(dev);
1592 int_to_scsilun(cmnd->device->lun, &lun);
1593 rc = mvs_find_tag(mvi, task, &tag);
1595 rc = TMF_RESP_FUNC_FAILED;
1599 tmf_task.tmf = TMF_QUERY_TASK;
1600 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1602 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1604 /* The task is still in Lun, release it then */
1605 case TMF_RESP_FUNC_SUCC:
1606 /* The task is not in Lun or failed, reset the phy */
1607 case TMF_RESP_FUNC_FAILED:
1608 case TMF_RESP_FUNC_COMPLETE:
1612 mv_printk("%s:rc= %d\n", __func__, rc);
1616 /* mandatory SAM-3, still need free task/slot info */
1617 int mvs_abort_task(struct sas_task *task)
1619 struct scsi_lun lun;
1620 struct mvs_tmf_task tmf_task;
1621 struct domain_device *dev = task->dev;
1622 struct mvs_info *mvi = mvs_find_dev_mvi(dev);
1623 int rc = TMF_RESP_FUNC_FAILED;
1624 unsigned long flags;
1628 spin_lock_irqsave(&task->task_state_lock, flags);
1629 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1630 spin_unlock_irqrestore(&task->task_state_lock, flags);
1631 rc = TMF_RESP_FUNC_COMPLETE;
1634 spin_unlock_irqrestore(&task->task_state_lock, flags);
1635 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1636 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task;
1638 int_to_scsilun(cmnd->device->lun, &lun);
1639 rc = mvs_find_tag(mvi, task, &tag);
1641 mv_printk("No such tag in %s\n", __func__);
1642 rc = TMF_RESP_FUNC_FAILED;
1646 tmf_task.tmf = TMF_ABORT_TASK;
1647 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1649 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
1651 /* if successful, clear the task and callback forwards.*/
1652 if (rc == TMF_RESP_FUNC_COMPLETE) {
1654 struct mvs_slot_info *slot;
1655 struct mvs_info *mvi = mvs_find_dev_mvi(dev);
1657 if (task->lldd_task) {
1658 slot = (struct mvs_slot_info *)task->lldd_task;
1659 slot_no = (u32) (slot - mvi->slot_info);
1660 mvs_slot_complete(mvi, slot_no, 1);
1663 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1664 task->task_proto & SAS_PROTOCOL_STP) {
1665 /* to do free register_set */
1671 if (rc != TMF_RESP_FUNC_COMPLETE)
1672 mv_printk("%s:rc= %d\n", __func__, rc);
1676 int mvs_abort_task_set(struct domain_device *dev, u8 *lun)
1678 int rc = TMF_RESP_FUNC_FAILED;
1679 struct mvs_tmf_task tmf_task;
1681 tmf_task.tmf = TMF_ABORT_TASK_SET;
1682 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1687 int mvs_clear_aca(struct domain_device *dev, u8 *lun)
1689 int rc = TMF_RESP_FUNC_FAILED;
1690 struct mvs_tmf_task tmf_task;
1692 tmf_task.tmf = TMF_CLEAR_ACA;
1693 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1698 int mvs_clear_task_set(struct domain_device *dev, u8 *lun)
1700 int rc = TMF_RESP_FUNC_FAILED;
1701 struct mvs_tmf_task tmf_task;
1703 tmf_task.tmf = TMF_CLEAR_TASK_SET;
1704 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task);
1709 static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task,
1710 u32 slot_idx, int err)
1712 struct mvs_device *mvi_dev = (struct mvs_device *)task->dev->lldd_dev;
1713 struct task_status_struct *tstat = &task->task_status;
1714 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf;
1715 int stat = SAM_GOOD;
1718 resp->frame_len = sizeof(struct dev_to_host_fis);
1719 memcpy(&resp->ending_fis[0],
1720 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset),
1721 sizeof(struct dev_to_host_fis));
1722 tstat->buf_valid_size = sizeof(*resp);
1724 stat = SAS_PROTO_RESPONSE;
1728 static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task,
1731 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1733 u32 err_dw0 = le32_to_cpu(*(u32 *) (slot->response));
1735 enum mvs_port_type type = PORT_TYPE_SAS;
1737 if (err_dw0 & CMD_ISS_STPD)
1738 MVS_CHIP_DISP->issue_stop(mvi, type, tfs);
1740 MVS_CHIP_DISP->command_active(mvi, slot_idx);
1742 stat = SAM_CHECK_COND;
1743 switch (task->task_proto) {
1744 case SAS_PROTOCOL_SSP:
1745 stat = SAS_ABORTED_TASK;
1747 case SAS_PROTOCOL_SMP:
1748 stat = SAM_CHECK_COND;
1751 case SAS_PROTOCOL_SATA:
1752 case SAS_PROTOCOL_STP:
1753 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
1755 if (err_dw0 == 0x80400002)
1756 mv_printk("find reserved error, why?\n");
1758 task->ata_task.use_ncq = 0;
1759 stat = SAS_PROTO_RESPONSE;
1760 mvs_sata_done(mvi, task, slot_idx, 1);
1771 int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags)
1773 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
1774 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1775 struct sas_task *task = slot->task;
1776 struct mvs_device *mvi_dev = NULL;
1777 struct task_status_struct *tstat;
1781 enum exec_status sts;
1785 if (unlikely(!task || !task->lldd_task))
1788 tstat = &task->task_status;
1789 mvi_dev = (struct mvs_device *)task->dev->lldd_dev;
1791 mvs_hba_cq_dump(mvi);
1793 spin_lock(&task->task_state_lock);
1794 task->task_state_flags &=
1795 ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
1796 task->task_state_flags |= SAS_TASK_STATE_DONE;
1798 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED;
1799 spin_unlock(&task->task_state_lock);
1801 memset(tstat, 0, sizeof(*tstat));
1802 tstat->resp = SAS_TASK_COMPLETE;
1804 if (unlikely(aborted)) {
1805 tstat->stat = SAS_ABORTED_TASK;
1807 mvi_dev->runing_req--;
1808 if (sas_protocol_ata(task->task_proto))
1809 mvs_free_reg_set(mvi, mvi_dev);
1811 mvs_slot_task_free(mvi, task, slot, slot_idx);
1815 if (unlikely(!mvi_dev || !slot->port->port_attached || flags)) {
1816 mv_dprintk("port has not device.\n");
1817 tstat->stat = SAS_PHY_DOWN;
1822 if (unlikely((rx_desc & RXQ_ERR) || (*(u64 *) slot->response))) {
1823 mv_dprintk("Find device[%016llx] RXQ_ERR %X,
1824 err info:%016llx\n",
1825 SAS_ADDR(task->dev->sas_addr),
1826 rx_desc, (u64)(*(u64 *) slot->response));
1830 /* error info record present */
1831 if (unlikely((rx_desc & RXQ_ERR) && (*(u64 *) slot->response))) {
1832 tstat->stat = mvs_slot_err(mvi, task, slot_idx);
1836 switch (task->task_proto) {
1837 case SAS_PROTOCOL_SSP:
1838 /* hw says status == 0, datapres == 0 */
1839 if (rx_desc & RXQ_GOOD) {
1840 tstat->stat = SAM_GOOD;
1841 tstat->resp = SAS_TASK_COMPLETE;
1843 /* response frame present */
1844 else if (rx_desc & RXQ_RSP) {
1845 struct ssp_response_iu *iu = slot->response +
1846 sizeof(struct mvs_err_info);
1847 sas_ssp_task_response(mvi->dev, task, iu);
1849 tstat->stat = SAM_CHECK_COND;
1852 case SAS_PROTOCOL_SMP: {
1853 struct scatterlist *sg_resp = &task->smp_task.smp_resp;
1854 tstat->stat = SAM_GOOD;
1855 to = kmap_atomic(sg_page(sg_resp), KM_IRQ0);
1856 memcpy(to + sg_resp->offset,
1857 slot->response + sizeof(struct mvs_err_info),
1858 sg_dma_len(sg_resp));
1859 kunmap_atomic(to, KM_IRQ0);
1863 case SAS_PROTOCOL_SATA:
1864 case SAS_PROTOCOL_STP:
1865 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: {
1866 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0);
1871 tstat->stat = SAM_CHECK_COND;
1877 mvi_dev->runing_req--;
1878 if (sas_protocol_ata(task->task_proto))
1879 mvs_free_reg_set(mvi, mvi_dev);
1881 mvs_slot_task_free(mvi, task, slot, slot_idx);
1884 spin_unlock(&mvi->lock);
1885 if (task->task_done)
1886 task->task_done(task);
1888 mv_dprintk("why has not task_done.\n");
1889 spin_lock(&mvi->lock);
1894 void mvs_release_task(struct mvs_info *mvi,
1895 int phy_no, struct domain_device *dev)
1897 int i = 0; u32 slot_idx;
1898 struct mvs_phy *phy;
1899 struct mvs_port *port;
1900 struct mvs_slot_info *slot, *slot2;
1902 phy = &mvi->phy[phy_no];
1907 list_for_each_entry_safe(slot, slot2, &port->list, entry) {
1908 struct sas_task *task;
1909 slot_idx = (u32) (slot - mvi->slot_info);
1912 if (dev && task->dev != dev)
1915 mv_printk("Release slot [%x] tag[%x], task [%p]:\n",
1916 slot_idx, slot->slot_tag, task);
1918 if (task->task_proto & SAS_PROTOCOL_SSP) {
1919 mv_printk("attached with SSP task CDB[");
1920 for (i = 0; i < 16; i++)
1921 mv_printk(" %02x", task->ssp_task.cdb[i]);
1925 mvs_slot_complete(mvi, slot_idx, 1);
1929 static void mvs_phy_disconnected(struct mvs_phy *phy)
1931 phy->phy_attached = 0;
1932 phy->att_dev_info = 0;
1933 phy->att_dev_sas_addr = 0;
1936 static void mvs_work_queue(struct work_struct *work)
1938 struct delayed_work *dw = container_of(work, struct delayed_work, work);
1939 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q);
1940 struct mvs_info *mvi = mwq->mvi;
1941 unsigned long flags;
1943 spin_lock_irqsave(&mvi->lock, flags);
1944 if (mwq->handler & PHY_PLUG_EVENT) {
1945 u32 phy_no = (unsigned long) mwq->data;
1946 struct sas_ha_struct *sas_ha = mvi->sas;
1947 struct mvs_phy *phy = &mvi->phy[phy_no];
1948 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1950 if (phy->phy_event & PHY_PLUG_OUT) {
1952 struct sas_identify_frame *id;
1953 id = (struct sas_identify_frame *)phy->frame_rcvd;
1954 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no);
1955 phy->phy_event &= ~PHY_PLUG_OUT;
1956 if (!(tmp & PHY_READY_MASK)) {
1957 sas_phy_disconnected(sas_phy);
1958 mvs_phy_disconnected(phy);
1959 sas_ha->notify_phy_event(sas_phy,
1960 PHYE_LOSS_OF_SIGNAL);
1961 mv_dprintk("phy%d Removed Device\n", phy_no);
1963 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
1964 mvs_update_phyinfo(mvi, phy_no, 1);
1965 mvs_bytes_dmaed(mvi, phy_no);
1966 mvs_port_notify_formed(sas_phy, 0);
1967 mv_dprintk("phy%d Attached Device\n", phy_no);
1971 list_del(&mwq->entry);
1972 spin_unlock_irqrestore(&mvi->lock, flags);
1976 static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler)
1981 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC);
1985 mwq->handler = handler;
1986 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq);
1987 list_add_tail(&mwq->entry, &mvi->wq_list);
1988 schedule_delayed_work(&mwq->work_q, HZ * 2);
1995 static void mvs_sig_time_out(unsigned long tphy)
1997 struct mvs_phy *phy = (struct mvs_phy *)tphy;
1998 struct mvs_info *mvi = phy->mvi;
2001 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) {
2002 if (&mvi->phy[phy_no] == phy) {
2003 mv_dprintk("Get signature time out, reset phy %d\n",
2004 phy_no+mvi->id*mvi->chip->n_phy);
2005 MVS_CHIP_DISP->phy_reset(mvi, phy_no, 1);
2010 static void mvs_sig_remove_timer(struct mvs_phy *phy)
2012 if (phy->timer.function)
2013 del_timer(&phy->timer);
2014 phy->timer.function = NULL;
2017 void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events)
2020 struct sas_ha_struct *sas_ha = mvi->sas;
2021 struct mvs_phy *phy = &mvi->phy[phy_no];
2022 struct asd_sas_phy *sas_phy = &phy->sas_phy;
2024 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no);
2025 mv_dprintk("port %d ctrl sts=0x%X.\n", phy_no+mvi->id*mvi->chip->n_phy,
2026 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no));
2027 mv_dprintk("Port %d irq sts = 0x%X\n", phy_no+mvi->id*mvi->chip->n_phy,
2031 * events is port event now ,
2032 * we need check the interrupt status which belongs to per port.
2035 if (phy->irq_status & PHYEV_DCDR_ERR)
2036 mv_dprintk("port %d STP decoding error.\n",
2037 phy_no+mvi->id*mvi->chip->n_phy);
2039 if (phy->irq_status & PHYEV_POOF) {
2040 if (!(phy->phy_event & PHY_PLUG_OUT)) {
2041 int dev_sata = phy->phy_type & PORT_TYPE_SATA;
2043 mvs_release_task(mvi, phy_no, NULL);
2044 phy->phy_event |= PHY_PLUG_OUT;
2045 mvs_handle_event(mvi,
2046 (void *)(unsigned long)phy_no,
2048 ready = mvs_is_phy_ready(mvi, phy_no);
2050 mv_dprintk("phy%d Unplug Notice\n",
2052 mvi->id * mvi->chip->n_phy);
2053 if (ready || dev_sata) {
2054 if (MVS_CHIP_DISP->stp_reset)
2055 MVS_CHIP_DISP->stp_reset(mvi,
2058 MVS_CHIP_DISP->phy_reset(mvi,
2065 if (phy->irq_status & PHYEV_COMWAKE) {
2066 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no);
2067 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no,
2068 tmp | PHYEV_SIG_FIS);
2069 if (phy->timer.function == NULL) {
2070 phy->timer.data = (unsigned long)phy;
2071 phy->timer.function = mvs_sig_time_out;
2072 phy->timer.expires = jiffies + 10*HZ;
2073 add_timer(&phy->timer);
2076 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) {
2077 phy->phy_status = mvs_is_phy_ready(mvi, phy_no);
2078 mvs_sig_remove_timer(phy);
2079 mv_dprintk("notify plug in on phy[%d]\n", phy_no);
2080 if (phy->phy_status) {
2082 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
2083 if (phy->phy_type & PORT_TYPE_SATA) {
2084 tmp = MVS_CHIP_DISP->read_port_irq_mask(
2086 tmp &= ~PHYEV_SIG_FIS;
2087 MVS_CHIP_DISP->write_port_irq_mask(mvi,
2090 mvs_update_phyinfo(mvi, phy_no, 0);
2091 mvs_bytes_dmaed(mvi, phy_no);
2092 /* whether driver is going to handle hot plug */
2093 if (phy->phy_event & PHY_PLUG_OUT) {
2094 mvs_port_notify_formed(sas_phy, 0);
2095 phy->phy_event &= ~PHY_PLUG_OUT;
2098 mv_dprintk("plugin interrupt but phy%d is gone\n",
2099 phy_no + mvi->id*mvi->chip->n_phy);
2101 } else if (phy->irq_status & PHYEV_BROAD_CH) {
2102 mv_dprintk("port %d broadcast change.\n",
2103 phy_no + mvi->id*mvi->chip->n_phy);
2104 /* exception for Samsung disk drive*/
2106 sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD);
2108 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status);
2111 int mvs_int_rx(struct mvs_info *mvi, bool self_clear)
2113 u32 rx_prod_idx, rx_desc;
2116 /* the first dword in the RX ring is special: it contains
2117 * a mirror of the hardware's RX producer index, so that
2118 * we don't have to stall the CPU reading that register.
2119 * The actual RX ring is offset by one dword, due to this.
2121 rx_prod_idx = mvi->rx_cons;
2122 mvi->rx_cons = le32_to_cpu(mvi->rx[0]);
2123 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */
2126 /* The CMPL_Q may come late, read from register and try again
2127 * note: if coalescing is enabled,
2128 * it will need to read from register every time for sure
2130 if (unlikely(mvi->rx_cons == rx_prod_idx))
2131 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK;
2133 if (mvi->rx_cons == rx_prod_idx)
2136 while (mvi->rx_cons != rx_prod_idx) {
2137 /* increment our internal RX consumer pointer */
2138 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1);
2139 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]);
2141 if (likely(rx_desc & RXQ_DONE))
2142 mvs_slot_complete(mvi, rx_desc, 0);
2143 if (rx_desc & RXQ_ATTN) {
2145 } else if (rx_desc & RXQ_ERR) {
2146 if (!(rx_desc & RXQ_DONE))
2147 mvs_slot_complete(mvi, rx_desc, 0);
2148 } else if (rx_desc & RXQ_SLOT_RESET) {
2149 mvs_slot_free(mvi, rx_desc);
2153 if (attn && self_clear)
2154 MVS_CHIP_DISP->int_full(mvi);