2 * Compaq Hot Plug Controller Driver
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
6 * Copyright (C) 2001 IBM Corp.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 * Send feedback to <greg@kroah.com>
27 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
28 * Torben Mathiasen <torben.mathiasen@hp.com>
32 #include <linux/module.h>
33 #include <linux/moduleparam.h>
34 #include <linux/kernel.h>
35 #include <linux/types.h>
36 #include <linux/proc_fs.h>
37 #include <linux/slab.h>
38 #include <linux/workqueue.h>
39 #include <linux/pci.h>
40 #include <linux/pci_hotplug.h>
41 #include <linux/init.h>
42 #include <linux/interrupt.h>
44 #include <asm/uaccess.h>
47 #include "cpqphp_nvram.h"
48 #include "../../../arch/x86/pci/pci.h" /* horrible hack showing how processor dependent we are... */
51 /* Global variables */
53 int cpqhp_legacy_mode;
54 struct controller *cpqhp_ctrl_list; /* = NULL */
55 struct pci_func *cpqhp_slot_list[256];
58 static void __iomem *smbios_table;
59 static void __iomem *smbios_start;
60 static void __iomem *cpqhp_rom_start;
61 static int power_mode;
63 static int initialized;
65 #define DRIVER_VERSION "0.9.8"
66 #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
67 #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
69 MODULE_AUTHOR(DRIVER_AUTHOR);
70 MODULE_DESCRIPTION(DRIVER_DESC);
71 MODULE_LICENSE("GPL");
73 module_param(power_mode, bool, 0644);
74 MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
76 module_param(debug, bool, 0644);
77 MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
79 #define CPQHPC_MODULE_MINOR 208
81 static int one_time_init (void);
82 static int set_attention_status (struct hotplug_slot *slot, u8 value);
83 static int process_SI (struct hotplug_slot *slot);
84 static int process_SS (struct hotplug_slot *slot);
85 static int hardware_test (struct hotplug_slot *slot, u32 value);
86 static int get_power_status (struct hotplug_slot *slot, u8 *value);
87 static int get_attention_status (struct hotplug_slot *slot, u8 *value);
88 static int get_latch_status (struct hotplug_slot *slot, u8 *value);
89 static int get_adapter_status (struct hotplug_slot *slot, u8 *value);
90 static int get_max_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
91 static int get_cur_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
93 static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
95 .set_attention_status = set_attention_status,
96 .enable_slot = process_SI,
97 .disable_slot = process_SS,
98 .hardware_test = hardware_test,
99 .get_power_status = get_power_status,
100 .get_attention_status = get_attention_status,
101 .get_latch_status = get_latch_status,
102 .get_adapter_status = get_adapter_status,
103 .get_max_bus_speed = get_max_bus_speed,
104 .get_cur_bus_speed = get_cur_bus_speed,
108 static inline int is_slot64bit(struct slot *slot)
110 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
113 static inline int is_slot66mhz(struct slot *slot)
115 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
119 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
120 * @begin: begin pointer for region to be scanned.
121 * @end: end pointer for region to be scanned.
123 * Returns pointer to the head of the SMBIOS tables (or %NULL).
125 static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
129 u8 temp1, temp2, temp3, temp4;
132 endp = (end - sizeof(u32) + 1);
134 for (fp = begin; fp <= endp; fp += 16) {
151 dbg("Discovered SMBIOS Entry point at %p\n", fp);
157 * init_SERR - Initializes the per slot SERR generation.
158 * @ctrl: controller to use
160 * For unexpected switch opens
162 static int init_SERR(struct controller * ctrl)
171 tempdword = ctrl->first_slot;
173 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
174 // Loop through slots
175 while (number_of_slots) {
176 physical_slot = tempdword;
177 writeb(0, ctrl->hpc_reg + SLOT_SERR);
186 /* nice debugging output */
187 static int pci_print_IRQ_route (void)
189 struct irq_routing_table *routing_table;
193 u8 tbus, tdevice, tslot;
195 routing_table = pcibios_get_irq_routing_table();
196 if (routing_table == NULL) {
197 err("No BIOS Routing Table??? Not good\n");
201 len = (routing_table->size - sizeof(struct irq_routing_table)) /
202 sizeof(struct irq_info);
203 // Make sure I got at least one entry
205 kfree(routing_table);
209 dbg("bus dev func slot\n");
211 for (loop = 0; loop < len; ++loop) {
212 tbus = routing_table->slots[loop].bus;
213 tdevice = routing_table->slots[loop].devfn;
214 tslot = routing_table->slots[loop].slot;
215 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
218 kfree(routing_table);
224 * get_subsequent_smbios_entry: get the next entry from bios table.
225 * @smbios_start: where to start in the SMBIOS table
226 * @smbios_table: location of the SMBIOS table
227 * @curr: %NULL or pointer to previously returned structure
229 * Gets the first entry if previous == NULL;
230 * otherwise, returns the next entry.
231 * Uses global SMBIOS Table pointer.
233 * Returns a pointer to an SMBIOS structure or NULL if none found.
235 static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
236 void __iomem *smbios_table,
240 u8 previous_byte = 1;
241 void __iomem *p_temp;
244 if (!smbios_table || !curr)
247 // set p_max to the end of the table
248 p_max = smbios_start + readw(smbios_table + ST_LENGTH);
251 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
253 while ((p_temp < p_max) && !bail) {
254 /* Look for the double NULL terminator
255 * The first condition is the previous byte
256 * and the second is the curr */
257 if (!previous_byte && !(readb(p_temp))) {
261 previous_byte = readb(p_temp);
265 if (p_temp < p_max) {
274 * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
275 * @smbios_start: where to start in the SMBIOS table
276 * @smbios_table: location of the SMBIOS table
277 * @type: SMBIOS structure type to be returned
278 * @previous: %NULL or pointer to previously returned structure
280 * Gets the first entry of the specified type if previous == %NULL;
281 * Otherwise, returns the next entry of the given type.
282 * Uses global SMBIOS Table pointer.
283 * Uses get_subsequent_smbios_entry.
285 * Returns a pointer to an SMBIOS structure or %NULL if none found.
287 static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
288 void __iomem *smbios_table,
290 void __iomem *previous)
296 previous = smbios_start;
298 previous = get_subsequent_smbios_entry(smbios_start,
299 smbios_table, previous);
303 if (readb(previous + SMBIOS_GENERIC_TYPE) != type) {
304 previous = get_subsequent_smbios_entry(smbios_start,
305 smbios_table, previous);
314 static void release_slot(struct hotplug_slot *hotplug_slot)
316 struct slot *slot = hotplug_slot->private;
318 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
320 kfree(slot->hotplug_slot->info);
321 kfree(slot->hotplug_slot);
325 #define SLOT_NAME_SIZE 10
327 static int ctrl_slot_setup(struct controller *ctrl,
328 void __iomem *smbios_start,
329 void __iomem *smbios_table)
332 struct hotplug_slot *hotplug_slot;
333 struct hotplug_slot_info *hotplug_slot_info;
339 char name[SLOT_NAME_SIZE];
340 void __iomem *slot_entry= NULL;
341 int result = -ENOMEM;
343 dbg("%s\n", __func__);
345 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
347 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
348 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
349 slot_number = ctrl->first_slot;
351 while (number_of_slots) {
352 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
356 slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
358 if (!slot->hotplug_slot)
360 hotplug_slot = slot->hotplug_slot;
363 kzalloc(sizeof(*(hotplug_slot->info)),
365 if (!hotplug_slot->info)
367 hotplug_slot_info = hotplug_slot->info;
370 slot->bus = ctrl->bus;
371 slot->device = slot_device;
372 slot->number = slot_number;
373 dbg("slot->number = %u\n", slot->number);
375 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
378 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
380 slot_entry = get_SMBIOS_entry(smbios_start,
381 smbios_table, 9, slot_entry);
384 slot->p_sm_slot = slot_entry;
386 init_timer(&slot->task_event);
387 slot->task_event.expires = jiffies + 5 * HZ;
388 slot->task_event.function = cpqhp_pushbutton_thread;
390 //FIXME: these capabilities aren't used but if they are
391 // they need to be correctly implemented
392 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
393 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
395 if (is_slot64bit(slot))
396 slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
397 if (is_slot66mhz(slot))
398 slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
399 if (ctrl->speed == PCI_SPEED_66MHz)
400 slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
403 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
406 slot->capabilities |=
407 ((((~tempdword) >> 23) |
408 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
409 // Check the switch state
410 slot->capabilities |=
411 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
412 // Check the slot enable
413 slot->capabilities |=
414 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
416 /* register this slot with the hotplug pci core */
417 hotplug_slot->release = &release_slot;
418 hotplug_slot->private = slot;
419 snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
420 hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
422 hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
423 hotplug_slot_info->attention_status =
424 cpq_get_attention_status(ctrl, slot);
425 hotplug_slot_info->latch_status =
426 cpq_get_latch_status(ctrl, slot);
427 hotplug_slot_info->adapter_status =
428 get_presence_status(ctrl, slot);
430 dbg("registering bus %d, dev %d, number %d, "
431 "ctrl->slot_device_offset %d, slot %d\n",
432 slot->bus, slot->device,
433 slot->number, ctrl->slot_device_offset,
435 result = pci_hp_register(hotplug_slot,
440 err("pci_hp_register failed with error %d\n", result);
444 slot->next = ctrl->slot;
454 kfree(hotplug_slot_info);
463 static int ctrl_slot_cleanup (struct controller * ctrl)
465 struct slot *old_slot, *next_slot;
467 old_slot = ctrl->slot;
471 /* memory will be freed by the release_slot callback */
472 next_slot = old_slot->next;
473 pci_hp_deregister (old_slot->hotplug_slot);
474 old_slot = next_slot;
477 cpqhp_remove_debugfs_files(ctrl);
479 //Free IRQ associated with hot plug device
480 free_irq(ctrl->interrupt, ctrl);
482 iounmap(ctrl->hpc_reg);
483 //Finally reclaim PCI mem
484 release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
485 pci_resource_len(ctrl->pci_dev, 0));
491 //============================================================================
492 // function: get_slot_mapping
494 // Description: Attempts to determine a logical slot mapping for a PCI
495 // device. Won't work for more than one PCI-PCI bridge
498 // Input: u8 bus_num - bus number of PCI device
499 // u8 dev_num - device number of PCI device
500 // u8 *slot - Pointer to u8 where slot number will
503 // Output: SUCCESS or FAILURE
504 //=============================================================================
506 get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
508 struct irq_routing_table *PCIIRQRoutingInfoLength;
513 u8 tbus, tdevice, tslot, bridgeSlot;
515 dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
519 PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
520 if (!PCIIRQRoutingInfoLength)
523 len = (PCIIRQRoutingInfoLength->size -
524 sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
525 // Make sure I got at least one entry
527 kfree(PCIIRQRoutingInfoLength);
531 for (loop = 0; loop < len; ++loop) {
532 tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
533 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3;
534 tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
536 if ((tbus == bus_num) && (tdevice == dev_num)) {
538 kfree(PCIIRQRoutingInfoLength);
541 /* Did not get a match on the target PCI device. Check
542 * if the current IRQ table entry is a PCI-to-PCI bridge
543 * device. If so, and it's secondary bus matches the
544 * bus number for the target device, I need to save the
545 * bridge's slot number. If I can not find an entry for
546 * the target device, I will have to assume it's on the
547 * other side of the bridge, and assign it the bridge's
550 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
551 PCI_CLASS_REVISION, &work);
553 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
554 pci_bus_read_config_dword(bus,
555 PCI_DEVFN(tdevice, 0),
556 PCI_PRIMARY_BUS, &work);
557 // See if bridge's secondary bus matches target bus.
558 if (((work >> 8) & 0x000000FF) == (long) bus_num) {
566 // If we got here, we didn't find an entry in the IRQ mapping table
567 // for the target PCI device. If we did determine that the target
568 // device is on the other side of a PCI-to-PCI bridge, return the
569 // slot number for the bridge.
570 if (bridgeSlot != 0xFF) {
572 kfree(PCIIRQRoutingInfoLength);
575 kfree(PCIIRQRoutingInfoLength);
576 // Couldn't find an entry in the routing table for this PCI device
582 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
583 * @ctrl: struct controller to use
584 * @func: PCI device/function info
585 * @status: LED control flag: 1 = LED on, 0 = LED off
588 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
596 hp_slot = func->device - ctrl->slot_device_offset;
598 // Wait for exclusive access to hardware
599 mutex_lock(&ctrl->crit_sect);
602 amber_LED_on (ctrl, hp_slot);
603 } else if (status == 0) {
604 amber_LED_off (ctrl, hp_slot);
606 // Done with exclusive hardware access
607 mutex_unlock(&ctrl->crit_sect);
613 // Wait for SOBS to be unset
614 wait_for_ctrl_irq (ctrl);
616 // Done with exclusive hardware access
617 mutex_unlock(&ctrl->crit_sect);
624 * set_attention_status - Turns the Amber LED for a slot on or off
625 * @hotplug_slot: slot to change LED on
626 * @status: LED control flag
628 static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
630 struct pci_func *slot_func;
631 struct slot *slot = hotplug_slot->private;
632 struct controller *ctrl = slot->ctrl;
638 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
640 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
644 function = devfn & 0x7;
645 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
647 slot_func = cpqhp_slot_find(bus, device, function);
651 return cpqhp_set_attention_status(ctrl, slot_func, status);
655 static int process_SI(struct hotplug_slot *hotplug_slot)
657 struct pci_func *slot_func;
658 struct slot *slot = hotplug_slot->private;
659 struct controller *ctrl = slot->ctrl;
665 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
667 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
671 function = devfn & 0x7;
672 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
674 slot_func = cpqhp_slot_find(bus, device, function);
678 slot_func->bus = bus;
679 slot_func->device = device;
680 slot_func->function = function;
681 slot_func->configured = 0;
682 dbg("board_added(%p, %p)\n", slot_func, ctrl);
683 return cpqhp_process_SI(ctrl, slot_func);
687 static int process_SS(struct hotplug_slot *hotplug_slot)
689 struct pci_func *slot_func;
690 struct slot *slot = hotplug_slot->private;
691 struct controller *ctrl = slot->ctrl;
697 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
699 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
703 function = devfn & 0x7;
704 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
706 slot_func = cpqhp_slot_find(bus, device, function);
710 dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
711 return cpqhp_process_SS(ctrl, slot_func);
715 static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
717 struct slot *slot = hotplug_slot->private;
718 struct controller *ctrl = slot->ctrl;
720 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
722 return cpqhp_hardware_test(ctrl, value);
726 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
728 struct slot *slot = hotplug_slot->private;
729 struct controller *ctrl = slot->ctrl;
731 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
733 *value = get_slot_enabled(ctrl, slot);
737 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
739 struct slot *slot = hotplug_slot->private;
740 struct controller *ctrl = slot->ctrl;
742 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
744 *value = cpq_get_attention_status(ctrl, slot);
748 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
750 struct slot *slot = hotplug_slot->private;
751 struct controller *ctrl = slot->ctrl;
753 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
755 *value = cpq_get_latch_status(ctrl, slot);
760 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
762 struct slot *slot = hotplug_slot->private;
763 struct controller *ctrl = slot->ctrl;
765 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
767 *value = get_presence_status(ctrl, slot);
772 static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
774 struct slot *slot = hotplug_slot->private;
775 struct controller *ctrl = slot->ctrl;
777 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
779 *value = ctrl->speed_capability;
784 static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
786 struct slot *slot = hotplug_slot->private;
787 struct controller *ctrl = slot->ctrl;
789 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
791 *value = ctrl->speed;
796 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
805 u16 subsystem_deviceid;
807 struct controller *ctrl;
808 struct pci_func *func;
811 err = pci_enable_device(pdev);
813 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
814 pci_name(pdev), err);
818 // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery
819 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
820 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
821 err(msg_HPC_non_compaq_or_intel);
823 goto err_disable_device;
825 dbg("Vendor ID: %x\n", vendor_id);
827 dbg("revision: %d\n", pdev->revision);
828 if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
829 err(msg_HPC_rev_error);
831 goto err_disable_device;
834 /* Check for the proper subsytem ID's
835 * Intel uses a different SSID programming model than Compaq.
836 * For Intel, each SSID bit identifies a PHP capability.
837 * Also Intel HPC's may have RID=0.
839 if ((pdev->revision > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
840 // TODO: This code can be made to support non-Compaq or Intel subsystem IDs
841 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
843 err("%s : pci_read_config_word failed\n", __func__);
844 goto err_disable_device;
846 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
847 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
848 err(msg_HPC_non_compaq_or_intel);
850 goto err_disable_device;
853 ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
855 err("%s : out of memory\n", __func__);
857 goto err_disable_device;
860 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
862 err("%s : pci_read_config_word failed\n", __func__);
866 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
868 /* Set Vendor ID, so it can be accessed later from other functions */
869 ctrl->vendor_id = vendor_id;
871 switch (subsystem_vid) {
872 case PCI_VENDOR_ID_COMPAQ:
873 if (pdev->revision >= 0x13) { /* CIOBX */
875 ctrl->slot_switch_type = 1;
876 ctrl->push_button = 1;
877 ctrl->pci_config_space = 1;
878 ctrl->defeature_PHP = 1;
879 ctrl->pcix_support = 1;
880 ctrl->pcix_speed_capability = 1;
881 pci_read_config_byte(pdev, 0x41, &bus_cap);
882 if (bus_cap & 0x80) {
883 dbg("bus max supports 133MHz PCI-X\n");
884 ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
887 if (bus_cap & 0x40) {
888 dbg("bus max supports 100MHz PCI-X\n");
889 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
893 dbg("bus max supports 66MHz PCI-X\n");
894 ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
898 dbg("bus max supports 66MHz PCI\n");
899 ctrl->speed_capability = PCI_SPEED_66MHz;
906 switch (subsystem_deviceid) {
908 /* Original 6500/7000 implementation */
909 ctrl->slot_switch_type = 1;
910 ctrl->speed_capability = PCI_SPEED_33MHz;
911 ctrl->push_button = 0;
912 ctrl->pci_config_space = 1;
913 ctrl->defeature_PHP = 1;
914 ctrl->pcix_support = 0;
915 ctrl->pcix_speed_capability = 0;
917 case PCI_SUB_HPC_ID2:
918 /* First Pushbutton implementation */
920 ctrl->slot_switch_type = 1;
921 ctrl->speed_capability = PCI_SPEED_33MHz;
922 ctrl->push_button = 1;
923 ctrl->pci_config_space = 1;
924 ctrl->defeature_PHP = 1;
925 ctrl->pcix_support = 0;
926 ctrl->pcix_speed_capability = 0;
928 case PCI_SUB_HPC_ID_INTC:
929 /* Third party (6500/7000) */
930 ctrl->slot_switch_type = 1;
931 ctrl->speed_capability = PCI_SPEED_33MHz;
932 ctrl->push_button = 0;
933 ctrl->pci_config_space = 1;
934 ctrl->defeature_PHP = 1;
935 ctrl->pcix_support = 0;
936 ctrl->pcix_speed_capability = 0;
938 case PCI_SUB_HPC_ID3:
939 /* First 66 Mhz implementation */
941 ctrl->slot_switch_type = 1;
942 ctrl->speed_capability = PCI_SPEED_66MHz;
943 ctrl->push_button = 1;
944 ctrl->pci_config_space = 1;
945 ctrl->defeature_PHP = 1;
946 ctrl->pcix_support = 0;
947 ctrl->pcix_speed_capability = 0;
949 case PCI_SUB_HPC_ID4:
950 /* First PCI-X implementation, 100MHz */
952 ctrl->slot_switch_type = 1;
953 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
954 ctrl->push_button = 1;
955 ctrl->pci_config_space = 1;
956 ctrl->defeature_PHP = 1;
957 ctrl->pcix_support = 1;
958 ctrl->pcix_speed_capability = 0;
961 err(msg_HPC_not_supported);
967 case PCI_VENDOR_ID_INTEL:
968 /* Check for speed capability (0=33, 1=66) */
969 if (subsystem_deviceid & 0x0001) {
970 ctrl->speed_capability = PCI_SPEED_66MHz;
972 ctrl->speed_capability = PCI_SPEED_33MHz;
975 /* Check for push button */
976 if (subsystem_deviceid & 0x0002) {
978 ctrl->push_button = 0;
980 /* push button supported */
981 ctrl->push_button = 1;
984 /* Check for slot switch type (0=mechanical, 1=not mechanical) */
985 if (subsystem_deviceid & 0x0004) {
987 ctrl->slot_switch_type = 0;
990 ctrl->slot_switch_type = 1;
993 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
994 if (subsystem_deviceid & 0x0008) {
995 ctrl->defeature_PHP = 1; // PHP supported
997 ctrl->defeature_PHP = 0; // PHP not supported
1000 /* Alternate Base Address Register Interface (0=not supported, 1=supported) */
1001 if (subsystem_deviceid & 0x0010) {
1002 ctrl->alternate_base_address = 1; // supported
1004 ctrl->alternate_base_address = 0; // not supported
1007 /* PCI Config Space Index (0=not supported, 1=supported) */
1008 if (subsystem_deviceid & 0x0020) {
1009 ctrl->pci_config_space = 1; // supported
1011 ctrl->pci_config_space = 0; // not supported
1015 if (subsystem_deviceid & 0x0080) {
1017 ctrl->pcix_support = 1;
1018 /* Frequency of operation in PCI-X mode */
1019 if (subsystem_deviceid & 0x0040) {
1020 /* 133MHz PCI-X if bit 7 is 1 */
1021 ctrl->pcix_speed_capability = 1;
1023 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
1024 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
1025 ctrl->pcix_speed_capability = 0;
1028 /* Conventional PCI */
1029 ctrl->pcix_support = 0;
1030 ctrl->pcix_speed_capability = 0;
1035 err(msg_HPC_not_supported);
1041 err(msg_HPC_not_supported);
1045 // Tell the user that we found one.
1046 info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1049 dbg("Hotplug controller capabilities:\n");
1050 dbg(" speed_capability %d\n", ctrl->speed_capability);
1051 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
1052 "switch present" : "no switch");
1053 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
1054 "PHP supported" : "PHP not supported");
1055 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
1056 "supported" : "not supported");
1057 dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
1058 "supported" : "not supported");
1059 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
1060 "supported" : "not supported");
1061 dbg(" pcix_support %s\n", ctrl->pcix_support ?
1062 "supported" : "not supported");
1064 ctrl->pci_dev = pdev;
1065 pci_set_drvdata(pdev, ctrl);
1067 /* make our own copy of the pci bus structure,
1068 * as we like tweaking it a lot */
1069 ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
1070 if (!ctrl->pci_bus) {
1071 err("out of memory\n");
1075 memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
1077 ctrl->bus = pdev->bus->number;
1078 ctrl->rev = pdev->revision;
1079 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1080 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1082 mutex_init(&ctrl->crit_sect);
1083 init_waitqueue_head(&ctrl->queue);
1085 /* initialize our threads if they haven't already been started up */
1086 rc = one_time_init();
1091 dbg("pdev = %p\n", pdev);
1092 dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
1093 dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
1095 if (!request_mem_region(pci_resource_start(pdev, 0),
1096 pci_resource_len(pdev, 0), MY_NAME)) {
1097 err("cannot reserve MMIO region\n");
1102 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1103 pci_resource_len(pdev, 0));
1104 if (!ctrl->hpc_reg) {
1105 err("cannot remap MMIO region %llx @ %llx\n",
1106 (unsigned long long)pci_resource_len(pdev, 0),
1107 (unsigned long long)pci_resource_start(pdev, 0));
1109 goto err_free_mem_region;
1112 // Check for 66Mhz operation
1113 ctrl->speed = get_controller_speed(ctrl);
1116 /********************************************************
1118 * Save configuration headers for this and
1119 * subordinate PCI buses
1121 ********************************************************/
1123 // find the physical slot number of the first hot plug slot
1125 /* Get slot won't work for devices behind bridges, but
1126 * in this case it will always be called for the "base"
1127 * bus/dev/func of a slot.
1128 * CS: this is leveraging the PCIIRQ routing code from the kernel
1129 * (pci-pc.c: get_irq_routing_table) */
1130 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1131 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1132 &(ctrl->first_slot));
1133 dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1134 ctrl->first_slot, rc);
1136 err(msg_initialization_err, rc);
1140 // Store PCI Config Space for all devices on this bus
1141 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1143 err("%s: unable to save PCI configuration data, error %d\n",
1149 * Get IO, memory, and IRQ resources for new devices
1151 // The next line is required for cpqhp_find_available_resources
1152 ctrl->interrupt = pdev->irq;
1153 if (ctrl->interrupt < 0x10) {
1154 cpqhp_legacy_mode = 1;
1155 dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1158 ctrl->cfgspc_irq = 0;
1159 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1161 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1162 ctrl->add_support = !rc;
1164 dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1165 err("unable to locate PCI configuration resources for hot plug add.\n");
1170 * Finish setting up the hot plug ctrl device
1172 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1173 dbg("NumSlots %d \n", ctrl->slot_device_offset);
1175 ctrl->next_event = 0;
1177 /* Setup the slot information structures */
1178 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1180 err(msg_initialization_err, 6);
1181 err("%s: unable to save PCI configuration data, error %d\n",
1186 /* Mask all general input interrupts */
1187 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1189 /* set up the interrupt */
1190 dbg("HPC interrupt = %d \n", ctrl->interrupt);
1191 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
1192 IRQF_SHARED, MY_NAME, ctrl)) {
1193 err("Can't get irq %d for the hotplug pci controller\n",
1199 /* Enable Shift Out interrupt and clear it, also enable SERR on power fault */
1200 temp_word = readw(ctrl->hpc_reg + MISC);
1201 temp_word |= 0x4006;
1202 writew(temp_word, ctrl->hpc_reg + MISC);
1204 // Changed 05/05/97 to clear all interrupts at start
1205 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1207 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1209 writel(0x0L, ctrl->hpc_reg + INT_MASK);
1211 if (!cpqhp_ctrl_list) {
1212 cpqhp_ctrl_list = ctrl;
1215 ctrl->next = cpqhp_ctrl_list;
1216 cpqhp_ctrl_list = ctrl;
1219 // turn off empty slots here unless command line option "ON" set
1220 // Wait for exclusive access to hardware
1221 mutex_lock(&ctrl->crit_sect);
1223 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1225 // find first device number for the ctrl
1226 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1228 while (num_of_slots) {
1229 dbg("num_of_slots: %d\n", num_of_slots);
1230 func = cpqhp_slot_find(ctrl->bus, device, 0);
1234 hp_slot = func->device - ctrl->slot_device_offset;
1235 dbg("hp_slot: %d\n", hp_slot);
1237 // We have to save the presence info for these slots
1238 temp_word = ctrl->ctrl_int_comp >> 16;
1239 func->presence_save = (temp_word >> hp_slot) & 0x01;
1240 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1242 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
1243 func->switch_save = 0;
1245 func->switch_save = 0x10;
1249 if (!func->is_a_board) {
1250 green_LED_off(ctrl, hp_slot);
1251 slot_disable(ctrl, hp_slot);
1261 // Wait for SOBS to be unset
1262 wait_for_ctrl_irq(ctrl);
1265 rc = init_SERR(ctrl);
1267 err("init_SERR failed\n");
1268 mutex_unlock(&ctrl->crit_sect);
1272 // Done with exclusive hardware access
1273 mutex_unlock(&ctrl->crit_sect);
1275 cpqhp_create_debugfs_files(ctrl);
1280 free_irq(ctrl->interrupt, ctrl);
1282 iounmap(ctrl->hpc_reg);
1283 err_free_mem_region:
1284 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1286 kfree(ctrl->pci_bus);
1290 pci_disable_device(pdev);
1295 static int one_time_init(void)
1305 retval = pci_print_IRQ_route();
1309 dbg("Initialize + Start the notification mechanism \n");
1311 retval = cpqhp_event_start_thread();
1315 dbg("Initialize slot lists\n");
1316 for (loop = 0; loop < 256; loop++) {
1317 cpqhp_slot_list[loop] = NULL;
1320 // FIXME: We also need to hook the NMI handler eventually.
1321 // this also needs to be worked with Christoph
1322 // register_NMI_handler();
1325 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
1326 if (!cpqhp_rom_start) {
1327 err ("Could not ioremap memory region for ROM\n");
1332 /* Now, map the int15 entry point if we are on compaq specific hardware */
1333 compaq_nvram_init(cpqhp_rom_start);
1335 /* Map smbios table entry point structure */
1336 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
1337 cpqhp_rom_start + ROM_PHY_LEN);
1338 if (!smbios_table) {
1339 err ("Could not find the SMBIOS pointer in memory\n");
1341 goto error_rom_start;
1344 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
1345 readw(smbios_table + ST_LENGTH));
1346 if (!smbios_start) {
1347 err ("Could not ioremap memory region taken from SMBIOS values\n");
1349 goto error_smbios_start;
1357 iounmap(smbios_start);
1359 iounmap(cpqhp_rom_start);
1365 static void __exit unload_cpqphpd(void)
1367 struct pci_func *next;
1368 struct pci_func *TempSlot;
1371 struct controller *ctrl;
1372 struct controller *tctrl;
1373 struct pci_resource *res;
1374 struct pci_resource *tres;
1376 rc = compaq_nvram_store(cpqhp_rom_start);
1378 ctrl = cpqhp_ctrl_list;
1381 if (ctrl->hpc_reg) {
1383 rc = read_slot_enable (ctrl);
1385 writeb(0, ctrl->hpc_reg + SLOT_SERR);
1386 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
1388 misc = readw(ctrl->hpc_reg + MISC);
1390 writew(misc, ctrl->hpc_reg + MISC);
1393 ctrl_slot_cleanup(ctrl);
1395 res = ctrl->io_head;
1402 res = ctrl->mem_head;
1409 res = ctrl->p_mem_head;
1416 res = ctrl->bus_head;
1423 kfree (ctrl->pci_bus);
1430 for (loop = 0; loop < 256; loop++) {
1431 next = cpqhp_slot_list[loop];
1432 while (next != NULL) {
1433 res = next->io_head;
1440 res = next->mem_head;
1447 res = next->p_mem_head;
1454 res = next->bus_head;
1467 // Stop the notification mechanism
1469 cpqhp_event_stop_thread();
1471 //unmap the rom address
1472 if (cpqhp_rom_start)
1473 iounmap(cpqhp_rom_start);
1475 iounmap(smbios_start);
1480 static struct pci_device_id hpcd_pci_tbl[] = {
1482 /* handle any PCI Hotplug controller */
1483 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1486 /* no matter who makes it */
1487 .vendor = PCI_ANY_ID,
1488 .device = PCI_ANY_ID,
1489 .subvendor = PCI_ANY_ID,
1490 .subdevice = PCI_ANY_ID,
1492 }, { /* end: all zeroes */ }
1495 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1499 static struct pci_driver cpqhpc_driver = {
1500 .name = "compaq_pci_hotplug",
1501 .id_table = hpcd_pci_tbl,
1502 .probe = cpqhpc_probe,
1503 /* remove: cpqhpc_remove_one, */
1508 static int __init cpqhpc_init(void)
1512 cpqhp_debug = debug;
1514 info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
1515 cpqhp_initialize_debugfs();
1516 result = pci_register_driver(&cpqhpc_driver);
1517 dbg("pci_register_driver = %d\n", result);
1522 static void __exit cpqhpc_cleanup(void)
1524 dbg("unload_cpqphpd()\n");
1527 dbg("pci_unregister_driver\n");
1528 pci_unregister_driver(&cpqhpc_driver);
1529 cpqhp_shutdown_debugfs();
1533 module_init(cpqhpc_init);
1534 module_exit(cpqhpc_cleanup);