2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
6 * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx>
8 * This driver is derived from the Linux sym53c8xx driver.
9 * Copyright (C) 1998-2000 Gerard Roudier
11 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
12 * a port of the FreeBSD ncr driver to Linux-1.2.13.
14 * The original ncr driver has been written for 386bsd and FreeBSD by
15 * Wolfgang Stanglmeier <wolf@cologne.de>
16 * Stefan Esser <se@mi.Uni-Koeln.de>
17 * Copyright (C) 1994 Wolfgang Stanglmeier
19 * Other major contributions:
21 * NVRAM detection and reading.
22 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
24 *-----------------------------------------------------------------------------
26 * This program is free software; you can redistribute it and/or modify
27 * it under the terms of the GNU General Public License as published by
28 * the Free Software Foundation; either version 2 of the License, or
29 * (at your option) any later version.
31 * This program is distributed in the hope that it will be useful,
32 * but WITHOUT ANY WARRANTY; without even the implied warranty of
33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
34 * GNU General Public License for more details.
36 * You should have received a copy of the GNU General Public License
37 * along with this program; if not, write to the Free Software
38 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
41 #include <linux/slab.h>
42 #include <asm/param.h> /* for timeouts in units of HZ */
45 #include "sym_nvram.h"
48 #define SYM_DEBUG_GENERIC_SUPPORT
52 * Needed function prototypes.
54 static void sym_int_ma (struct sym_hcb *np);
55 static void sym_int_sir (struct sym_hcb *np);
56 static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np);
57 static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa);
58 static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln);
59 static void sym_complete_error (struct sym_hcb *np, struct sym_ccb *cp);
60 static void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp);
61 static int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp);
64 * Print a buffer in hexadecimal format with a ".\n" at end.
66 static void sym_printl_hex(u_char *p, int n)
73 static void sym_print_msg(struct sym_ccb *cp, char *label, u_char *msg)
75 sym_print_addr(cp->cmd, "%s: ", label);
81 static void sym_print_nego_msg(struct sym_hcb *np, int target, char *label, u_char *msg)
83 struct sym_tcb *tp = &np->target[target];
84 dev_info(&tp->starget->dev, "%s: ", label);
91 * Print something that tells about extended errors.
93 void sym_print_xerr(struct scsi_cmnd *cmd, int x_status)
95 if (x_status & XE_PARITY_ERR) {
96 sym_print_addr(cmd, "unrecovered SCSI parity error.\n");
98 if (x_status & XE_EXTRA_DATA) {
99 sym_print_addr(cmd, "extraneous data discarded.\n");
101 if (x_status & XE_BAD_PHASE) {
102 sym_print_addr(cmd, "illegal scsi phase (4/5).\n");
104 if (x_status & XE_SODL_UNRUN) {
105 sym_print_addr(cmd, "ODD transfer in DATA OUT phase.\n");
107 if (x_status & XE_SWIDE_OVRUN) {
108 sym_print_addr(cmd, "ODD transfer in DATA IN phase.\n");
113 * Return a string for SCSI BUS mode.
115 static char *sym_scsi_bus_mode(int mode)
118 case SMODE_HVD: return "HVD";
119 case SMODE_SE: return "SE";
120 case SMODE_LVD: return "LVD";
126 * Soft reset the chip.
128 * Raising SRST when the chip is running may cause
129 * problems on dual function chips (see below).
130 * On the other hand, LVD devices need some delay
131 * to settle and report actual BUS mode in STEST4.
133 static void sym_chip_reset (struct sym_hcb *np)
135 OUTB(np, nc_istat, SRST);
138 OUTB(np, nc_istat, 0);
140 udelay(2000); /* For BUS MODE to settle */
144 * Really soft reset the chip.:)
146 * Some 896 and 876 chip revisions may hang-up if we set
147 * the SRST (soft reset) bit at the wrong time when SCRIPTS
149 * So, we need to abort the current operation prior to
150 * soft resetting the chip.
152 static void sym_soft_reset (struct sym_hcb *np)
157 if (!(np->features & FE_ISTAT1) || !(INB(np, nc_istat1) & SCRUN))
160 OUTB(np, nc_istat, CABRT);
161 for (i = 100000 ; i ; --i) {
162 istat = INB(np, nc_istat);
166 else if (istat & DIP) {
167 if (INB(np, nc_dstat) & ABRT)
172 OUTB(np, nc_istat, 0);
174 printf("%s: unable to abort current chip operation, "
175 "ISTAT=0x%02x.\n", sym_name(np), istat);
181 * Start reset process.
183 * The interrupt handler will reinitialize the chip.
185 static void sym_start_reset(struct sym_hcb *np)
187 sym_reset_scsi_bus(np, 1);
190 int sym_reset_scsi_bus(struct sym_hcb *np, int enab_int)
195 sym_soft_reset(np); /* Soft reset the chip */
197 OUTW(np, nc_sien, RST);
199 * Enable Tolerant, reset IRQD if present and
200 * properly set IRQ mode, prior to resetting the bus.
202 OUTB(np, nc_stest3, TE);
203 OUTB(np, nc_dcntl, (np->rv_dcntl & IRQM));
204 OUTB(np, nc_scntl1, CRST);
208 if (!SYM_SETUP_SCSI_BUS_CHECK)
211 * Check for no terminators or SCSI bus shorts to ground.
212 * Read SCSI data bus, data parity bits and control signals.
213 * We are expecting RESET to be TRUE and other signals to be
216 term = INB(np, nc_sstat0);
217 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
218 term |= ((INB(np, nc_sstat2) & 0x01) << 26) | /* sdp1 */
219 ((INW(np, nc_sbdl) & 0xff) << 9) | /* d7-0 */
220 ((INW(np, nc_sbdl) & 0xff00) << 10) | /* d15-8 */
221 INB(np, nc_sbcl); /* req ack bsy sel atn msg cd io */
226 if (term != (2<<7)) {
227 printf("%s: suspicious SCSI data while resetting the BUS.\n",
229 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
230 "0x%lx, expecting 0x%lx\n",
232 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
233 (u_long)term, (u_long)(2<<7));
234 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
238 OUTB(np, nc_scntl1, 0);
243 * Select SCSI clock frequency
245 static void sym_selectclock(struct sym_hcb *np, u_char scntl3)
248 * If multiplier not present or not selected, leave here.
250 if (np->multiplier <= 1) {
251 OUTB(np, nc_scntl3, scntl3);
255 if (sym_verbose >= 2)
256 printf ("%s: enabling clock multiplier\n", sym_name(np));
258 OUTB(np, nc_stest1, DBLEN); /* Enable clock multiplier */
260 * Wait for the LCKFRQ bit to be set if supported by the chip.
261 * Otherwise wait 50 micro-seconds (at least).
263 if (np->features & FE_LCKFRQ) {
265 while (!(INB(np, nc_stest4) & LCKFRQ) && --i > 0)
268 printf("%s: the chip cannot lock the frequency\n",
274 OUTB(np, nc_stest3, HSC); /* Halt the scsi clock */
275 OUTB(np, nc_scntl3, scntl3);
276 OUTB(np, nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
277 OUTB(np, nc_stest3, 0x00); /* Restart scsi clock */
282 * Determine the chip's clock frequency.
284 * This is essential for the negotiation of the synchronous
287 * Note: we have to return the correct value.
288 * THERE IS NO SAFE DEFAULT VALUE.
290 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
291 * 53C860 and 53C875 rev. 1 support fast20 transfers but
292 * do not have a clock doubler and so are provided with a
293 * 80 MHz clock. All other fast20 boards incorporate a doubler
294 * and so should be delivered with a 40 MHz clock.
295 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
296 * clock and provide a clock quadrupler (160 Mhz).
300 * calculate SCSI clock frequency (in KHz)
302 static unsigned getfreq (struct sym_hcb *np, int gen)
308 * Measure GEN timer delay in order
309 * to calculate SCSI clock frequency
311 * This code will never execute too
312 * many loop iterations (if DELAY is
313 * reasonably correct). It could get
314 * too low a delay (too high a freq.)
315 * if the CPU is slow executing the
316 * loop for some reason (an NMI, for
317 * example). For this reason we will
318 * if multiple measurements are to be
319 * performed trust the higher delay
320 * (lower frequency returned).
322 OUTW(np, nc_sien, 0); /* mask all scsi interrupts */
323 INW(np, nc_sist); /* clear pending scsi interrupt */
324 OUTB(np, nc_dien, 0); /* mask all dma interrupts */
325 INW(np, nc_sist); /* another one, just to be sure :) */
327 * The C1010-33 core does not report GEN in SIST,
328 * if this interrupt is masked in SIEN.
329 * I don't know yet if the C1010-66 behaves the same way.
331 if (np->features & FE_C10) {
332 OUTW(np, nc_sien, GEN);
333 OUTB(np, nc_istat1, SIRQD);
335 OUTB(np, nc_scntl3, 4); /* set pre-scaler to divide by 3 */
336 OUTB(np, nc_stime1, 0); /* disable general purpose timer */
337 OUTB(np, nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
338 while (!(INW(np, nc_sist) & GEN) && ms++ < 100000)
339 udelay(1000/4); /* count in 1/4 of ms */
340 OUTB(np, nc_stime1, 0); /* disable general purpose timer */
342 * Undo C1010-33 specific settings.
344 if (np->features & FE_C10) {
345 OUTW(np, nc_sien, 0);
346 OUTB(np, nc_istat1, 0);
349 * set prescaler to divide by whatever 0 means
350 * 0 ought to choose divide by 2, but appears
351 * to set divide by 3.5 mode in my 53c810 ...
353 OUTB(np, nc_scntl3, 0);
356 * adjust for prescaler, and convert into KHz
358 f = ms ? ((1 << gen) * (4340*4)) / ms : 0;
361 * The C1010-33 result is biased by a factor
362 * of 2/3 compared to earlier chips.
364 if (np->features & FE_C10)
367 if (sym_verbose >= 2)
368 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
369 sym_name(np), gen, ms/4, f);
374 static unsigned sym_getfreq (struct sym_hcb *np)
379 getfreq (np, gen); /* throw away first result */
380 f1 = getfreq (np, gen);
381 f2 = getfreq (np, gen);
382 if (f1 > f2) f1 = f2; /* trust lower result */
387 * Get/probe chip SCSI clock frequency
389 static void sym_getclock (struct sym_hcb *np, int mult)
391 unsigned char scntl3 = np->sv_scntl3;
392 unsigned char stest1 = np->sv_stest1;
398 * True with 875/895/896/895A with clock multiplier selected
400 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
401 if (sym_verbose >= 2)
402 printf ("%s: clock multiplier found\n", sym_name(np));
403 np->multiplier = mult;
407 * If multiplier not found or scntl3 not 7,5,3,
408 * reset chip and get frequency from general purpose timer.
409 * Otherwise trust scntl3 BIOS setting.
411 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
412 OUTB(np, nc_stest1, 0); /* make sure doubler is OFF */
413 f1 = sym_getfreq (np);
416 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
418 if (f1 < 45000) f1 = 40000;
419 else if (f1 < 55000) f1 = 50000;
422 if (f1 < 80000 && mult > 1) {
423 if (sym_verbose >= 2)
424 printf ("%s: clock multiplier assumed\n",
426 np->multiplier = mult;
429 if ((scntl3 & 7) == 3) f1 = 40000;
430 else if ((scntl3 & 7) == 5) f1 = 80000;
433 f1 /= np->multiplier;
437 * Compute controller synchronous parameters.
439 f1 *= np->multiplier;
444 * Get/probe PCI clock frequency
446 static int sym_getpciclock (struct sym_hcb *np)
451 * For now, we only need to know about the actual
452 * PCI BUS clock frequency for C1010-66 chips.
455 if (np->features & FE_66MHZ) {
459 OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
461 OUTB(np, nc_stest1, 0);
469 * SYMBIOS chip clock divisor table.
471 * Divisors are multiplied by 10,000,000 in order to make
472 * calculations more simple.
475 static u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
478 * Get clock factor and sync divisor for a given
479 * synchronous factor period.
482 sym_getsync(struct sym_hcb *np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
484 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
485 int div = np->clock_divn; /* Number of divisors supported */
486 u32 fak; /* Sync factor in sxfer */
487 u32 per; /* Period in tenths of ns */
488 u32 kpc; /* (per * clk) */
492 * Compute the synchronous period in tenths of nano-seconds
494 if (dt && sfac <= 9) per = 125;
495 else if (sfac <= 10) per = 250;
496 else if (sfac == 11) per = 303;
497 else if (sfac == 12) per = 500;
498 else per = 40 * sfac;
506 * For earliest C10 revision 0, we cannot use extra
507 * clocks for the setting of the SCSI clocking.
508 * Note that this limits the lowest sync data transfer
509 * to 5 Mega-transfers per second and may result in
510 * using higher clock divisors.
513 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
515 * Look for the lowest clock divisor that allows an
516 * output speed not faster than the period.
520 if (kpc > (div_10M[div] << 2)) {
525 fak = 0; /* No extra clocks */
526 if (div == np->clock_divn) { /* Are we too fast ? */
536 * Look for the greatest clock divisor that allows an
537 * input speed faster than the period.
540 if (kpc >= (div_10M[div] << 2)) break;
543 * Calculate the lowest clock factor that allows an output
544 * speed not faster than the period, and the max output speed.
545 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
546 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
549 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
550 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
552 fak = (kpc - 1) / div_10M[div] + 1 - 4;
553 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
557 * Check against our hardware limits, or bugs :).
565 * Compute and return sync parameters.
574 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
575 * 128 transfers. All chips support at least 16 transfers
576 * bursts. The 825A, 875 and 895 chips support bursts of up
577 * to 128 transfers and the 895A and 896 support bursts of up
578 * to 64 transfers. All other chips support up to 16
581 * For PCI 32 bit data transfers each transfer is a DWORD.
582 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
584 * We use log base 2 (burst length) as internal code, with
585 * value 0 meaning "burst disabled".
589 * Burst length from burst code.
591 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
594 * Burst code from io register bits.
596 #define burst_code(dmode, ctest4, ctest5) \
597 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
600 * Set initial io register bits from burst code.
602 static __inline void sym_init_burst(struct sym_hcb *np, u_char bc)
604 np->rv_ctest4 &= ~0x80;
605 np->rv_dmode &= ~(0x3 << 6);
606 np->rv_ctest5 &= ~0x4;
609 np->rv_ctest4 |= 0x80;
613 np->rv_dmode |= ((bc & 0x3) << 6);
614 np->rv_ctest5 |= (bc & 0x4);
619 * Save initial settings of some IO registers.
620 * Assumed to have been set by BIOS.
621 * We cannot reset the chip prior to reading the
622 * IO registers, since informations will be lost.
623 * Since the SCRIPTS processor may be running, this
624 * is not safe on paper, but it seems to work quite
627 static void sym_save_initial_setting (struct sym_hcb *np)
629 np->sv_scntl0 = INB(np, nc_scntl0) & 0x0a;
630 np->sv_scntl3 = INB(np, nc_scntl3) & 0x07;
631 np->sv_dmode = INB(np, nc_dmode) & 0xce;
632 np->sv_dcntl = INB(np, nc_dcntl) & 0xa8;
633 np->sv_ctest3 = INB(np, nc_ctest3) & 0x01;
634 np->sv_ctest4 = INB(np, nc_ctest4) & 0x80;
635 np->sv_gpcntl = INB(np, nc_gpcntl);
636 np->sv_stest1 = INB(np, nc_stest1);
637 np->sv_stest2 = INB(np, nc_stest2) & 0x20;
638 np->sv_stest4 = INB(np, nc_stest4);
639 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
640 np->sv_scntl4 = INB(np, nc_scntl4);
641 np->sv_ctest5 = INB(np, nc_ctest5) & 0x04;
644 np->sv_ctest5 = INB(np, nc_ctest5) & 0x24;
648 * Prepare io register values used by sym_start_up()
649 * according to selected and supported features.
651 static int sym_prepare_setting(struct Scsi_Host *shost, struct sym_hcb *np, struct sym_nvram *nvram)
660 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
663 * Guess the frequency of the chip's clock.
665 if (np->features & (FE_ULTRA3 | FE_ULTRA2))
666 np->clock_khz = 160000;
667 else if (np->features & FE_ULTRA)
668 np->clock_khz = 80000;
670 np->clock_khz = 40000;
673 * Get the clock multiplier factor.
675 if (np->features & FE_QUAD)
677 else if (np->features & FE_DBLR)
683 * Measure SCSI clock frequency for chips
684 * it may vary from assumed one.
686 if (np->features & FE_VARCLK)
687 sym_getclock(np, np->multiplier);
690 * Divisor to be used for async (timer pre-scaler).
692 i = np->clock_divn - 1;
694 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
702 * The C1010 uses hardwired divisors for async.
703 * So, we just throw away, the async. divisor.:-)
705 if (np->features & FE_C10)
709 * Minimum synchronous period factor supported by the chip.
710 * Btw, 'period' is in tenths of nanoseconds.
712 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
714 if (period <= 250) np->minsync = 10;
715 else if (period <= 303) np->minsync = 11;
716 else if (period <= 500) np->minsync = 12;
717 else np->minsync = (period + 40 - 1) / 40;
720 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
722 if (np->minsync < 25 &&
723 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
725 else if (np->minsync < 12 &&
726 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
730 * Maximum synchronous period factor supported by the chip.
732 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
733 np->maxsync = period > 2540 ? 254 : period / 10;
736 * If chip is a C1010, guess the sync limits in DT mode.
738 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
739 if (np->clock_khz == 160000) {
742 np->maxoffs_dt = nvram->type ? 62 : 31;
747 * 64 bit addressing (895A/896/1010) ?
749 if (np->features & FE_DAC) {
750 #if SYM_CONF_DMA_ADDRESSING_MODE == 0
751 np->rv_ccntl1 |= (DDAC);
752 #elif SYM_CONF_DMA_ADDRESSING_MODE == 1
754 np->rv_ccntl1 |= (DDAC);
756 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
757 #elif SYM_CONF_DMA_ADDRESSING_MODE == 2
759 np->rv_ccntl1 |= (DDAC);
761 np->rv_ccntl1 |= (0 | EXTIBMV);
766 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
768 if (np->features & FE_NOPM)
769 np->rv_ccntl0 |= (ENPMJ);
772 * C1010-33 Errata: Part Number:609-039638 (rev. 1) is fixed.
773 * In dual channel mode, contention occurs if internal cycles
774 * are used. Disable internal cycles.
776 if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_33 &&
777 np->revision_id < 0x1)
778 np->rv_ccntl0 |= DILS;
781 * Select burst length (dwords)
783 burst_max = SYM_SETUP_BURST_ORDER;
784 if (burst_max == 255)
785 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
789 if (burst_max > np->maxburst)
790 burst_max = np->maxburst;
793 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
794 * This chip and the 860 Rev 1 may wrongly use PCI cache line
795 * based transactions on LOAD/STORE instructions. So we have
796 * to prevent these chips from using such PCI transactions in
797 * this driver. The generic ncr driver that does not use
798 * LOAD/STORE instructions does not need this work-around.
800 if ((np->device_id == PCI_DEVICE_ID_NCR_53C810 &&
801 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
802 (np->device_id == PCI_DEVICE_ID_NCR_53C860 &&
803 np->revision_id <= 0x1))
804 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
807 * Select all supported special features.
808 * If we are using on-board RAM for scripts, prefetch (PFEN)
809 * does not help, but burst op fetch (BOF) does.
810 * Disabling PFEN makes sure BOF will be used.
812 if (np->features & FE_ERL)
813 np->rv_dmode |= ERL; /* Enable Read Line */
814 if (np->features & FE_BOF)
815 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
816 if (np->features & FE_ERMP)
817 np->rv_dmode |= ERMP; /* Enable Read Multiple */
819 if ((np->features & FE_PFEN) && !np->ram_ba)
821 if (np->features & FE_PFEN)
823 np->rv_dcntl |= PFEN; /* Prefetch Enable */
824 if (np->features & FE_CLSE)
825 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
826 if (np->features & FE_WRIE)
827 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
828 if (np->features & FE_DFS)
829 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
834 np->rv_ctest4 |= MPEE; /* Master parity checking */
835 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
838 * Get parity checking, host ID and verbose mode from NVRAM
841 sym_nvram_setup_host(shost, np, nvram);
844 * Get SCSI addr of host adapter (set by bios?).
846 if (np->myaddr == 255) {
847 np->myaddr = INB(np, nc_scid) & 0x07;
849 np->myaddr = SYM_SETUP_HOST_ID;
853 * Prepare initial io register bits for burst length
855 sym_init_burst(np, burst_max);
859 * - LVD capable chips (895/895A/896/1010) report the
860 * current BUS mode through the STEST4 IO register.
861 * - For previous generation chips (825/825A/875),
862 * user has to tell us how to check against HVD,
863 * since a 100% safe algorithm is not possible.
865 np->scsi_mode = SMODE_SE;
866 if (np->features & (FE_ULTRA2|FE_ULTRA3))
867 np->scsi_mode = (np->sv_stest4 & SMODE);
868 else if (np->features & FE_DIFF) {
869 if (SYM_SETUP_SCSI_DIFF == 1) {
871 if (np->sv_stest2 & 0x20)
872 np->scsi_mode = SMODE_HVD;
874 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
875 if (!(INB(np, nc_gpreg) & 0x08))
876 np->scsi_mode = SMODE_HVD;
879 else if (SYM_SETUP_SCSI_DIFF == 2)
880 np->scsi_mode = SMODE_HVD;
882 if (np->scsi_mode == SMODE_HVD)
883 np->rv_stest2 |= 0x20;
886 * Set LED support from SCRIPTS.
887 * Ignore this feature for boards known to use a
888 * specific GPIO wiring and for the 895A, 896
889 * and 1010 that drive the LED directly.
891 if ((SYM_SETUP_SCSI_LED ||
892 (nvram->type == SYM_SYMBIOS_NVRAM ||
893 (nvram->type == SYM_TEKRAM_NVRAM &&
894 np->device_id == PCI_DEVICE_ID_NCR_53C895))) &&
895 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
896 np->features |= FE_LED0;
901 switch(SYM_SETUP_IRQ_MODE & 3) {
903 np->rv_dcntl |= IRQM;
906 np->rv_dcntl |= (np->sv_dcntl & IRQM);
913 * Configure targets according to driver setup.
914 * If NVRAM present get targets setup from NVRAM.
916 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
917 struct sym_tcb *tp = &np->target[i];
919 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
920 tp->usrtags = SYM_SETUP_MAX_TAG;
921 tp->usr_width = np->maxwide;
924 sym_nvram_setup_target(tp, i, nvram);
927 tp->usrflags &= ~SYM_TAGS_ENABLED;
931 * Let user know about the settings.
933 printf("%s: %s, ID %d, Fast-%d, %s, %s\n", sym_name(np),
934 sym_nvram_type(nvram), np->myaddr,
935 (np->features & FE_ULTRA3) ? 80 :
936 (np->features & FE_ULTRA2) ? 40 :
937 (np->features & FE_ULTRA) ? 20 : 10,
938 sym_scsi_bus_mode(np->scsi_mode),
939 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
941 * Tell him more on demand.
944 printf("%s: %s IRQ line driver%s\n",
946 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
947 np->ram_ba ? ", using on-chip SRAM" : "");
948 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
949 if (np->features & FE_NOPM)
950 printf("%s: handling phase mismatch from SCRIPTS.\n",
956 if (sym_verbose >= 2) {
957 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
958 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
959 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
960 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
962 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
963 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
964 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
965 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
972 * Test the pci bus snoop logic :-(
974 * Has to be called with interrupts disabled.
976 #ifndef CONFIG_SCSI_SYM53C8XX_IOMAPPED
977 static int sym_regtest (struct sym_hcb *np)
979 register volatile u32 data;
981 * chip registers may NOT be cached.
982 * write 0xffffffff to a read only register area,
983 * and try to read it back.
986 OUTL(np, nc_dstat, data);
987 data = INL(np, nc_dstat);
989 if (data == 0xffffffff) {
991 if ((data & 0xe2f0fffd) != 0x02000080) {
993 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
1001 static int sym_snooptest (struct sym_hcb *np)
1003 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
1005 #ifndef CONFIG_SCSI_SYM53C8XX_IOMAPPED
1006 err |= sym_regtest (np);
1007 if (err) return (err);
1011 * Enable Master Parity Checking as we intend
1012 * to enable it for normal operations.
1014 OUTB(np, nc_ctest4, (np->rv_ctest4 & MPEE));
1018 pc = SCRIPTZ_BA(np, snooptest);
1022 * Set memory and register.
1024 np->scratch = cpu_to_scr(host_wr);
1025 OUTL(np, nc_temp, sym_wr);
1027 * Start script (exchange values)
1029 OUTL(np, nc_dsa, np->hcb_ba);
1032 * Wait 'til done (with timeout)
1034 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
1035 if (INB(np, nc_istat) & (INTF|SIP|DIP))
1037 if (i>=SYM_SNOOP_TIMEOUT) {
1038 printf ("CACHE TEST FAILED: timeout.\n");
1042 * Check for fatal DMA errors.
1044 dstat = INB(np, nc_dstat);
1045 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
1046 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
1047 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
1048 "DISABLING MASTER DATA PARITY CHECKING.\n",
1050 np->rv_ctest4 &= ~MPEE;
1054 if (dstat & (MDPE|BF|IID)) {
1055 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
1059 * Save termination position.
1061 pc = INL(np, nc_dsp);
1063 * Read memory and register.
1065 host_rd = scr_to_cpu(np->scratch);
1066 sym_rd = INL(np, nc_scratcha);
1067 sym_bk = INL(np, nc_temp);
1069 * Check termination position.
1071 if (pc != SCRIPTZ_BA(np, snoopend)+8) {
1072 printf ("CACHE TEST FAILED: script execution failed.\n");
1073 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
1074 (u_long) SCRIPTZ_BA(np, snooptest), (u_long) pc,
1075 (u_long) SCRIPTZ_BA(np, snoopend) +8);
1081 if (host_wr != sym_rd) {
1082 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
1083 (int) host_wr, (int) sym_rd);
1086 if (host_rd != sym_wr) {
1087 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
1088 (int) sym_wr, (int) host_rd);
1091 if (sym_bk != sym_wr) {
1092 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
1093 (int) sym_wr, (int) sym_bk);
1101 * log message for real hard errors
1103 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sx/s3/s4) @ name (dsp:dbc).
1104 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
1106 * exception register:
1111 * so: control lines as driven by chip.
1112 * si: control lines as seen by chip.
1113 * sd: scsi data lines as seen by chip.
1116 * sx: sxfer (see the manual)
1117 * s3: scntl3 (see the manual)
1118 * s4: scntl4 (see the manual)
1120 * current script command:
1121 * dsp: script address (relative to start of script).
1122 * dbc: first word of script command.
1124 * First 24 register of the chip:
1127 static void sym_log_hard_error(struct sym_hcb *np, u_short sist, u_char dstat)
1133 u_char *script_base;
1136 dsp = INL(np, nc_dsp);
1138 if (dsp > np->scripta_ba &&
1139 dsp <= np->scripta_ba + np->scripta_sz) {
1140 script_ofs = dsp - np->scripta_ba;
1141 script_size = np->scripta_sz;
1142 script_base = (u_char *) np->scripta0;
1143 script_name = "scripta";
1145 else if (np->scriptb_ba < dsp &&
1146 dsp <= np->scriptb_ba + np->scriptb_sz) {
1147 script_ofs = dsp - np->scriptb_ba;
1148 script_size = np->scriptb_sz;
1149 script_base = (u_char *) np->scriptb0;
1150 script_name = "scriptb";
1155 script_name = "mem";
1158 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x/%x) @ (%s %x:%08x).\n",
1159 sym_name(np), (unsigned)INB(np, nc_sdid)&0x0f, dstat, sist,
1160 (unsigned)INB(np, nc_socl), (unsigned)INB(np, nc_sbcl),
1161 (unsigned)INB(np, nc_sbdl), (unsigned)INB(np, nc_sxfer),
1162 (unsigned)INB(np, nc_scntl3),
1163 (np->features & FE_C10) ? (unsigned)INB(np, nc_scntl4) : 0,
1164 script_name, script_ofs, (unsigned)INL(np, nc_dbc));
1166 if (((script_ofs & 3) == 0) &&
1167 (unsigned)script_ofs < script_size) {
1168 printf ("%s: script cmd = %08x\n", sym_name(np),
1169 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
1172 printf ("%s: regdump:", sym_name(np));
1174 printf (" %02x", (unsigned)INB_OFF(np, i));
1180 if (dstat & (MDPE|BF))
1181 sym_log_bus_error(np);
1184 static struct sym_chip sym_dev_table[] = {
1185 {PCI_DEVICE_ID_NCR_53C810, 0x0f, "810", 4, 8, 4, 64,
1188 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1189 {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1,
1193 {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1,
1194 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
1197 {PCI_DEVICE_ID_NCR_53C815, 0xff, "815", 4, 8, 4, 64,
1200 {PCI_DEVICE_ID_NCR_53C825, 0x0f, "825", 6, 8, 4, 64,
1201 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
1203 {PCI_DEVICE_ID_NCR_53C825, 0xff, "825a", 6, 8, 4, 2,
1204 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
1206 {PCI_DEVICE_ID_NCR_53C860, 0xff, "860", 4, 8, 5, 1,
1207 FE_ULTRA|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
1209 {PCI_DEVICE_ID_NCR_53C875, 0x01, "875", 6, 16, 5, 2,
1210 FE_WIDE|FE_ULTRA|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1211 FE_RAM|FE_DIFF|FE_VARCLK}
1213 {PCI_DEVICE_ID_NCR_53C875, 0xff, "875", 6, 16, 5, 2,
1214 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1215 FE_RAM|FE_DIFF|FE_VARCLK}
1217 {PCI_DEVICE_ID_NCR_53C875J, 0xff, "875J", 6, 16, 5, 2,
1218 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1219 FE_RAM|FE_DIFF|FE_VARCLK}
1221 {PCI_DEVICE_ID_NCR_53C885, 0xff, "885", 6, 16, 5, 2,
1222 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1223 FE_RAM|FE_DIFF|FE_VARCLK}
1225 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1226 {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2,
1227 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
1231 {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2,
1232 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1236 {PCI_DEVICE_ID_NCR_53C896, 0xff, "896", 6, 31, 7, 4,
1237 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1238 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1240 {PCI_DEVICE_ID_LSI_53C895A, 0xff, "895a", 6, 31, 7, 4,
1241 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1242 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1244 {PCI_DEVICE_ID_LSI_53C875A, 0xff, "875a", 6, 31, 7, 4,
1245 FE_WIDE|FE_ULTRA|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1246 FE_RAM|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1248 {PCI_DEVICE_ID_LSI_53C1010_33, 0x00, "1010-33", 6, 31, 7, 8,
1249 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1250 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
1253 {PCI_DEVICE_ID_LSI_53C1010_33, 0xff, "1010-33", 6, 31, 7, 8,
1254 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1255 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
1258 {PCI_DEVICE_ID_LSI_53C1010_66, 0xff, "1010-66", 6, 31, 7, 8,
1259 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1260 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
1263 {PCI_DEVICE_ID_LSI_53C1510, 0xff, "1510d", 6, 31, 7, 4,
1264 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1265 FE_RAM|FE_IO256|FE_LEDC}
1268 #define sym_num_devs \
1269 (sizeof(sym_dev_table) / sizeof(sym_dev_table[0]))
1272 * Look up the chip table.
1274 * Return a pointer to the chip entry if found,
1278 sym_lookup_chip_table (u_short device_id, u_char revision)
1280 struct sym_chip *chip;
1283 for (i = 0; i < sym_num_devs; i++) {
1284 chip = &sym_dev_table[i];
1285 if (device_id != chip->device_id)
1287 if (revision > chip->revision_id)
1295 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1297 * Lookup the 64 bit DMA segments map.
1298 * This is only used if the direct mapping
1299 * has been unsuccessful.
1301 int sym_lookup_dmap(struct sym_hcb *np, u32 h, int s)
1308 /* Look up existing mappings */
1309 for (i = SYM_DMAP_SIZE-1; i > 0; i--) {
1310 if (h == np->dmap_bah[i])
1313 /* If direct mapping is free, get it */
1314 if (!np->dmap_bah[s])
1316 /* Collision -> lookup free mappings */
1317 for (s = SYM_DMAP_SIZE-1; s > 0; s--) {
1318 if (!np->dmap_bah[s])
1322 panic("sym: ran out of 64 bit DMA segment registers");
1325 np->dmap_bah[s] = h;
1331 * Update IO registers scratch C..R so they will be
1332 * in sync. with queued CCB expectations.
1334 static void sym_update_dmap_regs(struct sym_hcb *np)
1338 if (!np->dmap_dirty)
1340 o = offsetof(struct sym_reg, nc_scrx[0]);
1341 for (i = 0; i < SYM_DMAP_SIZE; i++) {
1342 OUTL_OFF(np, o, np->dmap_bah[i]);
1349 /* Enforce all the fiddly SPI rules and the chip limitations */
1350 static void sym_check_goals(struct sym_hcb *np, struct scsi_target *starget,
1351 struct sym_trans *goal)
1353 if (!spi_support_wide(starget))
1356 if (!spi_support_sync(starget)) {
1364 if (spi_support_dt(starget)) {
1365 if (spi_support_dt_only(starget))
1368 if (goal->offset == 0)
1374 /* Some targets fail to properly negotiate DT in SE mode */
1375 if ((np->scsi_mode != SMODE_LVD) || !(np->features & FE_U3EN))
1379 /* all DT transfers must be wide */
1381 if (goal->offset > np->maxoffs_dt)
1382 goal->offset = np->maxoffs_dt;
1383 if (goal->period < np->minsync_dt)
1384 goal->period = np->minsync_dt;
1385 if (goal->period > np->maxsync_dt)
1386 goal->period = np->maxsync_dt;
1388 goal->iu = goal->qas = 0;
1389 if (goal->offset > np->maxoffs)
1390 goal->offset = np->maxoffs;
1391 if (goal->period < np->minsync)
1392 goal->period = np->minsync;
1393 if (goal->period > np->maxsync)
1394 goal->period = np->maxsync;
1399 * Prepare the next negotiation message if needed.
1401 * Fill in the part of message buffer that contains the
1402 * negotiation and the nego_status field of the CCB.
1403 * Returns the size of the message in bytes.
1405 static int sym_prepare_nego(struct sym_hcb *np, struct sym_ccb *cp, u_char *msgptr)
1407 struct sym_tcb *tp = &np->target[cp->target];
1408 struct scsi_target *starget = tp->starget;
1409 struct sym_trans *goal = &tp->tgoal;
1413 sym_check_goals(np, starget, goal);
1416 * Many devices implement PPR in a buggy way, so only use it if we
1420 (goal->iu || goal->dt || goal->qas || (goal->period < 0xa))) {
1422 } else if (spi_width(starget) != goal->width) {
1424 } else if (spi_period(starget) != goal->period ||
1425 spi_offset(starget) != goal->offset) {
1428 goal->check_nego = 0;
1434 msglen += spi_populate_sync_msg(msgptr + msglen, goal->period,
1438 msglen += spi_populate_width_msg(msgptr + msglen, goal->width);
1441 msglen += spi_populate_ppr_msg(msgptr + msglen, goal->period,
1442 goal->offset, goal->width,
1443 (goal->iu ? PPR_OPT_IU : 0) |
1444 (goal->dt ? PPR_OPT_DT : 0) |
1445 (goal->qas ? PPR_OPT_QAS : 0));
1449 cp->nego_status = nego;
1452 tp->nego_cp = cp; /* Keep track a nego will be performed */
1453 if (DEBUG_FLAGS & DEBUG_NEGO) {
1454 sym_print_nego_msg(np, cp->target,
1455 nego == NS_SYNC ? "sync msgout" :
1456 nego == NS_WIDE ? "wide msgout" :
1457 "ppr msgout", msgptr);
1465 * Insert a job into the start queue.
1467 static void sym_put_start_queue(struct sym_hcb *np, struct sym_ccb *cp)
1471 #ifdef SYM_CONF_IARB_SUPPORT
1473 * If the previously queued CCB is not yet done,
1474 * set the IARB hint. The SCRIPTS will go with IARB
1475 * for this job when starting the previous one.
1476 * We leave devices a chance to win arbitration by
1477 * not using more than 'iarb_max' consecutive
1478 * immediate arbitrations.
1480 if (np->last_cp && np->iarb_count < np->iarb_max) {
1481 np->last_cp->host_flags |= HF_HINT_IARB;
1489 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1491 * Make SCRIPTS aware of the 64 bit DMA
1492 * segment registers not being up-to-date.
1495 cp->host_xflags |= HX_DMAP_DIRTY;
1499 * Insert first the idle task and then our job.
1500 * The MBs should ensure proper ordering.
1502 qidx = np->squeueput + 2;
1503 if (qidx >= MAX_QUEUE*2) qidx = 0;
1505 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
1506 MEMORY_WRITE_BARRIER();
1507 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
1509 np->squeueput = qidx;
1511 if (DEBUG_FLAGS & DEBUG_QUEUE)
1512 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
1515 * Script processor may be waiting for reselect.
1518 MEMORY_WRITE_BARRIER();
1519 OUTB(np, nc_istat, SIGP|np->istat_sem);
1522 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1524 * Start next ready-to-start CCBs.
1526 void sym_start_next_ccbs(struct sym_hcb *np, struct sym_lcb *lp, int maxn)
1532 * Paranoia, as usual. :-)
1534 assert(!lp->started_tags || !lp->started_no_tag);
1537 * Try to start as many commands as asked by caller.
1538 * Prevent from having both tagged and untagged
1539 * commands queued to the device at the same time.
1542 qp = sym_remque_head(&lp->waiting_ccbq);
1545 cp = sym_que_entry(qp, struct sym_ccb, link2_ccbq);
1546 if (cp->tag != NO_TAG) {
1547 if (lp->started_no_tag ||
1548 lp->started_tags >= lp->started_max) {
1549 sym_insque_head(qp, &lp->waiting_ccbq);
1552 lp->itlq_tbl[cp->tag] = cpu_to_scr(cp->ccb_ba);
1554 cpu_to_scr(SCRIPTA_BA(np, resel_tag));
1557 if (lp->started_no_tag || lp->started_tags) {
1558 sym_insque_head(qp, &lp->waiting_ccbq);
1561 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
1563 cpu_to_scr(SCRIPTA_BA(np, resel_no_tag));
1564 ++lp->started_no_tag;
1567 sym_insque_tail(qp, &lp->started_ccbq);
1568 sym_put_start_queue(np, cp);
1571 #endif /* SYM_OPT_HANDLE_DEVICE_QUEUEING */
1574 * The chip may have completed jobs. Look at the DONE QUEUE.
1576 * On paper, memory read barriers may be needed here to
1577 * prevent out of order LOADs by the CPU from having
1578 * prefetched stale data prior to DMA having occurred.
1580 static int sym_wakeup_done (struct sym_hcb *np)
1589 /* MEMORY_READ_BARRIER(); */
1591 dsa = scr_to_cpu(np->dqueue[i]);
1595 if ((i = i+2) >= MAX_QUEUE*2)
1598 cp = sym_ccb_from_dsa(np, dsa);
1600 MEMORY_READ_BARRIER();
1601 sym_complete_ok (np, cp);
1605 printf ("%s: bad DSA (%x) in done queue.\n",
1606 sym_name(np), (u_int) dsa);
1614 * Complete all CCBs queued to the COMP queue.
1616 * These CCBs are assumed:
1617 * - Not to be referenced either by devices or
1618 * SCRIPTS-related queues and datas.
1619 * - To have to be completed with an error condition
1622 * The device queue freeze count is incremented
1623 * for each CCB that does not prevent this.
1624 * This function is called when all CCBs involved
1625 * in error handling/recovery have been reaped.
1627 static void sym_flush_comp_queue(struct sym_hcb *np, int cam_status)
1632 while ((qp = sym_remque_head(&np->comp_ccbq)) != 0) {
1633 struct scsi_cmnd *cmd;
1634 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
1635 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
1636 /* Leave quiet CCBs waiting for resources */
1637 if (cp->host_status == HS_WAIT)
1641 sym_set_cam_status(cmd, cam_status);
1642 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1643 if (sym_get_cam_status(cmd) == DID_SOFT_ERROR) {
1644 struct sym_tcb *tp = &np->target[cp->target];
1645 struct sym_lcb *lp = sym_lp(tp, cp->lun);
1647 sym_remque(&cp->link2_ccbq);
1648 sym_insque_tail(&cp->link2_ccbq,
1651 if (cp->tag != NO_TAG)
1654 --lp->started_no_tag;
1661 sym_free_ccb(np, cp);
1662 sym_xpt_done(np, cmd);
1667 * Complete all active CCBs with error.
1668 * Used on CHIP/SCSI RESET.
1670 static void sym_flush_busy_queue (struct sym_hcb *np, int cam_status)
1673 * Move all active CCBs to the COMP queue
1674 * and flush this queue.
1676 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
1677 sym_que_init(&np->busy_ccbq);
1678 sym_flush_comp_queue(np, cam_status);
1685 * 0: initialisation.
1686 * 1: SCSI BUS RESET delivered or received.
1687 * 2: SCSI BUS MODE changed.
1689 void sym_start_up (struct sym_hcb *np, int reason)
1695 * Reset chip if asked, otherwise just clear fifos.
1700 OUTB(np, nc_stest3, TE|CSF);
1701 OUTONB(np, nc_ctest3, CLF);
1707 phys = np->squeue_ba;
1708 for (i = 0; i < MAX_QUEUE*2; i += 2) {
1709 np->squeue[i] = cpu_to_scr(np->idletask_ba);
1710 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
1712 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
1715 * Start at first entry.
1722 phys = np->dqueue_ba;
1723 for (i = 0; i < MAX_QUEUE*2; i += 2) {
1725 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
1727 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
1730 * Start at first entry.
1735 * Install patches in scripts.
1736 * This also let point to first position the start
1737 * and done queue pointers used from SCRIPTS.
1742 * Wakeup all pending jobs.
1744 sym_flush_busy_queue(np, DID_RESET);
1749 OUTB(np, nc_istat, 0x00); /* Remove Reset, abort */
1751 udelay(2000); /* The 895 needs time for the bus mode to settle */
1753 OUTB(np, nc_scntl0, np->rv_scntl0 | 0xc0);
1754 /* full arb., ena parity, par->ATN */
1755 OUTB(np, nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
1757 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
1759 OUTB(np, nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
1760 OUTW(np, nc_respid, 1ul<<np->myaddr); /* Id to respond to */
1761 OUTB(np, nc_istat , SIGP ); /* Signal Process */
1762 OUTB(np, nc_dmode , np->rv_dmode); /* Burst length, dma mode */
1763 OUTB(np, nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
1765 OUTB(np, nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
1766 OUTB(np, nc_ctest3, np->rv_ctest3); /* Write and invalidate */
1767 OUTB(np, nc_ctest4, np->rv_ctest4); /* Master parity checking */
1769 /* Extended Sreq/Sack filtering not supported on the C10 */
1770 if (np->features & FE_C10)
1771 OUTB(np, nc_stest2, np->rv_stest2);
1773 OUTB(np, nc_stest2, EXT|np->rv_stest2);
1775 OUTB(np, nc_stest3, TE); /* TolerANT enable */
1776 OUTB(np, nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
1779 * For now, disable AIP generation on C1010-66.
1781 if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)
1782 OUTB(np, nc_aipcntl1, DISAIP);
1785 * C10101 rev. 0 errata.
1786 * Errant SGE's when in narrow. Write bits 4 & 5 of
1787 * STEST1 register to disable SGE. We probably should do
1788 * that from SCRIPTS for each selection/reselection, but
1789 * I just don't want. :)
1791 if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_33 &&
1792 np->revision_id < 1)
1793 OUTB(np, nc_stest1, INB(np, nc_stest1) | 0x30);
1796 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
1797 * Disable overlapped arbitration for some dual function devices,
1798 * regardless revision id (kind of post-chip-design feature. ;-))
1800 if (np->device_id == PCI_DEVICE_ID_NCR_53C875)
1801 OUTB(np, nc_ctest0, (1<<5));
1802 else if (np->device_id == PCI_DEVICE_ID_NCR_53C896)
1803 np->rv_ccntl0 |= DPR;
1806 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
1807 * and/or hardware phase mismatch, since only such chips
1808 * seem to support those IO registers.
1810 if (np->features & (FE_DAC|FE_NOPM)) {
1811 OUTB(np, nc_ccntl0, np->rv_ccntl0);
1812 OUTB(np, nc_ccntl1, np->rv_ccntl1);
1815 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1817 * Set up scratch C and DRS IO registers to map the 32 bit
1818 * DMA address range our data structures are located in.
1821 np->dmap_bah[0] = 0; /* ??? */
1822 OUTL(np, nc_scrx[0], np->dmap_bah[0]);
1823 OUTL(np, nc_drs, np->dmap_bah[0]);
1828 * If phase mismatch handled by scripts (895A/896/1010),
1829 * set PM jump addresses.
1831 if (np->features & FE_NOPM) {
1832 OUTL(np, nc_pmjad1, SCRIPTB_BA(np, pm_handle));
1833 OUTL(np, nc_pmjad2, SCRIPTB_BA(np, pm_handle));
1837 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
1838 * Also set GPIO5 and clear GPIO6 if hardware LED control.
1840 if (np->features & FE_LED0)
1841 OUTB(np, nc_gpcntl, INB(np, nc_gpcntl) & ~0x01);
1842 else if (np->features & FE_LEDC)
1843 OUTB(np, nc_gpcntl, (INB(np, nc_gpcntl) & ~0x41) | 0x20);
1848 OUTW(np, nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
1849 OUTB(np, nc_dien , MDPE|BF|SSI|SIR|IID);
1852 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
1853 * Try to eat the spurious SBMC interrupt that may occur when
1854 * we reset the chip but not the SCSI BUS (at initialization).
1856 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
1857 OUTONW(np, nc_sien, SBMC);
1863 np->scsi_mode = INB(np, nc_stest4) & SMODE;
1867 * Fill in target structure.
1868 * Reinitialize usrsync.
1869 * Reinitialize usrwide.
1870 * Prepare sync negotiation according to actual SCSI bus mode.
1872 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
1873 struct sym_tcb *tp = &np->target[i];
1877 tp->head.wval = np->rv_scntl3;
1882 * Download SCSI SCRIPTS to on-chip RAM if present,
1883 * and start script processor.
1884 * We do the download preferently from the CPU.
1885 * For platforms that may not support PCI memory mapping,
1886 * we use simple SCRIPTS that performs MEMORY MOVEs.
1888 phys = SCRIPTA_BA(np, init);
1890 if (sym_verbose >= 2)
1891 printf("%s: Downloading SCSI SCRIPTS.\n", sym_name(np));
1892 memcpy_toio(np->s.ramaddr, np->scripta0, np->scripta_sz);
1893 if (np->ram_ws == 8192) {
1894 memcpy_toio(np->s.ramaddr + 4096, np->scriptb0, np->scriptb_sz);
1895 phys = scr_to_cpu(np->scr_ram_seg);
1896 OUTL(np, nc_mmws, phys);
1897 OUTL(np, nc_mmrs, phys);
1898 OUTL(np, nc_sfs, phys);
1899 phys = SCRIPTB_BA(np, start64);
1905 OUTL(np, nc_dsa, np->hcb_ba);
1909 * Notify the XPT about the RESET condition.
1912 sym_xpt_async_bus_reset(np);
1916 * Switch trans mode for current job and its target.
1918 static void sym_settrans(struct sym_hcb *np, int target, u_char opts, u_char ofs,
1919 u_char per, u_char wide, u_char div, u_char fak)
1922 u_char sval, wval, uval;
1923 struct sym_tcb *tp = &np->target[target];
1925 assert(target == (INB(np, nc_sdid) & 0x0f));
1927 sval = tp->head.sval;
1928 wval = tp->head.wval;
1929 uval = tp->head.uval;
1932 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
1933 sval, wval, uval, np->rv_scntl3);
1938 if (!(np->features & FE_C10))
1939 sval = (sval & ~0x1f) | ofs;
1941 sval = (sval & ~0x3f) | ofs;
1944 * Set the sync divisor and extra clock factor.
1947 wval = (wval & ~0x70) | ((div+1) << 4);
1948 if (!(np->features & FE_C10))
1949 sval = (sval & ~0xe0) | (fak << 5);
1951 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
1952 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
1953 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
1958 * Set the bus width.
1965 * Set misc. ultra enable bits.
1967 if (np->features & FE_C10) {
1968 uval = uval & ~(U3EN|AIPCKEN);
1970 assert(np->features & FE_U3EN);
1974 wval = wval & ~ULTRA;
1975 if (per <= 12) wval |= ULTRA;
1979 * Stop there if sync parameters are unchanged.
1981 if (tp->head.sval == sval &&
1982 tp->head.wval == wval &&
1983 tp->head.uval == uval)
1985 tp->head.sval = sval;
1986 tp->head.wval = wval;
1987 tp->head.uval = uval;
1990 * Disable extended Sreq/Sack filtering if per < 50.
1991 * Not supported on the C1010.
1993 if (per < 50 && !(np->features & FE_C10))
1994 OUTOFFB(np, nc_stest2, EXT);
1997 * set actual value and sync_status
1999 OUTB(np, nc_sxfer, tp->head.sval);
2000 OUTB(np, nc_scntl3, tp->head.wval);
2002 if (np->features & FE_C10) {
2003 OUTB(np, nc_scntl4, tp->head.uval);
2007 * patch ALL busy ccbs of this target.
2009 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
2011 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
2012 if (cp->target != target)
2014 cp->phys.select.sel_scntl3 = tp->head.wval;
2015 cp->phys.select.sel_sxfer = tp->head.sval;
2016 if (np->features & FE_C10) {
2017 cp->phys.select.sel_scntl4 = tp->head.uval;
2023 * We received a WDTR.
2024 * Let everything be aware of the changes.
2026 static void sym_setwide(struct sym_hcb *np, int target, u_char wide)
2028 struct sym_tcb *tp = &np->target[target];
2029 struct scsi_target *starget = tp->starget;
2031 if (spi_width(starget) == wide)
2034 sym_settrans(np, target, 0, 0, 0, wide, 0, 0);
2036 tp->tgoal.width = wide;
2037 spi_offset(starget) = 0;
2038 spi_period(starget) = 0;
2039 spi_width(starget) = wide;
2040 spi_iu(starget) = 0;
2041 spi_dt(starget) = 0;
2042 spi_qas(starget) = 0;
2044 if (sym_verbose >= 3)
2045 spi_display_xfer_agreement(starget);
2049 * We received a SDTR.
2050 * Let everything be aware of the changes.
2053 sym_setsync(struct sym_hcb *np, int target,
2054 u_char ofs, u_char per, u_char div, u_char fak)
2056 struct sym_tcb *tp = &np->target[target];
2057 struct scsi_target *starget = tp->starget;
2058 u_char wide = (tp->head.wval & EWS) ? BUS_16_BIT : BUS_8_BIT;
2060 sym_settrans(np, target, 0, ofs, per, wide, div, fak);
2062 spi_period(starget) = per;
2063 spi_offset(starget) = ofs;
2064 spi_iu(starget) = spi_dt(starget) = spi_qas(starget) = 0;
2066 if (!tp->tgoal.dt && !tp->tgoal.iu && !tp->tgoal.qas) {
2067 tp->tgoal.period = per;
2068 tp->tgoal.offset = ofs;
2069 tp->tgoal.check_nego = 0;
2072 spi_display_xfer_agreement(starget);
2076 * We received a PPR.
2077 * Let everything be aware of the changes.
2080 sym_setpprot(struct sym_hcb *np, int target, u_char opts, u_char ofs,
2081 u_char per, u_char wide, u_char div, u_char fak)
2083 struct sym_tcb *tp = &np->target[target];
2084 struct scsi_target *starget = tp->starget;
2086 sym_settrans(np, target, opts, ofs, per, wide, div, fak);
2088 spi_width(starget) = tp->tgoal.width = wide;
2089 spi_period(starget) = tp->tgoal.period = per;
2090 spi_offset(starget) = tp->tgoal.offset = ofs;
2091 spi_iu(starget) = tp->tgoal.iu = !!(opts & PPR_OPT_IU);
2092 spi_dt(starget) = tp->tgoal.dt = !!(opts & PPR_OPT_DT);
2093 spi_qas(starget) = tp->tgoal.qas = !!(opts & PPR_OPT_QAS);
2094 tp->tgoal.check_nego = 0;
2096 spi_display_xfer_agreement(starget);
2100 * generic recovery from scsi interrupt
2102 * The doc says that when the chip gets an SCSI interrupt,
2103 * it tries to stop in an orderly fashion, by completing
2104 * an instruction fetch that had started or by flushing
2105 * the DMA fifo for a write to memory that was executing.
2106 * Such a fashion is not enough to know if the instruction
2107 * that was just before the current DSP value has been
2110 * There are some small SCRIPTS sections that deal with
2111 * the start queue and the done queue that may break any
2112 * assomption from the C code if we are interrupted
2113 * inside, so we reset if this happens. Btw, since these
2114 * SCRIPTS sections are executed while the SCRIPTS hasn't
2115 * started SCSI operations, it is very unlikely to happen.
2117 * All the driver data structures are supposed to be
2118 * allocated from the same 4 GB memory window, so there
2119 * is a 1 to 1 relationship between DSA and driver data
2120 * structures. Since we are careful :) to invalidate the
2121 * DSA when we complete a command or when the SCRIPTS
2122 * pushes a DSA into a queue, we can trust it when it
2125 static void sym_recover_scsi_int (struct sym_hcb *np, u_char hsts)
2127 u32 dsp = INL(np, nc_dsp);
2128 u32 dsa = INL(np, nc_dsa);
2129 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
2132 * If we haven't been interrupted inside the SCRIPTS
2133 * critical pathes, we can safely restart the SCRIPTS
2134 * and trust the DSA value if it matches a CCB.
2136 if ((!(dsp > SCRIPTA_BA(np, getjob_begin) &&
2137 dsp < SCRIPTA_BA(np, getjob_end) + 1)) &&
2138 (!(dsp > SCRIPTA_BA(np, ungetjob) &&
2139 dsp < SCRIPTA_BA(np, reselect) + 1)) &&
2140 (!(dsp > SCRIPTB_BA(np, sel_for_abort) &&
2141 dsp < SCRIPTB_BA(np, sel_for_abort_1) + 1)) &&
2142 (!(dsp > SCRIPTA_BA(np, done) &&
2143 dsp < SCRIPTA_BA(np, done_end) + 1))) {
2144 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
2145 OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */
2147 * If we have a CCB, let the SCRIPTS call us back for
2148 * the handling of the error with SCRATCHA filled with
2149 * STARTPOS. This way, we will be able to freeze the
2150 * device queue and requeue awaiting IOs.
2153 cp->host_status = hsts;
2154 OUTL_DSP(np, SCRIPTA_BA(np, complete_error));
2157 * Otherwise just restart the SCRIPTS.
2160 OUTL(np, nc_dsa, 0xffffff);
2161 OUTL_DSP(np, SCRIPTA_BA(np, start));
2170 sym_start_reset(np);
2174 * chip exception handler for selection timeout
2176 static void sym_int_sto (struct sym_hcb *np)
2178 u32 dsp = INL(np, nc_dsp);
2180 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
2182 if (dsp == SCRIPTA_BA(np, wf_sel_done) + 8)
2183 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
2185 sym_start_reset(np);
2189 * chip exception handler for unexpected disconnect
2191 static void sym_int_udc (struct sym_hcb *np)
2193 printf ("%s: unexpected disconnect\n", sym_name(np));
2194 sym_recover_scsi_int(np, HS_UNEXPECTED);
2198 * chip exception handler for SCSI bus mode change
2200 * spi2-r12 11.2.3 says a transceiver mode change must
2201 * generate a reset event and a device that detects a reset
2202 * event shall initiate a hard reset. It says also that a
2203 * device that detects a mode change shall set data transfer
2204 * mode to eight bit asynchronous, etc...
2205 * So, just reinitializing all except chip should be enough.
2207 static void sym_int_sbmc (struct sym_hcb *np)
2209 u_char scsi_mode = INB(np, nc_stest4) & SMODE;
2214 printf("%s: SCSI BUS mode change from %s to %s.\n", sym_name(np),
2215 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
2218 * Should suspend command processing for a few seconds and
2219 * reinitialize all except the chip.
2221 sym_start_up (np, 2);
2225 * chip exception handler for SCSI parity error.
2227 * When the chip detects a SCSI parity error and is
2228 * currently executing a (CH)MOV instruction, it does
2229 * not interrupt immediately, but tries to finish the
2230 * transfer of the current scatter entry before
2231 * interrupting. The following situations may occur:
2233 * - The complete scatter entry has been transferred
2234 * without the device having changed phase.
2235 * The chip will then interrupt with the DSP pointing
2236 * to the instruction that follows the MOV.
2238 * - A phase mismatch occurs before the MOV finished
2239 * and phase errors are to be handled by the C code.
2240 * The chip will then interrupt with both PAR and MA
2243 * - A phase mismatch occurs before the MOV finished and
2244 * phase errors are to be handled by SCRIPTS.
2245 * The chip will load the DSP with the phase mismatch
2246 * JUMP address and interrupt the host processor.
2248 static void sym_int_par (struct sym_hcb *np, u_short sist)
2250 u_char hsts = INB(np, HS_PRT);
2251 u32 dsp = INL(np, nc_dsp);
2252 u32 dbc = INL(np, nc_dbc);
2253 u32 dsa = INL(np, nc_dsa);
2254 u_char sbcl = INB(np, nc_sbcl);
2255 u_char cmd = dbc >> 24;
2256 int phase = cmd & 7;
2257 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
2259 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
2260 sym_name(np), hsts, dbc, sbcl);
2263 * Check that the chip is connected to the SCSI BUS.
2265 if (!(INB(np, nc_scntl1) & ISCON)) {
2266 sym_recover_scsi_int(np, HS_UNEXPECTED);
2271 * If the nexus is not clearly identified, reset the bus.
2272 * We will try to do better later.
2278 * Check instruction was a MOV, direction was INPUT and
2281 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
2285 * Keep track of the parity error.
2287 OUTONB(np, HF_PRT, HF_EXT_ERR);
2288 cp->xerr_status |= XE_PARITY_ERR;
2291 * Prepare the message to send to the device.
2293 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
2296 * If the old phase was DATA IN phase, we have to deal with
2297 * the 3 situations described above.
2298 * For other input phases (MSG IN and STATUS), the device
2299 * must resend the whole thing that failed parity checking
2300 * or signal error. So, jumping to dispatcher should be OK.
2302 if (phase == 1 || phase == 5) {
2303 /* Phase mismatch handled by SCRIPTS */
2304 if (dsp == SCRIPTB_BA(np, pm_handle))
2306 /* Phase mismatch handled by the C code */
2309 /* No phase mismatch occurred */
2311 sym_set_script_dp (np, cp, dsp);
2312 OUTL_DSP(np, SCRIPTA_BA(np, dispatch));
2315 else if (phase == 7) /* We definitely cannot handle parity errors */
2316 #if 1 /* in message-in phase due to the relection */
2317 goto reset_all; /* path and various message anticipations. */
2319 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
2322 OUTL_DSP(np, SCRIPTA_BA(np, dispatch));
2326 sym_start_reset(np);
2331 * chip exception handler for phase errors.
2333 * We have to construct a new transfer descriptor,
2334 * to transfer the rest of the current block.
2336 static void sym_int_ma (struct sym_hcb *np)
2349 u_char hflags, hflags0;
2353 dsp = INL(np, nc_dsp);
2354 dbc = INL(np, nc_dbc);
2355 dsa = INL(np, nc_dsa);
2358 rest = dbc & 0xffffff;
2362 * locate matching cp if any.
2364 cp = sym_ccb_from_dsa(np, dsa);
2367 * Donnot take into account dma fifo and various buffers in
2368 * INPUT phase since the chip flushes everything before
2369 * raising the MA interrupt for interrupted INPUT phases.
2370 * For DATA IN phase, we will check for the SWIDE later.
2372 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
2375 if (np->features & FE_DFBC)
2376 delta = INW(np, nc_dfbc);
2381 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
2383 dfifo = INL(np, nc_dfifo);
2386 * Calculate remaining bytes in DMA fifo.
2387 * (CTEST5 = dfifo >> 16)
2389 if (dfifo & (DFS << 16))
2390 delta = ((((dfifo >> 8) & 0x300) |
2391 (dfifo & 0xff)) - rest) & 0x3ff;
2393 delta = ((dfifo & 0xff) - rest) & 0x7f;
2397 * The data in the dma fifo has not been transfered to
2398 * the target -> add the amount to the rest
2399 * and clear the data.
2400 * Check the sstat2 register in case of wide transfer.
2403 ss0 = INB(np, nc_sstat0);
2404 if (ss0 & OLF) rest++;
2405 if (!(np->features & FE_C10))
2406 if (ss0 & ORF) rest++;
2407 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
2408 ss2 = INB(np, nc_sstat2);
2409 if (ss2 & OLF1) rest++;
2410 if (!(np->features & FE_C10))
2411 if (ss2 & ORF1) rest++;
2417 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
2418 OUTB(np, nc_stest3, TE|CSF); /* scsi fifo */
2422 * log the information
2424 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
2425 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(np, nc_sbcl)&7,
2426 (unsigned) rest, (unsigned) delta);
2429 * try to find the interrupted script command,
2430 * and the address at which to continue.
2434 if (dsp > np->scripta_ba &&
2435 dsp <= np->scripta_ba + np->scripta_sz) {
2436 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
2439 else if (dsp > np->scriptb_ba &&
2440 dsp <= np->scriptb_ba + np->scriptb_sz) {
2441 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
2446 * log the information
2448 if (DEBUG_FLAGS & DEBUG_PHASE) {
2449 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
2450 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
2454 printf ("%s: interrupted SCRIPT address not found.\n",
2460 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
2466 * get old startaddress and old length.
2468 oadr = scr_to_cpu(vdsp[1]);
2470 if (cmd & 0x10) { /* Table indirect */
2471 tblp = (u32 *) ((char*) &cp->phys + oadr);
2472 olen = scr_to_cpu(tblp[0]);
2473 oadr = scr_to_cpu(tblp[1]);
2476 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
2479 if (DEBUG_FLAGS & DEBUG_PHASE) {
2480 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
2481 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
2488 * check cmd against assumed interrupted script command.
2489 * If dt data phase, the MOVE instruction hasn't bit 4 of
2492 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
2493 sym_print_addr(cp->cmd,
2494 "internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
2495 cmd, scr_to_cpu(vdsp[0]) >> 24);
2501 * if old phase not dataphase, leave here.
2504 sym_print_addr(cp->cmd,
2505 "phase change %x-%x %d@%08x resid=%d.\n",
2506 cmd&7, INB(np, nc_sbcl)&7, (unsigned)olen,
2507 (unsigned)oadr, (unsigned)rest);
2508 goto unexpected_phase;
2512 * Choose the correct PM save area.
2514 * Look at the PM_SAVE SCRIPT if you want to understand
2515 * this stuff. The equivalent code is implemented in
2516 * SCRIPTS for the 895A, 896 and 1010 that are able to
2517 * handle PM from the SCRIPTS processor.
2519 hflags0 = INB(np, HF_PRT);
2522 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
2523 if (hflags & HF_IN_PM0)
2524 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
2525 else if (hflags & HF_IN_PM1)
2526 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
2528 if (hflags & HF_DP_SAVED)
2529 hflags ^= HF_ACT_PM;
2532 if (!(hflags & HF_ACT_PM)) {
2534 newcmd = SCRIPTA_BA(np, pm0_data);
2538 newcmd = SCRIPTA_BA(np, pm1_data);
2541 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
2542 if (hflags != hflags0)
2543 OUTB(np, HF_PRT, hflags);
2546 * fillin the phase mismatch context
2548 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
2549 pm->sg.size = cpu_to_scr(rest);
2550 pm->ret = cpu_to_scr(nxtdsp);
2553 * If we have a SWIDE,
2554 * - prepare the address to write the SWIDE from SCRIPTS,
2555 * - compute the SCRIPTS address to restart from,
2556 * - move current data pointer context by one byte.
2558 nxtdsp = SCRIPTA_BA(np, dispatch);
2559 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
2560 (INB(np, nc_scntl2) & WSR)) {
2564 * Set up the table indirect for the MOVE
2565 * of the residual byte and adjust the data
2568 tmp = scr_to_cpu(pm->sg.addr);
2569 cp->phys.wresid.addr = cpu_to_scr(tmp);
2570 pm->sg.addr = cpu_to_scr(tmp + 1);
2571 tmp = scr_to_cpu(pm->sg.size);
2572 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
2573 pm->sg.size = cpu_to_scr(tmp - 1);
2576 * If only the residual byte is to be moved,
2577 * no PM context is needed.
2579 if ((tmp&0xffffff) == 1)
2583 * Prepare the address of SCRIPTS that will
2584 * move the residual byte to memory.
2586 nxtdsp = SCRIPTB_BA(np, wsr_ma_helper);
2589 if (DEBUG_FLAGS & DEBUG_PHASE) {
2590 sym_print_addr(cp->cmd, "PM %x %x %x / %x %x %x.\n",
2591 hflags0, hflags, newcmd,
2592 (unsigned)scr_to_cpu(pm->sg.addr),
2593 (unsigned)scr_to_cpu(pm->sg.size),
2594 (unsigned)scr_to_cpu(pm->ret));
2598 * Restart the SCRIPTS processor.
2600 sym_set_script_dp (np, cp, newcmd);
2601 OUTL_DSP(np, nxtdsp);
2605 * Unexpected phase changes that occurs when the current phase
2606 * is not a DATA IN or DATA OUT phase are due to error conditions.
2607 * Such event may only happen when the SCRIPTS is using a
2608 * multibyte SCSI MOVE.
2610 * Phase change Some possible cause
2612 * COMMAND --> MSG IN SCSI parity error detected by target.
2613 * COMMAND --> STATUS Bad command or refused by target.
2614 * MSG OUT --> MSG IN Message rejected by target.
2615 * MSG OUT --> COMMAND Bogus target that discards extended
2616 * negotiation messages.
2618 * The code below does not care of the new phase and so
2619 * trusts the target. Why to annoy it ?
2620 * If the interrupted phase is COMMAND phase, we restart at
2622 * If a target does not get all the messages after selection,
2623 * the code assumes blindly that the target discards extended
2624 * messages and clears the negotiation status.
2625 * If the target does not want all our response to negotiation,
2626 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
2627 * bloat for such a should_not_happen situation).
2628 * In all other situation, we reset the BUS.
2629 * Are these assumptions reasonnable ? (Wait and see ...)
2636 case 2: /* COMMAND phase */
2637 nxtdsp = SCRIPTA_BA(np, dispatch);
2640 case 3: /* STATUS phase */
2641 nxtdsp = SCRIPTA_BA(np, dispatch);
2644 case 6: /* MSG OUT phase */
2646 * If the device may want to use untagged when we want
2647 * tagged, we prepare an IDENTIFY without disc. granted,
2648 * since we will not be able to handle reselect.
2649 * Otherwise, we just don't care.
2651 if (dsp == SCRIPTA_BA(np, send_ident)) {
2652 if (cp->tag != NO_TAG && olen - rest <= 3) {
2653 cp->host_status = HS_BUSY;
2654 np->msgout[0] = IDENTIFY(0, cp->lun);
2655 nxtdsp = SCRIPTB_BA(np, ident_break_atn);
2658 nxtdsp = SCRIPTB_BA(np, ident_break);
2660 else if (dsp == SCRIPTB_BA(np, send_wdtr) ||
2661 dsp == SCRIPTB_BA(np, send_sdtr) ||
2662 dsp == SCRIPTB_BA(np, send_ppr)) {
2663 nxtdsp = SCRIPTB_BA(np, nego_bad_phase);
2664 if (dsp == SCRIPTB_BA(np, send_ppr)) {
2665 struct scsi_device *dev = cp->cmd->device;
2671 case 7: /* MSG IN phase */
2672 nxtdsp = SCRIPTA_BA(np, clrack);
2678 OUTL_DSP(np, nxtdsp);
2683 sym_start_reset(np);
2687 * chip interrupt handler
2689 * In normal situations, interrupt conditions occur one at
2690 * a time. But when something bad happens on the SCSI BUS,
2691 * the chip may raise several interrupt flags before
2692 * stopping and interrupting the CPU. The additionnal
2693 * interrupt flags are stacked in some extra registers
2694 * after the SIP and/or DIP flag has been raised in the
2695 * ISTAT. After the CPU has read the interrupt condition
2696 * flag from SIST or DSTAT, the chip unstacks the other
2697 * interrupt flags and sets the corresponding bits in
2698 * SIST or DSTAT. Since the chip starts stacking once the
2699 * SIP or DIP flag is set, there is a small window of time
2700 * where the stacking does not occur.
2702 * Typically, multiple interrupt conditions may happen in
2703 * the following situations:
2705 * - SCSI parity error + Phase mismatch (PAR|MA)
2706 * When an parity error is detected in input phase
2707 * and the device switches to msg-in phase inside a
2709 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
2710 * When a stupid device does not want to handle the
2711 * recovery of an SCSI parity error.
2712 * - Some combinations of STO, PAR, UDC, ...
2713 * When using non compliant SCSI stuff, when user is
2714 * doing non compliant hot tampering on the BUS, when
2715 * something really bad happens to a device, etc ...
2717 * The heuristic suggested by SYMBIOS to handle
2718 * multiple interrupts is to try unstacking all
2719 * interrupts conditions and to handle them on some
2720 * priority based on error severity.
2721 * This will work when the unstacking has been
2722 * successful, but we cannot be 100 % sure of that,
2723 * since the CPU may have been faster to unstack than
2724 * the chip is able to stack. Hmmm ... But it seems that
2725 * such a situation is very unlikely to happen.
2727 * If this happen, for example STO caught by the CPU
2728 * then UDC happenning before the CPU have restarted
2729 * the SCRIPTS, the driver may wrongly complete the
2730 * same command on UDC, since the SCRIPTS didn't restart
2731 * and the DSA still points to the same command.
2732 * We avoid this situation by setting the DSA to an
2733 * invalid value when the CCB is completed and before
2734 * restarting the SCRIPTS.
2736 * Another issue is that we need some section of our
2737 * recovery procedures to be somehow uninterruptible but
2738 * the SCRIPTS processor does not provides such a
2739 * feature. For this reason, we handle recovery preferently
2740 * from the C code and check against some SCRIPTS critical
2741 * sections from the C code.
2743 * Hopefully, the interrupt handling of the driver is now
2744 * able to resist to weird BUS error conditions, but donnot
2745 * ask me for any guarantee that it will never fail. :-)
2746 * Use at your own decision and risk.
2749 void sym_interrupt (struct sym_hcb *np)
2751 u_char istat, istatc;
2756 * interrupt on the fly ?
2757 * (SCRIPTS may still be running)
2759 * A `dummy read' is needed to ensure that the
2760 * clear of the INTF flag reaches the device
2761 * and that posted writes are flushed to memory
2762 * before the scanning of the DONE queue.
2763 * Note that SCRIPTS also (dummy) read to memory
2764 * prior to deliver the INTF interrupt condition.
2766 istat = INB(np, nc_istat);
2768 OUTB(np, nc_istat, (istat & SIGP) | INTF | np->istat_sem);
2769 istat = INB(np, nc_istat); /* DUMMY READ */
2770 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
2771 sym_wakeup_done(np);
2774 if (!(istat & (SIP|DIP)))
2777 #if 0 /* We should never get this one */
2779 OUTB(np, nc_istat, CABRT);
2783 * PAR and MA interrupts may occur at the same time,
2784 * and we need to know of both in order to handle
2785 * this situation properly. We try to unstack SCSI
2786 * interrupts for that reason. BTW, I dislike a LOT
2787 * such a loop inside the interrupt routine.
2788 * Even if DMA interrupt stacking is very unlikely to
2789 * happen, we also try unstacking these ones, since
2790 * this has no performance impact.
2797 sist |= INW(np, nc_sist);
2799 dstat |= INB(np, nc_dstat);
2800 istatc = INB(np, nc_istat);
2802 } while (istatc & (SIP|DIP));
2804 if (DEBUG_FLAGS & DEBUG_TINY)
2805 printf ("<%d|%x:%x|%x:%x>",
2806 (int)INB(np, nc_scr0),
2808 (unsigned)INL(np, nc_dsp),
2809 (unsigned)INL(np, nc_dbc));
2811 * On paper, a memory read barrier may be needed here to
2812 * prevent out of order LOADs by the CPU from having
2813 * prefetched stale data prior to DMA having occurred.
2814 * And since we are paranoid ... :)
2816 MEMORY_READ_BARRIER();
2819 * First, interrupts we want to service cleanly.
2821 * Phase mismatch (MA) is the most frequent interrupt
2822 * for chip earlier than the 896 and so we have to service
2823 * it as quickly as possible.
2824 * A SCSI parity error (PAR) may be combined with a phase
2825 * mismatch condition (MA).
2826 * Programmed interrupts (SIR) are used to call the C code
2828 * The single step interrupt (SSI) is not used in this
2831 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
2832 !(dstat & (MDPE|BF|ABRT|IID))) {
2833 if (sist & PAR) sym_int_par (np, sist);
2834 else if (sist & MA) sym_int_ma (np);
2835 else if (dstat & SIR) sym_int_sir (np);
2836 else if (dstat & SSI) OUTONB_STD();
2837 else goto unknown_int;
2842 * Now, interrupts that donnot happen in normal
2843 * situations and that we may need to recover from.
2845 * On SCSI RESET (RST), we reset everything.
2846 * On SCSI BUS MODE CHANGE (SBMC), we complete all
2847 * active CCBs with RESET status, prepare all devices
2848 * for negotiating again and restart the SCRIPTS.
2849 * On STO and UDC, we complete the CCB with the corres-
2850 * ponding status and restart the SCRIPTS.
2853 printf("%s: SCSI BUS reset detected.\n", sym_name(np));
2854 sym_start_up (np, 1);
2858 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
2859 OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */
2861 if (!(sist & (GEN|HTH|SGE)) &&
2862 !(dstat & (MDPE|BF|ABRT|IID))) {
2863 if (sist & SBMC) sym_int_sbmc (np);
2864 else if (sist & STO) sym_int_sto (np);
2865 else if (sist & UDC) sym_int_udc (np);
2866 else goto unknown_int;
2871 * Now, interrupts we are not able to recover cleanly.
2873 * Log message for hard errors.
2877 sym_log_hard_error(np, sist, dstat);
2879 if ((sist & (GEN|HTH|SGE)) ||
2880 (dstat & (MDPE|BF|ABRT|IID))) {
2881 sym_start_reset(np);
2887 * We just miss the cause of the interrupt. :(
2888 * Print a message. The timeout will do the real work.
2890 printf( "%s: unknown interrupt(s) ignored, "
2891 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
2892 sym_name(np), istat, dstat, sist);
2896 * Dequeue from the START queue all CCBs that match
2897 * a given target/lun/task condition (-1 means all),
2898 * and move them from the BUSY queue to the COMP queue
2899 * with DID_SOFT_ERROR status condition.
2900 * This function is used during error handling/recovery.
2901 * It is called with SCRIPTS not running.
2904 sym_dequeue_from_squeue(struct sym_hcb *np, int i, int target, int lun, int task)
2910 * Make sure the starting index is within range.
2912 assert((i >= 0) && (i < 2*MAX_QUEUE));
2915 * Walk until end of START queue and dequeue every job
2916 * that matches the target/lun/task condition.
2919 while (i != np->squeueput) {
2920 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
2922 #ifdef SYM_CONF_IARB_SUPPORT
2923 /* Forget hints for IARB, they may be no longer relevant */
2924 cp->host_flags &= ~HF_HINT_IARB;
2926 if ((target == -1 || cp->target == target) &&
2927 (lun == -1 || cp->lun == lun) &&
2928 (task == -1 || cp->tag == task)) {
2929 sym_set_cam_status(cp->cmd, DID_SOFT_ERROR);
2930 sym_remque(&cp->link_ccbq);
2931 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
2935 np->squeue[j] = np->squeue[i];
2936 if ((j += 2) >= MAX_QUEUE*2) j = 0;
2938 if ((i += 2) >= MAX_QUEUE*2) i = 0;
2940 if (i != j) /* Copy back the idle task if needed */
2941 np->squeue[j] = np->squeue[i];
2942 np->squeueput = j; /* Update our current start queue pointer */
2948 * chip handler for bad SCSI status condition
2950 * In case of bad SCSI status, we unqueue all the tasks
2951 * currently queued to the controller but not yet started
2952 * and then restart the SCRIPTS processor immediately.
2954 * QUEUE FULL and BUSY conditions are handled the same way.
2955 * Basically all the not yet started tasks are requeued in
2956 * device queue and the queue is frozen until a completion.
2958 * For CHECK CONDITION and COMMAND TERMINATED status, we use
2959 * the CCB of the failed command to prepare a REQUEST SENSE
2960 * SCSI command and queue it to the controller queue.
2962 * SCRATCHA is assumed to have been loaded with STARTPOS
2963 * before the SCRIPTS called the C code.
2965 static void sym_sir_bad_scsi_status(struct sym_hcb *np, int num, struct sym_ccb *cp)
2968 u_char s_status = cp->ssss_status;
2969 u_char h_flags = cp->host_flags;
2974 * Compute the index of the next job to start from SCRIPTS.
2976 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
2979 * The last CCB queued used for IARB hint may be
2980 * no longer relevant. Forget it.
2982 #ifdef SYM_CONF_IARB_SUPPORT
2988 * Now deal with the SCSI status.
2993 if (sym_verbose >= 2) {
2994 sym_print_addr(cp->cmd, "%s\n",
2995 s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
2997 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
2998 sym_complete_error (np, cp);
3003 * If we get an SCSI error when requesting sense, give up.
3005 if (h_flags & HF_SENSE) {
3006 sym_complete_error (np, cp);
3011 * Dequeue all queued CCBs for that device not yet started,
3012 * and restart the SCRIPTS processor immediately.
3014 sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
3015 OUTL_DSP(np, SCRIPTA_BA(np, start));
3018 * Save some info of the actual IO.
3019 * Compute the data residual.
3021 cp->sv_scsi_status = cp->ssss_status;
3022 cp->sv_xerr_status = cp->xerr_status;
3023 cp->sv_resid = sym_compute_residual(np, cp);
3026 * Prepare all needed data structures for
3027 * requesting sense data.
3030 cp->scsi_smsg2[0] = IDENTIFY(0, cp->lun);
3034 * If we are currently using anything different from
3035 * async. 8 bit data transfers with that target,
3036 * start a negotiation, since the device may want
3037 * to report us a UNIT ATTENTION condition due to
3038 * a cause we currently ignore, and we donnot want
3039 * to be stuck with WIDE and/or SYNC data transfer.
3041 * cp->nego_status is filled by sym_prepare_nego().
3043 cp->nego_status = 0;
3044 msglen += sym_prepare_nego(np, cp, &cp->scsi_smsg2[msglen]);
3046 * Message table indirect structure.
3048 cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg2);
3049 cp->phys.smsg.size = cpu_to_scr(msglen);
3054 cp->phys.cmd.addr = CCB_BA(cp, sensecmd);
3055 cp->phys.cmd.size = cpu_to_scr(6);
3058 * patch requested size into sense command
3060 cp->sensecmd[0] = REQUEST_SENSE;
3061 cp->sensecmd[1] = 0;
3062 if (cp->cmd->device->scsi_level <= SCSI_2 && cp->lun <= 7)
3063 cp->sensecmd[1] = cp->lun << 5;
3064 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
3065 cp->data_len = SYM_SNS_BBUF_LEN;
3070 memset(cp->sns_bbuf, 0, SYM_SNS_BBUF_LEN);
3071 cp->phys.sense.addr = CCB_BA(cp, sns_bbuf);
3072 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
3075 * requeue the command.
3077 startp = SCRIPTB_BA(np, sdata_in);
3079 cp->phys.head.savep = cpu_to_scr(startp);
3080 cp->phys.head.lastp = cpu_to_scr(startp);
3081 cp->startp = cpu_to_scr(startp);
3082 cp->goalp = cpu_to_scr(startp + 16);
3084 cp->host_xflags = 0;
3085 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
3086 cp->ssss_status = S_ILLEGAL;
3087 cp->host_flags = (HF_SENSE|HF_DATA_IN);
3088 cp->xerr_status = 0;
3089 cp->extra_bytes = 0;
3091 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select));
3094 * Requeue the command.
3096 sym_put_start_queue(np, cp);
3099 * Give back to upper layer everything we have dequeued.
3101 sym_flush_comp_queue(np, 0);
3107 * After a device has accepted some management message
3108 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
3109 * a device signals a UNIT ATTENTION condition, some
3110 * tasks are thrown away by the device. We are required
3111 * to reflect that on our tasks list since the device
3112 * will never complete these tasks.
3114 * This function move from the BUSY queue to the COMP
3115 * queue all disconnected CCBs for a given target that
3116 * match the following criteria:
3117 * - lun=-1 means any logical UNIT otherwise a given one.
3118 * - task=-1 means any task, otherwise a given one.
3120 int sym_clear_tasks(struct sym_hcb *np, int cam_status, int target, int lun, int task)
3122 SYM_QUEHEAD qtmp, *qp;
3127 * Move the entire BUSY queue to our temporary queue.
3129 sym_que_init(&qtmp);
3130 sym_que_splice(&np->busy_ccbq, &qtmp);
3131 sym_que_init(&np->busy_ccbq);
3134 * Put all CCBs that matches our criteria into
3135 * the COMP queue and put back other ones into
3138 while ((qp = sym_remque_head(&qtmp)) != 0) {
3139 struct scsi_cmnd *cmd;
3140 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3142 if (cp->host_status != HS_DISCONNECT ||
3143 cp->target != target ||
3144 (lun != -1 && cp->lun != lun) ||
3146 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
3147 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
3150 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
3152 /* Preserve the software timeout condition */
3153 if (sym_get_cam_status(cmd) != DID_TIME_OUT)
3154 sym_set_cam_status(cmd, cam_status);
3157 printf("XXXX TASK @%p CLEARED\n", cp);
3164 * chip handler for TASKS recovery
3166 * We cannot safely abort a command, while the SCRIPTS
3167 * processor is running, since we just would be in race
3170 * As long as we have tasks to abort, we keep the SEM
3171 * bit set in the ISTAT. When this bit is set, the
3172 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
3173 * each time it enters the scheduler.
3175 * If we have to reset a target, clear tasks of a unit,
3176 * or to perform the abort of a disconnected job, we
3177 * restart the SCRIPTS for selecting the target. Once
3178 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
3179 * If it loses arbitration, the SCRIPTS will interrupt again
3180 * the next time it will enter its scheduler, and so on ...
3182 * On SIR_TARGET_SELECTED, we scan for the more
3183 * appropriate thing to do:
3185 * - If nothing, we just sent a M_ABORT message to the
3186 * target to get rid of the useless SCSI bus ownership.
3187 * According to the specs, no tasks shall be affected.
3188 * - If the target is to be reset, we send it a M_RESET
3190 * - If a logical UNIT is to be cleared , we send the
3191 * IDENTIFY(lun) + M_ABORT.
3192 * - If an untagged task is to be aborted, we send the
3193 * IDENTIFY(lun) + M_ABORT.
3194 * - If a tagged task is to be aborted, we send the
3195 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
3197 * Once our 'kiss of death' :) message has been accepted
3198 * by the target, the SCRIPTS interrupts again
3199 * (SIR_ABORT_SENT). On this interrupt, we complete
3200 * all the CCBs that should have been aborted by the
3201 * target according to our message.
3203 static void sym_sir_task_recovery(struct sym_hcb *np, int num)
3207 struct sym_tcb *tp = NULL; /* gcc isn't quite smart enough yet */
3208 struct scsi_target *starget;
3209 int target=-1, lun=-1, task;
3214 * The SCRIPTS processor stopped before starting
3215 * the next command in order to allow us to perform
3216 * some task recovery.
3218 case SIR_SCRIPT_STOPPED:
3220 * Do we have any target to reset or unit to clear ?
3222 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
3223 tp = &np->target[i];
3225 (tp->lun0p && tp->lun0p->to_clear)) {
3231 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
3232 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
3242 * If not, walk the busy queue for any
3243 * disconnected CCB to be aborted.
3246 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3247 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
3248 if (cp->host_status != HS_DISCONNECT)
3251 target = cp->target;
3258 * If some target is to be selected,
3259 * prepare and start the selection.
3262 tp = &np->target[target];
3263 np->abrt_sel.sel_id = target;
3264 np->abrt_sel.sel_scntl3 = tp->head.wval;
3265 np->abrt_sel.sel_sxfer = tp->head.sval;
3266 OUTL(np, nc_dsa, np->hcb_ba);
3267 OUTL_DSP(np, SCRIPTB_BA(np, sel_for_abort));
3272 * Now look for a CCB to abort that haven't started yet.
3273 * Btw, the SCRIPTS processor is still stopped, so
3274 * we are not in race.
3278 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3279 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3280 if (cp->host_status != HS_BUSY &&
3281 cp->host_status != HS_NEGOTIATE)
3285 #ifdef SYM_CONF_IARB_SUPPORT
3287 * If we are using IMMEDIATE ARBITRATION, we donnot
3288 * want to cancel the last queued CCB, since the
3289 * SCRIPTS may have anticipated the selection.
3291 if (cp == np->last_cp) {
3296 i = 1; /* Means we have found some */
3301 * We are done, so we donnot need
3302 * to synchronize with the SCRIPTS anylonger.
3303 * Remove the SEM flag from the ISTAT.
3306 OUTB(np, nc_istat, SIGP);
3310 * Compute index of next position in the start
3311 * queue the SCRIPTS intends to start and dequeue
3312 * all CCBs for that device that haven't been started.
3314 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
3315 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
3318 * Make sure at least our IO to abort has been dequeued.
3320 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
3321 assert(i && sym_get_cam_status(cp->cmd) == DID_SOFT_ERROR);
3323 sym_remque(&cp->link_ccbq);
3324 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
3327 * Keep track in cam status of the reason of the abort.
3329 if (cp->to_abort == 2)
3330 sym_set_cam_status(cp->cmd, DID_TIME_OUT);
3332 sym_set_cam_status(cp->cmd, DID_ABORT);
3335 * Complete with error everything that we have dequeued.
3337 sym_flush_comp_queue(np, 0);
3340 * The SCRIPTS processor has selected a target
3341 * we may have some manual recovery to perform for.
3343 case SIR_TARGET_SELECTED:
3344 target = INB(np, nc_sdid) & 0xf;
3345 tp = &np->target[target];
3347 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
3350 * If the target is to be reset, prepare a
3351 * M_RESET message and clear the to_reset flag
3352 * since we donnot expect this operation to fail.
3355 np->abrt_msg[0] = M_RESET;
3356 np->abrt_tbl.size = 1;
3362 * Otherwise, look for some logical unit to be cleared.
3364 if (tp->lun0p && tp->lun0p->to_clear)
3366 else if (tp->lunmp) {
3367 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
3368 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
3376 * If a logical unit is to be cleared, prepare
3377 * an IDENTIFY(lun) + ABORT MESSAGE.
3380 struct sym_lcb *lp = sym_lp(tp, lun);
3381 lp->to_clear = 0; /* We don't expect to fail here */
3382 np->abrt_msg[0] = IDENTIFY(0, lun);
3383 np->abrt_msg[1] = M_ABORT;
3384 np->abrt_tbl.size = 2;
3389 * Otherwise, look for some disconnected job to
3390 * abort for this target.
3394 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3395 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3396 if (cp->host_status != HS_DISCONNECT)
3398 if (cp->target != target)
3402 i = 1; /* Means we have some */
3407 * If we have none, probably since the device has
3408 * completed the command before we won abitration,
3409 * send a M_ABORT message without IDENTIFY.
3410 * According to the specs, the device must just
3411 * disconnect the BUS and not abort any task.
3414 np->abrt_msg[0] = M_ABORT;
3415 np->abrt_tbl.size = 1;
3420 * We have some task to abort.
3421 * Set the IDENTIFY(lun)
3423 np->abrt_msg[0] = IDENTIFY(0, cp->lun);
3426 * If we want to abort an untagged command, we
3427 * will send a IDENTIFY + M_ABORT.
3428 * Otherwise (tagged command), we will send
3429 * a IDENTITFY + task attributes + ABORT TAG.
3431 if (cp->tag == NO_TAG) {
3432 np->abrt_msg[1] = M_ABORT;
3433 np->abrt_tbl.size = 2;
3435 np->abrt_msg[1] = cp->scsi_smsg[1];
3436 np->abrt_msg[2] = cp->scsi_smsg[2];
3437 np->abrt_msg[3] = M_ABORT_TAG;
3438 np->abrt_tbl.size = 4;
3441 * Keep track of software timeout condition, since the
3442 * peripheral driver may not count retries on abort
3443 * conditions not due to timeout.
3445 if (cp->to_abort == 2)
3446 sym_set_cam_status(cp->cmd, DID_TIME_OUT);
3447 cp->to_abort = 0; /* We donnot expect to fail here */
3451 * The target has accepted our message and switched
3452 * to BUS FREE phase as we expected.
3454 case SIR_ABORT_SENT:
3455 target = INB(np, nc_sdid) & 0xf;
3456 tp = &np->target[target];
3457 starget = tp->starget;
3460 ** If we didn't abort anything, leave here.
3462 if (np->abrt_msg[0] == M_ABORT)
3466 * If we sent a M_RESET, then a hardware reset has
3467 * been performed by the target.
3468 * - Reset everything to async 8 bit
3469 * - Tell ourself to negotiate next time :-)
3470 * - Prepare to clear all disconnected CCBs for
3471 * this target from our task list (lun=task=-1)
3475 if (np->abrt_msg[0] == M_RESET) {
3477 tp->head.wval = np->rv_scntl3;
3479 spi_period(starget) = 0;
3480 spi_offset(starget) = 0;
3481 spi_width(starget) = 0;
3482 spi_iu(starget) = 0;
3483 spi_dt(starget) = 0;
3484 spi_qas(starget) = 0;
3485 tp->tgoal.check_nego = 1;
3489 * Otherwise, check for the LUN and TASK(s)
3490 * concerned by the cancelation.
3491 * If it is not ABORT_TAG then it is CLEAR_QUEUE
3492 * or an ABORT message :-)
3495 lun = np->abrt_msg[0] & 0x3f;
3496 if (np->abrt_msg[1] == M_ABORT_TAG)
3497 task = np->abrt_msg[2];
3501 * Complete all the CCBs the device should have
3502 * aborted due to our 'kiss of death' message.
3504 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
3505 sym_dequeue_from_squeue(np, i, target, lun, -1);
3506 sym_clear_tasks(np, DID_ABORT, target, lun, task);
3507 sym_flush_comp_queue(np, 0);
3510 * If we sent a BDR, make upper layer aware of that.
3512 if (np->abrt_msg[0] == M_RESET)
3513 sym_xpt_async_sent_bdr(np, target);
3518 * Print to the log the message we intend to send.
3520 if (num == SIR_TARGET_SELECTED) {
3521 dev_info(&tp->starget->dev, "control msgout:");
3522 sym_printl_hex(np->abrt_msg, np->abrt_tbl.size);
3523 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
3527 * Let the SCRIPTS processor continue.
3533 * Gerard's alchemy:) that deals with with the data
3534 * pointer for both MDP and the residual calculation.
3536 * I didn't want to bloat the code by more than 200
3537 * lines for the handling of both MDP and the residual.
3538 * This has been achieved by using a data pointer
3539 * representation consisting in an index in the data
3540 * array (dp_sg) and a negative offset (dp_ofs) that
3541 * have the following meaning:
3543 * - dp_sg = SYM_CONF_MAX_SG
3544 * we are at the end of the data script.
3545 * - dp_sg < SYM_CONF_MAX_SG
3546 * dp_sg points to the next entry of the scatter array
3547 * we want to transfer.
3549 * dp_ofs represents the residual of bytes of the
3550 * previous entry scatter entry we will send first.
3552 * no residual to send first.
3554 * The function sym_evaluate_dp() accepts an arbitray
3555 * offset (basically from the MDP message) and returns
3556 * the corresponding values of dp_sg and dp_ofs.
3559 static int sym_evaluate_dp(struct sym_hcb *np, struct sym_ccb *cp, u32 scr, int *ofs)
3562 int dp_ofs, dp_sg, dp_sgmin;
3567 * Compute the resulted data pointer in term of a script
3568 * address within some DATA script and a signed byte offset.
3572 if (dp_scr == SCRIPTA_BA(np, pm0_data))
3574 else if (dp_scr == SCRIPTA_BA(np, pm1_data))
3580 dp_scr = scr_to_cpu(pm->ret);
3581 dp_ofs -= scr_to_cpu(pm->sg.size) & 0x00ffffff;
3585 * If we are auto-sensing, then we are done.
3587 if (cp->host_flags & HF_SENSE) {
3593 * Deduce the index of the sg entry.
3594 * Keep track of the index of the first valid entry.
3595 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
3598 tmp = scr_to_cpu(cp->goalp);
3599 dp_sg = SYM_CONF_MAX_SG;
3601 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
3602 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
3605 * Move to the sg entry the data pointer belongs to.
3607 * If we are inside the data area, we expect result to be:
3610 * dp_ofs = 0 and dp_sg is the index of the sg entry
3611 * the data pointer belongs to (or the end of the data)
3613 * dp_ofs < 0 and dp_sg is the index of the sg entry
3614 * the data pointer belongs to + 1.
3618 while (dp_sg > dp_sgmin) {
3620 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3621 n = dp_ofs + (tmp & 0xffffff);
3629 else if (dp_ofs > 0) {
3630 while (dp_sg < SYM_CONF_MAX_SG) {
3631 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3632 dp_ofs -= (tmp & 0xffffff);
3640 * Make sure the data pointer is inside the data area.
3641 * If not, return some error.
3643 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
3645 else if (dp_sg > SYM_CONF_MAX_SG ||
3646 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
3650 * Save the extreme pointer if needed.
3652 if (dp_sg > cp->ext_sg ||
3653 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
3655 cp->ext_ofs = dp_ofs;
3669 * chip handler for MODIFY DATA POINTER MESSAGE
3671 * We also call this function on IGNORE WIDE RESIDUE
3672 * messages that do not match a SWIDE full condition.
3673 * Btw, we assume in that situation that such a message
3674 * is equivalent to a MODIFY DATA POINTER (offset=-1).
3677 static void sym_modify_dp(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp, int ofs)
3680 u32 dp_scr = sym_get_script_dp (np, cp);
3688 * Not supported for auto-sense.
3690 if (cp->host_flags & HF_SENSE)
3694 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
3695 * to the resulted data pointer.
3697 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
3702 * And our alchemy:) allows to easily calculate the data
3703 * script address we want to return for the next data phase.
3705 dp_ret = cpu_to_scr(cp->goalp);
3706 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
3709 * If offset / scatter entry is zero we donnot need
3710 * a context for the new current data pointer.
3718 * Get a context for the new current data pointer.
3720 hflags = INB(np, HF_PRT);
3722 if (hflags & HF_DP_SAVED)
3723 hflags ^= HF_ACT_PM;
3725 if (!(hflags & HF_ACT_PM)) {
3727 dp_scr = SCRIPTA_BA(np, pm0_data);
3731 dp_scr = SCRIPTA_BA(np, pm1_data);
3734 hflags &= ~(HF_DP_SAVED);
3736 OUTB(np, HF_PRT, hflags);
3739 * Set up the new current data pointer.
3740 * ofs < 0 there, and for the next data phase, we
3741 * want to transfer part of the data of the sg entry
3742 * corresponding to index dp_sg-1 prior to returning
3743 * to the main data script.
3745 pm->ret = cpu_to_scr(dp_ret);
3746 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
3747 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
3748 pm->sg.addr = cpu_to_scr(tmp);
3749 pm->sg.size = cpu_to_scr(-dp_ofs);
3752 sym_set_script_dp (np, cp, dp_scr);
3753 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
3757 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
3762 * chip calculation of the data residual.
3764 * As I used to say, the requirement of data residual
3765 * in SCSI is broken, useless and cannot be achieved
3766 * without huge complexity.
3767 * But most OSes and even the official CAM require it.
3768 * When stupidity happens to be so widely spread inside
3769 * a community, it gets hard to convince.
3771 * Anyway, I don't care, since I am not going to use
3772 * any software that considers this data residual as
3773 * a relevant information. :)
3776 int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp)
3778 int dp_sg, dp_sgmin, resid = 0;
3782 * Check for some data lost or just thrown away.
3783 * We are not required to be quite accurate in this
3784 * situation. Btw, if we are odd for output and the
3785 * device claims some more data, it may well happen
3786 * than our residual be zero. :-)
3788 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
3789 if (cp->xerr_status & XE_EXTRA_DATA)
3790 resid -= cp->extra_bytes;
3791 if (cp->xerr_status & XE_SODL_UNRUN)
3793 if (cp->xerr_status & XE_SWIDE_OVRUN)
3798 * If all data has been transferred,
3799 * there is no residual.
3801 if (cp->phys.head.lastp == cp->goalp)
3805 * If no data transfer occurs, or if the data
3806 * pointer is weird, return full residual.
3808 if (cp->startp == cp->phys.head.lastp ||
3809 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
3811 return cp->data_len;
3815 * If we were auto-sensing, then we are done.
3817 if (cp->host_flags & HF_SENSE) {
3822 * We are now full comfortable in the computation
3823 * of the data residual (2's complement).
3825 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
3826 resid = -cp->ext_ofs;
3827 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
3828 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3829 resid += (tmp & 0xffffff);
3832 resid -= cp->odd_byte_adjustment;
3835 * Hopefully, the result is not too wrong.
3841 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
3843 * When we try to negotiate, we append the negotiation message
3844 * to the identify and (maybe) simple tag message.
3845 * The host status field is set to HS_NEGOTIATE to mark this
3848 * If the target doesn't answer this message immediately
3849 * (as required by the standard), the SIR_NEGO_FAILED interrupt
3850 * will be raised eventually.
3851 * The handler removes the HS_NEGOTIATE status, and sets the
3852 * negotiated value to the default (async / nowide).
3854 * If we receive a matching answer immediately, we check it
3855 * for validity, and set the values.
3857 * If we receive a Reject message immediately, we assume the
3858 * negotiation has failed, and fall back to standard values.
3860 * If we receive a negotiation message while not in HS_NEGOTIATE
3861 * state, it's a target initiated negotiation. We prepare a
3862 * (hopefully) valid answer, set our parameters, and send back
3863 * this answer to the target.
3865 * If the target doesn't fetch the answer (no message out phase),
3866 * we assume the negotiation has failed, and fall back to default
3867 * settings (SIR_NEGO_PROTO interrupt).
3869 * When we set the values, we adjust them in all ccbs belonging
3870 * to this target, in the controller's register, and in the "phys"
3871 * field of the controller's struct sym_hcb.
3875 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
3878 sym_sync_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp)
3880 int target = cp->target;
3881 u_char chg, ofs, per, fak, div;
3883 if (DEBUG_FLAGS & DEBUG_NEGO) {
3884 sym_print_nego_msg(np, target, "sync msgin", np->msgin);
3888 * Get requested values.
3895 * Check values against our limits.
3898 if (ofs > np->maxoffs)
3899 {chg = 1; ofs = np->maxoffs;}
3903 if (per < np->minsync)
3904 {chg = 1; per = np->minsync;}
3908 * Get new chip synchronous parameters value.
3911 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
3914 if (DEBUG_FLAGS & DEBUG_NEGO) {
3915 sym_print_addr(cp->cmd,
3916 "sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
3917 ofs, per, div, fak, chg);
3921 * If it was an answer we want to change,
3922 * then it isn't acceptable. Reject it.
3930 sym_setsync (np, target, ofs, per, div, fak);
3933 * It was an answer. We are done.
3939 * It was a request. Prepare an answer message.
3941 spi_populate_sync_msg(np->msgout, per, ofs);
3943 if (DEBUG_FLAGS & DEBUG_NEGO) {
3944 sym_print_nego_msg(np, target, "sync msgout", np->msgout);
3947 np->msgin [0] = M_NOOP;
3952 sym_setsync (np, target, 0, 0, 0, 0);
3956 static void sym_sync_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
3962 * Request or answer ?
3964 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
3965 OUTB(np, HS_PRT, HS_BUSY);
3966 if (cp->nego_status && cp->nego_status != NS_SYNC)
3972 * Check and apply new values.
3974 result = sym_sync_nego_check(np, req, cp);
3975 if (result) /* Not acceptable, reject it */
3977 if (req) { /* Was a request, send response. */
3978 cp->nego_status = NS_SYNC;
3979 OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp));
3981 else /* Was a response, we are done. */
3982 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
3986 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
3990 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
3993 sym_ppr_nego_check(struct sym_hcb *np, int req, int target)
3995 struct sym_tcb *tp = &np->target[target];
3996 unsigned char fak, div;
3999 unsigned char per = np->msgin[3];
4000 unsigned char ofs = np->msgin[5];
4001 unsigned char wide = np->msgin[6];
4002 unsigned char opts = np->msgin[7] & PPR_OPT_MASK;
4004 if (DEBUG_FLAGS & DEBUG_NEGO) {
4005 sym_print_nego_msg(np, target, "ppr msgin", np->msgin);
4009 * Check values against our limits.
4011 if (wide > np->maxwide) {
4015 if (!wide || !(np->features & FE_U3EN))
4018 if (opts != (np->msgin[7] & PPR_OPT_MASK))
4021 dt = opts & PPR_OPT_DT;
4024 unsigned char maxoffs = dt ? np->maxoffs_dt : np->maxoffs;
4025 if (ofs > maxoffs) {
4032 unsigned char minsync = dt ? np->minsync_dt : np->minsync;
4033 if (per < minsync) {
4040 * Get new chip synchronous parameters value.
4043 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
4047 * If it was an answer we want to change,
4048 * then it isn't acceptable. Reject it.
4056 sym_setpprot(np, target, opts, ofs, per, wide, div, fak);
4059 * It was an answer. We are done.
4065 * It was a request. Prepare an answer message.
4067 spi_populate_ppr_msg(np->msgout, per, ofs, wide, opts);
4069 if (DEBUG_FLAGS & DEBUG_NEGO) {
4070 sym_print_nego_msg(np, target, "ppr msgout", np->msgout);
4073 np->msgin [0] = M_NOOP;
4078 sym_setpprot (np, target, 0, 0, 0, 0, 0, 0);
4080 * If it is a device response that should result in
4081 * ST, we may want to try a legacy negotiation later.
4083 if (!req && !opts) {
4084 tp->tgoal.period = per;
4085 tp->tgoal.offset = ofs;
4086 tp->tgoal.width = wide;
4087 tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0;
4088 tp->tgoal.check_nego = 1;
4093 static void sym_ppr_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4099 * Request or answer ?
4101 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
4102 OUTB(np, HS_PRT, HS_BUSY);
4103 if (cp->nego_status && cp->nego_status != NS_PPR)
4109 * Check and apply new values.
4111 result = sym_ppr_nego_check(np, req, cp->target);
4112 if (result) /* Not acceptable, reject it */
4114 if (req) { /* Was a request, send response. */
4115 cp->nego_status = NS_PPR;
4116 OUTL_DSP(np, SCRIPTB_BA(np, ppr_resp));
4118 else /* Was a response, we are done. */
4119 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4123 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4127 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
4130 sym_wide_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp)
4132 int target = cp->target;
4135 if (DEBUG_FLAGS & DEBUG_NEGO) {
4136 sym_print_nego_msg(np, target, "wide msgin", np->msgin);
4140 * Get requested values.
4143 wide = np->msgin[3];
4146 * Check values against our limits.
4148 if (wide > np->maxwide) {
4153 if (DEBUG_FLAGS & DEBUG_NEGO) {
4154 sym_print_addr(cp->cmd, "wdtr: wide=%d chg=%d.\n",
4159 * If it was an answer we want to change,
4160 * then it isn't acceptable. Reject it.
4168 sym_setwide (np, target, wide);
4171 * It was an answer. We are done.
4177 * It was a request. Prepare an answer message.
4179 spi_populate_width_msg(np->msgout, wide);
4181 np->msgin [0] = M_NOOP;
4183 if (DEBUG_FLAGS & DEBUG_NEGO) {
4184 sym_print_nego_msg(np, target, "wide msgout", np->msgout);
4193 static void sym_wide_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4199 * Request or answer ?
4201 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
4202 OUTB(np, HS_PRT, HS_BUSY);
4203 if (cp->nego_status && cp->nego_status != NS_WIDE)
4209 * Check and apply new values.
4211 result = sym_wide_nego_check(np, req, cp);
4212 if (result) /* Not acceptable, reject it */
4214 if (req) { /* Was a request, send response. */
4215 cp->nego_status = NS_WIDE;
4216 OUTL_DSP(np, SCRIPTB_BA(np, wdtr_resp));
4217 } else { /* Was a response. */
4219 * Negotiate for SYNC immediately after WIDE response.
4220 * This allows to negotiate for both WIDE and SYNC on
4221 * a single SCSI command (Suggested by Justin Gibbs).
4223 if (tp->tgoal.offset) {
4224 spi_populate_sync_msg(np->msgout, tp->tgoal.period,
4227 if (DEBUG_FLAGS & DEBUG_NEGO) {
4228 sym_print_nego_msg(np, cp->target,
4229 "sync msgout", np->msgout);
4232 cp->nego_status = NS_SYNC;
4233 OUTB(np, HS_PRT, HS_NEGOTIATE);
4234 OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp));
4237 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4243 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4247 * Reset DT, SYNC or WIDE to default settings.
4249 * Called when a negotiation does not succeed either
4250 * on rejection or on protocol error.
4252 * A target that understands a PPR message should never
4253 * reject it, and messing with it is very unlikely.
4254 * So, if a PPR makes problems, we may just want to
4255 * try a legacy negotiation later.
4257 static void sym_nego_default(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4259 switch (cp->nego_status) {
4262 sym_setpprot (np, cp->target, 0, 0, 0, 0, 0, 0);
4264 if (tp->tgoal.period < np->minsync)
4265 tp->tgoal.period = np->minsync;
4266 if (tp->tgoal.offset > np->maxoffs)
4267 tp->tgoal.offset = np->maxoffs;
4268 tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0;
4269 tp->tgoal.check_nego = 1;
4273 sym_setsync (np, cp->target, 0, 0, 0, 0);
4276 sym_setwide (np, cp->target, 0);
4279 np->msgin [0] = M_NOOP;
4280 np->msgout[0] = M_NOOP;
4281 cp->nego_status = 0;
4285 * chip handler for MESSAGE REJECT received in response to
4286 * PPR, WIDE or SYNCHRONOUS negotiation.
4288 static void sym_nego_rejected(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4290 sym_nego_default(np, tp, cp);
4291 OUTB(np, HS_PRT, HS_BUSY);
4295 * chip exception handler for programmed interrupts.
4297 static void sym_int_sir (struct sym_hcb *np)
4299 u_char num = INB(np, nc_dsps);
4300 u32 dsa = INL(np, nc_dsa);
4301 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
4302 u_char target = INB(np, nc_sdid) & 0x0f;
4303 struct sym_tcb *tp = &np->target[target];
4306 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
4309 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
4311 * SCRIPTS tell us that we may have to update
4312 * 64 bit DMA segment registers.
4314 case SIR_DMAP_DIRTY:
4315 sym_update_dmap_regs(np);
4319 * Command has been completed with error condition
4320 * or has been auto-sensed.
4322 case SIR_COMPLETE_ERROR:
4323 sym_complete_error(np, cp);
4326 * The C code is currently trying to recover from something.
4327 * Typically, user want to abort some command.
4329 case SIR_SCRIPT_STOPPED:
4330 case SIR_TARGET_SELECTED:
4331 case SIR_ABORT_SENT:
4332 sym_sir_task_recovery(np, num);
4335 * The device didn't go to MSG OUT phase after having
4336 * been selected with ATN. We donnot want to handle
4339 case SIR_SEL_ATN_NO_MSG_OUT:
4340 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
4341 sym_name (np), target);
4344 * The device didn't switch to MSG IN phase after
4345 * having reseleted the initiator.
4347 case SIR_RESEL_NO_MSG_IN:
4348 printf ("%s:%d: No MSG IN phase after reselection.\n",
4349 sym_name (np), target);
4352 * After reselection, the device sent a message that wasn't
4355 case SIR_RESEL_NO_IDENTIFY:
4356 printf ("%s:%d: No IDENTIFY after reselection.\n",
4357 sym_name (np), target);
4360 * The device reselected a LUN we donnot know about.
4362 case SIR_RESEL_BAD_LUN:
4363 np->msgout[0] = M_RESET;
4366 * The device reselected for an untagged nexus and we
4369 case SIR_RESEL_BAD_I_T_L:
4370 np->msgout[0] = M_ABORT;
4373 * The device reselected for a tagged nexus that we donnot
4376 case SIR_RESEL_BAD_I_T_L_Q:
4377 np->msgout[0] = M_ABORT_TAG;
4380 * The SCRIPTS let us know that the device has grabbed
4381 * our message and will abort the job.
4383 case SIR_RESEL_ABORTED:
4384 np->lastmsg = np->msgout[0];
4385 np->msgout[0] = M_NOOP;
4386 printf ("%s:%d: message %x sent on bad reselection.\n",
4387 sym_name (np), target, np->lastmsg);
4390 * The SCRIPTS let us know that a message has been
4391 * successfully sent to the device.
4393 case SIR_MSG_OUT_DONE:
4394 np->lastmsg = np->msgout[0];
4395 np->msgout[0] = M_NOOP;
4396 /* Should we really care of that */
4397 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
4399 cp->xerr_status &= ~XE_PARITY_ERR;
4400 if (!cp->xerr_status)
4401 OUTOFFB(np, HF_PRT, HF_EXT_ERR);
4406 * The device didn't send a GOOD SCSI status.
4407 * We may have some work to do prior to allow
4408 * the SCRIPTS processor to continue.
4410 case SIR_BAD_SCSI_STATUS:
4413 sym_sir_bad_scsi_status(np, num, cp);
4416 * We are asked by the SCRIPTS to prepare a
4419 case SIR_REJECT_TO_SEND:
4420 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
4421 np->msgout[0] = M_REJECT;
4424 * We have been ODD at the end of a DATA IN
4425 * transfer and the device didn't send a
4426 * IGNORE WIDE RESIDUE message.
4427 * It is a data overrun condition.
4429 case SIR_SWIDE_OVERRUN:
4431 OUTONB(np, HF_PRT, HF_EXT_ERR);
4432 cp->xerr_status |= XE_SWIDE_OVRUN;
4436 * We have been ODD at the end of a DATA OUT
4438 * It is a data underrun condition.
4440 case SIR_SODL_UNDERRUN:
4442 OUTONB(np, HF_PRT, HF_EXT_ERR);
4443 cp->xerr_status |= XE_SODL_UNRUN;
4447 * The device wants us to tranfer more data than
4448 * expected or in the wrong direction.
4449 * The number of extra bytes is in scratcha.
4450 * It is a data overrun condition.
4452 case SIR_DATA_OVERRUN:
4454 OUTONB(np, HF_PRT, HF_EXT_ERR);
4455 cp->xerr_status |= XE_EXTRA_DATA;
4456 cp->extra_bytes += INL(np, nc_scratcha);
4460 * The device switched to an illegal phase (4/5).
4464 OUTONB(np, HF_PRT, HF_EXT_ERR);
4465 cp->xerr_status |= XE_BAD_PHASE;
4469 * We received a message.
4471 case SIR_MSG_RECEIVED:
4474 switch (np->msgin [0]) {
4476 * We received an extended message.
4477 * We handle MODIFY DATA POINTER, SDTR, WDTR
4478 * and reject all other extended messages.
4481 switch (np->msgin [2]) {
4483 if (DEBUG_FLAGS & DEBUG_POINTER)
4484 sym_print_msg(cp,"modify DP",np->msgin);
4485 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
4486 (np->msgin[5]<<8) + (np->msgin[6]);
4487 sym_modify_dp(np, tp, cp, tmp);
4490 sym_sync_nego(np, tp, cp);
4493 sym_ppr_nego(np, tp, cp);
4496 sym_wide_nego(np, tp, cp);
4503 * We received a 1/2 byte message not handled from SCRIPTS.
4504 * We are only expecting MESSAGE REJECT and IGNORE WIDE
4505 * RESIDUE messages that haven't been anticipated by
4506 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
4507 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
4510 if (DEBUG_FLAGS & DEBUG_POINTER)
4511 sym_print_msg(cp,"ign wide residue", np->msgin);
4512 if (cp->host_flags & HF_SENSE)
4513 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4515 sym_modify_dp(np, tp, cp, -1);
4518 if (INB(np, HS_PRT) == HS_NEGOTIATE)
4519 sym_nego_rejected(np, tp, cp);
4521 sym_print_addr(cp->cmd,
4522 "M_REJECT received (%x:%x).\n",
4523 scr_to_cpu(np->lastmsg), np->msgout[0]);
4532 * We received an unknown message.
4533 * Ignore all MSG IN phases and reject it.
4536 sym_print_msg(cp, "WEIRD message received", np->msgin);
4537 OUTL_DSP(np, SCRIPTB_BA(np, msg_weird));
4540 * Negotiation failed.
4541 * Target does not send us the reply.
4542 * Remove the HS_NEGOTIATE status.
4544 case SIR_NEGO_FAILED:
4545 OUTB(np, HS_PRT, HS_BUSY);
4547 * Negotiation failed.
4548 * Target does not want answer message.
4550 case SIR_NEGO_PROTO:
4551 sym_nego_default(np, tp, cp);
4559 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4562 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4569 * Acquire a control block
4571 struct sym_ccb *sym_get_ccb (struct sym_hcb *np, struct scsi_cmnd *cmd, u_char tag_order)
4573 u_char tn = cmd->device->id;
4574 u_char ln = cmd->device->lun;
4575 struct sym_tcb *tp = &np->target[tn];
4576 struct sym_lcb *lp = sym_lp(tp, ln);
4577 u_short tag = NO_TAG;
4579 struct sym_ccb *cp = NULL;
4582 * Look for a free CCB
4584 if (sym_que_empty(&np->free_ccbq))
4586 qp = sym_remque_head(&np->free_ccbq);
4589 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4593 * If we have been asked for a tagged command.
4597 * Debugging purpose.
4599 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4600 assert(lp->busy_itl == 0);
4603 * Allocate resources for tags if not yet.
4606 sym_alloc_lcb_tags(np, tn, ln);
4611 * Get a tag for this SCSI IO and set up
4612 * the CCB bus address for reselection,
4613 * and count it for this LUN.
4614 * Toggle reselect path to tagged.
4616 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
4617 tag = lp->cb_tags[lp->ia_tag];
4618 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
4621 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4622 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
4624 cpu_to_scr(SCRIPTA_BA(np, resel_tag));
4626 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4627 cp->tags_si = lp->tags_si;
4628 ++lp->tags_sum[cp->tags_si];
4636 * This command will not be tagged.
4637 * If we already have either a tagged or untagged
4638 * one, refuse to overlap this untagged one.
4642 * Debugging purpose.
4644 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4645 assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
4648 * Count this nexus for this LUN.
4649 * Set up the CCB bus address for reselection.
4650 * Toggle reselect path to untagged.
4653 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4654 if (lp->busy_itl == 1) {
4655 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
4657 cpu_to_scr(SCRIPTA_BA(np, resel_no_tag));
4665 * Put the CCB into the busy queue.
4667 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4668 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4670 sym_remque(&cp->link2_ccbq);
4671 sym_insque_tail(&cp->link2_ccbq, &lp->waiting_ccbq);
4676 cp->odd_byte_adjustment = 0;
4678 cp->order = tag_order;
4682 if (DEBUG_FLAGS & DEBUG_TAGS) {
4683 sym_print_addr(cmd, "ccb @%p using tag %d.\n", cp, tag);
4689 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4694 * Release one control block
4696 void sym_free_ccb (struct sym_hcb *np, struct sym_ccb *cp)
4698 struct sym_tcb *tp = &np->target[cp->target];
4699 struct sym_lcb *lp = sym_lp(tp, cp->lun);
4701 if (DEBUG_FLAGS & DEBUG_TAGS) {
4702 sym_print_addr(cp->cmd, "ccb @%p freeing tag %d.\n",
4711 * If tagged, release the tag, set the relect path
4713 if (cp->tag != NO_TAG) {
4714 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4715 --lp->tags_sum[cp->tags_si];
4718 * Free the tag value.
4720 lp->cb_tags[lp->if_tag] = cp->tag;
4721 if (++lp->if_tag == SYM_CONF_MAX_TASK)
4724 * Make the reselect path invalid,
4725 * and uncount this CCB.
4727 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
4729 } else { /* Untagged */
4731 * Make the reselect path invalid,
4732 * and uncount this CCB.
4734 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
4738 * If no JOB active, make the LUN reselect path invalid.
4740 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
4742 cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
4746 * We donnot queue more than 1 ccb per target
4747 * with negotiation at any time. If this ccb was
4748 * used for negotiation, clear this info in the tcb.
4750 if (cp == tp->nego_cp)
4753 #ifdef SYM_CONF_IARB_SUPPORT
4755 * If we just complete the last queued CCB,
4756 * clear this info that is no longer relevant.
4758 if (cp == np->last_cp)
4763 * Make this CCB available.
4766 cp->host_status = HS_IDLE;
4767 sym_remque(&cp->link_ccbq);
4768 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4770 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4772 sym_remque(&cp->link2_ccbq);
4773 sym_insque_tail(&cp->link2_ccbq, &np->dummy_ccbq);
4775 if (cp->tag != NO_TAG)
4778 --lp->started_no_tag;
4786 * Allocate a CCB from memory and initialize its fixed part.
4788 static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np)
4790 struct sym_ccb *cp = NULL;
4794 * Prevent from allocating more CCBs than we can
4795 * queue to the controller.
4797 if (np->actccbs >= SYM_CONF_MAX_START)
4801 * Allocate memory for this CCB.
4803 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
4813 * Compute the bus address of this ccb.
4815 cp->ccb_ba = vtobus(cp);
4818 * Insert this ccb into the hashed list.
4820 hcode = CCB_HASH_CODE(cp->ccb_ba);
4821 cp->link_ccbh = np->ccbh[hcode];
4822 np->ccbh[hcode] = cp;
4825 * Initialyze the start and restart actions.
4827 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, idle));
4828 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
4831 * Initilialyze some other fields.
4833 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
4836 * Chain into free ccb queue.
4838 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4841 * Chain into optionnal lists.
4843 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4844 sym_insque_head(&cp->link2_ccbq, &np->dummy_ccbq);
4849 sym_mfree_dma(cp, sizeof(*cp), "CCB");
4854 * Look up a CCB from a DSA value.
4856 static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa)
4861 hcode = CCB_HASH_CODE(dsa);
4862 cp = np->ccbh[hcode];
4864 if (cp->ccb_ba == dsa)
4873 * Target control block initialisation.
4874 * Nothing important to do at the moment.
4876 static void sym_init_tcb (struct sym_hcb *np, u_char tn)
4878 #if 0 /* Hmmm... this checking looks paranoid. */
4880 * Check some alignments required by the chip.
4882 assert (((offsetof(struct sym_reg, nc_sxfer) ^
4883 offsetof(struct sym_tcb, head.sval)) &3) == 0);
4884 assert (((offsetof(struct sym_reg, nc_scntl3) ^
4885 offsetof(struct sym_tcb, head.wval)) &3) == 0);
4890 * Lun control block allocation and initialization.
4892 struct sym_lcb *sym_alloc_lcb (struct sym_hcb *np, u_char tn, u_char ln)
4894 struct sym_tcb *tp = &np->target[tn];
4895 struct sym_lcb *lp = NULL;
4898 * Initialize the target control block if not yet.
4900 sym_init_tcb (np, tn);
4903 * Allocate the LCB bus address array.
4904 * Compute the bus address of this table.
4906 if (ln && !tp->luntbl) {
4909 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
4912 for (i = 0 ; i < 64 ; i++)
4913 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
4914 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
4918 * Allocate the table of pointers for LUN(s) > 0, if needed.
4920 if (ln && !tp->lunmp) {
4921 tp->lunmp = kcalloc(SYM_CONF_MAX_LUN, sizeof(struct sym_lcb *),
4929 * Make it available to the chip.
4931 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
4936 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
4940 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
4944 * Let the itl task point to error handling.
4946 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
4949 * Set the reselect pattern to our default. :)
4951 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
4954 * Set user capabilities.
4956 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
4958 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4960 * Initialize device queueing.
4962 sym_que_init(&lp->waiting_ccbq);
4963 sym_que_init(&lp->started_ccbq);
4964 lp->started_max = SYM_CONF_MAX_TASK;
4965 lp->started_limit = SYM_CONF_MAX_TASK;
4973 * Allocate LCB resources for tagged command queuing.
4975 static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln)
4977 struct sym_tcb *tp = &np->target[tn];
4978 struct sym_lcb *lp = sym_lp(tp, ln);
4982 * Allocate the task table and and the tag allocation
4983 * circular buffer. We want both or none.
4985 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
4988 lp->cb_tags = kcalloc(SYM_CONF_MAX_TASK, 1, GFP_ATOMIC);
4990 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
4991 lp->itlq_tbl = NULL;
4996 * Initialize the task table with invalid entries.
4998 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
4999 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
5002 * Fill up the tag buffer with tag numbers.
5004 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
5008 * Make the task table available to SCRIPTS,
5009 * And accept tagged commands now.
5011 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
5019 * Queue a SCSI IO to the controller.
5021 int sym_queue_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, struct sym_ccb *cp)
5023 struct scsi_device *sdev = cmd->device;
5031 * Keep track of the IO in our CCB.
5036 * Retrieve the target descriptor.
5038 tp = &np->target[cp->target];
5041 * Retrieve the lun descriptor.
5043 lp = sym_lp(tp, sdev->lun);
5045 can_disconnect = (cp->tag != NO_TAG) ||
5046 (lp && (lp->curr_flags & SYM_DISC_ENABLED));
5048 msgptr = cp->scsi_smsg;
5050 msgptr[msglen++] = IDENTIFY(can_disconnect, sdev->lun);
5053 * Build the tag message if present.
5055 if (cp->tag != NO_TAG) {
5056 u_char order = cp->order;
5064 order = M_SIMPLE_TAG;
5066 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
5068 * Avoid too much reordering of SCSI commands.
5069 * The algorithm tries to prevent completion of any
5070 * tagged command from being delayed against more
5071 * than 3 times the max number of queued commands.
5073 if (lp && lp->tags_since > 3*SYM_CONF_MAX_TAG) {
5074 lp->tags_si = !(lp->tags_si);
5075 if (lp->tags_sum[lp->tags_si]) {
5076 order = M_ORDERED_TAG;
5077 if ((DEBUG_FLAGS & DEBUG_TAGS)||sym_verbose>1) {
5079 "ordered tag forced.\n");
5085 msgptr[msglen++] = order;
5088 * For less than 128 tags, actual tags are numbered
5089 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
5090 * with devices that have problems with #TAG 0 or too
5091 * great #TAG numbers. For more tags (up to 256),
5092 * we use directly our tag number.
5094 #if SYM_CONF_MAX_TASK > (512/4)
5095 msgptr[msglen++] = cp->tag;
5097 msgptr[msglen++] = (cp->tag << 1) + 1;
5102 * Build a negotiation message if needed.
5103 * (nego_status is filled by sym_prepare_nego())
5105 cp->nego_status = 0;
5106 if (tp->tgoal.check_nego && !tp->nego_cp && lp) {
5107 msglen += sym_prepare_nego(np, cp, msgptr + msglen);
5113 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select));
5114 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA(np, resel_dsa));
5119 cp->phys.select.sel_id = cp->target;
5120 cp->phys.select.sel_scntl3 = tp->head.wval;
5121 cp->phys.select.sel_sxfer = tp->head.sval;
5122 cp->phys.select.sel_scntl4 = tp->head.uval;
5127 cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg);
5128 cp->phys.smsg.size = cpu_to_scr(msglen);
5133 cp->host_xflags = 0;
5134 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
5135 cp->ssss_status = S_ILLEGAL;
5136 cp->xerr_status = 0;
5138 cp->extra_bytes = 0;
5141 * extreme data pointer.
5142 * shall be positive, so -1 is lower than lowest.:)
5148 * Build the CDB and DATA descriptor block
5151 return sym_setup_data_and_start(np, cmd, cp);
5155 * Reset a SCSI target (all LUNs of this target).
5157 int sym_reset_scsi_target(struct sym_hcb *np, int target)
5161 if (target == np->myaddr || (u_int)target >= SYM_CONF_MAX_TARGET)
5164 tp = &np->target[target];
5167 np->istat_sem = SEM;
5168 OUTB(np, nc_istat, SIGP|SEM);
5176 static int sym_abort_ccb(struct sym_hcb *np, struct sym_ccb *cp, int timed_out)
5179 * Check that the IO is active.
5181 if (!cp || !cp->host_status || cp->host_status == HS_WAIT)
5185 * If a previous abort didn't succeed in time,
5186 * perform a BUS reset.
5189 sym_reset_scsi_bus(np, 1);
5194 * Mark the CCB for abort and allow time for.
5196 cp->to_abort = timed_out ? 2 : 1;
5199 * Tell the SCRIPTS processor to stop and synchronize with us.
5201 np->istat_sem = SEM;
5202 OUTB(np, nc_istat, SIGP|SEM);
5206 int sym_abort_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, int timed_out)
5212 * Look up our CCB control block.
5215 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5216 struct sym_ccb *cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5217 if (cp2->cmd == cmd) {
5223 return sym_abort_ccb(np, cp, timed_out);
5227 * Complete execution of a SCSI command with extended
5228 * error, SCSI status error, or having been auto-sensed.
5230 * The SCRIPTS processor is not running there, so we
5231 * can safely access IO registers and remove JOBs from
5233 * SCRATCHA is assumed to have been loaded with STARTPOS
5234 * before the SCRIPTS called the C code.
5236 void sym_complete_error(struct sym_hcb *np, struct sym_ccb *cp)
5238 struct scsi_device *sdev;
5239 struct scsi_cmnd *cmd;
5246 * Paranoid check. :)
5248 if (!cp || !cp->cmd)
5253 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
5254 dev_info(&sdev->sdev_gendev, "CCB=%p STAT=%x/%x/%x\n", cp,
5255 cp->host_status, cp->ssss_status, cp->host_flags);
5259 * Get target and lun pointers.
5261 tp = &np->target[cp->target];
5262 lp = sym_lp(tp, sdev->lun);
5265 * Check for extended errors.
5267 if (cp->xerr_status) {
5269 sym_print_xerr(cmd, cp->xerr_status);
5270 if (cp->host_status == HS_COMPLETE)
5271 cp->host_status = HS_COMP_ERR;
5275 * Calculate the residual.
5277 resid = sym_compute_residual(np, cp);
5279 if (!SYM_SETUP_RESIDUAL_SUPPORT) {/* If user does not want residuals */
5280 resid = 0; /* throw them away. :) */
5285 printf("XXXX RESID= %d - 0x%x\n", resid, resid);
5289 * Dequeue all queued CCBs for that device
5290 * not yet started by SCRIPTS.
5292 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
5293 i = sym_dequeue_from_squeue(np, i, cp->target, sdev->lun, -1);
5296 * Restart the SCRIPTS processor.
5298 OUTL_DSP(np, SCRIPTA_BA(np, start));
5300 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5301 if (cp->host_status == HS_COMPLETE &&
5302 cp->ssss_status == S_QUEUE_FULL) {
5303 if (!lp || lp->started_tags - i < 2)
5306 * Decrease queue depth as needed.
5308 lp->started_max = lp->started_tags - i - 1;
5311 if (sym_verbose >= 2) {
5312 sym_print_addr(cmd, " queue depth is now %d\n",
5319 cp->host_status = HS_BUSY;
5320 cp->ssss_status = S_ILLEGAL;
5323 * Let's requeue it to device.
5325 sym_set_cam_status(cmd, DID_SOFT_ERROR);
5331 * Build result in CAM ccb.
5333 sym_set_cam_result_error(np, cp, resid);
5335 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5339 * Add this one to the COMP queue.
5341 sym_remque(&cp->link_ccbq);
5342 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
5345 * Complete all those commands with either error
5346 * or requeue condition.
5348 sym_flush_comp_queue(np, 0);
5350 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5352 * Donnot start more than 1 command after an error.
5354 sym_start_next_ccbs(np, lp, 1);
5359 * Complete execution of a successful SCSI command.
5361 * Only successful commands go to the DONE queue,
5362 * since we need to have the SCRIPTS processor
5363 * stopped on any error condition.
5364 * The SCRIPTS processor is running while we are
5365 * completing successful commands.
5367 void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp)
5371 struct scsi_cmnd *cmd;
5375 * Paranoid check. :)
5377 if (!cp || !cp->cmd)
5379 assert (cp->host_status == HS_COMPLETE);
5387 * Get target and lun pointers.
5389 tp = &np->target[cp->target];
5390 lp = sym_lp(tp, cp->lun);
5393 * If all data have been transferred, given than no
5394 * extended error did occur, there is no residual.
5397 if (cp->phys.head.lastp != cp->goalp)
5398 resid = sym_compute_residual(np, cp);
5401 * Wrong transfer residuals may be worse than just always
5402 * returning zero. User can disable this feature in
5403 * sym53c8xx.h. Residual support is enabled by default.
5405 if (!SYM_SETUP_RESIDUAL_SUPPORT)
5409 printf("XXXX RESID= %d - 0x%x\n", resid, resid);
5413 * Build result in CAM ccb.
5415 sym_set_cam_result_ok(cp, cmd, resid);
5417 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5419 * If max number of started ccbs had been reduced,
5420 * increase it if 200 good status received.
5422 if (lp && lp->started_max < lp->started_limit) {
5424 if (lp->num_sgood >= 200) {
5427 if (sym_verbose >= 2) {
5428 sym_print_addr(cmd, " queue depth is now %d\n",
5438 sym_free_ccb (np, cp);
5440 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5442 * Requeue a couple of awaiting scsi commands.
5444 if (!sym_que_empty(&lp->waiting_ccbq))
5445 sym_start_next_ccbs(np, lp, 2);
5448 * Complete the command.
5450 sym_xpt_done(np, cmd);
5454 * Soft-attach the controller.
5456 int sym_hcb_attach(struct Scsi_Host *shost, struct sym_fw *fw, struct sym_nvram *nvram)
5458 struct sym_hcb *np = sym_get_hcb(shost);
5462 * Get some info about the firmware.
5464 np->scripta_sz = fw->a_size;
5465 np->scriptb_sz = fw->b_size;
5466 np->scriptz_sz = fw->z_size;
5467 np->fw_setup = fw->setup;
5468 np->fw_patch = fw->patch;
5469 np->fw_name = fw->name;
5472 * Save setting of some IO registers, so we will
5473 * be able to probe specific implementations.
5475 sym_save_initial_setting (np);
5478 * Reset the chip now, since it has been reported
5479 * that SCSI clock calibration may not work properly
5480 * if the chip is currently active.
5485 * Prepare controller and devices settings, according
5486 * to chip features, user set-up and driver set-up.
5488 sym_prepare_setting(shost, np, nvram);
5491 * Check the PCI clock frequency.
5492 * Must be performed after prepare_setting since it destroys
5493 * STEST1 that is used to probe for the clock doubler.
5495 i = sym_getpciclock(np);
5496 if (i > 37000 && !(np->features & FE_66MHZ))
5497 printf("%s: PCI BUS clock seems too high: %u KHz.\n",
5501 * Allocate the start queue.
5503 np->squeue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
5506 np->squeue_ba = vtobus(np->squeue);
5509 * Allocate the done queue.
5511 np->dqueue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
5514 np->dqueue_ba = vtobus(np->dqueue);
5517 * Allocate the target bus address array.
5519 np->targtbl = sym_calloc_dma(256, "TARGTBL");
5522 np->targtbl_ba = vtobus(np->targtbl);
5525 * Allocate SCRIPTS areas.
5527 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
5528 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
5529 np->scriptz0 = sym_calloc_dma(np->scriptz_sz, "SCRIPTZ0");
5530 if (!np->scripta0 || !np->scriptb0 || !np->scriptz0)
5534 * Allocate the array of lists of CCBs hashed by DSA.
5536 np->ccbh = kcalloc(sizeof(struct sym_ccb **), CCB_HASH_SIZE, GFP_KERNEL);
5541 * Initialyze the CCB free and busy queues.
5543 sym_que_init(&np->free_ccbq);
5544 sym_que_init(&np->busy_ccbq);
5545 sym_que_init(&np->comp_ccbq);
5548 * Initialization for optional handling
5549 * of device queueing.
5551 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5552 sym_que_init(&np->dummy_ccbq);
5555 * Allocate some CCB. We need at least ONE.
5557 if (!sym_alloc_ccb(np))
5561 * Calculate BUS addresses where we are going
5562 * to load the SCRIPTS.
5564 np->scripta_ba = vtobus(np->scripta0);
5565 np->scriptb_ba = vtobus(np->scriptb0);
5566 np->scriptz_ba = vtobus(np->scriptz0);
5569 np->scripta_ba = np->ram_ba;
5570 if (np->features & FE_RAM8K) {
5572 np->scriptb_ba = np->scripta_ba + 4096;
5573 #if 0 /* May get useful for 64 BIT PCI addressing */
5574 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
5582 * Copy scripts to controller instance.
5584 memcpy(np->scripta0, fw->a_base, np->scripta_sz);
5585 memcpy(np->scriptb0, fw->b_base, np->scriptb_sz);
5586 memcpy(np->scriptz0, fw->z_base, np->scriptz_sz);
5589 * Setup variable parts in scripts and compute
5590 * scripts bus addresses used from the C code.
5592 np->fw_setup(np, fw);
5595 * Bind SCRIPTS with physical addresses usable by the
5596 * SCRIPTS processor (as seen from the BUS = BUS addresses).
5598 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
5599 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
5600 sym_fw_bind_script(np, (u32 *) np->scriptz0, np->scriptz_sz);
5602 #ifdef SYM_CONF_IARB_SUPPORT
5604 * If user wants IARB to be set when we win arbitration
5605 * and have other jobs, compute the max number of consecutive
5606 * settings of IARB hints before we leave devices a chance to
5607 * arbitrate for reselection.
5609 #ifdef SYM_SETUP_IARB_MAX
5610 np->iarb_max = SYM_SETUP_IARB_MAX;
5617 * Prepare the idle and invalid task actions.
5619 np->idletask.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5620 np->idletask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5621 np->idletask_ba = vtobus(&np->idletask);
5623 np->notask.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5624 np->notask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5625 np->notask_ba = vtobus(&np->notask);
5627 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5628 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5629 np->bad_itl_ba = vtobus(&np->bad_itl);
5631 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5632 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA(np,bad_i_t_l_q));
5633 np->bad_itlq_ba = vtobus(&np->bad_itlq);
5636 * Allocate and prepare the lun JUMP table that is used
5637 * for a target prior the probing of devices (bad lun table).
5638 * A private table will be allocated for the target on the
5639 * first INQUIRY response received.
5641 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
5645 np->badlun_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
5646 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
5647 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
5650 * Prepare the bus address array that contains the bus
5651 * address of each target control block.
5652 * For now, assume all logical units are wrong. :)
5654 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
5655 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
5656 np->target[i].head.luntbl_sa =
5657 cpu_to_scr(vtobus(np->badluntbl));
5658 np->target[i].head.lun0_sa =
5659 cpu_to_scr(vtobus(&np->badlun_sa));
5663 * Now check the cache handling of the pci chipset.
5665 if (sym_snooptest (np)) {
5666 printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np));
5671 * Sigh! we are done.
5680 * Free everything that has been allocated for this device.
5682 void sym_hcb_free(struct sym_hcb *np)
5690 sym_mfree_dma(np->scriptz0, np->scriptz_sz, "SCRIPTZ0");
5692 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
5694 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
5696 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
5698 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
5701 while ((qp = sym_remque_head(&np->free_ccbq)) != 0) {
5702 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5703 sym_mfree_dma(cp, sizeof(*cp), "CCB");
5709 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
5711 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
5712 tp = &np->target[target];
5713 #if SYM_CONF_MAX_LUN > 1
5718 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
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