1 #ifndef _ASM_IA64_SN_SN_SAL_H
2 #define _ASM_IA64_SN_SN_SAL_H
5 * System Abstraction Layer definitions for IA64
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
11 * Copyright (c) 2000-2006 Silicon Graphics, Inc. All rights reserved.
16 #include <asm/sn/sn_cpuid.h>
17 #include <asm/sn/arch.h>
18 #include <asm/sn/geo.h>
19 #include <asm/sn/nodepda.h>
20 #include <asm/sn/shub_mmr.h>
23 #define SN_SAL_POD_MODE 0x02000001
24 #define SN_SAL_SYSTEM_RESET 0x02000002
25 #define SN_SAL_PROBE 0x02000003
26 #define SN_SAL_GET_MASTER_NASID 0x02000004
27 #define SN_SAL_GET_KLCONFIG_ADDR 0x02000005
28 #define SN_SAL_LOG_CE 0x02000006
29 #define SN_SAL_REGISTER_CE 0x02000007
30 #define SN_SAL_GET_PARTITION_ADDR 0x02000009
31 #define SN_SAL_XP_ADDR_REGION 0x0200000f
32 #define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010
33 #define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011
34 #define SN_SAL_PRINT_ERROR 0x02000012
35 #define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant
36 #define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant
37 #define SN_SAL_GET_SAPIC_INFO 0x0200001d
38 #define SN_SAL_GET_SN_INFO 0x0200001e
39 #define SN_SAL_CONSOLE_PUTC 0x02000021
40 #define SN_SAL_CONSOLE_GETC 0x02000022
41 #define SN_SAL_CONSOLE_PUTS 0x02000023
42 #define SN_SAL_CONSOLE_GETS 0x02000024
43 #define SN_SAL_CONSOLE_GETS_TIMEOUT 0x02000025
44 #define SN_SAL_CONSOLE_POLL 0x02000026
45 #define SN_SAL_CONSOLE_INTR 0x02000027
46 #define SN_SAL_CONSOLE_PUTB 0x02000028
47 #define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a
48 #define SN_SAL_CONSOLE_READC 0x0200002b
49 #define SN_SAL_SYSCTL_OP 0x02000030
50 #define SN_SAL_SYSCTL_MODID_GET 0x02000031
51 #define SN_SAL_SYSCTL_GET 0x02000032
52 #define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033
53 #define SN_SAL_SYSCTL_IO_PORTSPEED_GET 0x02000035
54 #define SN_SAL_SYSCTL_SLAB_GET 0x02000036
55 #define SN_SAL_BUS_CONFIG 0x02000037
56 #define SN_SAL_SYS_SERIAL_GET 0x02000038
57 #define SN_SAL_PARTITION_SERIAL_GET 0x02000039
58 #define SN_SAL_SYSCTL_PARTITION_GET 0x0200003a
59 #define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b
60 #define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c
61 #define SN_SAL_COHERENCE 0x0200003d
62 #define SN_SAL_MEMPROTECT 0x0200003e
63 #define SN_SAL_SYSCTL_FRU_CAPTURE 0x0200003f
65 #define SN_SAL_SYSCTL_IOBRICK_PCI_OP 0x02000042 // reentrant
66 #define SN_SAL_IROUTER_OP 0x02000043
67 #define SN_SAL_SYSCTL_EVENT 0x02000044
68 #define SN_SAL_IOIF_INTERRUPT 0x0200004a
69 #define SN_SAL_HWPERF_OP 0x02000050 // lock
70 #define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051
71 #define SN_SAL_IOIF_PCI_SAFE 0x02000052
72 #define SN_SAL_IOIF_SLOT_ENABLE 0x02000053
73 #define SN_SAL_IOIF_SLOT_DISABLE 0x02000054
74 #define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055
75 #define SN_SAL_IOIF_GET_PCIBUS_INFO 0x02000056
76 #define SN_SAL_IOIF_GET_PCIDEV_INFO 0x02000057
77 #define SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST 0x02000058 // deprecated
78 #define SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST 0x0200005a
80 #define SN_SAL_IOIF_INIT 0x0200005f
81 #define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060
82 #define SN_SAL_BTE_RECOVER 0x02000061
83 #define SN_SAL_RESERVED_DO_NOT_USE 0x02000062
84 #define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000064
86 #define SN_SAL_GET_PROM_FEATURE_SET 0x02000065
87 #define SN_SAL_SET_OS_FEATURE_SET 0x02000066
88 #define SN_SAL_INJECT_ERROR 0x02000067
89 #define SN_SAL_SET_CPU_NUMBER 0x02000068
91 #define SN_SAL_KERNEL_LAUNCH_EVENT 0x02000069
94 * Service-specific constants
97 /* Console interrupt manipulation */
99 #define SAL_CONSOLE_INTR_OFF 0 /* turn the interrupt off */
100 #define SAL_CONSOLE_INTR_ON 1 /* turn the interrupt on */
101 #define SAL_CONSOLE_INTR_STATUS 2 /* retrieve the interrupt status */
102 /* interrupt specification & status return codes */
103 #define SAL_CONSOLE_INTR_XMIT 1 /* output interrupt */
104 #define SAL_CONSOLE_INTR_RECV 2 /* input interrupt */
106 /* interrupt handling */
107 #define SAL_INTR_ALLOC 1
108 #define SAL_INTR_FREE 2
111 * operations available on the generic SN_SAL_SYSCTL_OP
114 #define SAL_SYSCTL_OP_IOBOARD 0x0001 /* retrieve board type */
115 #define SAL_SYSCTL_OP_TIO_JLCK_RST 0x0002 /* issue TIO clock reset */
118 * IRouter (i.e. generalized system controller) operations
120 #define SAL_IROUTER_OPEN 0 /* open a subchannel */
121 #define SAL_IROUTER_CLOSE 1 /* close a subchannel */
122 #define SAL_IROUTER_SEND 2 /* send part of an IRouter packet */
123 #define SAL_IROUTER_RECV 3 /* receive part of an IRouter packet */
124 #define SAL_IROUTER_INTR_STATUS 4 /* check the interrupt status for
127 #define SAL_IROUTER_INTR_ON 5 /* enable an interrupt */
128 #define SAL_IROUTER_INTR_OFF 6 /* disable an interrupt */
129 #define SAL_IROUTER_INIT 7 /* initialize IRouter driver */
131 /* IRouter interrupt mask bits */
132 #define SAL_IROUTER_INTR_XMIT SAL_CONSOLE_INTR_XMIT
133 #define SAL_IROUTER_INTR_RECV SAL_CONSOLE_INTR_RECV
136 * Error Handling Features
138 #define SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV 0x1 // obsolete
139 #define SAL_ERR_FEAT_LOG_SBES 0x2 // obsolete
140 #define SAL_ERR_FEAT_MFR_OVERRIDE 0x4
141 #define SAL_ERR_FEAT_SBE_THRESHOLD 0xffff0000
146 #define SALRET_MORE_PASSES 1
148 #define SALRET_NOT_IMPLEMENTED (-1)
149 #define SALRET_INVALID_ARG (-2)
150 #define SALRET_ERROR (-3)
152 #define SN_SAL_FAKE_PROM 0x02009999
155 * sn_sal_revision - get the SGI SAL revision number
157 * The SGI PROM stores its version in the sal_[ab]_rev_(major|minor).
158 * This routine simply extracts the major and minor values and
159 * presents them in a u32 format.
161 * For example, version 4.05 would be represented at 0x0405.
166 struct ia64_sal_systab *systab = __va(efi.sal_systab);
168 return (u32)(systab->sal_b_rev_major << 8 | systab->sal_b_rev_minor);
172 * Returns the master console nasid, if the call fails, return an illegal
176 ia64_sn_get_console_nasid(void)
178 struct ia64_sal_retval ret_stuff;
180 ret_stuff.status = 0;
184 SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_NASID, 0, 0, 0, 0, 0, 0, 0);
186 if (ret_stuff.status < 0)
187 return ret_stuff.status;
189 /* Master console nasid is in 'v0' */
194 * Returns the master baseio nasid, if the call fails, return an illegal
198 ia64_sn_get_master_baseio_nasid(void)
200 struct ia64_sal_retval ret_stuff;
202 ret_stuff.status = 0;
206 SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_BASEIO_NASID, 0, 0, 0, 0, 0, 0, 0);
208 if (ret_stuff.status < 0)
209 return ret_stuff.status;
211 /* Master baseio nasid is in 'v0' */
216 ia64_sn_get_klconfig_addr(nasid_t nasid)
218 struct ia64_sal_retval ret_stuff;
220 ret_stuff.status = 0;
224 SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0);
225 return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL;
229 * Returns the next console character.
232 ia64_sn_console_getc(int *ch)
234 struct ia64_sal_retval ret_stuff;
236 ret_stuff.status = 0;
240 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_GETC, 0, 0, 0, 0, 0, 0, 0);
242 /* character is in 'v0' */
243 *ch = (int)ret_stuff.v0;
245 return ret_stuff.status;
249 * Read a character from the SAL console device, after a previous interrupt
250 * or poll operation has given us to know that a character is available
254 ia64_sn_console_readc(void)
256 struct ia64_sal_retval ret_stuff;
258 ret_stuff.status = 0;
262 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_READC, 0, 0, 0, 0, 0, 0, 0);
264 /* character is in 'v0' */
269 * Sends the given character to the console.
272 ia64_sn_console_putc(char ch)
274 struct ia64_sal_retval ret_stuff;
276 ret_stuff.status = 0;
280 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (u64)ch, 0, 0, 0, 0, 0, 0);
282 return ret_stuff.status;
286 * Sends the given buffer to the console.
289 ia64_sn_console_putb(const char *buf, int len)
291 struct ia64_sal_retval ret_stuff;
293 ret_stuff.status = 0;
297 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (u64)buf, (u64)len, 0, 0, 0, 0, 0);
299 if ( ret_stuff.status == 0 ) {
306 * Print a platform error record
309 ia64_sn_plat_specific_err_print(int (*hook)(const char*, ...), char *rec)
311 struct ia64_sal_retval ret_stuff;
313 ret_stuff.status = 0;
317 SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (u64)hook, (u64)rec, 0, 0, 0, 0, 0);
319 return ret_stuff.status;
323 * Check for Platform errors
326 ia64_sn_plat_cpei_handler(void)
328 struct ia64_sal_retval ret_stuff;
330 ret_stuff.status = 0;
334 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_LOG_CE, 0, 0, 0, 0, 0, 0, 0);
336 return ret_stuff.status;
340 * Set Error Handling Features (Obsolete)
343 ia64_sn_plat_set_error_handling_features(void)
345 struct ia64_sal_retval ret_stuff;
347 ret_stuff.status = 0;
351 SAL_CALL_REENTRANT(ret_stuff, SN_SAL_SET_ERROR_HANDLING_FEATURES,
352 SAL_ERR_FEAT_LOG_SBES,
355 return ret_stuff.status;
359 * Checks for console input.
362 ia64_sn_console_check(int *result)
364 struct ia64_sal_retval ret_stuff;
366 ret_stuff.status = 0;
370 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_POLL, 0, 0, 0, 0, 0, 0, 0);
372 /* result is in 'v0' */
373 *result = (int)ret_stuff.v0;
375 return ret_stuff.status;
379 * Checks console interrupt status
382 ia64_sn_console_intr_status(void)
384 struct ia64_sal_retval ret_stuff;
386 ret_stuff.status = 0;
390 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
391 0, SAL_CONSOLE_INTR_STATUS,
394 if (ret_stuff.status == 0) {
402 * Enable an interrupt on the SAL console device.
405 ia64_sn_console_intr_enable(u64 intr)
407 struct ia64_sal_retval ret_stuff;
409 ret_stuff.status = 0;
413 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
414 intr, SAL_CONSOLE_INTR_ON,
419 * Disable an interrupt on the SAL console device.
422 ia64_sn_console_intr_disable(u64 intr)
424 struct ia64_sal_retval ret_stuff;
426 ret_stuff.status = 0;
430 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
431 intr, SAL_CONSOLE_INTR_OFF,
436 * Sends a character buffer to the console asynchronously.
439 ia64_sn_console_xmit_chars(char *buf, int len)
441 struct ia64_sal_retval ret_stuff;
443 ret_stuff.status = 0;
447 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_XMIT_CHARS,
451 if (ret_stuff.status == 0) {
459 * Returns the iobrick module Id
462 ia64_sn_sysctl_iobrick_module_get(nasid_t nasid, int *result)
464 struct ia64_sal_retval ret_stuff;
466 ret_stuff.status = 0;
470 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYSCTL_IOBRICK_MODULE_GET, nasid, 0, 0, 0, 0, 0, 0);
472 /* result is in 'v0' */
473 *result = (int)ret_stuff.v0;
475 return ret_stuff.status;
479 * ia64_sn_pod_mode - call the SN_SAL_POD_MODE function
481 * SN_SAL_POD_MODE actually takes an argument, but it's always
482 * 0 when we call it from the kernel, so we don't have to expose
486 ia64_sn_pod_mode(void)
488 struct ia64_sal_retval isrv;
489 SAL_CALL_REENTRANT(isrv, SN_SAL_POD_MODE, 0, 0, 0, 0, 0, 0, 0);
496 * ia64_sn_probe_mem - read from memory safely
497 * @addr: address to probe
498 * @size: number bytes to read (1,2,4,8)
499 * @data_ptr: address to store value read by probe (-1 returned if probe fails)
501 * Call into the SAL to do a memory read. If the read generates a machine
502 * check, this routine will recover gracefully and return -1 to the caller.
503 * @addr is usually a kernel virtual address in uncached space (i.e. the
504 * address starts with 0xc), but if called in physical mode, @addr should
505 * be a physical address.
508 * 0 - probe successful
509 * 1 - probe failed (generated MCA)
514 ia64_sn_probe_mem(long addr, long size, void *data_ptr)
516 struct ia64_sal_retval isrv;
518 SAL_CALL(isrv, SN_SAL_PROBE, addr, size, 0, 0, 0, 0, 0);
523 *((u8*)data_ptr) = (u8)isrv.v0;
526 *((u16*)data_ptr) = (u16)isrv.v0;
529 *((u32*)data_ptr) = (u32)isrv.v0;
532 *((u64*)data_ptr) = (u64)isrv.v0;
542 * Retrieve the system serial number as an ASCII string.
545 ia64_sn_sys_serial_get(char *buf)
547 struct ia64_sal_retval ret_stuff;
548 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYS_SERIAL_GET, buf, 0, 0, 0, 0, 0, 0);
549 return ret_stuff.status;
552 extern char sn_system_serial_number_string[];
553 extern u64 sn_partition_serial_number;
556 sn_system_serial_number(void) {
557 if (sn_system_serial_number_string[0]) {
558 return(sn_system_serial_number_string);
560 ia64_sn_sys_serial_get(sn_system_serial_number_string);
561 return(sn_system_serial_number_string);
567 * Returns a unique id number for this system and partition (suitable for
568 * use with license managers), based in part on the system serial number.
571 ia64_sn_partition_serial_get(void)
573 struct ia64_sal_retval ret_stuff;
574 ia64_sal_oemcall_reentrant(&ret_stuff, SN_SAL_PARTITION_SERIAL_GET, 0,
576 if (ret_stuff.status != 0)
582 sn_partition_serial_number_val(void) {
583 if (unlikely(sn_partition_serial_number == 0)) {
584 sn_partition_serial_number = ia64_sn_partition_serial_get();
586 return sn_partition_serial_number;
590 * Returns the partition id of the nasid passed in as an argument,
591 * or INVALID_PARTID if the partition id cannot be retrieved.
593 static inline partid_t
594 ia64_sn_sysctl_partition_get(nasid_t nasid)
596 struct ia64_sal_retval ret_stuff;
597 SAL_CALL(ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid,
599 if (ret_stuff.status != 0)
601 return ((partid_t)ret_stuff.v0);
605 * Returns the physical address of the partition's reserved page through
606 * an iterative number of calls.
608 * On first call, 'cookie' and 'len' should be set to 0, and 'addr'
609 * set to the nasid of the partition whose reserved page's address is
611 * On subsequent calls, pass the values, that were passed back on the
614 * While the return status equals SALRET_MORE_PASSES, keep calling
615 * this function after first copying 'len' bytes starting at 'addr'
616 * into 'buf'. Once the return status equals SALRET_OK, 'addr' will
617 * be the physical address of the partition's reserved page. If the
618 * return status equals neither of these, an error as occurred.
621 sn_partition_reserved_page_pa(u64 buf, u64 *cookie, u64 *addr, u64 *len)
623 struct ia64_sal_retval rv;
624 ia64_sal_oemcall_reentrant(&rv, SN_SAL_GET_PARTITION_ADDR, *cookie,
625 *addr, buf, *len, 0, 0, 0);
633 * Register or unregister a physical address range being referenced across
634 * a partition boundary for which certain SAL errors should be scanned for,
635 * cleaned up and ignored. This is of value for kernel partitioning code only.
636 * Values for the operation argument:
637 * 1 = register this address range with SAL
638 * 0 = unregister this address range with SAL
640 * SAL maintains a reference count on an address range in case it is registered
643 * On success, returns the reference count of the address range after the SAL
644 * call has performed the current registration/unregistration. Returns a
645 * negative value if an error occurred.
648 sn_register_xp_addr_region(u64 paddr, u64 len, int operation)
650 struct ia64_sal_retval ret_stuff;
651 ia64_sal_oemcall(&ret_stuff, SN_SAL_XP_ADDR_REGION, paddr, len,
652 (u64)operation, 0, 0, 0, 0);
653 return ret_stuff.status;
657 * Register or unregister an instruction range for which SAL errors should
658 * be ignored. If an error occurs while in the registered range, SAL jumps
659 * to return_addr after ignoring the error. Values for the operation argument:
660 * 1 = register this instruction range with SAL
661 * 0 = unregister this instruction range with SAL
663 * Returns 0 on success, or a negative value if an error occurred.
666 sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr,
667 int virtual, int operation)
669 struct ia64_sal_retval ret_stuff;
672 call = SN_SAL_NO_FAULT_ZONE_VIRTUAL;
674 call = SN_SAL_NO_FAULT_ZONE_PHYSICAL;
676 ia64_sal_oemcall(&ret_stuff, call, start_addr, end_addr, return_addr,
678 return ret_stuff.status;
682 * Change or query the coherence domain for this partition. Each cpu-based
683 * nasid is represented by a bit in an array of 64-bit words:
684 * 0 = not in this partition's coherency domain
685 * 1 = in this partition's coherency domain
687 * It is not possible for the local system's nasids to be removed from
688 * the coherency domain. Purpose of the domain arguments:
689 * new_domain = set the coherence domain to the given nasids
690 * old_domain = return the current coherence domain
692 * Returns 0 on success, or a negative value if an error occurred.
695 sn_change_coherence(u64 *new_domain, u64 *old_domain)
697 struct ia64_sal_retval ret_stuff;
698 ia64_sal_oemcall(&ret_stuff, SN_SAL_COHERENCE, (u64)new_domain,
699 (u64)old_domain, 0, 0, 0, 0, 0);
700 return ret_stuff.status;
704 * Change memory access protections for a physical address range.
705 * nasid_array is not used on Altix, but may be in future architectures.
706 * Available memory protection access classes are defined after the function.
709 sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array)
711 struct ia64_sal_retval ret_stuff;
713 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len,
714 (u64)nasid_array, perms, 0, 0, 0);
715 return ret_stuff.status;
717 #define SN_MEMPROT_ACCESS_CLASS_0 0x14a080
718 #define SN_MEMPROT_ACCESS_CLASS_1 0x2520c2
719 #define SN_MEMPROT_ACCESS_CLASS_2 0x14a1ca
720 #define SN_MEMPROT_ACCESS_CLASS_3 0x14a290
721 #define SN_MEMPROT_ACCESS_CLASS_6 0x084080
722 #define SN_MEMPROT_ACCESS_CLASS_7 0x021080
725 * Turns off system power.
728 ia64_sn_power_down(void)
730 struct ia64_sal_retval ret_stuff;
731 SAL_CALL(ret_stuff, SN_SAL_SYSTEM_POWER_DOWN, 0, 0, 0, 0, 0, 0, 0);
738 * ia64_sn_fru_capture - tell the system controller to capture hw state
740 * This routine will call the SAL which will tell the system controller(s)
741 * to capture hw mmr information from each SHub in the system.
744 ia64_sn_fru_capture(void)
746 struct ia64_sal_retval isrv;
747 SAL_CALL(isrv, SN_SAL_SYSCTL_FRU_CAPTURE, 0, 0, 0, 0, 0, 0, 0);
754 * Performs an operation on a PCI bus or slot -- power up, power down
758 ia64_sn_sysctl_iobrick_pci_op(nasid_t n, u64 connection_type,
762 struct ia64_sal_retval rv = {0, 0, 0, 0};
764 SAL_CALL_NOLOCK(rv, SN_SAL_SYSCTL_IOBRICK_PCI_OP, connection_type, n, action,
765 bus, (u64) slot, 0, 0);
773 * Open a subchannel for sending arbitrary data to the system
774 * controller network via the system controller device associated with
775 * 'nasid'. Return the subchannel number or a negative error code.
778 ia64_sn_irtr_open(nasid_t nasid)
780 struct ia64_sal_retval rv;
781 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_OPEN, nasid,
787 * Close system controller subchannel 'subch' previously opened on 'nasid'.
790 ia64_sn_irtr_close(nasid_t nasid, int subch)
792 struct ia64_sal_retval rv;
793 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_CLOSE,
794 (u64) nasid, (u64) subch, 0, 0, 0, 0);
795 return (int) rv.status;
799 * Read data from system controller associated with 'nasid' on
800 * subchannel 'subch'. The buffer to be filled is pointed to by
801 * 'buf', and its capacity is in the integer pointed to by 'len'. The
802 * referent of 'len' is set to the number of bytes read by the SAL
803 * call. The return value is either SALRET_OK (for bytes read) or
804 * SALRET_ERROR (for error or "no data available").
807 ia64_sn_irtr_recv(nasid_t nasid, int subch, char *buf, int *len)
809 struct ia64_sal_retval rv;
810 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_RECV,
811 (u64) nasid, (u64) subch, (u64) buf, (u64) len,
813 return (int) rv.status;
817 * Write data to the system controller network via the system
818 * controller associated with 'nasid' on suchannel 'subch'. The
819 * buffer to be written out is pointed to by 'buf', and 'len' is the
820 * number of bytes to be written. The return value is either the
821 * number of bytes written (which could be zero) or a negative error
825 ia64_sn_irtr_send(nasid_t nasid, int subch, char *buf, int len)
827 struct ia64_sal_retval rv;
828 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_SEND,
829 (u64) nasid, (u64) subch, (u64) buf, (u64) len,
835 * Check whether any interrupts are pending for the system controller
836 * associated with 'nasid' and its subchannel 'subch'. The return
837 * value is a mask of pending interrupts (SAL_IROUTER_INTR_XMIT and/or
838 * SAL_IROUTER_INTR_RECV).
841 ia64_sn_irtr_intr(nasid_t nasid, int subch)
843 struct ia64_sal_retval rv;
844 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_STATUS,
845 (u64) nasid, (u64) subch, 0, 0, 0, 0);
850 * Enable the interrupt indicated by the intr parameter (either
851 * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV).
854 ia64_sn_irtr_intr_enable(nasid_t nasid, int subch, u64 intr)
856 struct ia64_sal_retval rv;
857 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_ON,
858 (u64) nasid, (u64) subch, intr, 0, 0, 0);
863 * Disable the interrupt indicated by the intr parameter (either
864 * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV).
867 ia64_sn_irtr_intr_disable(nasid_t nasid, int subch, u64 intr)
869 struct ia64_sal_retval rv;
870 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_OFF,
871 (u64) nasid, (u64) subch, intr, 0, 0, 0);
876 * Set up a node as the point of contact for system controller
877 * environmental event delivery.
880 ia64_sn_sysctl_event_init(nasid_t nasid)
882 struct ia64_sal_retval rv;
883 SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_EVENT, (u64) nasid,
889 * Ask the system controller on the specified nasid to reset
890 * the CX corelet clock. Only valid on TIO nodes.
893 ia64_sn_sysctl_tio_clock_reset(nasid_t nasid)
895 struct ia64_sal_retval rv;
896 SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_TIO_JLCK_RST,
897 nasid, 0, 0, 0, 0, 0);
899 return (int)rv.status;
907 * Get the associated ioboard type for a given nasid.
910 ia64_sn_sysctl_ioboard_get(nasid_t nasid, u16 *ioboard)
912 struct ia64_sal_retval isrv;
913 SAL_CALL_REENTRANT(isrv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD,
914 nasid, 0, 0, 0, 0, 0);
928 * ia64_sn_get_fit_compt - read a FIT entry from the PROM header
929 * @nasid: NASID of node to read
930 * @index: FIT entry index to be retrieved (0..n)
931 * @fitentry: 16 byte buffer where FIT entry will be stored.
932 * @banbuf: optional buffer for retrieving banner
933 * @banlen: length of banner buffer
935 * Access to the physical PROM chips needs to be serialized since reads and
936 * writes can't occur at the same time, so we need to call into the SAL when
937 * we want to look at the FIT entries on the chips.
941 * %SALRET_INVALID_ARG if index too big
942 * %SALRET_NOT_IMPLEMENTED if running on older PROM
943 * ??? if nasid invalid OR banner buffer not large enough
946 ia64_sn_get_fit_compt(u64 nasid, u64 index, void *fitentry, void *banbuf,
949 struct ia64_sal_retval rv;
950 SAL_CALL_NOLOCK(rv, SN_SAL_GET_FIT_COMPT, nasid, index, fitentry,
951 banbuf, banlen, 0, 0);
952 return (int) rv.status;
956 * Initialize the SAL components of the system controller
957 * communication driver; specifically pass in a sizable buffer that
958 * can be used for allocation of subchannel queues as new subchannels
959 * are opened. "buf" points to the buffer, and "len" specifies its
963 ia64_sn_irtr_init(nasid_t nasid, void *buf, int len)
965 struct ia64_sal_retval rv;
966 SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INIT,
967 (u64) nasid, (u64) buf, (u64) len, 0, 0, 0);
968 return (int) rv.status;
972 * Returns the nasid, subnode & slice corresponding to a SAPIC ID
975 * arg0 - SN_SAL_GET_SAPIC_INFO
976 * arg1 - sapicid (lid >> 16)
983 ia64_sn_get_sapic_info(int sapicid, int *nasid, int *subnode, int *slice)
985 struct ia64_sal_retval ret_stuff;
987 ret_stuff.status = 0;
991 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SAPIC_INFO, sapicid, 0, 0, 0, 0, 0, 0);
993 /***** BEGIN HACK - temp til old proms no longer supported ********/
994 if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
995 if (nasid) *nasid = sapicid & 0xfff;
996 if (subnode) *subnode = (sapicid >> 13) & 1;
997 if (slice) *slice = (sapicid >> 12) & 3;
1000 /***** END HACK *******/
1002 if (ret_stuff.status < 0)
1003 return ret_stuff.status;
1005 if (nasid) *nasid = (int) ret_stuff.v0;
1006 if (subnode) *subnode = (int) ret_stuff.v1;
1007 if (slice) *slice = (int) ret_stuff.v2;
1012 * Returns information about the HUB/SHUB.
1014 * arg0 - SN_SAL_GET_SN_INFO
1015 * arg1 - 0 (other values reserved for future use)
1018 * [7:0] - shub type (0=shub1, 1=shub2)
1019 * [15:8] - Log2 max number of nodes in entire system (includes
1020 * C-bricks, I-bricks, etc)
1021 * [23:16] - Log2 of nodes per sharing domain
1022 * [31:24] - partition ID
1023 * [39:32] - coherency_id
1024 * [47:40] - regionsize
1026 * [15:0] - nasid mask (ex., 0x7ff for 11 bit nasid)
1027 * [23:15] - bit position of low nasid bit
1030 ia64_sn_get_sn_info(int fc, u8 *shubtype, u16 *nasid_bitmask, u8 *nasid_shift,
1031 u8 *systemsize, u8 *sharing_domain_size, u8 *partid, u8 *coher, u8 *reg)
1033 struct ia64_sal_retval ret_stuff;
1035 ret_stuff.status = 0;
1039 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0);
1041 /***** BEGIN HACK - temp til old proms no longer supported ********/
1042 if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
1043 int nasid = get_sapicid() & 0xfff;
1044 #define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL
1045 #define SH_SHUB_ID_NODES_PER_BIT_SHFT 48
1046 if (shubtype) *shubtype = 0;
1047 if (nasid_bitmask) *nasid_bitmask = 0x7ff;
1048 if (nasid_shift) *nasid_shift = 38;
1049 if (systemsize) *systemsize = 10;
1050 if (sharing_domain_size) *sharing_domain_size = 8;
1051 if (partid) *partid = ia64_sn_sysctl_partition_get(nasid);
1052 if (coher) *coher = nasid >> 9;
1053 if (reg) *reg = (HUB_L((u64 *) LOCAL_MMR_ADDR(SH1_SHUB_ID)) & SH_SHUB_ID_NODES_PER_BIT_MASK) >>
1054 SH_SHUB_ID_NODES_PER_BIT_SHFT;
1057 /***** END HACK *******/
1059 if (ret_stuff.status < 0)
1060 return ret_stuff.status;
1062 if (shubtype) *shubtype = ret_stuff.v0 & 0xff;
1063 if (systemsize) *systemsize = (ret_stuff.v0 >> 8) & 0xff;
1064 if (sharing_domain_size) *sharing_domain_size = (ret_stuff.v0 >> 16) & 0xff;
1065 if (partid) *partid = (ret_stuff.v0 >> 24) & 0xff;
1066 if (coher) *coher = (ret_stuff.v0 >> 32) & 0xff;
1067 if (reg) *reg = (ret_stuff.v0 >> 40) & 0xff;
1068 if (nasid_bitmask) *nasid_bitmask = (ret_stuff.v1 & 0xffff);
1069 if (nasid_shift) *nasid_shift = (ret_stuff.v1 >> 16) & 0xff;
1074 * This is the access point to the Altix PROM hardware performance
1075 * and status monitoring interface. For info on using this, see
1076 * include/asm-ia64/sn/sn2/sn_hwperf.h
1079 ia64_sn_hwperf_op(nasid_t nasid, u64 opcode, u64 a0, u64 a1, u64 a2,
1080 u64 a3, u64 a4, int *v0)
1082 struct ia64_sal_retval rv;
1083 SAL_CALL_NOLOCK(rv, SN_SAL_HWPERF_OP, (u64)nasid,
1084 opcode, a0, a1, a2, a3, a4);
1087 return (int) rv.status;
1091 ia64_sn_ioif_get_pci_topology(u64 buf, u64 len)
1093 struct ia64_sal_retval rv;
1094 SAL_CALL_NOLOCK(rv, SN_SAL_IOIF_GET_PCI_TOPOLOGY, buf, len, 0, 0, 0, 0, 0);
1095 return (int) rv.status;
1099 * BTE error recovery is implemented in SAL
1102 ia64_sn_bte_recovery(nasid_t nasid)
1104 struct ia64_sal_retval rv;
1107 SAL_CALL_NOLOCK(rv, SN_SAL_BTE_RECOVER, (u64)nasid, 0, 0, 0, 0, 0, 0);
1108 if (rv.status == SALRET_NOT_IMPLEMENTED)
1110 return (int) rv.status;
1114 ia64_sn_is_fake_prom(void)
1116 struct ia64_sal_retval rv;
1117 SAL_CALL_NOLOCK(rv, SN_SAL_FAKE_PROM, 0, 0, 0, 0, 0, 0, 0);
1118 return (rv.status == 0);
1122 ia64_sn_get_prom_feature_set(int set, unsigned long *feature_set)
1124 struct ia64_sal_retval rv;
1126 SAL_CALL_NOLOCK(rv, SN_SAL_GET_PROM_FEATURE_SET, set, 0, 0, 0, 0, 0, 0);
1129 *feature_set = rv.v0;
1134 ia64_sn_set_os_feature(int feature)
1136 struct ia64_sal_retval rv;
1138 SAL_CALL_NOLOCK(rv, SN_SAL_SET_OS_FEATURE_SET, feature, 0, 0, 0, 0, 0, 0);
1143 sn_inject_error(u64 paddr, u64 *data, u64 *ecc)
1145 struct ia64_sal_retval ret_stuff;
1147 ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_INJECT_ERROR, paddr, (u64)data,
1148 (u64)ecc, 0, 0, 0, 0);
1149 return ret_stuff.status;
1153 ia64_sn_set_cpu_number(int cpu)
1155 struct ia64_sal_retval rv;
1157 SAL_CALL_NOLOCK(rv, SN_SAL_SET_CPU_NUMBER, cpu, 0, 0, 0, 0, 0, 0);
1161 ia64_sn_kernel_launch_event(void)
1163 struct ia64_sal_retval rv;
1164 SAL_CALL_NOLOCK(rv, SN_SAL_KERNEL_LAUNCH_EVENT, 0, 0, 0, 0, 0, 0, 0);
1167 #endif /* _ASM_IA64_SN_SN_SAL_H */