git.oblomov.eu Git - linux-2.6/blob - drivers/char/pcmcia/synclink_cs.c

   1 /*
   2  * linux/drivers/char/pcmcia/synclink_cs.c
   3  *
   4  * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
   5  *
   6  * Device driver for Microgate SyncLink PC Card
   7  * multiprotocol serial adapter.
   8  *
   9  * written by Paul Fulghum for Microgate Corporation
  10  * paulkf@microgate.com
  11  *
  12  * Microgate and SyncLink are trademarks of Microgate Corporation
  13  *
  14  * This code is released under the GNU General Public License (GPL)
  15  *
  16  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26  * OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  30 #if defined(__i386__)
  31 #  define BREAKPOINT() asm("   int $3");
  32 #else
  33 #  define BREAKPOINT() { }
  34 #endif
  35
  36 #define MAX_DEVICE_COUNT 4
  37
  38 #include <linux/module.h>
  39 #include <linux/errno.h>
  40 #include <linux/signal.h>
  41 #include <linux/sched.h>
  42 #include <linux/timer.h>
  43 #include <linux/time.h>
  44 #include <linux/interrupt.h>
  45 #include <linux/tty.h>
  46 #include <linux/tty_flip.h>
  47 #include <linux/serial.h>
  48 #include <linux/major.h>
  49 #include <linux/string.h>
  50 #include <linux/fcntl.h>
  51 #include <linux/ptrace.h>
  52 #include <linux/ioport.h>
  53 #include <linux/mm.h>
  54 #include <linux/seq_file.h>
  55 #include <linux/slab.h>
  56 #include <linux/netdevice.h>
  57 #include <linux/vmalloc.h>
  58 #include <linux/init.h>
  59 #include <linux/delay.h>
  60 #include <linux/ioctl.h>
  61 #include <linux/synclink.h>
  62
  63 #include <asm/system.h>
  64 #include <asm/io.h>
  65 #include <asm/irq.h>
  66 #include <asm/dma.h>
  67 #include <linux/bitops.h>
  68 #include <asm/types.h>
  69 #include <linux/termios.h>
  70 #include <linux/workqueue.h>
  71 #include <linux/hdlc.h>
  72
  73 #include <pcmcia/cs_types.h>
  74 #include <pcmcia/cs.h>
  75 #include <pcmcia/cistpl.h>
  76 #include <pcmcia/cisreg.h>
  77 #include <pcmcia/ds.h>
  78
  79 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  80 #define SYNCLINK_GENERIC_HDLC 1
  81 #else
  82 #define SYNCLINK_GENERIC_HDLC 0
  83 #endif
  84
  85 #define GET_USER(error,value,addr) error = get_user(value,addr)
  86 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  87 #define PUT_USER(error,value,addr) error = put_user(value,addr)
  88 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  89
  90 #include <asm/uaccess.h>
  91
  92 static MGSL_PARAMS default_params = {
  93         MGSL_MODE_HDLC,                 /* unsigned long mode */
  94         0,                              /* unsigned char loopback; */
  95         HDLC_FLAG_UNDERRUN_ABORT15,     /* unsigned short flags; */
  96         HDLC_ENCODING_NRZI_SPACE,       /* unsigned char encoding; */
  97         0,                              /* unsigned long clock_speed; */
  98         0xff,                           /* unsigned char addr_filter; */
  99         HDLC_CRC_16_CCITT,              /* unsigned short crc_type; */
 100         HDLC_PREAMBLE_LENGTH_8BITS,     /* unsigned char preamble_length; */
 101         HDLC_PREAMBLE_PATTERN_NONE,     /* unsigned char preamble; */
 102         9600,                           /* unsigned long data_rate; */
 103         8,                              /* unsigned char data_bits; */
 104         1,                              /* unsigned char stop_bits; */
 105         ASYNC_PARITY_NONE               /* unsigned char parity; */
 106 };
 107
 108 typedef struct
 109 {
 110         int count;
 111         unsigned char status;
 112         char data[1];
 113 } RXBUF;
 114
 115 /* The queue of BH actions to be performed */
 116
 117 #define BH_RECEIVE  1
 118 #define BH_TRANSMIT 2
 119 #define BH_STATUS   4
 120
 121 #define IO_PIN_SHUTDOWN_LIMIT 100
 122
 123 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 124
 125 struct _input_signal_events {
 126         int     ri_up;
 127         int     ri_down;
 128         int     dsr_up;
 129         int     dsr_down;
 130         int     dcd_up;
 131         int     dcd_down;
 132         int     cts_up;
 133         int     cts_down;
 134 };
 135
 136
 137 /*
 138  * Device instance data structure
 139  */
 140
 141 typedef struct _mgslpc_info {
 142         struct tty_port         port;
 143         void *if_ptr;   /* General purpose pointer (used by SPPP) */
 144         int                     magic;
 145         int                     line;
 146
 147         struct mgsl_icount      icount;
 148
 149         int                     timeout;
 150         int                     x_char;         /* xon/xoff character */
 151         unsigned char           read_status_mask;
 152         unsigned char           ignore_status_mask;
 153
 154         unsigned char *tx_buf;
 155         int            tx_put;
 156         int            tx_get;
 157         int            tx_count;
 158
 159         /* circular list of fixed length rx buffers */
 160
 161         unsigned char  *rx_buf;        /* memory allocated for all rx buffers */
 162         int            rx_buf_total_size; /* size of memory allocated for rx buffers */
 163         int            rx_put;         /* index of next empty rx buffer */
 164         int            rx_get;         /* index of next full rx buffer */
 165         int            rx_buf_size;    /* size in bytes of single rx buffer */
 166         int            rx_buf_count;   /* total number of rx buffers */
 167         int            rx_frame_count; /* number of full rx buffers */
 168
 169         wait_queue_head_t       status_event_wait_q;
 170         wait_queue_head_t       event_wait_q;
 171         struct timer_list       tx_timer;       /* HDLC transmit timeout timer */
 172         struct _mgslpc_info     *next_device;   /* device list link */
 173
 174         unsigned short imra_value;
 175         unsigned short imrb_value;
 176         unsigned char  pim_value;
 177
 178         spinlock_t lock;
 179         struct work_struct task;                /* task structure for scheduling bh */
 180
 181         u32 max_frame_size;
 182
 183         u32 pending_bh;
 184
 185         bool bh_running;
 186         bool bh_requested;
 187
 188         int dcd_chkcount; /* check counts to prevent */
 189         int cts_chkcount; /* too many IRQs if a signal */
 190         int dsr_chkcount; /* is floating */
 191         int ri_chkcount;
 192
 193         bool rx_enabled;
 194         bool rx_overflow;
 195
 196         bool tx_enabled;
 197         bool tx_active;
 198         bool tx_aborting;
 199         u32 idle_mode;
 200
 201         int if_mode; /* serial interface selection (RS-232, v.35 etc) */
 202
 203         char device_name[25];           /* device instance name */
 204
 205         unsigned int io_base;   /* base I/O address of adapter */
 206         unsigned int irq_level;
 207
 208         MGSL_PARAMS params;             /* communications parameters */
 209
 210         unsigned char serial_signals;   /* current serial signal states */
 211
 212         bool irq_occurred;              /* for diagnostics use */
 213         char testing_irq;
 214         unsigned int init_error;        /* startup error (DIAGS)        */
 215
 216         char flag_buf[MAX_ASYNC_BUFFER_SIZE];
 217         bool drop_rts_on_tx_done;
 218
 219         struct  _input_signal_events    input_signal_events;
 220
 221         /* PCMCIA support */
 222         struct pcmcia_device    *p_dev;
 223         dev_node_t            node;
 224         int                   stop;
 225
 226         /* SPPP/Cisco HDLC device parts */
 227         int netcount;
 228         spinlock_t netlock;
 229
 230 #if SYNCLINK_GENERIC_HDLC
 231         struct net_device *netdev;
 232 #endif
 233
 234 } MGSLPC_INFO;
 235
 236 #define MGSLPC_MAGIC 0x5402
 237
 238 /*
 239  * The size of the serial xmit buffer is 1 page, or 4096 bytes
 240  */
 241 #define TXBUFSIZE 4096
 242
 243
 244 #define CHA     0x00   /* channel A offset */
 245 #define CHB     0x40   /* channel B offset */
 246
 247 /*
 248  *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
 249  */
 250 #undef PVR
 251
 252 #define RXFIFO  0
 253 #define TXFIFO  0
 254 #define STAR    0x20
 255 #define CMDR    0x20
 256 #define RSTA    0x21
 257 #define PRE     0x21
 258 #define MODE    0x22
 259 #define TIMR    0x23
 260 #define XAD1    0x24
 261 #define XAD2    0x25
 262 #define RAH1    0x26
 263 #define RAH2    0x27
 264 #define DAFO    0x27
 265 #define RAL1    0x28
 266 #define RFC     0x28
 267 #define RHCR    0x29
 268 #define RAL2    0x29
 269 #define RBCL    0x2a
 270 #define XBCL    0x2a
 271 #define RBCH    0x2b
 272 #define XBCH    0x2b
 273 #define CCR0    0x2c
 274 #define CCR1    0x2d
 275 #define CCR2    0x2e
 276 #define CCR3    0x2f
 277 #define VSTR    0x34
 278 #define BGR     0x34
 279 #define RLCR    0x35
 280 #define AML     0x36
 281 #define AMH     0x37
 282 #define GIS     0x38
 283 #define IVA     0x38
 284 #define IPC     0x39
 285 #define ISR     0x3a
 286 #define IMR     0x3a
 287 #define PVR     0x3c
 288 #define PIS     0x3d
 289 #define PIM     0x3d
 290 #define PCR     0x3e
 291 #define CCR4    0x3f
 292
 293 // IMR/ISR
 294
 295 #define IRQ_BREAK_ON    BIT15   // rx break detected
 296 #define IRQ_DATAOVERRUN BIT14   // receive data overflow
 297 #define IRQ_ALLSENT     BIT13   // all sent
 298 #define IRQ_UNDERRUN    BIT12   // transmit data underrun
 299 #define IRQ_TIMER       BIT11   // timer interrupt
 300 #define IRQ_CTS         BIT10   // CTS status change
 301 #define IRQ_TXREPEAT    BIT9    // tx message repeat
 302 #define IRQ_TXFIFO      BIT8    // transmit pool ready
 303 #define IRQ_RXEOM       BIT7    // receive message end
 304 #define IRQ_EXITHUNT    BIT6    // receive frame start
 305 #define IRQ_RXTIME      BIT6    // rx char timeout
 306 #define IRQ_DCD         BIT2    // carrier detect status change
 307 #define IRQ_OVERRUN     BIT1    // receive frame overflow
 308 #define IRQ_RXFIFO      BIT0    // receive pool full
 309
 310 // STAR
 311
 312 #define XFW   BIT6              // transmit FIFO write enable
 313 #define CEC   BIT2              // command executing
 314 #define CTS   BIT1              // CTS state
 315
 316 #define PVR_DTR      BIT0
 317 #define PVR_DSR      BIT1
 318 #define PVR_RI       BIT2
 319 #define PVR_AUTOCTS  BIT3
 320 #define PVR_RS232    0x20   /* 0010b */
 321 #define PVR_V35      0xe0   /* 1110b */
 322 #define PVR_RS422    0x40   /* 0100b */
 323
 324 /* Register access functions */
 325
 326 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
 327 #define read_reg(info, reg) inb((info)->io_base + (reg))
 328
 329 #define read_reg16(info, reg) inw((info)->io_base + (reg))
 330 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
 331
 332 #define set_reg_bits(info, reg, mask) \
 333     write_reg(info, (reg), \
 334                  (unsigned char) (read_reg(info, (reg)) | (mask)))
 335 #define clear_reg_bits(info, reg, mask) \
 336     write_reg(info, (reg), \
 337                  (unsigned char) (read_reg(info, (reg)) & ~(mask)))
 338 /*
 339  * interrupt enable/disable routines
 340  */
 341 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 342 {
 343         if (channel == CHA) {
 344                 info->imra_value |= mask;
 345                 write_reg16(info, CHA + IMR, info->imra_value);
 346         } else {
 347                 info->imrb_value |= mask;
 348                 write_reg16(info, CHB + IMR, info->imrb_value);
 349         }
 350 }
 351 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
 352 {
 353         if (channel == CHA) {
 354                 info->imra_value &= ~mask;
 355                 write_reg16(info, CHA + IMR, info->imra_value);
 356         } else {
 357                 info->imrb_value &= ~mask;
 358                 write_reg16(info, CHB + IMR, info->imrb_value);
 359         }
 360 }
 361
 362 #define port_irq_disable(info, mask) \
 363   { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
 364
 365 #define port_irq_enable(info, mask) \
 366   { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
 367
 368 static void rx_start(MGSLPC_INFO *info);
 369 static void rx_stop(MGSLPC_INFO *info);
 370
 371 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
 372 static void tx_stop(MGSLPC_INFO *info);
 373 static void tx_set_idle(MGSLPC_INFO *info);
 374
 375 static void get_signals(MGSLPC_INFO *info);
 376 static void set_signals(MGSLPC_INFO *info);
 377
 378 static void reset_device(MGSLPC_INFO *info);
 379
 380 static void hdlc_mode(MGSLPC_INFO *info);
 381 static void async_mode(MGSLPC_INFO *info);
 382
 383 static void tx_timeout(unsigned long context);
 384
 385 static int carrier_raised(struct tty_port *port);
 386 static void raise_dtr_rts(struct tty_port *port);
 387
 388 #if SYNCLINK_GENERIC_HDLC
 389 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
 390 static void hdlcdev_tx_done(MGSLPC_INFO *info);
 391 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
 392 static int  hdlcdev_init(MGSLPC_INFO *info);
 393 static void hdlcdev_exit(MGSLPC_INFO *info);
 394 #endif
 395
 396 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
 397
 398 static bool register_test(MGSLPC_INFO *info);
 399 static bool irq_test(MGSLPC_INFO *info);
 400 static int adapter_test(MGSLPC_INFO *info);
 401
 402 static int claim_resources(MGSLPC_INFO *info);
 403 static void release_resources(MGSLPC_INFO *info);
 404 static void mgslpc_add_device(MGSLPC_INFO *info);
 405 static void mgslpc_remove_device(MGSLPC_INFO *info);
 406
 407 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
 408 static void rx_reset_buffers(MGSLPC_INFO *info);
 409 static int  rx_alloc_buffers(MGSLPC_INFO *info);
 410 static void rx_free_buffers(MGSLPC_INFO *info);
 411
 412 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
 413
 414 /*
 415  * Bottom half interrupt handlers
 416  */
 417 static void bh_handler(struct work_struct *work);
 418 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
 419 static void bh_status(MGSLPC_INFO *info);
 420
 421 /*
 422  * ioctl handlers
 423  */
 424 static int tiocmget(struct tty_struct *tty, struct file *file);
 425 static int tiocmset(struct tty_struct *tty, struct file *file,
 426                     unsigned int set, unsigned int clear);
 427 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
 428 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
 429 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
 430 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
 431 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
 432 static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
 433 static int tx_abort(MGSLPC_INFO *info);
 434 static int set_rxenable(MGSLPC_INFO *info, int enable);
 435 static int wait_events(MGSLPC_INFO *info, int __user *mask);
 436
 437 static MGSLPC_INFO *mgslpc_device_list = NULL;
 438 static int mgslpc_device_count = 0;
 439
 440 /*
 441  * Set this param to non-zero to load eax with the
 442  * .text section address and breakpoint on module load.
 443  * This is useful for use with gdb and add-symbol-file command.
 444  */
 445 static int break_on_load=0;
 446
 447 /*
 448  * Driver major number, defaults to zero to get auto
 449  * assigned major number. May be forced as module parameter.
 450  */
 451 static int ttymajor=0;
 452
 453 static int debug_level = 0;
 454 static int maxframe[MAX_DEVICE_COUNT] = {0,};
 455
 456 module_param(break_on_load, bool, 0);
 457 module_param(ttymajor, int, 0);
 458 module_param(debug_level, int, 0);
 459 module_param_array(maxframe, int, NULL, 0);
 460
 461 MODULE_LICENSE("GPL");
 462
 463 static char *driver_name = "SyncLink PC Card driver";
 464 static char *driver_version = "$Revision: 4.34 $";
 465
 466 static struct tty_driver *serial_driver;
 467
 468 /* number of characters left in xmit buffer before we ask for more */
 469 #define WAKEUP_CHARS 256
 470
 471 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
 472 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
 473
 474 /* PCMCIA prototypes */
 475
 476 static int mgslpc_config(struct pcmcia_device *link);
 477 static void mgslpc_release(u_long arg);
 478 static void mgslpc_detach(struct pcmcia_device *p_dev);
 479
 480 /*
 481  * 1st function defined in .text section. Calling this function in
 482  * init_module() followed by a breakpoint allows a remote debugger
 483  * (gdb) to get the .text address for the add-symbol-file command.
 484  * This allows remote debugging of dynamically loadable modules.
 485  */
 486 static void* mgslpc_get_text_ptr(void)
 487 {
 488         return mgslpc_get_text_ptr;
 489 }
 490
 491 /**
 492  * line discipline callback wrappers
 493  *
 494  * The wrappers maintain line discipline references
 495  * while calling into the line discipline.
 496  *
 497  * ldisc_receive_buf  - pass receive data to line discipline
 498  */
 499
 500 static void ldisc_receive_buf(struct tty_struct *tty,
 501                               const __u8 *data, char *flags, int count)
 502 {
 503         struct tty_ldisc *ld;
 504         if (!tty)
 505                 return;
 506         ld = tty_ldisc_ref(tty);
 507         if (ld) {
 508                 if (ld->ops->receive_buf)
 509                         ld->ops->receive_buf(tty, data, flags, count);
 510                 tty_ldisc_deref(ld);
 511         }
 512 }
 513
 514 static const struct tty_port_operations mgslpc_port_ops = {
 515         .carrier_raised = carrier_raised,
 516         .raise_dtr_rts = raise_dtr_rts
 517 };
 518
 519 static int mgslpc_probe(struct pcmcia_device *link)
 520 {
 521     MGSLPC_INFO *info;
 522     int ret;
 523
 524     if (debug_level >= DEBUG_LEVEL_INFO)
 525             printk("mgslpc_attach\n");
 526
 527     info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
 528     if (!info) {
 529             printk("Error can't allocate device instance data\n");
 530             return -ENOMEM;
 531     }
 532
 533     info->magic = MGSLPC_MAGIC;
 534     tty_port_init(&info->port);
 535     info->port.ops = &mgslpc_port_ops;
 536     INIT_WORK(&info->task, bh_handler);
 537     info->max_frame_size = 4096;
 538     info->port.close_delay = 5*HZ/10;
 539     info->port.closing_wait = 30*HZ;
 540     init_waitqueue_head(&info->status_event_wait_q);
 541     init_waitqueue_head(&info->event_wait_q);
 542     spin_lock_init(&info->lock);
 543     spin_lock_init(&info->netlock);
 544     memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
 545     info->idle_mode = HDLC_TXIDLE_FLAGS;
 546     info->imra_value = 0xffff;
 547     info->imrb_value = 0xffff;
 548     info->pim_value = 0xff;
 549
 550     info->p_dev = link;
 551     link->priv = info;
 552
 553     /* Initialize the struct pcmcia_device structure */
 554
 555     /* Interrupt setup */
 556     link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
 557     link->irq.IRQInfo1   = IRQ_LEVEL_ID;
 558     link->irq.Handler = NULL;
 559
 560     link->conf.Attributes = 0;
 561     link->conf.IntType = INT_MEMORY_AND_IO;
 562
 563     ret = mgslpc_config(link);
 564     if (ret)
 565             return ret;
 566
 567     mgslpc_add_device(info);
 568
 569     return 0;
 570 }
 571
 572 /* Card has been inserted.
 573  */
 574
 575 #define CS_CHECK(fn, ret) \
 576 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
 577
 578 static int mgslpc_config(struct pcmcia_device *link)
 579 {
 580     MGSLPC_INFO *info = link->priv;
 581     tuple_t tuple;
 582     cisparse_t parse;
 583     int last_fn, last_ret;
 584     u_char buf[64];
 585     cistpl_cftable_entry_t dflt = { 0 };
 586     cistpl_cftable_entry_t *cfg;
 587
 588     if (debug_level >= DEBUG_LEVEL_INFO)
 589             printk("mgslpc_config(0x%p)\n", link);
 590
 591     tuple.Attributes = 0;
 592     tuple.TupleData = buf;
 593     tuple.TupleDataMax = sizeof(buf);
 594     tuple.TupleOffset = 0;
 595
 596     /* get CIS configuration entry */
 597
 598     tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
 599     CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
 600
 601     cfg = &(parse.cftable_entry);
 602     CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
 603     CS_CHECK(ParseTuple, pcmcia_parse_tuple(&tuple, &parse));
 604
 605     if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
 606     if (cfg->index == 0)
 607             goto cs_failed;
 608
 609     link->conf.ConfigIndex = cfg->index;
 610     link->conf.Attributes |= CONF_ENABLE_IRQ;
 611
 612     /* IO window settings */
 613     link->io.NumPorts1 = 0;
 614     if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
 615             cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
 616             link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
 617             if (!(io->flags & CISTPL_IO_8BIT))
 618                     link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
 619             if (!(io->flags & CISTPL_IO_16BIT))
 620                     link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
 621             link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
 622             link->io.BasePort1 = io->win[0].base;
 623             link->io.NumPorts1 = io->win[0].len;
 624             CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
 625     }
 626
 627     link->conf.Attributes = CONF_ENABLE_IRQ;
 628     link->conf.IntType = INT_MEMORY_AND_IO;
 629     link->conf.ConfigIndex = 8;
 630     link->conf.Present = PRESENT_OPTION;
 631
 632     link->irq.Attributes |= IRQ_HANDLE_PRESENT;
 633     link->irq.Handler     = mgslpc_isr;
 634     link->irq.Instance    = info;
 635     CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
 636
 637     CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
 638
 639     info->io_base = link->io.BasePort1;
 640     info->irq_level = link->irq.AssignedIRQ;
 641
 642     /* add to linked list of devices */
 643     sprintf(info->node.dev_name, "mgslpc0");
 644     info->node.major = info->node.minor = 0;
 645     link->dev_node = &info->node;
 646
 647     printk(KERN_INFO "%s: index 0x%02x:",
 648            info->node.dev_name, link->conf.ConfigIndex);
 649     if (link->conf.Attributes & CONF_ENABLE_IRQ)
 650             printk(", irq %d", link->irq.AssignedIRQ);
 651     if (link->io.NumPorts1)
 652             printk(", io 0x%04x-0x%04x", link->io.BasePort1,
 653                    link->io.BasePort1+link->io.NumPorts1-1);
 654     printk("\n");
 655     return 0;
 656
 657 cs_failed:
 658     cs_error(link, last_fn, last_ret);
 659     mgslpc_release((u_long)link);
 660     return -ENODEV;
 661 }
 662
 663 /* Card has been removed.
 664  * Unregister device and release PCMCIA configuration.
 665  * If device is open, postpone until it is closed.
 666  */
 667 static void mgslpc_release(u_long arg)
 668 {
 669         struct pcmcia_device *link = (struct pcmcia_device *)arg;
 670
 671         if (debug_level >= DEBUG_LEVEL_INFO)
 672                 printk("mgslpc_release(0x%p)\n", link);
 673
 674         pcmcia_disable_device(link);
 675 }
 676
 677 static void mgslpc_detach(struct pcmcia_device *link)
 678 {
 679         if (debug_level >= DEBUG_LEVEL_INFO)
 680                 printk("mgslpc_detach(0x%p)\n", link);
 681
 682         ((MGSLPC_INFO *)link->priv)->stop = 1;
 683         mgslpc_release((u_long)link);
 684
 685         mgslpc_remove_device((MGSLPC_INFO *)link->priv);
 686 }
 687
 688 static int mgslpc_suspend(struct pcmcia_device *link)
 689 {
 690         MGSLPC_INFO *info = link->priv;
 691
 692         info->stop = 1;
 693
 694         return 0;
 695 }
 696
 697 static int mgslpc_resume(struct pcmcia_device *link)
 698 {
 699         MGSLPC_INFO *info = link->priv;
 700
 701         info->stop = 0;
 702
 703         return 0;
 704 }
 705
 706
 707 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
 708                                         char *name, const char *routine)
 709 {
 710 #ifdef MGSLPC_PARANOIA_CHECK
 711         static const char *badmagic =
 712                 "Warning: bad magic number for mgsl struct (%s) in %s\n";
 713         static const char *badinfo =
 714                 "Warning: null mgslpc_info for (%s) in %s\n";
 715
 716         if (!info) {
 717                 printk(badinfo, name, routine);
 718                 return true;
 719         }
 720         if (info->magic != MGSLPC_MAGIC) {
 721                 printk(badmagic, name, routine);
 722                 return true;
 723         }
 724 #else
 725         if (!info)
 726                 return true;
 727 #endif
 728         return false;
 729 }
 730
 731
 732 #define CMD_RXFIFO      BIT7    // release current rx FIFO
 733 #define CMD_RXRESET     BIT6    // receiver reset
 734 #define CMD_RXFIFO_READ BIT5
 735 #define CMD_START_TIMER BIT4
 736 #define CMD_TXFIFO      BIT3    // release current tx FIFO
 737 #define CMD_TXEOM       BIT1    // transmit end message
 738 #define CMD_TXRESET     BIT0    // transmit reset
 739
 740 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
 741 {
 742         int i = 0;
 743         /* wait for command completion */
 744         while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
 745                 udelay(1);
 746                 if (i++ == 1000)
 747                         return false;
 748         }
 749         return true;
 750 }
 751
 752 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
 753 {
 754         wait_command_complete(info, channel);
 755         write_reg(info, (unsigned char) (channel + CMDR), cmd);
 756 }
 757
 758 static void tx_pause(struct tty_struct *tty)
 759 {
 760         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 761         unsigned long flags;
 762
 763         if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
 764                 return;
 765         if (debug_level >= DEBUG_LEVEL_INFO)
 766                 printk("tx_pause(%s)\n",info->device_name);
 767
 768         spin_lock_irqsave(&info->lock,flags);
 769         if (info->tx_enabled)
 770                 tx_stop(info);
 771         spin_unlock_irqrestore(&info->lock,flags);
 772 }
 773
 774 static void tx_release(struct tty_struct *tty)
 775 {
 776         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
 777         unsigned long flags;
 778
 779         if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
 780                 return;
 781         if (debug_level >= DEBUG_LEVEL_INFO)
 782                 printk("tx_release(%s)\n",info->device_name);
 783
 784         spin_lock_irqsave(&info->lock,flags);
 785         if (!info->tx_enabled)
 786                 tx_start(info, tty);
 787         spin_unlock_irqrestore(&info->lock,flags);
 788 }
 789
 790 /* Return next bottom half action to perform.
 791  * or 0 if nothing to do.
 792  */
 793 static int bh_action(MGSLPC_INFO *info)
 794 {
 795         unsigned long flags;
 796         int rc = 0;
 797
 798         spin_lock_irqsave(&info->lock,flags);
 799
 800         if (info->pending_bh & BH_RECEIVE) {
 801                 info->pending_bh &= ~BH_RECEIVE;
 802                 rc = BH_RECEIVE;
 803         } else if (info->pending_bh & BH_TRANSMIT) {
 804                 info->pending_bh &= ~BH_TRANSMIT;
 805                 rc = BH_TRANSMIT;
 806         } else if (info->pending_bh & BH_STATUS) {
 807                 info->pending_bh &= ~BH_STATUS;
 808                 rc = BH_STATUS;
 809         }
 810
 811         if (!rc) {
 812                 /* Mark BH routine as complete */
 813                 info->bh_running = false;
 814                 info->bh_requested = false;
 815         }
 816
 817         spin_unlock_irqrestore(&info->lock,flags);
 818
 819         return rc;
 820 }
 821
 822 static void bh_handler(struct work_struct *work)
 823 {
 824         MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
 825         struct tty_struct *tty;
 826         int action;
 827
 828         if (!info)
 829                 return;
 830
 831         if (debug_level >= DEBUG_LEVEL_BH)
 832                 printk( "%s(%d):bh_handler(%s) entry\n",
 833                         __FILE__,__LINE__,info->device_name);
 834
 835         info->bh_running = true;
 836         tty = tty_port_tty_get(&info->port);
 837
 838         while((action = bh_action(info)) != 0) {
 839
 840                 /* Process work item */
 841                 if ( debug_level >= DEBUG_LEVEL_BH )
 842                         printk( "%s(%d):bh_handler() work item action=%d\n",
 843                                 __FILE__,__LINE__,action);
 844
 845                 switch (action) {
 846
 847                 case BH_RECEIVE:
 848                         while(rx_get_frame(info, tty));
 849                         break;
 850                 case BH_TRANSMIT:
 851                         bh_transmit(info, tty);
 852                         break;
 853                 case BH_STATUS:
 854                         bh_status(info);
 855                         break;
 856                 default:
 857                         /* unknown work item ID */
 858                         printk("Unknown work item ID=%08X!\n", action);
 859                         break;
 860                 }
 861         }
 862
 863         tty_kref_put(tty);
 864         if (debug_level >= DEBUG_LEVEL_BH)
 865                 printk( "%s(%d):bh_handler(%s) exit\n",
 866                         __FILE__,__LINE__,info->device_name);
 867 }
 868
 869 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
 870 {
 871         if (debug_level >= DEBUG_LEVEL_BH)
 872                 printk("bh_transmit() entry on %s\n", info->device_name);
 873
 874         if (tty)
 875                 tty_wakeup(tty);
 876 }
 877
 878 static void bh_status(MGSLPC_INFO *info)
 879 {
 880         info->ri_chkcount = 0;
 881         info->dsr_chkcount = 0;
 882         info->dcd_chkcount = 0;
 883         info->cts_chkcount = 0;
 884 }
 885
 886 /* eom: non-zero = end of frame */
 887 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
 888 {
 889         unsigned char data[2];
 890         unsigned char fifo_count, read_count, i;
 891         RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
 892
 893         if (debug_level >= DEBUG_LEVEL_ISR)
 894                 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
 895
 896         if (!info->rx_enabled)
 897                 return;
 898
 899         if (info->rx_frame_count >= info->rx_buf_count) {
 900                 /* no more free buffers */
 901                 issue_command(info, CHA, CMD_RXRESET);
 902                 info->pending_bh |= BH_RECEIVE;
 903                 info->rx_overflow = true;
 904                 info->icount.buf_overrun++;
 905                 return;
 906         }
 907
 908         if (eom) {
 909                 /* end of frame, get FIFO count from RBCL register */
 910                 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
 911                         fifo_count = 32;
 912         } else
 913                 fifo_count = 32;
 914
 915         do {
 916                 if (fifo_count == 1) {
 917                         read_count = 1;
 918                         data[0] = read_reg(info, CHA + RXFIFO);
 919                 } else {
 920                         read_count = 2;
 921                         *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
 922                 }
 923                 fifo_count -= read_count;
 924                 if (!fifo_count && eom)
 925                         buf->status = data[--read_count];
 926
 927                 for (i = 0; i < read_count; i++) {
 928                         if (buf->count >= info->max_frame_size) {
 929                                 /* frame too large, reset receiver and reset current buffer */
 930                                 issue_command(info, CHA, CMD_RXRESET);
 931                                 buf->count = 0;
 932                                 return;
 933                         }
 934                         *(buf->data + buf->count) = data[i];
 935                         buf->count++;
 936                 }
 937         } while (fifo_count);
 938
 939         if (eom) {
 940                 info->pending_bh |= BH_RECEIVE;
 941                 info->rx_frame_count++;
 942                 info->rx_put++;
 943                 if (info->rx_put >= info->rx_buf_count)
 944                         info->rx_put = 0;
 945         }
 946         issue_command(info, CHA, CMD_RXFIFO);
 947 }
 948
 949 static void rx_ready_async(MGSLPC_INFO *info, int tcd, struct tty_struct *tty)
 950 {
 951         unsigned char data, status, flag;
 952         int fifo_count;
 953         int work = 0;
 954         struct mgsl_icount *icount = &info->icount;
 955
 956         if (tcd) {
 957                 /* early termination, get FIFO count from RBCL register */
 958                 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
 959
 960                 /* Zero fifo count could mean 0 or 32 bytes available.
 961                  * If BIT5 of STAR is set then at least 1 byte is available.
 962                  */
 963                 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
 964                         fifo_count = 32;
 965         } else
 966                 fifo_count = 32;
 967
 968         tty_buffer_request_room(tty, fifo_count);
 969         /* Flush received async data to receive data buffer. */
 970         while (fifo_count) {
 971                 data   = read_reg(info, CHA + RXFIFO);
 972                 status = read_reg(info, CHA + RXFIFO);
 973                 fifo_count -= 2;
 974
 975                 icount->rx++;
 976                 flag = TTY_NORMAL;
 977
 978                 // if no frameing/crc error then save data
 979                 // BIT7:parity error
 980                 // BIT6:framing error
 981
 982                 if (status & (BIT7 + BIT6)) {
 983                         if (status & BIT7)
 984                                 icount->parity++;
 985                         else
 986                                 icount->frame++;
 987
 988                         /* discard char if tty control flags say so */
 989                         if (status & info->ignore_status_mask)
 990                                 continue;
 991
 992                         status &= info->read_status_mask;
 993
 994                         if (status & BIT7)
 995                                 flag = TTY_PARITY;
 996                         else if (status & BIT6)
 997                                 flag = TTY_FRAME;
 998                 }
 999                 work += tty_insert_flip_char(tty, data, flag);
1000         }
1001         issue_command(info, CHA, CMD_RXFIFO);
1002
1003         if (debug_level >= DEBUG_LEVEL_ISR) {
1004                 printk("%s(%d):rx_ready_async",
1005                         __FILE__,__LINE__);
1006                 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1007                         __FILE__,__LINE__,icount->rx,icount->brk,
1008                         icount->parity,icount->frame,icount->overrun);
1009         }
1010
1011         if (work)
1012                 tty_flip_buffer_push(tty);
1013 }
1014
1015
1016 static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
1017 {
1018         if (!info->tx_active)
1019                 return;
1020
1021         info->tx_active = false;
1022         info->tx_aborting = false;
1023
1024         if (info->params.mode == MGSL_MODE_ASYNC)
1025                 return;
1026
1027         info->tx_count = info->tx_put = info->tx_get = 0;
1028         del_timer(&info->tx_timer);
1029
1030         if (info->drop_rts_on_tx_done) {
1031                 get_signals(info);
1032                 if (info->serial_signals & SerialSignal_RTS) {
1033                         info->serial_signals &= ~SerialSignal_RTS;
1034                         set_signals(info);
1035                 }
1036                 info->drop_rts_on_tx_done = false;
1037         }
1038
1039 #if SYNCLINK_GENERIC_HDLC
1040         if (info->netcount)
1041                 hdlcdev_tx_done(info);
1042         else
1043 #endif
1044         {
1045                 if (tty->stopped || tty->hw_stopped) {
1046                         tx_stop(info);
1047                         return;
1048                 }
1049                 info->pending_bh |= BH_TRANSMIT;
1050         }
1051 }
1052
1053 static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
1054 {
1055         unsigned char fifo_count = 32;
1056         int c;
1057
1058         if (debug_level >= DEBUG_LEVEL_ISR)
1059                 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1060
1061         if (info->params.mode == MGSL_MODE_HDLC) {
1062                 if (!info->tx_active)
1063                         return;
1064         } else {
1065                 if (tty->stopped || tty->hw_stopped) {
1066                         tx_stop(info);
1067                         return;
1068                 }
1069                 if (!info->tx_count)
1070                         info->tx_active = false;
1071         }
1072
1073         if (!info->tx_count)
1074                 return;
1075
1076         while (info->tx_count && fifo_count) {
1077                 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1078
1079                 if (c == 1) {
1080                         write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1081                 } else {
1082                         write_reg16(info, CHA + TXFIFO,
1083                                           *((unsigned short*)(info->tx_buf + info->tx_get)));
1084                 }
1085                 info->tx_count -= c;
1086                 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1087                 fifo_count -= c;
1088         }
1089
1090         if (info->params.mode == MGSL_MODE_ASYNC) {
1091                 if (info->tx_count < WAKEUP_CHARS)
1092                         info->pending_bh |= BH_TRANSMIT;
1093                 issue_command(info, CHA, CMD_TXFIFO);
1094         } else {
1095                 if (info->tx_count)
1096                         issue_command(info, CHA, CMD_TXFIFO);
1097                 else
1098                         issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1099         }
1100 }
1101
1102 static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1103 {
1104         get_signals(info);
1105         if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1106                 irq_disable(info, CHB, IRQ_CTS);
1107         info->icount.cts++;
1108         if (info->serial_signals & SerialSignal_CTS)
1109                 info->input_signal_events.cts_up++;
1110         else
1111                 info->input_signal_events.cts_down++;
1112         wake_up_interruptible(&info->status_event_wait_q);
1113         wake_up_interruptible(&info->event_wait_q);
1114
1115         if (info->port.flags & ASYNC_CTS_FLOW) {
1116                 if (tty->hw_stopped) {
1117                         if (info->serial_signals & SerialSignal_CTS) {
1118                                 if (debug_level >= DEBUG_LEVEL_ISR)
1119                                         printk("CTS tx start...");
1120                                 if (tty)
1121                                         tty->hw_stopped = 0;
1122                                 tx_start(info, tty);
1123                                 info->pending_bh |= BH_TRANSMIT;
1124                                 return;
1125                         }
1126                 } else {
1127                         if (!(info->serial_signals & SerialSignal_CTS)) {
1128                                 if (debug_level >= DEBUG_LEVEL_ISR)
1129                                         printk("CTS tx stop...");
1130                                 if (tty)
1131                                         tty->hw_stopped = 1;
1132                                 tx_stop(info);
1133                         }
1134                 }
1135         }
1136         info->pending_bh |= BH_STATUS;
1137 }
1138
1139 static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1140 {
1141         get_signals(info);
1142         if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1143                 irq_disable(info, CHB, IRQ_DCD);
1144         info->icount.dcd++;
1145         if (info->serial_signals & SerialSignal_DCD) {
1146                 info->input_signal_events.dcd_up++;
1147         }
1148         else
1149                 info->input_signal_events.dcd_down++;
1150 #if SYNCLINK_GENERIC_HDLC
1151         if (info->netcount) {
1152                 if (info->serial_signals & SerialSignal_DCD)
1153                         netif_carrier_on(info->netdev);
1154                 else
1155                         netif_carrier_off(info->netdev);
1156         }
1157 #endif
1158         wake_up_interruptible(&info->status_event_wait_q);
1159         wake_up_interruptible(&info->event_wait_q);
1160
1161         if (info->port.flags & ASYNC_CHECK_CD) {
1162                 if (debug_level >= DEBUG_LEVEL_ISR)
1163                         printk("%s CD now %s...", info->device_name,
1164                                (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1165                 if (info->serial_signals & SerialSignal_DCD)
1166                         wake_up_interruptible(&info->port.open_wait);
1167                 else {
1168                         if (debug_level >= DEBUG_LEVEL_ISR)
1169                                 printk("doing serial hangup...");
1170                         if (tty)
1171                                 tty_hangup(tty);
1172                 }
1173         }
1174         info->pending_bh |= BH_STATUS;
1175 }
1176
1177 static void dsr_change(MGSLPC_INFO *info)
1178 {
1179         get_signals(info);
1180         if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1181                 port_irq_disable(info, PVR_DSR);
1182         info->icount.dsr++;
1183         if (info->serial_signals & SerialSignal_DSR)
1184                 info->input_signal_events.dsr_up++;
1185         else
1186                 info->input_signal_events.dsr_down++;
1187         wake_up_interruptible(&info->status_event_wait_q);
1188         wake_up_interruptible(&info->event_wait_q);
1189         info->pending_bh |= BH_STATUS;
1190 }
1191
1192 static void ri_change(MGSLPC_INFO *info)
1193 {
1194         get_signals(info);
1195         if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1196                 port_irq_disable(info, PVR_RI);
1197         info->icount.rng++;
1198         if (info->serial_signals & SerialSignal_RI)
1199                 info->input_signal_events.ri_up++;
1200         else
1201                 info->input_signal_events.ri_down++;
1202         wake_up_interruptible(&info->status_event_wait_q);
1203         wake_up_interruptible(&info->event_wait_q);
1204         info->pending_bh |= BH_STATUS;
1205 }
1206
1207 /* Interrupt service routine entry point.
1208  *
1209  * Arguments:
1210  *
1211  * irq     interrupt number that caused interrupt
1212  * dev_id  device ID supplied during interrupt registration
1213  */
1214 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1215 {
1216         MGSLPC_INFO *info = dev_id;
1217         struct tty_struct *tty;
1218         unsigned short isr;
1219         unsigned char gis, pis;
1220         int count=0;
1221
1222         if (debug_level >= DEBUG_LEVEL_ISR)
1223                 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1224
1225         if (!(info->p_dev->_locked))
1226                 return IRQ_HANDLED;
1227
1228         tty = tty_port_tty_get(&info->port);
1229
1230         spin_lock(&info->lock);
1231
1232         while ((gis = read_reg(info, CHA + GIS))) {
1233                 if (debug_level >= DEBUG_LEVEL_ISR)
1234                         printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1235
1236                 if ((gis & 0x70) || count > 1000) {
1237                         printk("synclink_cs:hardware failed or ejected\n");
1238                         break;
1239                 }
1240                 count++;
1241
1242                 if (gis & (BIT1 + BIT0)) {
1243                         isr = read_reg16(info, CHB + ISR);
1244                         if (isr & IRQ_DCD)
1245                                 dcd_change(info, tty);
1246                         if (isr & IRQ_CTS)
1247                                 cts_change(info, tty);
1248                 }
1249                 if (gis & (BIT3 + BIT2))
1250                 {
1251                         isr = read_reg16(info, CHA + ISR);
1252                         if (isr & IRQ_TIMER) {
1253                                 info->irq_occurred = true;
1254                                 irq_disable(info, CHA, IRQ_TIMER);
1255                         }
1256
1257                         /* receive IRQs */
1258                         if (isr & IRQ_EXITHUNT) {
1259                                 info->icount.exithunt++;
1260                                 wake_up_interruptible(&info->event_wait_q);
1261                         }
1262                         if (isr & IRQ_BREAK_ON) {
1263                                 info->icount.brk++;
1264                                 if (info->port.flags & ASYNC_SAK)
1265                                         do_SAK(tty);
1266                         }
1267                         if (isr & IRQ_RXTIME) {
1268                                 issue_command(info, CHA, CMD_RXFIFO_READ);
1269                         }
1270                         if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1271                                 if (info->params.mode == MGSL_MODE_HDLC)
1272                                         rx_ready_hdlc(info, isr & IRQ_RXEOM);
1273                                 else
1274                                         rx_ready_async(info, isr & IRQ_RXEOM, tty);
1275                         }
1276
1277                         /* transmit IRQs */
1278                         if (isr & IRQ_UNDERRUN) {
1279                                 if (info->tx_aborting)
1280                                         info->icount.txabort++;
1281                                 else
1282                                         info->icount.txunder++;
1283                                 tx_done(info, tty);
1284                         }
1285                         else if (isr & IRQ_ALLSENT) {
1286                                 info->icount.txok++;
1287                                 tx_done(info, tty);
1288                         }
1289                         else if (isr & IRQ_TXFIFO)
1290                                 tx_ready(info, tty);
1291                 }
1292                 if (gis & BIT7) {
1293                         pis = read_reg(info, CHA + PIS);
1294                         if (pis & BIT1)
1295                                 dsr_change(info);
1296                         if (pis & BIT2)
1297                                 ri_change(info);
1298                 }
1299         }
1300
1301         /* Request bottom half processing if there's something
1302          * for it to do and the bh is not already running
1303          */
1304
1305         if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1306                 if ( debug_level >= DEBUG_LEVEL_ISR )
1307                         printk("%s(%d):%s queueing bh task.\n",
1308                                 __FILE__,__LINE__,info->device_name);
1309                 schedule_work(&info->task);
1310                 info->bh_requested = true;
1311         }
1312
1313         spin_unlock(&info->lock);
1314         tty_kref_put(tty);
1315
1316         if (debug_level >= DEBUG_LEVEL_ISR)
1317                 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1318                        __FILE__, __LINE__, info->irq_level);
1319
1320         return IRQ_HANDLED;
1321 }
1322
1323 /* Initialize and start device.
1324  */
1325 static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1326 {
1327         int retval = 0;
1328
1329         if (debug_level >= DEBUG_LEVEL_INFO)
1330                 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1331
1332         if (info->port.flags & ASYNC_INITIALIZED)
1333                 return 0;
1334
1335         if (!info->tx_buf) {
1336                 /* allocate a page of memory for a transmit buffer */
1337                 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1338                 if (!info->tx_buf) {
1339                         printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1340                                 __FILE__,__LINE__,info->device_name);
1341                         return -ENOMEM;
1342                 }
1343         }
1344
1345         info->pending_bh = 0;
1346
1347         memset(&info->icount, 0, sizeof(info->icount));
1348
1349         setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1350
1351         /* Allocate and claim adapter resources */
1352         retval = claim_resources(info);
1353
1354         /* perform existance check and diagnostics */
1355         if ( !retval )
1356                 retval = adapter_test(info);
1357
1358         if ( retval ) {
1359                 if (capable(CAP_SYS_ADMIN) && tty)
1360                         set_bit(TTY_IO_ERROR, &tty->flags);
1361                 release_resources(info);
1362                 return retval;
1363         }
1364
1365         /* program hardware for current parameters */
1366         mgslpc_change_params(info, tty);
1367
1368         if (tty)
1369                 clear_bit(TTY_IO_ERROR, &tty->flags);
1370
1371         info->port.flags |= ASYNC_INITIALIZED;
1372
1373         return 0;
1374 }
1375
1376 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1377  */
1378 static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1379 {
1380         unsigned long flags;
1381
1382         if (!(info->port.flags & ASYNC_INITIALIZED))
1383                 return;
1384
1385         if (debug_level >= DEBUG_LEVEL_INFO)
1386                 printk("%s(%d):mgslpc_shutdown(%s)\n",
1387                          __FILE__,__LINE__, info->device_name );
1388
1389         /* clear status wait queue because status changes */
1390         /* can't happen after shutting down the hardware */
1391         wake_up_interruptible(&info->status_event_wait_q);
1392         wake_up_interruptible(&info->event_wait_q);
1393
1394         del_timer_sync(&info->tx_timer);
1395
1396         if (info->tx_buf) {
1397                 free_page((unsigned long) info->tx_buf);
1398                 info->tx_buf = NULL;
1399         }
1400
1401         spin_lock_irqsave(&info->lock,flags);
1402
1403         rx_stop(info);
1404         tx_stop(info);
1405
1406         /* TODO:disable interrupts instead of reset to preserve signal states */
1407         reset_device(info);
1408
1409         if (!tty || tty->termios->c_cflag & HUPCL) {
1410                 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1411                 set_signals(info);
1412         }
1413
1414         spin_unlock_irqrestore(&info->lock,flags);
1415
1416         release_resources(info);
1417
1418         if (tty)
1419                 set_bit(TTY_IO_ERROR, &tty->flags);
1420
1421         info->port.flags &= ~ASYNC_INITIALIZED;
1422 }
1423
1424 static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1425 {
1426         unsigned long flags;
1427
1428         spin_lock_irqsave(&info->lock,flags);
1429
1430         rx_stop(info);
1431         tx_stop(info);
1432         info->tx_count = info->tx_put = info->tx_get = 0;
1433
1434         if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1435                 hdlc_mode(info);
1436         else
1437                 async_mode(info);
1438
1439         set_signals(info);
1440
1441         info->dcd_chkcount = 0;
1442         info->cts_chkcount = 0;
1443         info->ri_chkcount = 0;
1444         info->dsr_chkcount = 0;
1445
1446         irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1447         port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1448         get_signals(info);
1449
1450         if (info->netcount || (tty && (tty->termios->c_cflag & CREAD)))
1451                 rx_start(info);
1452
1453         spin_unlock_irqrestore(&info->lock,flags);
1454 }
1455
1456 /* Reconfigure adapter based on new parameters
1457  */
1458 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1459 {
1460         unsigned cflag;
1461         int bits_per_char;
1462
1463         if (!tty || !tty->termios)
1464                 return;
1465
1466         if (debug_level >= DEBUG_LEVEL_INFO)
1467                 printk("%s(%d):mgslpc_change_params(%s)\n",
1468                          __FILE__,__LINE__, info->device_name );
1469
1470         cflag = tty->termios->c_cflag;
1471
1472         /* if B0 rate (hangup) specified then negate DTR and RTS */
1473         /* otherwise assert DTR and RTS */
1474         if (cflag & CBAUD)
1475                 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1476         else
1477                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1478
1479         /* byte size and parity */
1480
1481         switch (cflag & CSIZE) {
1482         case CS5: info->params.data_bits = 5; break;
1483         case CS6: info->params.data_bits = 6; break;
1484         case CS7: info->params.data_bits = 7; break;
1485         case CS8: info->params.data_bits = 8; break;
1486         default:  info->params.data_bits = 7; break;
1487         }
1488
1489         if (cflag & CSTOPB)
1490                 info->params.stop_bits = 2;
1491         else
1492                 info->params.stop_bits = 1;
1493
1494         info->params.parity = ASYNC_PARITY_NONE;
1495         if (cflag & PARENB) {
1496                 if (cflag & PARODD)
1497                         info->params.parity = ASYNC_PARITY_ODD;
1498                 else
1499                         info->params.parity = ASYNC_PARITY_EVEN;
1500 #ifdef CMSPAR
1501                 if (cflag & CMSPAR)
1502                         info->params.parity = ASYNC_PARITY_SPACE;
1503 #endif
1504         }
1505
1506         /* calculate number of jiffies to transmit a full
1507          * FIFO (32 bytes) at specified data rate
1508          */
1509         bits_per_char = info->params.data_bits +
1510                         info->params.stop_bits + 1;
1511
1512         /* if port data rate is set to 460800 or less then
1513          * allow tty settings to override, otherwise keep the
1514          * current data rate.
1515          */
1516         if (info->params.data_rate <= 460800) {
1517                 info->params.data_rate = tty_get_baud_rate(tty);
1518         }
1519
1520         if ( info->params.data_rate ) {
1521                 info->timeout = (32*HZ*bits_per_char) /
1522                                 info->params.data_rate;
1523         }
1524         info->timeout += HZ/50;         /* Add .02 seconds of slop */
1525
1526         if (cflag & CRTSCTS)
1527                 info->port.flags |= ASYNC_CTS_FLOW;
1528         else
1529                 info->port.flags &= ~ASYNC_CTS_FLOW;
1530
1531         if (cflag & CLOCAL)
1532                 info->port.flags &= ~ASYNC_CHECK_CD;
1533         else
1534                 info->port.flags |= ASYNC_CHECK_CD;
1535
1536         /* process tty input control flags */
1537
1538         info->read_status_mask = 0;
1539         if (I_INPCK(tty))
1540                 info->read_status_mask |= BIT7 | BIT6;
1541         if (I_IGNPAR(tty))
1542                 info->ignore_status_mask |= BIT7 | BIT6;
1543
1544         mgslpc_program_hw(info, tty);
1545 }
1546
1547 /* Add a character to the transmit buffer
1548  */
1549 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1550 {
1551         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1552         unsigned long flags;
1553
1554         if (debug_level >= DEBUG_LEVEL_INFO) {
1555                 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1556                         __FILE__,__LINE__,ch,info->device_name);
1557         }
1558
1559         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1560                 return 0;
1561
1562         if (!info->tx_buf)
1563                 return 0;
1564
1565         spin_lock_irqsave(&info->lock,flags);
1566
1567         if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1568                 if (info->tx_count < TXBUFSIZE - 1) {
1569                         info->tx_buf[info->tx_put++] = ch;
1570                         info->tx_put &= TXBUFSIZE-1;
1571                         info->tx_count++;
1572                 }
1573         }
1574
1575         spin_unlock_irqrestore(&info->lock,flags);
1576         return 1;
1577 }
1578
1579 /* Enable transmitter so remaining characters in the
1580  * transmit buffer are sent.
1581  */
1582 static void mgslpc_flush_chars(struct tty_struct *tty)
1583 {
1584         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1585         unsigned long flags;
1586
1587         if (debug_level >= DEBUG_LEVEL_INFO)
1588                 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1589                         __FILE__,__LINE__,info->device_name,info->tx_count);
1590
1591         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1592                 return;
1593
1594         if (info->tx_count <= 0 || tty->stopped ||
1595             tty->hw_stopped || !info->tx_buf)
1596                 return;
1597
1598         if (debug_level >= DEBUG_LEVEL_INFO)
1599                 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1600                         __FILE__,__LINE__,info->device_name);
1601
1602         spin_lock_irqsave(&info->lock,flags);
1603         if (!info->tx_active)
1604                 tx_start(info, tty);
1605         spin_unlock_irqrestore(&info->lock,flags);
1606 }
1607
1608 /* Send a block of data
1609  *
1610  * Arguments:
1611  *
1612  * tty        pointer to tty information structure
1613  * buf        pointer to buffer containing send data
1614  * count      size of send data in bytes
1615  *
1616  * Returns: number of characters written
1617  */
1618 static int mgslpc_write(struct tty_struct * tty,
1619                         const unsigned char *buf, int count)
1620 {
1621         int c, ret = 0;
1622         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1623         unsigned long flags;
1624
1625         if (debug_level >= DEBUG_LEVEL_INFO)
1626                 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1627                         __FILE__,__LINE__,info->device_name,count);
1628
1629         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1630                 !info->tx_buf)
1631                 goto cleanup;
1632
1633         if (info->params.mode == MGSL_MODE_HDLC) {
1634                 if (count > TXBUFSIZE) {
1635                         ret = -EIO;
1636                         goto cleanup;
1637                 }
1638                 if (info->tx_active)
1639                         goto cleanup;
1640                 else if (info->tx_count)
1641                         goto start;
1642         }
1643
1644         for (;;) {
1645                 c = min(count,
1646                         min(TXBUFSIZE - info->tx_count - 1,
1647                             TXBUFSIZE - info->tx_put));
1648                 if (c <= 0)
1649                         break;
1650
1651                 memcpy(info->tx_buf + info->tx_put, buf, c);
1652
1653                 spin_lock_irqsave(&info->lock,flags);
1654                 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1655                 info->tx_count += c;
1656                 spin_unlock_irqrestore(&info->lock,flags);
1657
1658                 buf += c;
1659                 count -= c;
1660                 ret += c;
1661         }
1662 start:
1663         if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1664                 spin_lock_irqsave(&info->lock,flags);
1665                 if (!info->tx_active)
1666                         tx_start(info, tty);
1667                 spin_unlock_irqrestore(&info->lock,flags);
1668         }
1669 cleanup:
1670         if (debug_level >= DEBUG_LEVEL_INFO)
1671                 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1672                         __FILE__,__LINE__,info->device_name,ret);
1673         return ret;
1674 }
1675
1676 /* Return the count of free bytes in transmit buffer
1677  */
1678 static int mgslpc_write_room(struct tty_struct *tty)
1679 {
1680         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1681         int ret;
1682
1683         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1684                 return 0;
1685
1686         if (info->params.mode == MGSL_MODE_HDLC) {
1687                 /* HDLC (frame oriented) mode */
1688                 if (info->tx_active)
1689                         return 0;
1690                 else
1691                         return HDLC_MAX_FRAME_SIZE;
1692         } else {
1693                 ret = TXBUFSIZE - info->tx_count - 1;
1694                 if (ret < 0)
1695                         ret = 0;
1696         }
1697
1698         if (debug_level >= DEBUG_LEVEL_INFO)
1699                 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1700                          __FILE__,__LINE__, info->device_name, ret);
1701         return ret;
1702 }
1703
1704 /* Return the count of bytes in transmit buffer
1705  */
1706 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1707 {
1708         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1709         int rc;
1710
1711         if (debug_level >= DEBUG_LEVEL_INFO)
1712                 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1713                          __FILE__,__LINE__, info->device_name );
1714
1715         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1716                 return 0;
1717
1718         if (info->params.mode == MGSL_MODE_HDLC)
1719                 rc = info->tx_active ? info->max_frame_size : 0;
1720         else
1721                 rc = info->tx_count;
1722
1723         if (debug_level >= DEBUG_LEVEL_INFO)
1724                 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1725                          __FILE__,__LINE__, info->device_name, rc);
1726
1727         return rc;
1728 }
1729
1730 /* Discard all data in the send buffer
1731  */
1732 static void mgslpc_flush_buffer(struct tty_struct *tty)
1733 {
1734         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1735         unsigned long flags;
1736
1737         if (debug_level >= DEBUG_LEVEL_INFO)
1738                 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1739                          __FILE__,__LINE__, info->device_name );
1740
1741         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1742                 return;
1743
1744         spin_lock_irqsave(&info->lock,flags);
1745         info->tx_count = info->tx_put = info->tx_get = 0;
1746         del_timer(&info->tx_timer);
1747         spin_unlock_irqrestore(&info->lock,flags);
1748
1749         wake_up_interruptible(&tty->write_wait);
1750         tty_wakeup(tty);
1751 }
1752
1753 /* Send a high-priority XON/XOFF character
1754  */
1755 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1756 {
1757         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1758         unsigned long flags;
1759
1760         if (debug_level >= DEBUG_LEVEL_INFO)
1761                 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1762                          __FILE__,__LINE__, info->device_name, ch );
1763
1764         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1765                 return;
1766
1767         info->x_char = ch;
1768         if (ch) {
1769                 spin_lock_irqsave(&info->lock,flags);
1770                 if (!info->tx_enabled)
1771                         tx_start(info, tty);
1772                 spin_unlock_irqrestore(&info->lock,flags);
1773         }
1774 }
1775
1776 /* Signal remote device to throttle send data (our receive data)
1777  */
1778 static void mgslpc_throttle(struct tty_struct * tty)
1779 {
1780         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1781         unsigned long flags;
1782
1783         if (debug_level >= DEBUG_LEVEL_INFO)
1784                 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1785                          __FILE__,__LINE__, info->device_name );
1786
1787         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1788                 return;
1789
1790         if (I_IXOFF(tty))
1791                 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1792
1793         if (tty->termios->c_cflag & CRTSCTS) {
1794                 spin_lock_irqsave(&info->lock,flags);
1795                 info->serial_signals &= ~SerialSignal_RTS;
1796                 set_signals(info);
1797                 spin_unlock_irqrestore(&info->lock,flags);
1798         }
1799 }
1800
1801 /* Signal remote device to stop throttling send data (our receive data)
1802  */
1803 static void mgslpc_unthrottle(struct tty_struct * tty)
1804 {
1805         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1806         unsigned long flags;
1807
1808         if (debug_level >= DEBUG_LEVEL_INFO)
1809                 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1810                          __FILE__,__LINE__, info->device_name );
1811
1812         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1813                 return;
1814
1815         if (I_IXOFF(tty)) {
1816                 if (info->x_char)
1817                         info->x_char = 0;
1818                 else
1819                         mgslpc_send_xchar(tty, START_CHAR(tty));
1820         }
1821
1822         if (tty->termios->c_cflag & CRTSCTS) {
1823                 spin_lock_irqsave(&info->lock,flags);
1824                 info->serial_signals |= SerialSignal_RTS;
1825                 set_signals(info);
1826                 spin_unlock_irqrestore(&info->lock,flags);
1827         }
1828 }
1829
1830 /* get the current serial statistics
1831  */
1832 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1833 {
1834         int err;
1835         if (debug_level >= DEBUG_LEVEL_INFO)
1836                 printk("get_params(%s)\n", info->device_name);
1837         if (!user_icount) {
1838                 memset(&info->icount, 0, sizeof(info->icount));
1839         } else {
1840                 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1841                 if (err)
1842                         return -EFAULT;
1843         }
1844         return 0;
1845 }
1846
1847 /* get the current serial parameters
1848  */
1849 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1850 {
1851         int err;
1852         if (debug_level >= DEBUG_LEVEL_INFO)
1853                 printk("get_params(%s)\n", info->device_name);
1854         COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1855         if (err)
1856                 return -EFAULT;
1857         return 0;
1858 }
1859
1860 /* set the serial parameters
1861  *
1862  * Arguments:
1863  *
1864  *      info            pointer to device instance data
1865  *      new_params      user buffer containing new serial params
1866  *
1867  * Returns:     0 if success, otherwise error code
1868  */
1869 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1870 {
1871         unsigned long flags;
1872         MGSL_PARAMS tmp_params;
1873         int err;
1874
1875         if (debug_level >= DEBUG_LEVEL_INFO)
1876                 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1877                         info->device_name );
1878         COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1879         if (err) {
1880                 if ( debug_level >= DEBUG_LEVEL_INFO )
1881                         printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1882                                 __FILE__,__LINE__,info->device_name);
1883                 return -EFAULT;
1884         }
1885
1886         spin_lock_irqsave(&info->lock,flags);
1887         memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1888         spin_unlock_irqrestore(&info->lock,flags);
1889
1890         mgslpc_change_params(info, tty);
1891
1892         return 0;
1893 }
1894
1895 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1896 {
1897         int err;
1898         if (debug_level >= DEBUG_LEVEL_INFO)
1899                 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1900         COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1901         if (err)
1902                 return -EFAULT;
1903         return 0;
1904 }
1905
1906 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1907 {
1908         unsigned long flags;
1909         if (debug_level >= DEBUG_LEVEL_INFO)
1910                 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1911         spin_lock_irqsave(&info->lock,flags);
1912         info->idle_mode = idle_mode;
1913         tx_set_idle(info);
1914         spin_unlock_irqrestore(&info->lock,flags);
1915         return 0;
1916 }
1917
1918 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1919 {
1920         int err;
1921         if (debug_level >= DEBUG_LEVEL_INFO)
1922                 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1923         COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1924         if (err)
1925                 return -EFAULT;
1926         return 0;
1927 }
1928
1929 static int set_interface(MGSLPC_INFO * info, int if_mode)
1930 {
1931         unsigned long flags;
1932         unsigned char val;
1933         if (debug_level >= DEBUG_LEVEL_INFO)
1934                 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1935         spin_lock_irqsave(&info->lock,flags);
1936         info->if_mode = if_mode;
1937
1938         val = read_reg(info, PVR) & 0x0f;
1939         switch (info->if_mode)
1940         {
1941         case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1942         case MGSL_INTERFACE_V35:   val |= PVR_V35;   break;
1943         case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1944         }
1945         write_reg(info, PVR, val);
1946
1947         spin_unlock_irqrestore(&info->lock,flags);
1948         return 0;
1949 }
1950
1951 static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1952 {
1953         unsigned long flags;
1954
1955         if (debug_level >= DEBUG_LEVEL_INFO)
1956                 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1957
1958         spin_lock_irqsave(&info->lock,flags);
1959         if (enable) {
1960                 if (!info->tx_enabled)
1961                         tx_start(info, tty);
1962         } else {
1963                 if (info->tx_enabled)
1964                         tx_stop(info);
1965         }
1966         spin_unlock_irqrestore(&info->lock,flags);
1967         return 0;
1968 }
1969
1970 static int tx_abort(MGSLPC_INFO * info)
1971 {
1972         unsigned long flags;
1973
1974         if (debug_level >= DEBUG_LEVEL_INFO)
1975                 printk("tx_abort(%s)\n", info->device_name);
1976
1977         spin_lock_irqsave(&info->lock,flags);
1978         if (info->tx_active && info->tx_count &&
1979             info->params.mode == MGSL_MODE_HDLC) {
1980                 /* clear data count so FIFO is not filled on next IRQ.
1981                  * This results in underrun and abort transmission.
1982                  */
1983                 info->tx_count = info->tx_put = info->tx_get = 0;
1984                 info->tx_aborting = true;
1985         }
1986         spin_unlock_irqrestore(&info->lock,flags);
1987         return 0;
1988 }
1989
1990 static int set_rxenable(MGSLPC_INFO * info, int enable)
1991 {
1992         unsigned long flags;
1993
1994         if (debug_level >= DEBUG_LEVEL_INFO)
1995                 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1996
1997         spin_lock_irqsave(&info->lock,flags);
1998         if (enable) {
1999                 if (!info->rx_enabled)
2000                         rx_start(info);
2001         } else {
2002                 if (info->rx_enabled)
2003                         rx_stop(info);
2004         }
2005         spin_unlock_irqrestore(&info->lock,flags);
2006         return 0;
2007 }
2008
2009 /* wait for specified event to occur
2010  *
2011  * Arguments:           info    pointer to device instance data
2012  *                      mask    pointer to bitmask of events to wait for
2013  * Return Value:        0       if successful and bit mask updated with
2014  *                              of events triggerred,
2015  *                      otherwise error code
2016  */
2017 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2018 {
2019         unsigned long flags;
2020         int s;
2021         int rc=0;
2022         struct mgsl_icount cprev, cnow;
2023         int events;
2024         int mask;
2025         struct  _input_signal_events oldsigs, newsigs;
2026         DECLARE_WAITQUEUE(wait, current);
2027
2028         COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2029         if (rc)
2030                 return  -EFAULT;
2031
2032         if (debug_level >= DEBUG_LEVEL_INFO)
2033                 printk("wait_events(%s,%d)\n", info->device_name, mask);
2034
2035         spin_lock_irqsave(&info->lock,flags);
2036
2037         /* return immediately if state matches requested events */
2038         get_signals(info);
2039         s = info->serial_signals;
2040         events = mask &
2041                 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2042                   ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2043                   ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2044                   ((s & SerialSignal_RI)  ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2045         if (events) {
2046                 spin_unlock_irqrestore(&info->lock,flags);
2047                 goto exit;
2048         }
2049
2050         /* save current irq counts */
2051         cprev = info->icount;
2052         oldsigs = info->input_signal_events;
2053
2054         if ((info->params.mode == MGSL_MODE_HDLC) &&
2055             (mask & MgslEvent_ExitHuntMode))
2056                 irq_enable(info, CHA, IRQ_EXITHUNT);
2057
2058         set_current_state(TASK_INTERRUPTIBLE);
2059         add_wait_queue(&info->event_wait_q, &wait);
2060
2061         spin_unlock_irqrestore(&info->lock,flags);
2062
2063
2064         for(;;) {
2065                 schedule();
2066                 if (signal_pending(current)) {
2067                         rc = -ERESTARTSYS;
2068                         break;
2069                 }
2070
2071                 /* get current irq counts */
2072                 spin_lock_irqsave(&info->lock,flags);
2073                 cnow = info->icount;
2074                 newsigs = info->input_signal_events;
2075                 set_current_state(TASK_INTERRUPTIBLE);
2076                 spin_unlock_irqrestore(&info->lock,flags);
2077
2078                 /* if no change, wait aborted for some reason */
2079                 if (newsigs.dsr_up   == oldsigs.dsr_up   &&
2080                     newsigs.dsr_down == oldsigs.dsr_down &&
2081                     newsigs.dcd_up   == oldsigs.dcd_up   &&
2082                     newsigs.dcd_down == oldsigs.dcd_down &&
2083                     newsigs.cts_up   == oldsigs.cts_up   &&
2084                     newsigs.cts_down == oldsigs.cts_down &&
2085                     newsigs.ri_up    == oldsigs.ri_up    &&
2086                     newsigs.ri_down  == oldsigs.ri_down  &&
2087                     cnow.exithunt    == cprev.exithunt   &&
2088                     cnow.rxidle      == cprev.rxidle) {
2089                         rc = -EIO;
2090                         break;
2091                 }
2092
2093                 events = mask &
2094                         ( (newsigs.dsr_up   != oldsigs.dsr_up   ? MgslEvent_DsrActive:0)   +
2095                           (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2096                           (newsigs.dcd_up   != oldsigs.dcd_up   ? MgslEvent_DcdActive:0)   +
2097                           (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2098                           (newsigs.cts_up   != oldsigs.cts_up   ? MgslEvent_CtsActive:0)   +
2099                           (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2100                           (newsigs.ri_up    != oldsigs.ri_up    ? MgslEvent_RiActive:0)    +
2101                           (newsigs.ri_down  != oldsigs.ri_down  ? MgslEvent_RiInactive:0)  +
2102                           (cnow.exithunt    != cprev.exithunt   ? MgslEvent_ExitHuntMode:0) +
2103                           (cnow.rxidle      != cprev.rxidle     ? MgslEvent_IdleReceived:0) );
2104                 if (events)
2105                         break;
2106
2107                 cprev = cnow;
2108                 oldsigs = newsigs;
2109         }
2110
2111         remove_wait_queue(&info->event_wait_q, &wait);
2112         set_current_state(TASK_RUNNING);
2113
2114         if (mask & MgslEvent_ExitHuntMode) {
2115                 spin_lock_irqsave(&info->lock,flags);
2116                 if (!waitqueue_active(&info->event_wait_q))
2117                         irq_disable(info, CHA, IRQ_EXITHUNT);
2118                 spin_unlock_irqrestore(&info->lock,flags);
2119         }
2120 exit:
2121         if (rc == 0)
2122                 PUT_USER(rc, events, mask_ptr);
2123         return rc;
2124 }
2125
2126 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2127 {
2128         unsigned long flags;
2129         int rc;
2130         struct mgsl_icount cprev, cnow;
2131         DECLARE_WAITQUEUE(wait, current);
2132
2133         /* save current irq counts */
2134         spin_lock_irqsave(&info->lock,flags);
2135         cprev = info->icount;
2136         add_wait_queue(&info->status_event_wait_q, &wait);
2137         set_current_state(TASK_INTERRUPTIBLE);
2138         spin_unlock_irqrestore(&info->lock,flags);
2139
2140         for(;;) {
2141                 schedule();
2142                 if (signal_pending(current)) {
2143                         rc = -ERESTARTSYS;
2144                         break;
2145                 }
2146
2147                 /* get new irq counts */
2148                 spin_lock_irqsave(&info->lock,flags);
2149                 cnow = info->icount;
2150                 set_current_state(TASK_INTERRUPTIBLE);
2151                 spin_unlock_irqrestore(&info->lock,flags);
2152
2153                 /* if no change, wait aborted for some reason */
2154                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2155                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2156                         rc = -EIO;
2157                         break;
2158                 }
2159
2160                 /* check for change in caller specified modem input */
2161                 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2162                     (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2163                     (arg & TIOCM_CD  && cnow.dcd != cprev.dcd) ||
2164                     (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2165                         rc = 0;
2166                         break;
2167                 }
2168
2169                 cprev = cnow;
2170         }
2171         remove_wait_queue(&info->status_event_wait_q, &wait);
2172         set_current_state(TASK_RUNNING);
2173         return rc;
2174 }
2175
2176 /* return the state of the serial control and status signals
2177  */
2178 static int tiocmget(struct tty_struct *tty, struct file *file)
2179 {
2180         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2181         unsigned int result;
2182         unsigned long flags;
2183
2184         spin_lock_irqsave(&info->lock,flags);
2185         get_signals(info);
2186         spin_unlock_irqrestore(&info->lock,flags);
2187
2188         result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2189                 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2190                 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2191                 ((info->serial_signals & SerialSignal_RI)  ? TIOCM_RNG:0) +
2192                 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2193                 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2194
2195         if (debug_level >= DEBUG_LEVEL_INFO)
2196                 printk("%s(%d):%s tiocmget() value=%08X\n",
2197                          __FILE__,__LINE__, info->device_name, result );
2198         return result;
2199 }
2200
2201 /* set modem control signals (DTR/RTS)
2202  */
2203 static int tiocmset(struct tty_struct *tty, struct file *file,
2204                     unsigned int set, unsigned int clear)
2205 {
2206         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2207         unsigned long flags;
2208
2209         if (debug_level >= DEBUG_LEVEL_INFO)
2210                 printk("%s(%d):%s tiocmset(%x,%x)\n",
2211                         __FILE__,__LINE__,info->device_name, set, clear);
2212
2213         if (set & TIOCM_RTS)
2214                 info->serial_signals |= SerialSignal_RTS;
2215         if (set & TIOCM_DTR)
2216                 info->serial_signals |= SerialSignal_DTR;
2217         if (clear & TIOCM_RTS)
2218                 info->serial_signals &= ~SerialSignal_RTS;
2219         if (clear & TIOCM_DTR)
2220                 info->serial_signals &= ~SerialSignal_DTR;
2221
2222         spin_lock_irqsave(&info->lock,flags);
2223         set_signals(info);
2224         spin_unlock_irqrestore(&info->lock,flags);
2225
2226         return 0;
2227 }
2228
2229 /* Set or clear transmit break condition
2230  *
2231  * Arguments:           tty             pointer to tty instance data
2232  *                      break_state     -1=set break condition, 0=clear
2233  */
2234 static int mgslpc_break(struct tty_struct *tty, int break_state)
2235 {
2236         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2237         unsigned long flags;
2238
2239         if (debug_level >= DEBUG_LEVEL_INFO)
2240                 printk("%s(%d):mgslpc_break(%s,%d)\n",
2241                          __FILE__,__LINE__, info->device_name, break_state);
2242
2243         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2244                 return -EINVAL;
2245
2246         spin_lock_irqsave(&info->lock,flags);
2247         if (break_state == -1)
2248                 set_reg_bits(info, CHA+DAFO, BIT6);
2249         else
2250                 clear_reg_bits(info, CHA+DAFO, BIT6);
2251         spin_unlock_irqrestore(&info->lock,flags);
2252         return 0;
2253 }
2254
2255 /* Service an IOCTL request
2256  *
2257  * Arguments:
2258  *
2259  *      tty     pointer to tty instance data
2260  *      file    pointer to associated file object for device
2261  *      cmd     IOCTL command code
2262  *      arg     command argument/context
2263  *
2264  * Return Value:        0 if success, otherwise error code
2265  */
2266 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2267                         unsigned int cmd, unsigned long arg)
2268 {
2269         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2270         int error;
2271         struct mgsl_icount cnow;        /* kernel counter temps */
2272         struct serial_icounter_struct __user *p_cuser;  /* user space */
2273         void __user *argp = (void __user *)arg;
2274         unsigned long flags;
2275
2276         if (debug_level >= DEBUG_LEVEL_INFO)
2277                 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2278                         info->device_name, cmd );
2279
2280         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2281                 return -ENODEV;
2282
2283         if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2284             (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2285                 if (tty->flags & (1 << TTY_IO_ERROR))
2286                     return -EIO;
2287         }
2288
2289         switch (cmd) {
2290         case MGSL_IOCGPARAMS:
2291                 return get_params(info, argp);
2292         case MGSL_IOCSPARAMS:
2293                 return set_params(info, argp, tty);
2294         case MGSL_IOCGTXIDLE:
2295                 return get_txidle(info, argp);
2296         case MGSL_IOCSTXIDLE:
2297                 return set_txidle(info, (int)arg);
2298         case MGSL_IOCGIF:
2299                 return get_interface(info, argp);
2300         case MGSL_IOCSIF:
2301                 return set_interface(info,(int)arg);
2302         case MGSL_IOCTXENABLE:
2303                 return set_txenable(info,(int)arg, tty);
2304         case MGSL_IOCRXENABLE:
2305                 return set_rxenable(info,(int)arg);
2306         case MGSL_IOCTXABORT:
2307                 return tx_abort(info);
2308         case MGSL_IOCGSTATS:
2309                 return get_stats(info, argp);
2310         case MGSL_IOCWAITEVENT:
2311                 return wait_events(info, argp);
2312         case TIOCMIWAIT:
2313                 return modem_input_wait(info,(int)arg);
2314         case TIOCGICOUNT:
2315                 spin_lock_irqsave(&info->lock,flags);
2316                 cnow = info->icount;
2317                 spin_unlock_irqrestore(&info->lock,flags);
2318                 p_cuser = argp;
2319                 PUT_USER(error,cnow.cts, &p_cuser->cts);
2320                 if (error) return error;
2321                 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2322                 if (error) return error;
2323                 PUT_USER(error,cnow.rng, &p_cuser->rng);
2324                 if (error) return error;
2325                 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2326                 if (error) return error;
2327                 PUT_USER(error,cnow.rx, &p_cuser->rx);
2328                 if (error) return error;
2329                 PUT_USER(error,cnow.tx, &p_cuser->tx);
2330                 if (error) return error;
2331                 PUT_USER(error,cnow.frame, &p_cuser->frame);
2332                 if (error) return error;
2333                 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2334                 if (error) return error;
2335                 PUT_USER(error,cnow.parity, &p_cuser->parity);
2336                 if (error) return error;
2337                 PUT_USER(error,cnow.brk, &p_cuser->brk);
2338                 if (error) return error;
2339                 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2340                 if (error) return error;
2341                 return 0;
2342         default:
2343                 return -ENOIOCTLCMD;
2344         }
2345         return 0;
2346 }
2347
2348 /* Set new termios settings
2349  *
2350  * Arguments:
2351  *
2352  *      tty             pointer to tty structure
2353  *      termios         pointer to buffer to hold returned old termios
2354  */
2355 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2356 {
2357         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2358         unsigned long flags;
2359
2360         if (debug_level >= DEBUG_LEVEL_INFO)
2361                 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2362                         tty->driver->name );
2363
2364         /* just return if nothing has changed */
2365         if ((tty->termios->c_cflag == old_termios->c_cflag)
2366             && (RELEVANT_IFLAG(tty->termios->c_iflag)
2367                 == RELEVANT_IFLAG(old_termios->c_iflag)))
2368           return;
2369
2370         mgslpc_change_params(info, tty);
2371
2372         /* Handle transition to B0 status */
2373         if (old_termios->c_cflag & CBAUD &&
2374             !(tty->termios->c_cflag & CBAUD)) {
2375                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2376                 spin_lock_irqsave(&info->lock,flags);
2377                 set_signals(info);
2378                 spin_unlock_irqrestore(&info->lock,flags);
2379         }
2380
2381         /* Handle transition away from B0 status */
2382         if (!(old_termios->c_cflag & CBAUD) &&
2383             tty->termios->c_cflag & CBAUD) {
2384                 info->serial_signals |= SerialSignal_DTR;
2385                 if (!(tty->termios->c_cflag & CRTSCTS) ||
2386                     !test_bit(TTY_THROTTLED, &tty->flags)) {
2387                         info->serial_signals |= SerialSignal_RTS;
2388                 }
2389                 spin_lock_irqsave(&info->lock,flags);
2390                 set_signals(info);
2391                 spin_unlock_irqrestore(&info->lock,flags);
2392         }
2393
2394         /* Handle turning off CRTSCTS */
2395         if (old_termios->c_cflag & CRTSCTS &&
2396             !(tty->termios->c_cflag & CRTSCTS)) {
2397                 tty->hw_stopped = 0;
2398                 tx_release(tty);
2399         }
2400 }
2401
2402 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2403 {
2404         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2405         struct tty_port *port = &info->port;
2406
2407         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2408                 return;
2409
2410         if (debug_level >= DEBUG_LEVEL_INFO)
2411                 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2412                          __FILE__,__LINE__, info->device_name, port->count);
2413
2414         WARN_ON(!port->count);
2415
2416         if (tty_port_close_start(port, tty, filp) == 0)
2417                 goto cleanup;
2418
2419         if (port->flags & ASYNC_INITIALIZED)
2420                 mgslpc_wait_until_sent(tty, info->timeout);
2421
2422         mgslpc_flush_buffer(tty);
2423
2424         tty_ldisc_flush(tty);
2425         shutdown(info, tty);
2426
2427         tty_port_close_end(port, tty);
2428         tty_port_tty_set(port, NULL);
2429 cleanup:
2430         if (debug_level >= DEBUG_LEVEL_INFO)
2431                 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2432                         tty->driver->name, port->count);
2433 }
2434
2435 /* Wait until the transmitter is empty.
2436  */
2437 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2438 {
2439         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2440         unsigned long orig_jiffies, char_time;
2441
2442         if (!info )
2443                 return;
2444
2445         if (debug_level >= DEBUG_LEVEL_INFO)
2446                 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2447                          __FILE__,__LINE__, info->device_name );
2448
2449         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2450                 return;
2451
2452         if (!(info->port.flags & ASYNC_INITIALIZED))
2453                 goto exit;
2454
2455         orig_jiffies = jiffies;
2456
2457         /* Set check interval to 1/5 of estimated time to
2458          * send a character, and make it at least 1. The check
2459          * interval should also be less than the timeout.
2460          * Note: use tight timings here to satisfy the NIST-PCTS.
2461          */
2462
2463         if ( info->params.data_rate ) {
2464                 char_time = info->timeout/(32 * 5);
2465                 if (!char_time)
2466                         char_time++;
2467         } else
2468                 char_time = 1;
2469
2470         if (timeout)
2471                 char_time = min_t(unsigned long, char_time, timeout);
2472
2473         if (info->params.mode == MGSL_MODE_HDLC) {
2474                 while (info->tx_active) {
2475                         msleep_interruptible(jiffies_to_msecs(char_time));
2476                         if (signal_pending(current))
2477                                 break;
2478                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2479                                 break;
2480                 }
2481         } else {
2482                 while ((info->tx_count || info->tx_active) &&
2483                         info->tx_enabled) {
2484                         msleep_interruptible(jiffies_to_msecs(char_time));
2485                         if (signal_pending(current))
2486                                 break;
2487                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2488                                 break;
2489                 }
2490         }
2491
2492 exit:
2493         if (debug_level >= DEBUG_LEVEL_INFO)
2494                 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2495                          __FILE__,__LINE__, info->device_name );
2496 }
2497
2498 /* Called by tty_hangup() when a hangup is signaled.
2499  * This is the same as closing all open files for the port.
2500  */
2501 static void mgslpc_hangup(struct tty_struct *tty)
2502 {
2503         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2504
2505         if (debug_level >= DEBUG_LEVEL_INFO)
2506                 printk("%s(%d):mgslpc_hangup(%s)\n",
2507                          __FILE__,__LINE__, info->device_name );
2508
2509         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2510                 return;
2511
2512         mgslpc_flush_buffer(tty);
2513         shutdown(info, tty);
2514         tty_port_hangup(&info->port);
2515 }
2516
2517 static int carrier_raised(struct tty_port *port)
2518 {
2519         MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2520         unsigned long flags;
2521
2522         spin_lock_irqsave(&info->lock,flags);
2523         get_signals(info);
2524         spin_unlock_irqrestore(&info->lock,flags);
2525
2526         if (info->serial_signals & SerialSignal_DCD)
2527                 return 1;
2528         return 0;
2529 }
2530
2531 static void raise_dtr_rts(struct tty_port *port)
2532 {
2533         MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2534         unsigned long flags;
2535
2536         spin_lock_irqsave(&info->lock,flags);
2537         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2538         set_signals(info);
2539         spin_unlock_irqrestore(&info->lock,flags);
2540 }
2541
2542
2543 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2544 {
2545         MGSLPC_INFO     *info;
2546         struct tty_port *port;
2547         int                     retval, line;
2548         unsigned long flags;
2549
2550         /* verify range of specified line number */
2551         line = tty->index;
2552         if ((line < 0) || (line >= mgslpc_device_count)) {
2553                 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2554                         __FILE__,__LINE__,line);
2555                 return -ENODEV;
2556         }
2557
2558         /* find the info structure for the specified line */
2559         info = mgslpc_device_list;
2560         while(info && info->line != line)
2561                 info = info->next_device;
2562         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2563                 return -ENODEV;
2564
2565         port = &info->port;
2566         tty->driver_data = info;
2567         tty_port_tty_set(port, tty);
2568
2569         if (debug_level >= DEBUG_LEVEL_INFO)
2570                 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2571                          __FILE__,__LINE__,tty->driver->name, port->count);
2572
2573         /* If port is closing, signal caller to try again */
2574         if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING){
2575                 if (port->flags & ASYNC_CLOSING)
2576                         interruptible_sleep_on(&port->close_wait);
2577                 retval = ((port->flags & ASYNC_HUP_NOTIFY) ?
2578                         -EAGAIN : -ERESTARTSYS);
2579                 goto cleanup;
2580         }
2581
2582         tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2583
2584         spin_lock_irqsave(&info->netlock, flags);
2585         if (info->netcount) {
2586                 retval = -EBUSY;
2587                 spin_unlock_irqrestore(&info->netlock, flags);
2588                 goto cleanup;
2589         }
2590         spin_lock(&port->lock);
2591         port->count++;
2592         spin_unlock(&port->lock);
2593         spin_unlock_irqrestore(&info->netlock, flags);
2594
2595         if (port->count == 1) {
2596                 /* 1st open on this device, init hardware */
2597                 retval = startup(info, tty);
2598                 if (retval < 0)
2599                         goto cleanup;
2600         }
2601
2602         retval = tty_port_block_til_ready(&info->port, tty, filp);
2603         if (retval) {
2604                 if (debug_level >= DEBUG_LEVEL_INFO)
2605                         printk("%s(%d):block_til_ready(%s) returned %d\n",
2606                                  __FILE__,__LINE__, info->device_name, retval);
2607                 goto cleanup;
2608         }
2609
2610         if (debug_level >= DEBUG_LEVEL_INFO)
2611                 printk("%s(%d):mgslpc_open(%s) success\n",
2612                          __FILE__,__LINE__, info->device_name);
2613         retval = 0;
2614
2615 cleanup:
2616         return retval;
2617 }
2618
2619 /*
2620  * /proc fs routines....
2621  */
2622
2623 static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2624 {
2625         char    stat_buf[30];
2626         unsigned long flags;
2627
2628         seq_printf(m, "%s:io:%04X irq:%d",
2629                       info->device_name, info->io_base, info->irq_level);
2630
2631         /* output current serial signal states */
2632         spin_lock_irqsave(&info->lock,flags);
2633         get_signals(info);
2634         spin_unlock_irqrestore(&info->lock,flags);
2635
2636         stat_buf[0] = 0;
2637         stat_buf[1] = 0;
2638         if (info->serial_signals & SerialSignal_RTS)
2639                 strcat(stat_buf, "|RTS");
2640         if (info->serial_signals & SerialSignal_CTS)
2641                 strcat(stat_buf, "|CTS");
2642         if (info->serial_signals & SerialSignal_DTR)
2643                 strcat(stat_buf, "|DTR");
2644         if (info->serial_signals & SerialSignal_DSR)
2645                 strcat(stat_buf, "|DSR");
2646         if (info->serial_signals & SerialSignal_DCD)
2647                 strcat(stat_buf, "|CD");
2648         if (info->serial_signals & SerialSignal_RI)
2649                 strcat(stat_buf, "|RI");
2650
2651         if (info->params.mode == MGSL_MODE_HDLC) {
2652                 seq_printf(m, " HDLC txok:%d rxok:%d",
2653                               info->icount.txok, info->icount.rxok);
2654                 if (info->icount.txunder)
2655                         seq_printf(m, " txunder:%d", info->icount.txunder);
2656                 if (info->icount.txabort)
2657                         seq_printf(m, " txabort:%d", info->icount.txabort);
2658                 if (info->icount.rxshort)
2659                         seq_printf(m, " rxshort:%d", info->icount.rxshort);
2660                 if (info->icount.rxlong)
2661                         seq_printf(m, " rxlong:%d", info->icount.rxlong);
2662                 if (info->icount.rxover)
2663                         seq_printf(m, " rxover:%d", info->icount.rxover);
2664                 if (info->icount.rxcrc)
2665                         seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2666         } else {
2667                 seq_printf(m, " ASYNC tx:%d rx:%d",
2668                               info->icount.tx, info->icount.rx);
2669                 if (info->icount.frame)
2670                         seq_printf(m, " fe:%d", info->icount.frame);
2671                 if (info->icount.parity)
2672                         seq_printf(m, " pe:%d", info->icount.parity);
2673                 if (info->icount.brk)
2674                         seq_printf(m, " brk:%d", info->icount.brk);
2675                 if (info->icount.overrun)
2676                         seq_printf(m, " oe:%d", info->icount.overrun);
2677         }
2678
2679         /* Append serial signal status to end */
2680         seq_printf(m, " %s\n", stat_buf+1);
2681
2682         seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2683                        info->tx_active,info->bh_requested,info->bh_running,
2684                        info->pending_bh);
2685 }
2686
2687 /* Called to print information about devices
2688  */
2689 static int mgslpc_proc_show(struct seq_file *m, void *v)
2690 {
2691         MGSLPC_INFO *info;
2692
2693         seq_printf(m, "synclink driver:%s\n", driver_version);
2694
2695         info = mgslpc_device_list;
2696         while( info ) {
2697                 line_info(m, info);
2698                 info = info->next_device;
2699         }
2700         return 0;
2701 }
2702
2703 static int mgslpc_proc_open(struct inode *inode, struct file *file)
2704 {
2705         return single_open(file, mgslpc_proc_show, NULL);
2706 }
2707
2708 static const struct file_operations mgslpc_proc_fops = {
2709         .owner          = THIS_MODULE,
2710         .open           = mgslpc_proc_open,
2711         .read           = seq_read,
2712         .llseek         = seq_lseek,
2713         .release        = single_release,
2714 };
2715
2716 static int rx_alloc_buffers(MGSLPC_INFO *info)
2717 {
2718         /* each buffer has header and data */
2719         info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2720
2721         /* calculate total allocation size for 8 buffers */
2722         info->rx_buf_total_size = info->rx_buf_size * 8;
2723
2724         /* limit total allocated memory */
2725         if (info->rx_buf_total_size > 0x10000)
2726                 info->rx_buf_total_size = 0x10000;
2727
2728         /* calculate number of buffers */
2729         info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2730
2731         info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2732         if (info->rx_buf == NULL)
2733                 return -ENOMEM;
2734
2735         rx_reset_buffers(info);
2736         return 0;
2737 }
2738
2739 static void rx_free_buffers(MGSLPC_INFO *info)
2740 {
2741         kfree(info->rx_buf);
2742         info->rx_buf = NULL;
2743 }
2744
2745 static int claim_resources(MGSLPC_INFO *info)
2746 {
2747         if (rx_alloc_buffers(info) < 0 ) {
2748                 printk( "Cant allocate rx buffer %s\n", info->device_name);
2749                 release_resources(info);
2750                 return -ENODEV;
2751         }
2752         return 0;
2753 }
2754
2755 static void release_resources(MGSLPC_INFO *info)
2756 {
2757         if (debug_level >= DEBUG_LEVEL_INFO)
2758                 printk("release_resources(%s)\n", info->device_name);
2759         rx_free_buffers(info);
2760 }
2761
2762 /* Add the specified device instance data structure to the
2763  * global linked list of devices and increment the device count.
2764  *
2765  * Arguments:           info    pointer to device instance data
2766  */
2767 static void mgslpc_add_device(MGSLPC_INFO *info)
2768 {
2769         info->next_device = NULL;
2770         info->line = mgslpc_device_count;
2771         sprintf(info->device_name,"ttySLP%d",info->line);
2772
2773         if (info->line < MAX_DEVICE_COUNT) {
2774                 if (maxframe[info->line])
2775                         info->max_frame_size = maxframe[info->line];
2776         }
2777
2778         mgslpc_device_count++;
2779
2780         if (!mgslpc_device_list)
2781                 mgslpc_device_list = info;
2782         else {
2783                 MGSLPC_INFO *current_dev = mgslpc_device_list;
2784                 while( current_dev->next_device )
2785                         current_dev = current_dev->next_device;
2786                 current_dev->next_device = info;
2787         }
2788
2789         if (info->max_frame_size < 4096)
2790                 info->max_frame_size = 4096;
2791         else if (info->max_frame_size > 65535)
2792                 info->max_frame_size = 65535;
2793
2794         printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2795                 info->device_name, info->io_base, info->irq_level);
2796
2797 #if SYNCLINK_GENERIC_HDLC
2798         hdlcdev_init(info);
2799 #endif
2800 }
2801
2802 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2803 {
2804         MGSLPC_INFO *info = mgslpc_device_list;
2805         MGSLPC_INFO *last = NULL;
2806
2807         while(info) {
2808                 if (info == remove_info) {
2809                         if (last)
2810                                 last->next_device = info->next_device;
2811                         else
2812                                 mgslpc_device_list = info->next_device;
2813 #if SYNCLINK_GENERIC_HDLC
2814                         hdlcdev_exit(info);
2815 #endif
2816                         release_resources(info);
2817                         kfree(info);
2818                         mgslpc_device_count--;
2819                         return;
2820                 }
2821                 last = info;
2822                 info = info->next_device;
2823         }
2824 }
2825
2826 static struct pcmcia_device_id mgslpc_ids[] = {
2827         PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2828         PCMCIA_DEVICE_NULL
2829 };
2830 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2831
2832 static struct pcmcia_driver mgslpc_driver = {
2833         .owner          = THIS_MODULE,
2834         .drv            = {
2835                 .name   = "synclink_cs",
2836         },
2837         .probe          = mgslpc_probe,
2838         .remove         = mgslpc_detach,
2839         .id_table       = mgslpc_ids,
2840         .suspend        = mgslpc_suspend,
2841         .resume         = mgslpc_resume,
2842 };
2843
2844 static const struct tty_operations mgslpc_ops = {
2845         .open = mgslpc_open,
2846         .close = mgslpc_close,
2847         .write = mgslpc_write,
2848         .put_char = mgslpc_put_char,
2849         .flush_chars = mgslpc_flush_chars,
2850         .write_room = mgslpc_write_room,
2851         .chars_in_buffer = mgslpc_chars_in_buffer,
2852         .flush_buffer = mgslpc_flush_buffer,
2853         .ioctl = mgslpc_ioctl,
2854         .throttle = mgslpc_throttle,
2855         .unthrottle = mgslpc_unthrottle,
2856         .send_xchar = mgslpc_send_xchar,
2857         .break_ctl = mgslpc_break,
2858         .wait_until_sent = mgslpc_wait_until_sent,
2859         .set_termios = mgslpc_set_termios,
2860         .stop = tx_pause,
2861         .start = tx_release,
2862         .hangup = mgslpc_hangup,
2863         .tiocmget = tiocmget,
2864         .tiocmset = tiocmset,
2865         .proc_fops = &mgslpc_proc_fops,
2866 };
2867
2868 static void synclink_cs_cleanup(void)
2869 {
2870         int rc;
2871
2872         printk("Unloading %s: version %s\n", driver_name, driver_version);
2873
2874         while(mgslpc_device_list)
2875                 mgslpc_remove_device(mgslpc_device_list);
2876
2877         if (serial_driver) {
2878                 if ((rc = tty_unregister_driver(serial_driver)))
2879                         printk("%s(%d) failed to unregister tty driver err=%d\n",
2880                                __FILE__,__LINE__,rc);
2881                 put_tty_driver(serial_driver);
2882         }
2883
2884         pcmcia_unregister_driver(&mgslpc_driver);
2885 }
2886
2887 static int __init synclink_cs_init(void)
2888 {
2889     int rc;
2890
2891     if (break_on_load) {
2892             mgslpc_get_text_ptr();
2893             BREAKPOINT();
2894     }
2895
2896     printk("%s %s\n", driver_name, driver_version);
2897
2898     if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
2899             return rc;
2900
2901     serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
2902     if (!serial_driver) {
2903             rc = -ENOMEM;
2904             goto error;
2905     }
2906
2907     /* Initialize the tty_driver structure */
2908
2909     serial_driver->owner = THIS_MODULE;
2910     serial_driver->driver_name = "synclink_cs";
2911     serial_driver->name = "ttySLP";
2912     serial_driver->major = ttymajor;
2913     serial_driver->minor_start = 64;
2914     serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2915     serial_driver->subtype = SERIAL_TYPE_NORMAL;
2916     serial_driver->init_termios = tty_std_termios;
2917     serial_driver->init_termios.c_cflag =
2918             B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2919     serial_driver->flags = TTY_DRIVER_REAL_RAW;
2920     tty_set_operations(serial_driver, &mgslpc_ops);
2921
2922     if ((rc = tty_register_driver(serial_driver)) < 0) {
2923             printk("%s(%d):Couldn't register serial driver\n",
2924                    __FILE__,__LINE__);
2925             put_tty_driver(serial_driver);
2926             serial_driver = NULL;
2927             goto error;
2928     }
2929
2930     printk("%s %s, tty major#%d\n",
2931            driver_name, driver_version,
2932            serial_driver->major);
2933
2934     return 0;
2935
2936 error:
2937     synclink_cs_cleanup();
2938     return rc;
2939 }
2940
2941 static void __exit synclink_cs_exit(void)
2942 {
2943         synclink_cs_cleanup();
2944 }
2945
2946 module_init(synclink_cs_init);
2947 module_exit(synclink_cs_exit);
2948
2949 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2950 {
2951         unsigned int M, N;
2952         unsigned char val;
2953
2954         /* note:standard BRG mode is broken in V3.2 chip
2955          * so enhanced mode is always used
2956          */
2957
2958         if (rate) {
2959                 N = 3686400 / rate;
2960                 if (!N)
2961                         N = 1;
2962                 N >>= 1;
2963                 for (M = 1; N > 64 && M < 16; M++)
2964                         N >>= 1;
2965                 N--;
2966
2967                 /* BGR[5..0] = N
2968                  * BGR[9..6] = M
2969                  * BGR[7..0] contained in BGR register
2970                  * BGR[9..8] contained in CCR2[7..6]
2971                  * divisor = (N+1)*2^M
2972                  *
2973                  * Note: M *must* not be zero (causes asymetric duty cycle)
2974                  */
2975                 write_reg(info, (unsigned char) (channel + BGR),
2976                                   (unsigned char) ((M << 6) + N));
2977                 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2978                 val |= ((M << 4) & 0xc0);
2979                 write_reg(info, (unsigned char) (channel + CCR2), val);
2980         }
2981 }
2982
2983 /* Enabled the AUX clock output at the specified frequency.
2984  */
2985 static void enable_auxclk(MGSLPC_INFO *info)
2986 {
2987         unsigned char val;
2988
2989         /* MODE
2990          *
2991          * 07..06  MDS[1..0] 10 = transparent HDLC mode
2992          * 05      ADM Address Mode, 0 = no addr recognition
2993          * 04      TMD Timer Mode, 0 = external
2994          * 03      RAC Receiver Active, 0 = inactive
2995          * 02      RTS 0=RTS active during xmit, 1=RTS always active
2996          * 01      TRS Timer Resolution, 1=512
2997          * 00      TLP Test Loop, 0 = no loop
2998          *
2999          * 1000 0010
3000          */
3001         val = 0x82;
3002
3003         /* channel B RTS is used to enable AUXCLK driver on SP505 */
3004         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3005                 val |= BIT2;
3006         write_reg(info, CHB + MODE, val);
3007
3008         /* CCR0
3009          *
3010          * 07      PU Power Up, 1=active, 0=power down
3011          * 06      MCE Master Clock Enable, 1=enabled
3012          * 05      Reserved, 0
3013          * 04..02  SC[2..0] Encoding
3014          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3015          *
3016          * 11000000
3017          */
3018         write_reg(info, CHB + CCR0, 0xc0);
3019
3020         /* CCR1
3021          *
3022          * 07      SFLG Shared Flag, 0 = disable shared flags
3023          * 06      GALP Go Active On Loop, 0 = not used
3024          * 05      GLP Go On Loop, 0 = not used
3025          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3026          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3027          * 02..00  CM[2..0] Clock Mode
3028          *
3029          * 0001 0111
3030          */
3031         write_reg(info, CHB + CCR1, 0x17);
3032
3033         /* CCR2 (Channel B)
3034          *
3035          * 07..06  BGR[9..8] Baud rate bits 9..8
3036          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3037          * 04      SSEL Clock source select, 1=submode b
3038          * 03      TOE 0=TxCLK is input, 1=TxCLK is output
3039          * 02      RWX Read/Write Exchange 0=disabled
3040          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3041          * 00      DIV, data inversion 0=disabled, 1=enabled
3042          *
3043          * 0011 1000
3044          */
3045         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3046                 write_reg(info, CHB + CCR2, 0x38);
3047         else
3048                 write_reg(info, CHB + CCR2, 0x30);
3049
3050         /* CCR4
3051          *
3052          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3053          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3054          * 05      TST1 Test Pin, 0=normal operation
3055          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3056          * 03..02  Reserved, must be 0
3057          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3058          *
3059          * 0101 0000
3060          */
3061         write_reg(info, CHB + CCR4, 0x50);
3062
3063         /* if auxclk not enabled, set internal BRG so
3064          * CTS transitions can be detected (requires TxC)
3065          */
3066         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3067                 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3068         else
3069                 mgslpc_set_rate(info, CHB, 921600);
3070 }
3071
3072 static void loopback_enable(MGSLPC_INFO *info)
3073 {
3074         unsigned char val;
3075
3076         /* CCR1:02..00  CM[2..0] Clock Mode = 111 (clock mode 7) */
3077         val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3078         write_reg(info, CHA + CCR1, val);
3079
3080         /* CCR2:04 SSEL Clock source select, 1=submode b */
3081         val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3082         write_reg(info, CHA + CCR2, val);
3083
3084         /* set LinkSpeed if available, otherwise default to 2Mbps */
3085         if (info->params.clock_speed)
3086                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3087         else
3088                 mgslpc_set_rate(info, CHA, 1843200);
3089
3090         /* MODE:00 TLP Test Loop, 1=loopback enabled */
3091         val = read_reg(info, CHA + MODE) | BIT0;
3092         write_reg(info, CHA + MODE, val);
3093 }
3094
3095 static void hdlc_mode(MGSLPC_INFO *info)
3096 {
3097         unsigned char val;
3098         unsigned char clkmode, clksubmode;
3099
3100         /* disable all interrupts */
3101         irq_disable(info, CHA, 0xffff);
3102         irq_disable(info, CHB, 0xffff);
3103         port_irq_disable(info, 0xff);
3104
3105         /* assume clock mode 0a, rcv=RxC xmt=TxC */
3106         clkmode = clksubmode = 0;
3107         if (info->params.flags & HDLC_FLAG_RXC_DPLL
3108             && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3109                 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3110                 clkmode = 7;
3111         } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3112                  && info->params.flags & HDLC_FLAG_TXC_BRG) {
3113                 /* clock mode 7b, rcv = BRG, xmt = BRG */
3114                 clkmode = 7;
3115                 clksubmode = 1;
3116         } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3117                 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3118                         /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3119                         clkmode = 6;
3120                         clksubmode = 1;
3121                 } else {
3122                         /* clock mode 6a, rcv = DPLL, xmt = TxC */
3123                         clkmode = 6;
3124                 }
3125         } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3126                 /* clock mode 0b, rcv = RxC, xmt = BRG */
3127                 clksubmode = 1;
3128         }
3129
3130         /* MODE
3131          *
3132          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3133          * 05      ADM Address Mode, 0 = no addr recognition
3134          * 04      TMD Timer Mode, 0 = external
3135          * 03      RAC Receiver Active, 0 = inactive
3136          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3137          * 01      TRS Timer Resolution, 1=512
3138          * 00      TLP Test Loop, 0 = no loop
3139          *
3140          * 1000 0010
3141          */
3142         val = 0x82;
3143         if (info->params.loopback)
3144                 val |= BIT0;
3145
3146         /* preserve RTS state */
3147         if (info->serial_signals & SerialSignal_RTS)
3148                 val |= BIT2;
3149         write_reg(info, CHA + MODE, val);
3150
3151         /* CCR0
3152          *
3153          * 07      PU Power Up, 1=active, 0=power down
3154          * 06      MCE Master Clock Enable, 1=enabled
3155          * 05      Reserved, 0
3156          * 04..02  SC[2..0] Encoding
3157          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3158          *
3159          * 11000000
3160          */
3161         val = 0xc0;
3162         switch (info->params.encoding)
3163         {
3164         case HDLC_ENCODING_NRZI:
3165                 val |= BIT3;
3166                 break;
3167         case HDLC_ENCODING_BIPHASE_SPACE:
3168                 val |= BIT4;
3169                 break;          // FM0
3170         case HDLC_ENCODING_BIPHASE_MARK:
3171                 val |= BIT4 + BIT2;
3172                 break;          // FM1
3173         case HDLC_ENCODING_BIPHASE_LEVEL:
3174                 val |= BIT4 + BIT3;
3175                 break;          // Manchester
3176         }
3177         write_reg(info, CHA + CCR0, val);
3178
3179         /* CCR1
3180          *
3181          * 07      SFLG Shared Flag, 0 = disable shared flags
3182          * 06      GALP Go Active On Loop, 0 = not used
3183          * 05      GLP Go On Loop, 0 = not used
3184          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3185          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3186          * 02..00  CM[2..0] Clock Mode
3187          *
3188          * 0001 0000
3189          */
3190         val = 0x10 + clkmode;
3191         write_reg(info, CHA + CCR1, val);
3192
3193         /* CCR2
3194          *
3195          * 07..06  BGR[9..8] Baud rate bits 9..8
3196          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3197          * 04      SSEL Clock source select, 1=submode b
3198          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3199          * 02      RWX Read/Write Exchange 0=disabled
3200          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3201          * 00      DIV, data inversion 0=disabled, 1=enabled
3202          *
3203          * 0000 0000
3204          */
3205         val = 0x00;
3206         if (clkmode == 2 || clkmode == 3 || clkmode == 6
3207             || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3208                 val |= BIT5;
3209         if (clksubmode)
3210                 val |= BIT4;
3211         if (info->params.crc_type == HDLC_CRC_32_CCITT)
3212                 val |= BIT1;
3213         if (info->params.encoding == HDLC_ENCODING_NRZB)
3214                 val |= BIT0;
3215         write_reg(info, CHA + CCR2, val);
3216
3217         /* CCR3
3218          *
3219          * 07..06  PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3220          * 05      EPT Enable preamble transmission, 1=enabled
3221          * 04      RADD Receive address pushed to FIFO, 0=disabled
3222          * 03      CRL CRC Reset Level, 0=FFFF
3223          * 02      RCRC Rx CRC 0=On 1=Off
3224          * 01      TCRC Tx CRC 0=On 1=Off
3225          * 00      PSD DPLL Phase Shift Disable
3226          *
3227          * 0000 0000
3228          */
3229         val = 0x00;
3230         if (info->params.crc_type == HDLC_CRC_NONE)
3231                 val |= BIT2 + BIT1;
3232         if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3233                 val |= BIT5;
3234         switch (info->params.preamble_length)
3235         {
3236         case HDLC_PREAMBLE_LENGTH_16BITS:
3237                 val |= BIT6;
3238                 break;
3239         case HDLC_PREAMBLE_LENGTH_32BITS:
3240                 val |= BIT6;
3241                 break;
3242         case HDLC_PREAMBLE_LENGTH_64BITS:
3243                 val |= BIT7 + BIT6;
3244                 break;
3245         }
3246         write_reg(info, CHA + CCR3, val);
3247
3248         /* PRE - Preamble pattern */
3249         val = 0;
3250         switch (info->params.preamble)
3251         {
3252         case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3253         case HDLC_PREAMBLE_PATTERN_10:    val = 0xaa; break;
3254         case HDLC_PREAMBLE_PATTERN_01:    val = 0x55; break;
3255         case HDLC_PREAMBLE_PATTERN_ONES:  val = 0xff; break;
3256         }
3257         write_reg(info, CHA + PRE, val);
3258
3259         /* CCR4
3260          *
3261          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3262          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3263          * 05      TST1 Test Pin, 0=normal operation
3264          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3265          * 03..02  Reserved, must be 0
3266          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3267          *
3268          * 0101 0000
3269          */
3270         val = 0x50;
3271         write_reg(info, CHA + CCR4, val);
3272         if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3273                 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3274         else
3275                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3276
3277         /* RLCR Receive length check register
3278          *
3279          * 7     1=enable receive length check
3280          * 6..0  Max frame length = (RL + 1) * 32
3281          */
3282         write_reg(info, CHA + RLCR, 0);
3283
3284         /* XBCH Transmit Byte Count High
3285          *
3286          * 07      DMA mode, 0 = interrupt driven
3287          * 06      NRM, 0=ABM (ignored)
3288          * 05      CAS Carrier Auto Start
3289          * 04      XC Transmit Continuously (ignored)
3290          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3291          *
3292          * 0000 0000
3293          */
3294         val = 0x00;
3295         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3296                 val |= BIT5;
3297         write_reg(info, CHA + XBCH, val);
3298         enable_auxclk(info);
3299         if (info->params.loopback || info->testing_irq)
3300                 loopback_enable(info);
3301         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3302         {
3303                 irq_enable(info, CHB, IRQ_CTS);
3304                 /* PVR[3] 1=AUTO CTS active */
3305                 set_reg_bits(info, CHA + PVR, BIT3);
3306         } else
3307                 clear_reg_bits(info, CHA + PVR, BIT3);
3308
3309         irq_enable(info, CHA,
3310                          IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3311                          IRQ_UNDERRUN + IRQ_TXFIFO);
3312         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3313         wait_command_complete(info, CHA);
3314         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3315
3316         /* Master clock mode enabled above to allow reset commands
3317          * to complete even if no data clocks are present.
3318          *
3319          * Disable master clock mode for normal communications because
3320          * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3321          * IRQ when in master clock mode.
3322          *
3323          * Leave master clock mode enabled for IRQ test because the
3324          * timer IRQ used by the test can only happen in master clock mode.
3325          */
3326         if (!info->testing_irq)
3327                 clear_reg_bits(info, CHA + CCR0, BIT6);
3328
3329         tx_set_idle(info);
3330
3331         tx_stop(info);
3332         rx_stop(info);
3333 }
3334
3335 static void rx_stop(MGSLPC_INFO *info)
3336 {
3337         if (debug_level >= DEBUG_LEVEL_ISR)
3338                 printk("%s(%d):rx_stop(%s)\n",
3339                          __FILE__,__LINE__, info->device_name );
3340
3341         /* MODE:03 RAC Receiver Active, 0=inactive */
3342         clear_reg_bits(info, CHA + MODE, BIT3);
3343
3344         info->rx_enabled = false;
3345         info->rx_overflow = false;
3346 }
3347
3348 static void rx_start(MGSLPC_INFO *info)
3349 {
3350         if (debug_level >= DEBUG_LEVEL_ISR)
3351                 printk("%s(%d):rx_start(%s)\n",
3352                          __FILE__,__LINE__, info->device_name );
3353
3354         rx_reset_buffers(info);
3355         info->rx_enabled = false;
3356         info->rx_overflow = false;
3357
3358         /* MODE:03 RAC Receiver Active, 1=active */
3359         set_reg_bits(info, CHA + MODE, BIT3);
3360
3361         info->rx_enabled = true;
3362 }
3363
3364 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3365 {
3366         if (debug_level >= DEBUG_LEVEL_ISR)
3367                 printk("%s(%d):tx_start(%s)\n",
3368                          __FILE__,__LINE__, info->device_name );
3369
3370         if (info->tx_count) {
3371                 /* If auto RTS enabled and RTS is inactive, then assert */
3372                 /* RTS and set a flag indicating that the driver should */
3373                 /* negate RTS when the transmission completes. */
3374                 info->drop_rts_on_tx_done = false;
3375
3376                 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3377                         get_signals(info);
3378                         if (!(info->serial_signals & SerialSignal_RTS)) {
3379                                 info->serial_signals |= SerialSignal_RTS;
3380                                 set_signals(info);
3381                                 info->drop_rts_on_tx_done = true;
3382                         }
3383                 }
3384
3385                 if (info->params.mode == MGSL_MODE_ASYNC) {
3386                         if (!info->tx_active) {
3387                                 info->tx_active = true;
3388                                 tx_ready(info, tty);
3389                         }
3390                 } else {
3391                         info->tx_active = true;
3392                         tx_ready(info, tty);
3393                         mod_timer(&info->tx_timer, jiffies +
3394                                         msecs_to_jiffies(5000));
3395                 }
3396         }
3397
3398         if (!info->tx_enabled)
3399                 info->tx_enabled = true;
3400 }
3401
3402 static void tx_stop(MGSLPC_INFO *info)
3403 {
3404         if (debug_level >= DEBUG_LEVEL_ISR)
3405                 printk("%s(%d):tx_stop(%s)\n",
3406                          __FILE__,__LINE__, info->device_name );
3407
3408         del_timer(&info->tx_timer);
3409
3410         info->tx_enabled = false;
3411         info->tx_active = false;
3412 }
3413
3414 /* Reset the adapter to a known state and prepare it for further use.
3415  */
3416 static void reset_device(MGSLPC_INFO *info)
3417 {
3418         /* power up both channels (set BIT7) */
3419         write_reg(info, CHA + CCR0, 0x80);
3420         write_reg(info, CHB + CCR0, 0x80);
3421         write_reg(info, CHA + MODE, 0);
3422         write_reg(info, CHB + MODE, 0);
3423
3424         /* disable all interrupts */
3425         irq_disable(info, CHA, 0xffff);
3426         irq_disable(info, CHB, 0xffff);
3427         port_irq_disable(info, 0xff);
3428
3429         /* PCR Port Configuration Register
3430          *
3431          * 07..04  DEC[3..0] Serial I/F select outputs
3432          * 03      output, 1=AUTO CTS control enabled
3433          * 02      RI Ring Indicator input 0=active
3434          * 01      DSR input 0=active
3435          * 00      DTR output 0=active
3436          *
3437          * 0000 0110
3438          */
3439         write_reg(info, PCR, 0x06);
3440
3441         /* PVR Port Value Register
3442          *
3443          * 07..04  DEC[3..0] Serial I/F select (0000=disabled)
3444          * 03      AUTO CTS output 1=enabled
3445          * 02      RI Ring Indicator input
3446          * 01      DSR input
3447          * 00      DTR output (1=inactive)
3448          *
3449          * 0000 0001
3450          */
3451 //      write_reg(info, PVR, PVR_DTR);
3452
3453         /* IPC Interrupt Port Configuration
3454          *
3455          * 07      VIS 1=Masked interrupts visible
3456          * 06..05  Reserved, 0
3457          * 04..03  SLA Slave address, 00 ignored
3458          * 02      CASM Cascading Mode, 1=daisy chain
3459          * 01..00  IC[1..0] Interrupt Config, 01=push-pull output, active low
3460          *
3461          * 0000 0101
3462          */
3463         write_reg(info, IPC, 0x05);
3464 }
3465
3466 static void async_mode(MGSLPC_INFO *info)
3467 {
3468         unsigned char val;
3469
3470         /* disable all interrupts */
3471         irq_disable(info, CHA, 0xffff);
3472         irq_disable(info, CHB, 0xffff);
3473         port_irq_disable(info, 0xff);
3474
3475         /* MODE
3476          *
3477          * 07      Reserved, 0
3478          * 06      FRTS RTS State, 0=active
3479          * 05      FCTS Flow Control on CTS
3480          * 04      FLON Flow Control Enable
3481          * 03      RAC Receiver Active, 0 = inactive
3482          * 02      RTS 0=Auto RTS, 1=manual RTS
3483          * 01      TRS Timer Resolution, 1=512
3484          * 00      TLP Test Loop, 0 = no loop
3485          *
3486          * 0000 0110
3487          */
3488         val = 0x06;
3489         if (info->params.loopback)
3490                 val |= BIT0;
3491
3492         /* preserve RTS state */
3493         if (!(info->serial_signals & SerialSignal_RTS))
3494                 val |= BIT6;
3495         write_reg(info, CHA + MODE, val);
3496
3497         /* CCR0
3498          *
3499          * 07      PU Power Up, 1=active, 0=power down
3500          * 06      MCE Master Clock Enable, 1=enabled
3501          * 05      Reserved, 0
3502          * 04..02  SC[2..0] Encoding, 000=NRZ
3503          * 01..00  SM[1..0] Serial Mode, 11=Async
3504          *
3505          * 1000 0011
3506          */
3507         write_reg(info, CHA + CCR0, 0x83);
3508
3509         /* CCR1
3510          *
3511          * 07..05  Reserved, 0
3512          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3513          * 03      BCR Bit Clock Rate, 1=16x
3514          * 02..00  CM[2..0] Clock Mode, 111=BRG
3515          *
3516          * 0001 1111
3517          */
3518         write_reg(info, CHA + CCR1, 0x1f);
3519
3520         /* CCR2 (channel A)
3521          *
3522          * 07..06  BGR[9..8] Baud rate bits 9..8
3523          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3524          * 04      SSEL Clock source select, 1=submode b
3525          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3526          * 02      RWX Read/Write Exchange 0=disabled
3527          * 01      Reserved, 0
3528          * 00      DIV, data inversion 0=disabled, 1=enabled
3529          *
3530          * 0001 0000
3531          */
3532         write_reg(info, CHA + CCR2, 0x10);
3533
3534         /* CCR3
3535          *
3536          * 07..01  Reserved, 0
3537          * 00      PSD DPLL Phase Shift Disable
3538          *
3539          * 0000 0000
3540          */
3541         write_reg(info, CHA + CCR3, 0);
3542
3543         /* CCR4
3544          *
3545          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3546          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3547          * 05      TST1 Test Pin, 0=normal operation
3548          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3549          * 03..00  Reserved, must be 0
3550          *
3551          * 0101 0000
3552          */
3553         write_reg(info, CHA + CCR4, 0x50);
3554         mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3555
3556         /* DAFO Data Format
3557          *
3558          * 07      Reserved, 0
3559          * 06      XBRK transmit break, 0=normal operation
3560          * 05      Stop bits (0=1, 1=2)
3561          * 04..03  PAR[1..0] Parity (01=odd, 10=even)
3562          * 02      PAREN Parity Enable
3563          * 01..00  CHL[1..0] Character Length (00=8, 01=7)
3564          *
3565          */
3566         val = 0x00;
3567         if (info->params.data_bits != 8)
3568                 val |= BIT0;    /* 7 bits */
3569         if (info->params.stop_bits != 1)
3570                 val |= BIT5;
3571         if (info->params.parity != ASYNC_PARITY_NONE)
3572         {
3573                 val |= BIT2;    /* Parity enable */
3574                 if (info->params.parity == ASYNC_PARITY_ODD)
3575                         val |= BIT3;
3576                 else
3577                         val |= BIT4;
3578         }
3579         write_reg(info, CHA + DAFO, val);
3580
3581         /* RFC Rx FIFO Control
3582          *
3583          * 07      Reserved, 0
3584          * 06      DPS, 1=parity bit not stored in data byte
3585          * 05      DXS, 0=all data stored in FIFO (including XON/XOFF)
3586          * 04      RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3587          * 03..02  RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3588          * 01      Reserved, 0
3589          * 00      TCDE Terminate Char Detect Enable, 0=disabled
3590          *
3591          * 0101 1100
3592          */
3593         write_reg(info, CHA + RFC, 0x5c);
3594
3595         /* RLCR Receive length check register
3596          *
3597          * Max frame length = (RL + 1) * 32
3598          */
3599         write_reg(info, CHA + RLCR, 0);
3600
3601         /* XBCH Transmit Byte Count High
3602          *
3603          * 07      DMA mode, 0 = interrupt driven
3604          * 06      NRM, 0=ABM (ignored)
3605          * 05      CAS Carrier Auto Start
3606          * 04      XC Transmit Continuously (ignored)
3607          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3608          *
3609          * 0000 0000
3610          */
3611         val = 0x00;
3612         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3613                 val |= BIT5;
3614         write_reg(info, CHA + XBCH, val);
3615         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3616                 irq_enable(info, CHA, IRQ_CTS);
3617
3618         /* MODE:03 RAC Receiver Active, 1=active */
3619         set_reg_bits(info, CHA + MODE, BIT3);
3620         enable_auxclk(info);
3621         if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3622                 irq_enable(info, CHB, IRQ_CTS);
3623                 /* PVR[3] 1=AUTO CTS active */
3624                 set_reg_bits(info, CHA + PVR, BIT3);
3625         } else
3626                 clear_reg_bits(info, CHA + PVR, BIT3);
3627         irq_enable(info, CHA,
3628                           IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3629                           IRQ_ALLSENT + IRQ_TXFIFO);
3630         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3631         wait_command_complete(info, CHA);
3632         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3633 }
3634
3635 /* Set the HDLC idle mode for the transmitter.
3636  */
3637 static void tx_set_idle(MGSLPC_INFO *info)
3638 {
3639         /* Note: ESCC2 only supports flags and one idle modes */
3640         if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3641                 set_reg_bits(info, CHA + CCR1, BIT3);
3642         else
3643                 clear_reg_bits(info, CHA + CCR1, BIT3);
3644 }
3645
3646 /* get state of the V24 status (input) signals.
3647  */
3648 static void get_signals(MGSLPC_INFO *info)
3649 {
3650         unsigned char status = 0;
3651
3652         /* preserve DTR and RTS */
3653         info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3654
3655         if (read_reg(info, CHB + VSTR) & BIT7)
3656                 info->serial_signals |= SerialSignal_DCD;
3657         if (read_reg(info, CHB + STAR) & BIT1)
3658                 info->serial_signals |= SerialSignal_CTS;
3659
3660         status = read_reg(info, CHA + PVR);
3661         if (!(status & PVR_RI))
3662                 info->serial_signals |= SerialSignal_RI;
3663         if (!(status & PVR_DSR))
3664                 info->serial_signals |= SerialSignal_DSR;
3665 }
3666
3667 /* Set the state of DTR and RTS based on contents of
3668  * serial_signals member of device extension.
3669  */
3670 static void set_signals(MGSLPC_INFO *info)
3671 {
3672         unsigned char val;
3673
3674         val = read_reg(info, CHA + MODE);
3675         if (info->params.mode == MGSL_MODE_ASYNC) {
3676                 if (info->serial_signals & SerialSignal_RTS)
3677                         val &= ~BIT6;
3678                 else
3679                         val |= BIT6;
3680         } else {
3681                 if (info->serial_signals & SerialSignal_RTS)
3682                         val |= BIT2;
3683                 else
3684                         val &= ~BIT2;
3685         }
3686         write_reg(info, CHA + MODE, val);
3687
3688         if (info->serial_signals & SerialSignal_DTR)
3689                 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3690         else
3691                 set_reg_bits(info, CHA + PVR, PVR_DTR);
3692 }
3693
3694 static void rx_reset_buffers(MGSLPC_INFO *info)
3695 {
3696         RXBUF *buf;
3697         int i;
3698
3699         info->rx_put = 0;
3700         info->rx_get = 0;
3701         info->rx_frame_count = 0;
3702         for (i=0 ; i < info->rx_buf_count ; i++) {
3703                 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3704                 buf->status = buf->count = 0;
3705         }
3706 }
3707
3708 /* Attempt to return a received HDLC frame
3709  * Only frames received without errors are returned.
3710  *
3711  * Returns true if frame returned, otherwise false
3712  */
3713 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3714 {
3715         unsigned short status;
3716         RXBUF *buf;
3717         unsigned int framesize = 0;
3718         unsigned long flags;
3719         bool return_frame = false;
3720
3721         if (info->rx_frame_count == 0)
3722                 return false;
3723
3724         buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3725
3726         status = buf->status;
3727
3728         /* 07  VFR  1=valid frame
3729          * 06  RDO  1=data overrun
3730          * 05  CRC  1=OK, 0=error
3731          * 04  RAB  1=frame aborted
3732          */
3733         if ((status & 0xf0) != 0xA0) {
3734                 if (!(status & BIT7) || (status & BIT4))
3735                         info->icount.rxabort++;
3736                 else if (status & BIT6)
3737                         info->icount.rxover++;
3738                 else if (!(status & BIT5)) {
3739                         info->icount.rxcrc++;
3740                         if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3741                                 return_frame = true;
3742                 }
3743                 framesize = 0;
3744 #if SYNCLINK_GENERIC_HDLC
3745                 {
3746                         info->netdev->stats.rx_errors++;
3747                         info->netdev->stats.rx_frame_errors++;
3748                 }
3749 #endif
3750         } else
3751                 return_frame = true;
3752
3753         if (return_frame)
3754                 framesize = buf->count;
3755
3756         if (debug_level >= DEBUG_LEVEL_BH)
3757                 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3758                         __FILE__,__LINE__,info->device_name,status,framesize);
3759
3760         if (debug_level >= DEBUG_LEVEL_DATA)
3761                 trace_block(info, buf->data, framesize, 0);
3762
3763         if (framesize) {
3764                 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3765                       framesize+1 > info->max_frame_size) ||
3766                     framesize > info->max_frame_size)
3767                         info->icount.rxlong++;
3768                 else {
3769                         if (status & BIT5)
3770                                 info->icount.rxok++;
3771
3772                         if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3773                                 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3774                                 ++framesize;
3775                         }
3776
3777 #if SYNCLINK_GENERIC_HDLC
3778                         if (info->netcount)
3779                                 hdlcdev_rx(info, buf->data, framesize);
3780                         else
3781 #endif
3782                                 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3783                 }
3784         }
3785
3786         spin_lock_irqsave(&info->lock,flags);
3787         buf->status = buf->count = 0;
3788         info->rx_frame_count--;
3789         info->rx_get++;
3790         if (info->rx_get >= info->rx_buf_count)
3791                 info->rx_get = 0;
3792         spin_unlock_irqrestore(&info->lock,flags);
3793
3794         return true;
3795 }
3796
3797 static bool register_test(MGSLPC_INFO *info)
3798 {
3799         static unsigned char patterns[] =
3800             { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3801         static unsigned int count = ARRAY_SIZE(patterns);
3802         unsigned int i;
3803         bool rc = true;
3804         unsigned long flags;
3805
3806         spin_lock_irqsave(&info->lock,flags);
3807         reset_device(info);
3808
3809         for (i = 0; i < count; i++) {
3810                 write_reg(info, XAD1, patterns[i]);
3811                 write_reg(info, XAD2, patterns[(i + 1) % count]);
3812                 if ((read_reg(info, XAD1) != patterns[i]) ||
3813                     (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3814                         rc = false;
3815                         break;
3816                 }
3817         }
3818
3819         spin_unlock_irqrestore(&info->lock,flags);
3820         return rc;
3821 }
3822
3823 static bool irq_test(MGSLPC_INFO *info)
3824 {
3825         unsigned long end_time;
3826         unsigned long flags;
3827
3828         spin_lock_irqsave(&info->lock,flags);
3829         reset_device(info);
3830
3831         info->testing_irq = true;
3832         hdlc_mode(info);
3833
3834         info->irq_occurred = false;
3835
3836         /* init hdlc mode */
3837
3838         irq_enable(info, CHA, IRQ_TIMER);
3839         write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3840         issue_command(info, CHA, CMD_START_TIMER);
3841
3842         spin_unlock_irqrestore(&info->lock,flags);
3843
3844         end_time=100;
3845         while(end_time-- && !info->irq_occurred) {
3846                 msleep_interruptible(10);
3847         }
3848
3849         info->testing_irq = false;
3850
3851         spin_lock_irqsave(&info->lock,flags);
3852         reset_device(info);
3853         spin_unlock_irqrestore(&info->lock,flags);
3854
3855         return info->irq_occurred;
3856 }
3857
3858 static int adapter_test(MGSLPC_INFO *info)
3859 {
3860         if (!register_test(info)) {
3861                 info->init_error = DiagStatus_AddressFailure;
3862                 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
3863                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
3864                 return -ENODEV;
3865         }
3866
3867         if (!irq_test(info)) {
3868                 info->init_error = DiagStatus_IrqFailure;
3869                 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3870                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
3871                 return -ENODEV;
3872         }
3873
3874         if (debug_level >= DEBUG_LEVEL_INFO)
3875                 printk("%s(%d):device %s passed diagnostics\n",
3876                         __FILE__,__LINE__,info->device_name);
3877         return 0;
3878 }
3879
3880 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3881 {
3882         int i;
3883         int linecount;
3884         if (xmit)
3885                 printk("%s tx data:\n",info->device_name);
3886         else
3887                 printk("%s rx data:\n",info->device_name);
3888
3889         while(count) {
3890                 if (count > 16)
3891                         linecount = 16;
3892                 else
3893                         linecount = count;
3894
3895                 for(i=0;i<linecount;i++)
3896                         printk("%02X ",(unsigned char)data[i]);
3897                 for(;i<17;i++)
3898                         printk("   ");
3899                 for(i=0;i<linecount;i++) {
3900                         if (data[i]>=040 && data[i]<=0176)
3901                                 printk("%c",data[i]);
3902                         else
3903                                 printk(".");
3904                 }
3905                 printk("\n");
3906
3907                 data  += linecount;
3908                 count -= linecount;
3909         }
3910 }
3911
3912 /* HDLC frame time out
3913  * update stats and do tx completion processing
3914  */
3915 static void tx_timeout(unsigned long context)
3916 {
3917         MGSLPC_INFO *info = (MGSLPC_INFO*)context;
3918         unsigned long flags;
3919
3920         if ( debug_level >= DEBUG_LEVEL_INFO )
3921                 printk( "%s(%d):tx_timeout(%s)\n",
3922                         __FILE__,__LINE__,info->device_name);
3923         if(info->tx_active &&
3924            info->params.mode == MGSL_MODE_HDLC) {
3925                 info->icount.txtimeout++;
3926         }
3927         spin_lock_irqsave(&info->lock,flags);
3928         info->tx_active = false;
3929         info->tx_count = info->tx_put = info->tx_get = 0;
3930
3931         spin_unlock_irqrestore(&info->lock,flags);
3932
3933 #if SYNCLINK_GENERIC_HDLC
3934         if (info->netcount)
3935                 hdlcdev_tx_done(info);
3936         else
3937 #endif
3938         {
3939                 struct tty_struct *tty = tty_port_tty_get(&info->port);
3940                 bh_transmit(info, tty);
3941                 tty_kref_put(tty);
3942         }
3943 }
3944
3945 #if SYNCLINK_GENERIC_HDLC
3946
3947 /**
3948  * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3949  * set encoding and frame check sequence (FCS) options
3950  *
3951  * dev       pointer to network device structure
3952  * encoding  serial encoding setting
3953  * parity    FCS setting
3954  *
3955  * returns 0 if success, otherwise error code
3956  */
3957 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3958                           unsigned short parity)
3959 {
3960         MGSLPC_INFO *info = dev_to_port(dev);
3961         struct tty_struct *tty;
3962         unsigned char  new_encoding;
3963         unsigned short new_crctype;
3964
3965         /* return error if TTY interface open */
3966         if (info->port.count)
3967                 return -EBUSY;
3968
3969         switch (encoding)
3970         {
3971         case ENCODING_NRZ:        new_encoding = HDLC_ENCODING_NRZ; break;
3972         case ENCODING_NRZI:       new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3973         case ENCODING_FM_MARK:    new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3974         case ENCODING_FM_SPACE:   new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3975         case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3976         default: return -EINVAL;
3977         }
3978
3979         switch (parity)
3980         {
3981         case PARITY_NONE:            new_crctype = HDLC_CRC_NONE; break;
3982         case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3983         case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3984         default: return -EINVAL;
3985         }
3986
3987         info->params.encoding = new_encoding;
3988         info->params.crc_type = new_crctype;
3989
3990         /* if network interface up, reprogram hardware */
3991         if (info->netcount) {
3992                 tty = tty_port_tty_get(&info->port);
3993                 mgslpc_program_hw(info, tty);
3994                 tty_kref_put(tty);
3995         }
3996
3997         return 0;
3998 }
3999
4000 /**
4001  * called by generic HDLC layer to send frame
4002  *
4003  * skb  socket buffer containing HDLC frame
4004  * dev  pointer to network device structure
4005  *
4006  * returns 0 if success, otherwise error code
4007  */
4008 static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4009 {
4010         MGSLPC_INFO *info = dev_to_port(dev);
4011         unsigned long flags;
4012
4013         if (debug_level >= DEBUG_LEVEL_INFO)
4014                 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4015
4016         /* stop sending until this frame completes */
4017         netif_stop_queue(dev);
4018
4019         /* copy data to device buffers */
4020         skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
4021         info->tx_get = 0;
4022         info->tx_put = info->tx_count = skb->len;
4023
4024         /* update network statistics */
4025         dev->stats.tx_packets++;
4026         dev->stats.tx_bytes += skb->len;
4027
4028         /* done with socket buffer, so free it */
4029         dev_kfree_skb(skb);
4030
4031         /* save start time for transmit timeout detection */
4032         dev->trans_start = jiffies;
4033
4034         /* start hardware transmitter if necessary */
4035         spin_lock_irqsave(&info->lock,flags);
4036         if (!info->tx_active) {
4037                 struct tty_struct *tty = tty_port_tty_get(&info->port);
4038                 tx_start(info, tty);
4039                 tty_kref_put(tty);
4040         }
4041         spin_unlock_irqrestore(&info->lock,flags);
4042
4043         return 0;
4044 }
4045
4046 /**
4047  * called by network layer when interface enabled
4048  * claim resources and initialize hardware
4049  *
4050  * dev  pointer to network device structure
4051  *
4052  * returns 0 if success, otherwise error code
4053  */
4054 static int hdlcdev_open(struct net_device *dev)
4055 {
4056         MGSLPC_INFO *info = dev_to_port(dev);
4057         struct tty_struct *tty;
4058         int rc;
4059         unsigned long flags;
4060
4061         if (debug_level >= DEBUG_LEVEL_INFO)
4062                 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4063
4064         /* generic HDLC layer open processing */
4065         if ((rc = hdlc_open(dev)))
4066                 return rc;
4067
4068         /* arbitrate between network and tty opens */
4069         spin_lock_irqsave(&info->netlock, flags);
4070         if (info->port.count != 0 || info->netcount != 0) {
4071                 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4072                 spin_unlock_irqrestore(&info->netlock, flags);
4073                 return -EBUSY;
4074         }
4075         info->netcount=1;
4076         spin_unlock_irqrestore(&info->netlock, flags);
4077
4078         tty = tty_port_tty_get(&info->port);
4079         /* claim resources and init adapter */
4080         if ((rc = startup(info, tty)) != 0) {
4081                 tty_kref_put(tty);
4082                 spin_lock_irqsave(&info->netlock, flags);
4083                 info->netcount=0;
4084                 spin_unlock_irqrestore(&info->netlock, flags);
4085                 return rc;
4086         }
4087         /* assert DTR and RTS, apply hardware settings */
4088         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4089         mgslpc_program_hw(info, tty);
4090         tty_kref_put(tty);
4091
4092         /* enable network layer transmit */
4093         dev->trans_start = jiffies;
4094         netif_start_queue(dev);
4095
4096         /* inform generic HDLC layer of current DCD status */
4097         spin_lock_irqsave(&info->lock, flags);
4098         get_signals(info);
4099         spin_unlock_irqrestore(&info->lock, flags);
4100         if (info->serial_signals & SerialSignal_DCD)
4101                 netif_carrier_on(dev);
4102         else
4103                 netif_carrier_off(dev);
4104         return 0;
4105 }
4106
4107 /**
4108  * called by network layer when interface is disabled
4109  * shutdown hardware and release resources
4110  *
4111  * dev  pointer to network device structure
4112  *
4113  * returns 0 if success, otherwise error code
4114  */
4115 static int hdlcdev_close(struct net_device *dev)
4116 {
4117         MGSLPC_INFO *info = dev_to_port(dev);
4118         struct tty_struct *tty = tty_port_tty_get(&info->port);
4119         unsigned long flags;
4120
4121         if (debug_level >= DEBUG_LEVEL_INFO)
4122                 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4123
4124         netif_stop_queue(dev);
4125
4126         /* shutdown adapter and release resources */
4127         shutdown(info, tty);
4128         tty_kref_put(tty);
4129         hdlc_close(dev);
4130
4131         spin_lock_irqsave(&info->netlock, flags);
4132         info->netcount=0;
4133         spin_unlock_irqrestore(&info->netlock, flags);
4134
4135         return 0;
4136 }
4137
4138 /**
4139  * called by network layer to process IOCTL call to network device
4140  *
4141  * dev  pointer to network device structure
4142  * ifr  pointer to network interface request structure
4143  * cmd  IOCTL command code
4144  *
4145  * returns 0 if success, otherwise error code
4146  */
4147 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4148 {
4149         const size_t size = sizeof(sync_serial_settings);
4150         sync_serial_settings new_line;
4151         sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4152         MGSLPC_INFO *info = dev_to_port(dev);
4153         unsigned int flags;
4154
4155         if (debug_level >= DEBUG_LEVEL_INFO)
4156                 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4157
4158         /* return error if TTY interface open */
4159         if (info->port.count)
4160                 return -EBUSY;
4161
4162         if (cmd != SIOCWANDEV)
4163                 return hdlc_ioctl(dev, ifr, cmd);
4164
4165         switch(ifr->ifr_settings.type) {
4166         case IF_GET_IFACE: /* return current sync_serial_settings */
4167
4168                 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4169                 if (ifr->ifr_settings.size < size) {
4170                         ifr->ifr_settings.size = size; /* data size wanted */
4171                         return -ENOBUFS;
4172                 }
4173
4174                 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4175                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4176                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4177                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4178
4179                 switch (flags){
4180                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4181                 case (HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_INT; break;
4182                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_TXINT; break;
4183                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4184                 default: new_line.clock_type = CLOCK_DEFAULT;
4185                 }
4186
4187                 new_line.clock_rate = info->params.clock_speed;
4188                 new_line.loopback   = info->params.loopback ? 1:0;
4189
4190                 if (copy_to_user(line, &new_line, size))
4191                         return -EFAULT;
4192                 return 0;
4193
4194         case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4195
4196                 if(!capable(CAP_NET_ADMIN))
4197                         return -EPERM;
4198                 if (copy_from_user(&new_line, line, size))
4199                         return -EFAULT;
4200
4201                 switch (new_line.clock_type)
4202                 {
4203                 case CLOCK_EXT:      flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4204                 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4205                 case CLOCK_INT:      flags = HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG;    break;
4206                 case CLOCK_TXINT:    flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG;    break;
4207                 case CLOCK_DEFAULT:  flags = info->params.flags &
4208                                              (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4209                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4210                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4211                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN); break;
4212                 default: return -EINVAL;
4213                 }
4214
4215                 if (new_line.loopback != 0 && new_line.loopback != 1)
4216                         return -EINVAL;
4217
4218                 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4219                                         HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4220                                         HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4221                                         HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4222                 info->params.flags |= flags;
4223
4224                 info->params.loopback = new_line.loopback;
4225
4226                 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4227                         info->params.clock_speed = new_line.clock_rate;
4228                 else
4229                         info->params.clock_speed = 0;
4230
4231                 /* if network interface up, reprogram hardware */
4232                 if (info->netcount) {
4233                         struct tty_struct *tty = tty_port_tty_get(&info->port);
4234                         mgslpc_program_hw(info, tty);
4235                         tty_kref_put(tty);
4236                 }
4237                 return 0;
4238
4239         default:
4240                 return hdlc_ioctl(dev, ifr, cmd);
4241         }
4242 }
4243
4244 /**
4245  * called by network layer when transmit timeout is detected
4246  *
4247  * dev  pointer to network device structure
4248  */
4249 static void hdlcdev_tx_timeout(struct net_device *dev)
4250 {
4251         MGSLPC_INFO *info = dev_to_port(dev);
4252         unsigned long flags;
4253
4254         if (debug_level >= DEBUG_LEVEL_INFO)
4255                 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4256
4257         dev->stats.tx_errors++;
4258         dev->stats.tx_aborted_errors++;
4259
4260         spin_lock_irqsave(&info->lock,flags);
4261         tx_stop(info);
4262         spin_unlock_irqrestore(&info->lock,flags);
4263
4264         netif_wake_queue(dev);
4265 }
4266
4267 /**
4268  * called by device driver when transmit completes
4269  * reenable network layer transmit if stopped
4270  *
4271  * info  pointer to device instance information
4272  */
4273 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4274 {
4275         if (netif_queue_stopped(info->netdev))
4276                 netif_wake_queue(info->netdev);
4277 }
4278
4279 /**
4280  * called by device driver when frame received
4281  * pass frame to network layer
4282  *
4283  * info  pointer to device instance information
4284  * buf   pointer to buffer contianing frame data
4285  * size  count of data bytes in buf
4286  */
4287 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4288 {
4289         struct sk_buff *skb = dev_alloc_skb(size);
4290         struct net_device *dev = info->netdev;
4291
4292         if (debug_level >= DEBUG_LEVEL_INFO)
4293                 printk("hdlcdev_rx(%s)\n",dev->name);
4294
4295         if (skb == NULL) {
4296                 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4297                 dev->stats.rx_dropped++;
4298                 return;
4299         }
4300
4301         memcpy(skb_put(skb, size), buf, size);
4302
4303         skb->protocol = hdlc_type_trans(skb, dev);
4304
4305         dev->stats.rx_packets++;
4306         dev->stats.rx_bytes += size;
4307
4308         netif_rx(skb);
4309 }
4310
4311 static const struct net_device_ops hdlcdev_ops = {
4312         .ndo_open       = hdlcdev_open,
4313         .ndo_stop       = hdlcdev_close,
4314         .ndo_change_mtu = hdlc_change_mtu,
4315         .ndo_start_xmit = hdlc_start_xmit,
4316         .ndo_do_ioctl   = hdlcdev_ioctl,
4317         .ndo_tx_timeout = hdlcdev_tx_timeout,
4318 };
4319
4320 /**
4321  * called by device driver when adding device instance
4322  * do generic HDLC initialization
4323  *
4324  * info  pointer to device instance information
4325  *
4326  * returns 0 if success, otherwise error code
4327  */
4328 static int hdlcdev_init(MGSLPC_INFO *info)
4329 {
4330         int rc;
4331         struct net_device *dev;
4332         hdlc_device *hdlc;
4333
4334         /* allocate and initialize network and HDLC layer objects */
4335
4336         if (!(dev = alloc_hdlcdev(info))) {
4337                 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4338                 return -ENOMEM;
4339         }
4340
4341         /* for network layer reporting purposes only */
4342         dev->base_addr = info->io_base;
4343         dev->irq       = info->irq_level;
4344
4345         /* network layer callbacks and settings */
4346         dev->netdev_ops     = &hdlcdev_ops;
4347         dev->watchdog_timeo = 10 * HZ;
4348         dev->tx_queue_len   = 50;
4349
4350         /* generic HDLC layer callbacks and settings */
4351         hdlc         = dev_to_hdlc(dev);
4352         hdlc->attach = hdlcdev_attach;
4353         hdlc->xmit   = hdlcdev_xmit;
4354
4355         /* register objects with HDLC layer */
4356         if ((rc = register_hdlc_device(dev))) {
4357                 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4358                 free_netdev(dev);
4359                 return rc;
4360         }
4361
4362         info->netdev = dev;
4363         return 0;
4364 }
4365
4366 /**
4367  * called by device driver when removing device instance
4368  * do generic HDLC cleanup
4369  *
4370  * info  pointer to device instance information
4371  */
4372 static void hdlcdev_exit(MGSLPC_INFO *info)
4373 {
4374         unregister_hdlc_device(info->netdev);
4375         free_netdev(info->netdev);
4376         info->netdev = NULL;
4377 }
4378
4379 #endif /* CONFIG_HDLC */
4380