git.oblomov.eu Git - linux-2.6/blob - arch/sparc/kernel/irq_64.c

   1 /* irq.c: UltraSparc IRQ handling/init/registry.
   2  *
   3  * Copyright (C) 1997, 2007, 2008 David S. Miller (davem@davemloft.net)
   4  * Copyright (C) 1998  Eddie C. Dost    (ecd@skynet.be)
   5  * Copyright (C) 1998  Jakub Jelinek    (jj@ultra.linux.cz)
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/sched.h>
  10 #include <linux/linkage.h>
  11 #include <linux/ptrace.h>
  12 #include <linux/errno.h>
  13 #include <linux/kernel_stat.h>
  14 #include <linux/signal.h>
  15 #include <linux/mm.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/slab.h>
  18 #include <linux/random.h>
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/proc_fs.h>
  22 #include <linux/seq_file.h>
  23 #include <linux/bootmem.h>
  24 #include <linux/irq.h>
  25
  26 #include <asm/ptrace.h>
  27 #include <asm/processor.h>
  28 #include <asm/atomic.h>
  29 #include <asm/system.h>
  30 #include <asm/irq.h>
  31 #include <asm/io.h>
  32 #include <asm/iommu.h>
  33 #include <asm/upa.h>
  34 #include <asm/oplib.h>
  35 #include <asm/prom.h>
  36 #include <asm/timer.h>
  37 #include <asm/smp.h>
  38 #include <asm/starfire.h>
  39 #include <asm/uaccess.h>
  40 #include <asm/cache.h>
  41 #include <asm/cpudata.h>
  42 #include <asm/auxio.h>
  43 #include <asm/head.h>
  44 #include <asm/hypervisor.h>
  45 #include <asm/cacheflush.h>
  46
  47 #include "entry.h"
  48
  49 #define NUM_IVECS       (IMAP_INR + 1)
  50
  51 struct ino_bucket *ivector_table;
  52 unsigned long ivector_table_pa;
  53
  54 /* On several sun4u processors, it is illegal to mix bypass and
  55  * non-bypass accesses.  Therefore we access all INO buckets
  56  * using bypass accesses only.
  57  */
  58 static unsigned long bucket_get_chain_pa(unsigned long bucket_pa)
  59 {
  60         unsigned long ret;
  61
  62         __asm__ __volatile__("ldxa      [%1] %2, %0"
  63                              : "=&r" (ret)
  64                              : "r" (bucket_pa +
  65                                     offsetof(struct ino_bucket,
  66                                              __irq_chain_pa)),
  67                                "i" (ASI_PHYS_USE_EC));
  68
  69         return ret;
  70 }
  71
  72 static void bucket_clear_chain_pa(unsigned long bucket_pa)
  73 {
  74         __asm__ __volatile__("stxa      %%g0, [%0] %1"
  75                              : /* no outputs */
  76                              : "r" (bucket_pa +
  77                                     offsetof(struct ino_bucket,
  78                                              __irq_chain_pa)),
  79                                "i" (ASI_PHYS_USE_EC));
  80 }
  81
  82 static unsigned int bucket_get_virt_irq(unsigned long bucket_pa)
  83 {
  84         unsigned int ret;
  85
  86         __asm__ __volatile__("lduwa     [%1] %2, %0"
  87                              : "=&r" (ret)
  88                              : "r" (bucket_pa +
  89                                     offsetof(struct ino_bucket,
  90                                              __virt_irq)),
  91                                "i" (ASI_PHYS_USE_EC));
  92
  93         return ret;
  94 }
  95
  96 static void bucket_set_virt_irq(unsigned long bucket_pa,
  97                                 unsigned int virt_irq)
  98 {
  99         __asm__ __volatile__("stwa      %0, [%1] %2"
 100                              : /* no outputs */
 101                              : "r" (virt_irq),
 102                                "r" (bucket_pa +
 103                                     offsetof(struct ino_bucket,
 104                                              __virt_irq)),
 105                                "i" (ASI_PHYS_USE_EC));
 106 }
 107
 108 #define irq_work_pa(__cpu)      &(trap_block[(__cpu)].irq_worklist_pa)
 109
 110 static struct {
 111         unsigned int dev_handle;
 112         unsigned int dev_ino;
 113         unsigned int in_use;
 114 } virt_irq_table[NR_IRQS];
 115 static DEFINE_SPINLOCK(virt_irq_alloc_lock);
 116
 117 unsigned char virt_irq_alloc(unsigned int dev_handle,
 118                              unsigned int dev_ino)
 119 {
 120         unsigned long flags;
 121         unsigned char ent;
 122
 123         BUILD_BUG_ON(NR_IRQS >= 256);
 124
 125         spin_lock_irqsave(&virt_irq_alloc_lock, flags);
 126
 127         for (ent = 1; ent < NR_IRQS; ent++) {
 128                 if (!virt_irq_table[ent].in_use)
 129                         break;
 130         }
 131         if (ent >= NR_IRQS) {
 132                 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
 133                 ent = 0;
 134         } else {
 135                 virt_irq_table[ent].dev_handle = dev_handle;
 136                 virt_irq_table[ent].dev_ino = dev_ino;
 137                 virt_irq_table[ent].in_use = 1;
 138         }
 139
 140         spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
 141
 142         return ent;
 143 }
 144
 145 #ifdef CONFIG_PCI_MSI
 146 void virt_irq_free(unsigned int virt_irq)
 147 {
 148         unsigned long flags;
 149
 150         if (virt_irq >= NR_IRQS)
 151                 return;
 152
 153         spin_lock_irqsave(&virt_irq_alloc_lock, flags);
 154
 155         virt_irq_table[virt_irq].in_use = 0;
 156
 157         spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
 158 }
 159 #endif
 160
 161 /*
 162  * /proc/interrupts printing:
 163  */
 164
 165 int show_interrupts(struct seq_file *p, void *v)
 166 {
 167         int i = *(loff_t *) v, j;
 168         struct irqaction * action;
 169         unsigned long flags;
 170
 171         if (i == 0) {
 172                 seq_printf(p, "           ");
 173                 for_each_online_cpu(j)
 174                         seq_printf(p, "CPU%d       ",j);
 175                 seq_putc(p, '\n');
 176         }
 177
 178         if (i < NR_IRQS) {
 179                 spin_lock_irqsave(&irq_desc[i].lock, flags);
 180                 action = irq_desc[i].action;
 181                 if (!action)
 182                         goto skip;
 183                 seq_printf(p, "%3d: ",i);
 184 #ifndef CONFIG_SMP
 185                 seq_printf(p, "%10u ", kstat_irqs(i));
 186 #else
 187                 for_each_online_cpu(j)
 188                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 189 #endif
 190                 seq_printf(p, " %9s", irq_desc[i].chip->typename);
 191                 seq_printf(p, "  %s", action->name);
 192
 193                 for (action=action->next; action; action = action->next)
 194                         seq_printf(p, ", %s", action->name);
 195
 196                 seq_putc(p, '\n');
 197 skip:
 198                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
 199         } else if (i == NR_IRQS) {
 200                 seq_printf(p, "NMI: ");
 201                 for_each_online_cpu(j)
 202                         seq_printf(p, "%10u ", cpu_data(j).__nmi_count);
 203                 seq_printf(p, "     Non-maskable interrupts\n");
 204         }
 205         return 0;
 206 }
 207
 208 static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
 209 {
 210         unsigned int tid;
 211
 212         if (this_is_starfire) {
 213                 tid = starfire_translate(imap, cpuid);
 214                 tid <<= IMAP_TID_SHIFT;
 215                 tid &= IMAP_TID_UPA;
 216         } else {
 217                 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
 218                         unsigned long ver;
 219
 220                         __asm__ ("rdpr %%ver, %0" : "=r" (ver));
 221                         if ((ver >> 32UL) == __JALAPENO_ID ||
 222                             (ver >> 32UL) == __SERRANO_ID) {
 223                                 tid = cpuid << IMAP_TID_SHIFT;
 224                                 tid &= IMAP_TID_JBUS;
 225                         } else {
 226                                 unsigned int a = cpuid & 0x1f;
 227                                 unsigned int n = (cpuid >> 5) & 0x1f;
 228
 229                                 tid = ((a << IMAP_AID_SHIFT) |
 230                                        (n << IMAP_NID_SHIFT));
 231                                 tid &= (IMAP_AID_SAFARI |
 232                                         IMAP_NID_SAFARI);;
 233                         }
 234                 } else {
 235                         tid = cpuid << IMAP_TID_SHIFT;
 236                         tid &= IMAP_TID_UPA;
 237                 }
 238         }
 239
 240         return tid;
 241 }
 242
 243 struct irq_handler_data {
 244         unsigned long   iclr;
 245         unsigned long   imap;
 246
 247         void            (*pre_handler)(unsigned int, void *, void *);
 248         void            *arg1;
 249         void            *arg2;
 250 };
 251
 252 #ifdef CONFIG_SMP
 253 static int irq_choose_cpu(unsigned int virt_irq)
 254 {
 255         cpumask_t mask = irq_desc[virt_irq].affinity;
 256         int cpuid;
 257
 258         if (cpus_equal(mask, CPU_MASK_ALL)) {
 259                 static int irq_rover;
 260                 static DEFINE_SPINLOCK(irq_rover_lock);
 261                 unsigned long flags;
 262
 263                 /* Round-robin distribution... */
 264         do_round_robin:
 265                 spin_lock_irqsave(&irq_rover_lock, flags);
 266
 267                 while (!cpu_online(irq_rover)) {
 268                         if (++irq_rover >= NR_CPUS)
 269                                 irq_rover = 0;
 270                 }
 271                 cpuid = irq_rover;
 272                 do {
 273                         if (++irq_rover >= NR_CPUS)
 274                                 irq_rover = 0;
 275                 } while (!cpu_online(irq_rover));
 276
 277                 spin_unlock_irqrestore(&irq_rover_lock, flags);
 278         } else {
 279                 cpumask_t tmp;
 280
 281                 cpus_and(tmp, cpu_online_map, mask);
 282
 283                 if (cpus_empty(tmp))
 284                         goto do_round_robin;
 285
 286                 cpuid = first_cpu(tmp);
 287         }
 288
 289         return cpuid;
 290 }
 291 #else
 292 static int irq_choose_cpu(unsigned int virt_irq)
 293 {
 294         return real_hard_smp_processor_id();
 295 }
 296 #endif
 297
 298 static void sun4u_irq_enable(unsigned int virt_irq)
 299 {
 300         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 301
 302         if (likely(data)) {
 303                 unsigned long cpuid, imap, val;
 304                 unsigned int tid;
 305
 306                 cpuid = irq_choose_cpu(virt_irq);
 307                 imap = data->imap;
 308
 309                 tid = sun4u_compute_tid(imap, cpuid);
 310
 311                 val = upa_readq(imap);
 312                 val &= ~(IMAP_TID_UPA | IMAP_TID_JBUS |
 313                          IMAP_AID_SAFARI | IMAP_NID_SAFARI);
 314                 val |= tid | IMAP_VALID;
 315                 upa_writeq(val, imap);
 316                 upa_writeq(ICLR_IDLE, data->iclr);
 317         }
 318 }
 319
 320 static void sun4u_set_affinity(unsigned int virt_irq,
 321                                const struct cpumask *mask)
 322 {
 323         sun4u_irq_enable(virt_irq);
 324 }
 325
 326 static void sun4u_irq_disable(unsigned int virt_irq)
 327 {
 328         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 329
 330         if (likely(data)) {
 331                 unsigned long imap = data->imap;
 332                 unsigned long tmp = upa_readq(imap);
 333
 334                 tmp &= ~IMAP_VALID;
 335                 upa_writeq(tmp, imap);
 336         }
 337 }
 338
 339 static void sun4u_irq_eoi(unsigned int virt_irq)
 340 {
 341         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 342         struct irq_desc *desc = irq_desc + virt_irq;
 343
 344         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 345                 return;
 346
 347         if (likely(data))
 348                 upa_writeq(ICLR_IDLE, data->iclr);
 349 }
 350
 351 static void sun4v_irq_enable(unsigned int virt_irq)
 352 {
 353         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 354         unsigned long cpuid = irq_choose_cpu(virt_irq);
 355         int err;
 356
 357         err = sun4v_intr_settarget(ino, cpuid);
 358         if (err != HV_EOK)
 359                 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
 360                        "err(%d)\n", ino, cpuid, err);
 361         err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 362         if (err != HV_EOK)
 363                 printk(KERN_ERR "sun4v_intr_setstate(%x): "
 364                        "err(%d)\n", ino, err);
 365         err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
 366         if (err != HV_EOK)
 367                 printk(KERN_ERR "sun4v_intr_setenabled(%x): err(%d)\n",
 368                        ino, err);
 369 }
 370
 371 static void sun4v_set_affinity(unsigned int virt_irq,
 372                                const struct cpumask *mask)
 373 {
 374         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 375         unsigned long cpuid = irq_choose_cpu(virt_irq);
 376         int err;
 377
 378         err = sun4v_intr_settarget(ino, cpuid);
 379         if (err != HV_EOK)
 380                 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
 381                        "err(%d)\n", ino, cpuid, err);
 382 }
 383
 384 static void sun4v_irq_disable(unsigned int virt_irq)
 385 {
 386         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 387         int err;
 388
 389         err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
 390         if (err != HV_EOK)
 391                 printk(KERN_ERR "sun4v_intr_setenabled(%x): "
 392                        "err(%d)\n", ino, err);
 393 }
 394
 395 static void sun4v_irq_eoi(unsigned int virt_irq)
 396 {
 397         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 398         struct irq_desc *desc = irq_desc + virt_irq;
 399         int err;
 400
 401         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 402                 return;
 403
 404         err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 405         if (err != HV_EOK)
 406                 printk(KERN_ERR "sun4v_intr_setstate(%x): "
 407                        "err(%d)\n", ino, err);
 408 }
 409
 410 static void sun4v_virq_enable(unsigned int virt_irq)
 411 {
 412         unsigned long cpuid, dev_handle, dev_ino;
 413         int err;
 414
 415         cpuid = irq_choose_cpu(virt_irq);
 416
 417         dev_handle = virt_irq_table[virt_irq].dev_handle;
 418         dev_ino = virt_irq_table[virt_irq].dev_ino;
 419
 420         err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
 421         if (err != HV_EOK)
 422                 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
 423                        "err(%d)\n",
 424                        dev_handle, dev_ino, cpuid, err);
 425         err = sun4v_vintr_set_state(dev_handle, dev_ino,
 426                                     HV_INTR_STATE_IDLE);
 427         if (err != HV_EOK)
 428                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 429                        "HV_INTR_STATE_IDLE): err(%d)\n",
 430                        dev_handle, dev_ino, err);
 431         err = sun4v_vintr_set_valid(dev_handle, dev_ino,
 432                                     HV_INTR_ENABLED);
 433         if (err != HV_EOK)
 434                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 435                        "HV_INTR_ENABLED): err(%d)\n",
 436                        dev_handle, dev_ino, err);
 437 }
 438
 439 static void sun4v_virt_set_affinity(unsigned int virt_irq,
 440                                     const struct cpumask *mask)
 441 {
 442         unsigned long cpuid, dev_handle, dev_ino;
 443         int err;
 444
 445         cpuid = irq_choose_cpu(virt_irq);
 446
 447         dev_handle = virt_irq_table[virt_irq].dev_handle;
 448         dev_ino = virt_irq_table[virt_irq].dev_ino;
 449
 450         err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
 451         if (err != HV_EOK)
 452                 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
 453                        "err(%d)\n",
 454                        dev_handle, dev_ino, cpuid, err);
 455 }
 456
 457 static void sun4v_virq_disable(unsigned int virt_irq)
 458 {
 459         unsigned long dev_handle, dev_ino;
 460         int err;
 461
 462         dev_handle = virt_irq_table[virt_irq].dev_handle;
 463         dev_ino = virt_irq_table[virt_irq].dev_ino;
 464
 465         err = sun4v_vintr_set_valid(dev_handle, dev_ino,
 466                                     HV_INTR_DISABLED);
 467         if (err != HV_EOK)
 468                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 469                        "HV_INTR_DISABLED): err(%d)\n",
 470                        dev_handle, dev_ino, err);
 471 }
 472
 473 static void sun4v_virq_eoi(unsigned int virt_irq)
 474 {
 475         struct irq_desc *desc = irq_desc + virt_irq;
 476         unsigned long dev_handle, dev_ino;
 477         int err;
 478
 479         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 480                 return;
 481
 482         dev_handle = virt_irq_table[virt_irq].dev_handle;
 483         dev_ino = virt_irq_table[virt_irq].dev_ino;
 484
 485         err = sun4v_vintr_set_state(dev_handle, dev_ino,
 486                                     HV_INTR_STATE_IDLE);
 487         if (err != HV_EOK)
 488                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 489                        "HV_INTR_STATE_IDLE): err(%d)\n",
 490                        dev_handle, dev_ino, err);
 491 }
 492
 493 static struct irq_chip sun4u_irq = {
 494         .typename       = "sun4u",
 495         .enable         = sun4u_irq_enable,
 496         .disable        = sun4u_irq_disable,
 497         .eoi            = sun4u_irq_eoi,
 498         .set_affinity   = sun4u_set_affinity,
 499 };
 500
 501 static struct irq_chip sun4v_irq = {
 502         .typename       = "sun4v",
 503         .enable         = sun4v_irq_enable,
 504         .disable        = sun4v_irq_disable,
 505         .eoi            = sun4v_irq_eoi,
 506         .set_affinity   = sun4v_set_affinity,
 507 };
 508
 509 static struct irq_chip sun4v_virq = {
 510         .typename       = "vsun4v",
 511         .enable         = sun4v_virq_enable,
 512         .disable        = sun4v_virq_disable,
 513         .eoi            = sun4v_virq_eoi,
 514         .set_affinity   = sun4v_virt_set_affinity,
 515 };
 516
 517 static void pre_flow_handler(unsigned int virt_irq,
 518                                       struct irq_desc *desc)
 519 {
 520         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 521         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 522
 523         data->pre_handler(ino, data->arg1, data->arg2);
 524
 525         handle_fasteoi_irq(virt_irq, desc);
 526 }
 527
 528 void irq_install_pre_handler(int virt_irq,
 529                              void (*func)(unsigned int, void *, void *),
 530                              void *arg1, void *arg2)
 531 {
 532         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 533         struct irq_desc *desc = irq_desc + virt_irq;
 534
 535         data->pre_handler = func;
 536         data->arg1 = arg1;
 537         data->arg2 = arg2;
 538
 539         desc->handle_irq = pre_flow_handler;
 540 }
 541
 542 unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
 543 {
 544         struct ino_bucket *bucket;
 545         struct irq_handler_data *data;
 546         unsigned int virt_irq;
 547         int ino;
 548
 549         BUG_ON(tlb_type == hypervisor);
 550
 551         ino = (upa_readq(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
 552         bucket = &ivector_table[ino];
 553         virt_irq = bucket_get_virt_irq(__pa(bucket));
 554         if (!virt_irq) {
 555                 virt_irq = virt_irq_alloc(0, ino);
 556                 bucket_set_virt_irq(__pa(bucket), virt_irq);
 557                 set_irq_chip_and_handler_name(virt_irq,
 558                                               &sun4u_irq,
 559                                               handle_fasteoi_irq,
 560                                               "IVEC");
 561         }
 562
 563         data = get_irq_chip_data(virt_irq);
 564         if (unlikely(data))
 565                 goto out;
 566
 567         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 568         if (unlikely(!data)) {
 569                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 570                 prom_halt();
 571         }
 572         set_irq_chip_data(virt_irq, data);
 573
 574         data->imap  = imap;
 575         data->iclr  = iclr;
 576
 577 out:
 578         return virt_irq;
 579 }
 580
 581 static unsigned int sun4v_build_common(unsigned long sysino,
 582                                        struct irq_chip *chip)
 583 {
 584         struct ino_bucket *bucket;
 585         struct irq_handler_data *data;
 586         unsigned int virt_irq;
 587
 588         BUG_ON(tlb_type != hypervisor);
 589
 590         bucket = &ivector_table[sysino];
 591         virt_irq = bucket_get_virt_irq(__pa(bucket));
 592         if (!virt_irq) {
 593                 virt_irq = virt_irq_alloc(0, sysino);
 594                 bucket_set_virt_irq(__pa(bucket), virt_irq);
 595                 set_irq_chip_and_handler_name(virt_irq, chip,
 596                                               handle_fasteoi_irq,
 597                                               "IVEC");
 598         }
 599
 600         data = get_irq_chip_data(virt_irq);
 601         if (unlikely(data))
 602                 goto out;
 603
 604         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 605         if (unlikely(!data)) {
 606                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 607                 prom_halt();
 608         }
 609         set_irq_chip_data(virt_irq, data);
 610
 611         /* Catch accidental accesses to these things.  IMAP/ICLR handling
 612          * is done by hypervisor calls on sun4v platforms, not by direct
 613          * register accesses.
 614          */
 615         data->imap = ~0UL;
 616         data->iclr = ~0UL;
 617
 618 out:
 619         return virt_irq;
 620 }
 621
 622 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
 623 {
 624         unsigned long sysino = sun4v_devino_to_sysino(devhandle, devino);
 625
 626         return sun4v_build_common(sysino, &sun4v_irq);
 627 }
 628
 629 unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino)
 630 {
 631         struct irq_handler_data *data;
 632         unsigned long hv_err, cookie;
 633         struct ino_bucket *bucket;
 634         struct irq_desc *desc;
 635         unsigned int virt_irq;
 636
 637         bucket = kzalloc(sizeof(struct ino_bucket), GFP_ATOMIC);
 638         if (unlikely(!bucket))
 639                 return 0;
 640         __flush_dcache_range((unsigned long) bucket,
 641                              ((unsigned long) bucket +
 642                               sizeof(struct ino_bucket)));
 643
 644         virt_irq = virt_irq_alloc(devhandle, devino);
 645         bucket_set_virt_irq(__pa(bucket), virt_irq);
 646
 647         set_irq_chip_and_handler_name(virt_irq, &sun4v_virq,
 648                                       handle_fasteoi_irq,
 649                                       "IVEC");
 650
 651         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 652         if (unlikely(!data))
 653                 return 0;
 654
 655         /* In order to make the LDC channel startup sequence easier,
 656          * especially wrt. locking, we do not let request_irq() enable
 657          * the interrupt.
 658          */
 659         desc = irq_desc + virt_irq;
 660         desc->status |= IRQ_NOAUTOEN;
 661
 662         set_irq_chip_data(virt_irq, data);
 663
 664         /* Catch accidental accesses to these things.  IMAP/ICLR handling
 665          * is done by hypervisor calls on sun4v platforms, not by direct
 666          * register accesses.
 667          */
 668         data->imap = ~0UL;
 669         data->iclr = ~0UL;
 670
 671         cookie = ~__pa(bucket);
 672         hv_err = sun4v_vintr_set_cookie(devhandle, devino, cookie);
 673         if (hv_err) {
 674                 prom_printf("IRQ: Fatal, cannot set cookie for [%x:%x] "
 675                             "err=%lu\n", devhandle, devino, hv_err);
 676                 prom_halt();
 677         }
 678
 679         return virt_irq;
 680 }
 681
 682 void ack_bad_irq(unsigned int virt_irq)
 683 {
 684         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 685
 686         if (!ino)
 687                 ino = 0xdeadbeef;
 688
 689         printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
 690                ino, virt_irq);
 691 }
 692
 693 void *hardirq_stack[NR_CPUS];
 694 void *softirq_stack[NR_CPUS];
 695
 696 static __attribute__((always_inline)) void *set_hardirq_stack(void)
 697 {
 698         void *orig_sp, *sp = hardirq_stack[smp_processor_id()];
 699
 700         __asm__ __volatile__("mov %%sp, %0" : "=r" (orig_sp));
 701         if (orig_sp < sp ||
 702             orig_sp > (sp + THREAD_SIZE)) {
 703                 sp += THREAD_SIZE - 192 - STACK_BIAS;
 704                 __asm__ __volatile__("mov %0, %%sp" : : "r" (sp));
 705         }
 706
 707         return orig_sp;
 708 }
 709 static __attribute__((always_inline)) void restore_hardirq_stack(void *orig_sp)
 710 {
 711         __asm__ __volatile__("mov %0, %%sp" : : "r" (orig_sp));
 712 }
 713
 714 void handler_irq(int irq, struct pt_regs *regs)
 715 {
 716         unsigned long pstate, bucket_pa;
 717         struct pt_regs *old_regs;
 718         void *orig_sp;
 719
 720         clear_softint(1 << irq);
 721
 722         old_regs = set_irq_regs(regs);
 723         irq_enter();
 724
 725         /* Grab an atomic snapshot of the pending IVECs.  */
 726         __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
 727                              "wrpr      %0, %3, %%pstate\n\t"
 728                              "ldx       [%2], %1\n\t"
 729                              "stx       %%g0, [%2]\n\t"
 730                              "wrpr      %0, 0x0, %%pstate\n\t"
 731                              : "=&r" (pstate), "=&r" (bucket_pa)
 732                              : "r" (irq_work_pa(smp_processor_id())),
 733                                "i" (PSTATE_IE)
 734                              : "memory");
 735
 736         orig_sp = set_hardirq_stack();
 737
 738         while (bucket_pa) {
 739                 struct irq_desc *desc;
 740                 unsigned long next_pa;
 741                 unsigned int virt_irq;
 742
 743                 next_pa = bucket_get_chain_pa(bucket_pa);
 744                 virt_irq = bucket_get_virt_irq(bucket_pa);
 745                 bucket_clear_chain_pa(bucket_pa);
 746
 747                 desc = irq_desc + virt_irq;
 748
 749                 desc->handle_irq(virt_irq, desc);
 750
 751                 bucket_pa = next_pa;
 752         }
 753
 754         restore_hardirq_stack(orig_sp);
 755
 756         irq_exit();
 757         set_irq_regs(old_regs);
 758 }
 759
 760 void do_softirq(void)
 761 {
 762         unsigned long flags;
 763
 764         if (in_interrupt())
 765                 return;
 766
 767         local_irq_save(flags);
 768
 769         if (local_softirq_pending()) {
 770                 void *orig_sp, *sp = softirq_stack[smp_processor_id()];
 771
 772                 sp += THREAD_SIZE - 192 - STACK_BIAS;
 773
 774                 __asm__ __volatile__("mov %%sp, %0\n\t"
 775                                      "mov %1, %%sp"
 776                                      : "=&r" (orig_sp)
 777                                      : "r" (sp));
 778                 __do_softirq();
 779                 __asm__ __volatile__("mov %0, %%sp"
 780                                      : : "r" (orig_sp));
 781         }
 782
 783         local_irq_restore(flags);
 784 }
 785
 786 #ifdef CONFIG_HOTPLUG_CPU
 787 void fixup_irqs(void)
 788 {
 789         unsigned int irq;
 790
 791         for (irq = 0; irq < NR_IRQS; irq++) {
 792                 unsigned long flags;
 793
 794                 spin_lock_irqsave(&irq_desc[irq].lock, flags);
 795                 if (irq_desc[irq].action &&
 796                     !(irq_desc[irq].status & IRQ_PER_CPU)) {
 797                         if (irq_desc[irq].chip->set_affinity)
 798                                 irq_desc[irq].chip->set_affinity(irq,
 799                                         &irq_desc[irq].affinity);
 800                 }
 801                 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
 802         }
 803
 804         tick_ops->disable_irq();
 805 }
 806 #endif
 807
 808 struct sun5_timer {
 809         u64     count0;
 810         u64     limit0;
 811         u64     count1;
 812         u64     limit1;
 813 };
 814
 815 static struct sun5_timer *prom_timers;
 816 static u64 prom_limit0, prom_limit1;
 817
 818 static void map_prom_timers(void)
 819 {
 820         struct device_node *dp;
 821         const unsigned int *addr;
 822
 823         /* PROM timer node hangs out in the top level of device siblings... */
 824         dp = of_find_node_by_path("/");
 825         dp = dp->child;
 826         while (dp) {
 827                 if (!strcmp(dp->name, "counter-timer"))
 828                         break;
 829                 dp = dp->sibling;
 830         }
 831
 832         /* Assume if node is not present, PROM uses different tick mechanism
 833          * which we should not care about.
 834          */
 835         if (!dp) {
 836                 prom_timers = (struct sun5_timer *) 0;
 837                 return;
 838         }
 839
 840         /* If PROM is really using this, it must be mapped by him. */
 841         addr = of_get_property(dp, "address", NULL);
 842         if (!addr) {
 843                 prom_printf("PROM does not have timer mapped, trying to continue.\n");
 844                 prom_timers = (struct sun5_timer *) 0;
 845                 return;
 846         }
 847         prom_timers = (struct sun5_timer *) ((unsigned long)addr[0]);
 848 }
 849
 850 static void kill_prom_timer(void)
 851 {
 852         if (!prom_timers)
 853                 return;
 854
 855         /* Save them away for later. */
 856         prom_limit0 = prom_timers->limit0;
 857         prom_limit1 = prom_timers->limit1;
 858
 859         /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
 860          * We turn both off here just to be paranoid.
 861          */
 862         prom_timers->limit0 = 0;
 863         prom_timers->limit1 = 0;
 864
 865         /* Wheee, eat the interrupt packet too... */
 866         __asm__ __volatile__(
 867 "       mov     0x40, %%g2\n"
 868 "       ldxa    [%%g0] %0, %%g1\n"
 869 "       ldxa    [%%g2] %1, %%g1\n"
 870 "       stxa    %%g0, [%%g0] %0\n"
 871 "       membar  #Sync\n"
 872         : /* no outputs */
 873         : "i" (ASI_INTR_RECEIVE), "i" (ASI_INTR_R)
 874         : "g1", "g2");
 875 }
 876
 877 void notrace init_irqwork_curcpu(void)
 878 {
 879         int cpu = hard_smp_processor_id();
 880
 881         trap_block[cpu].irq_worklist_pa = 0UL;
 882 }
 883
 884 /* Please be very careful with register_one_mondo() and
 885  * sun4v_register_mondo_queues().
 886  *
 887  * On SMP this gets invoked from the CPU trampoline before
 888  * the cpu has fully taken over the trap table from OBP,
 889  * and it's kernel stack + %g6 thread register state is
 890  * not fully cooked yet.
 891  *
 892  * Therefore you cannot make any OBP calls, not even prom_printf,
 893  * from these two routines.
 894  */
 895 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type, unsigned long qmask)
 896 {
 897         unsigned long num_entries = (qmask + 1) / 64;
 898         unsigned long status;
 899
 900         status = sun4v_cpu_qconf(type, paddr, num_entries);
 901         if (status != HV_EOK) {
 902                 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
 903                             "err %lu\n", type, paddr, num_entries, status);
 904                 prom_halt();
 905         }
 906 }
 907
 908 void __cpuinit notrace sun4v_register_mondo_queues(int this_cpu)
 909 {
 910         struct trap_per_cpu *tb = &trap_block[this_cpu];
 911
 912         register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO,
 913                            tb->cpu_mondo_qmask);
 914         register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO,
 915                            tb->dev_mondo_qmask);
 916         register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR,
 917                            tb->resum_qmask);
 918         register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR,
 919                            tb->nonresum_qmask);
 920 }
 921
 922 static void __init alloc_one_mondo(unsigned long *pa_ptr, unsigned long qmask)
 923 {
 924         unsigned long size = PAGE_ALIGN(qmask + 1);
 925         void *p = __alloc_bootmem(size, size, 0);
 926         if (!p) {
 927                 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
 928                 prom_halt();
 929         }
 930
 931         *pa_ptr = __pa(p);
 932 }
 933
 934 static void __init alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask)
 935 {
 936         unsigned long size = PAGE_ALIGN(qmask + 1);
 937         void *p = __alloc_bootmem(size, size, 0);
 938
 939         if (!p) {
 940                 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
 941                 prom_halt();
 942         }
 943
 944         *pa_ptr = __pa(p);
 945 }
 946
 947 static void __init init_cpu_send_mondo_info(struct trap_per_cpu *tb)
 948 {
 949 #ifdef CONFIG_SMP
 950         void *page;
 951
 952         BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
 953
 954         page = alloc_bootmem_pages(PAGE_SIZE);
 955         if (!page) {
 956                 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
 957                 prom_halt();
 958         }
 959
 960         tb->cpu_mondo_block_pa = __pa(page);
 961         tb->cpu_list_pa = __pa(page + 64);
 962 #endif
 963 }
 964
 965 /* Allocate mondo and error queues for all possible cpus.  */
 966 static void __init sun4v_init_mondo_queues(void)
 967 {
 968         int cpu;
 969
 970         for_each_possible_cpu(cpu) {
 971                 struct trap_per_cpu *tb = &trap_block[cpu];
 972
 973                 alloc_one_mondo(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask);
 974                 alloc_one_mondo(&tb->dev_mondo_pa, tb->dev_mondo_qmask);
 975                 alloc_one_mondo(&tb->resum_mondo_pa, tb->resum_qmask);
 976                 alloc_one_kbuf(&tb->resum_kernel_buf_pa, tb->resum_qmask);
 977                 alloc_one_mondo(&tb->nonresum_mondo_pa, tb->nonresum_qmask);
 978                 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa,
 979                                tb->nonresum_qmask);
 980         }
 981 }
 982
 983 static void __init init_send_mondo_info(void)
 984 {
 985         int cpu;
 986
 987         for_each_possible_cpu(cpu) {
 988                 struct trap_per_cpu *tb = &trap_block[cpu];
 989
 990                 init_cpu_send_mondo_info(tb);
 991         }
 992 }
 993
 994 static struct irqaction timer_irq_action = {
 995         .name = "timer",
 996 };
 997
 998 /* Only invoked on boot processor. */
 999 void __init init_IRQ(void)
1000 {
1001         unsigned long size;
1002
1003         map_prom_timers();
1004         kill_prom_timer();
1005
1006         size = sizeof(struct ino_bucket) * NUM_IVECS;
1007         ivector_table = alloc_bootmem(size);
1008         if (!ivector_table) {
1009                 prom_printf("Fatal error, cannot allocate ivector_table\n");
1010                 prom_halt();
1011         }
1012         __flush_dcache_range((unsigned long) ivector_table,
1013                              ((unsigned long) ivector_table) + size);
1014
1015         ivector_table_pa = __pa(ivector_table);
1016
1017         if (tlb_type == hypervisor)
1018                 sun4v_init_mondo_queues();
1019
1020         init_send_mondo_info();
1021
1022         if (tlb_type == hypervisor) {
1023                 /* Load up the boot cpu's entries.  */
1024                 sun4v_register_mondo_queues(hard_smp_processor_id());
1025         }
1026
1027         /* We need to clear any IRQ's pending in the soft interrupt
1028          * registers, a spurious one could be left around from the
1029          * PROM timer which we just disabled.
1030          */
1031         clear_softint(get_softint());
1032
1033         /* Now that ivector table is initialized, it is safe
1034          * to receive IRQ vector traps.  We will normally take
1035          * one or two right now, in case some device PROM used
1036          * to boot us wants to speak to us.  We just ignore them.
1037          */
1038         __asm__ __volatile__("rdpr      %%pstate, %%g1\n\t"
1039                              "or        %%g1, %0, %%g1\n\t"
1040                              "wrpr      %%g1, 0x0, %%pstate"
1041                              : /* No outputs */
1042                              : "i" (PSTATE_IE)
1043                              : "g1");
1044
1045         irq_desc[0].action = &timer_irq_action;
1046 }