Merge branch 'devel'
[linux-2.6] / arch / arm / mach-at91 / at91sam9260_devices.c
1 /*
2  * arch/arm/mach-at91/at91sam9260_devices.c
3  *
4  *  Copyright (C) 2006 Atmel
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/dma-mapping.h>
16 #include <linux/platform_device.h>
17 #include <linux/i2c-gpio.h>
18
19 #include <asm/arch/board.h>
20 #include <asm/arch/gpio.h>
21 #include <asm/arch/at91sam9260.h>
22 #include <asm/arch/at91sam9260_matrix.h>
23 #include <asm/arch/at91sam9_smc.h>
24
25 #include "generic.h"
26
27
28 /* --------------------------------------------------------------------
29  *  USB Host
30  * -------------------------------------------------------------------- */
31
32 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
33 static u64 ohci_dmamask = DMA_BIT_MASK(32);
34 static struct at91_usbh_data usbh_data;
35
36 static struct resource usbh_resources[] = {
37         [0] = {
38                 .start  = AT91SAM9260_UHP_BASE,
39                 .end    = AT91SAM9260_UHP_BASE + SZ_1M - 1,
40                 .flags  = IORESOURCE_MEM,
41         },
42         [1] = {
43                 .start  = AT91SAM9260_ID_UHP,
44                 .end    = AT91SAM9260_ID_UHP,
45                 .flags  = IORESOURCE_IRQ,
46         },
47 };
48
49 static struct platform_device at91_usbh_device = {
50         .name           = "at91_ohci",
51         .id             = -1,
52         .dev            = {
53                                 .dma_mask               = &ohci_dmamask,
54                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
55                                 .platform_data          = &usbh_data,
56         },
57         .resource       = usbh_resources,
58         .num_resources  = ARRAY_SIZE(usbh_resources),
59 };
60
61 void __init at91_add_device_usbh(struct at91_usbh_data *data)
62 {
63         if (!data)
64                 return;
65
66         usbh_data = *data;
67         platform_device_register(&at91_usbh_device);
68 }
69 #else
70 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
71 #endif
72
73
74 /* --------------------------------------------------------------------
75  *  USB Device (Gadget)
76  * -------------------------------------------------------------------- */
77
78 #ifdef CONFIG_USB_GADGET_AT91
79 static struct at91_udc_data udc_data;
80
81 static struct resource udc_resources[] = {
82         [0] = {
83                 .start  = AT91SAM9260_BASE_UDP,
84                 .end    = AT91SAM9260_BASE_UDP + SZ_16K - 1,
85                 .flags  = IORESOURCE_MEM,
86         },
87         [1] = {
88                 .start  = AT91SAM9260_ID_UDP,
89                 .end    = AT91SAM9260_ID_UDP,
90                 .flags  = IORESOURCE_IRQ,
91         },
92 };
93
94 static struct platform_device at91_udc_device = {
95         .name           = "at91_udc",
96         .id             = -1,
97         .dev            = {
98                                 .platform_data          = &udc_data,
99         },
100         .resource       = udc_resources,
101         .num_resources  = ARRAY_SIZE(udc_resources),
102 };
103
104 void __init at91_add_device_udc(struct at91_udc_data *data)
105 {
106         if (!data)
107                 return;
108
109         if (data->vbus_pin) {
110                 at91_set_gpio_input(data->vbus_pin, 0);
111                 at91_set_deglitch(data->vbus_pin, 1);
112         }
113
114         /* Pullup pin is handled internally by USB device peripheral */
115
116         udc_data = *data;
117         platform_device_register(&at91_udc_device);
118 }
119 #else
120 void __init at91_add_device_udc(struct at91_udc_data *data) {}
121 #endif
122
123
124 /* --------------------------------------------------------------------
125  *  Ethernet
126  * -------------------------------------------------------------------- */
127
128 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
129 static u64 eth_dmamask = DMA_BIT_MASK(32);
130 static struct at91_eth_data eth_data;
131
132 static struct resource eth_resources[] = {
133         [0] = {
134                 .start  = AT91SAM9260_BASE_EMAC,
135                 .end    = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
136                 .flags  = IORESOURCE_MEM,
137         },
138         [1] = {
139                 .start  = AT91SAM9260_ID_EMAC,
140                 .end    = AT91SAM9260_ID_EMAC,
141                 .flags  = IORESOURCE_IRQ,
142         },
143 };
144
145 static struct platform_device at91sam9260_eth_device = {
146         .name           = "macb",
147         .id             = -1,
148         .dev            = {
149                                 .dma_mask               = &eth_dmamask,
150                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
151                                 .platform_data          = &eth_data,
152         },
153         .resource       = eth_resources,
154         .num_resources  = ARRAY_SIZE(eth_resources),
155 };
156
157 void __init at91_add_device_eth(struct at91_eth_data *data)
158 {
159         if (!data)
160                 return;
161
162         if (data->phy_irq_pin) {
163                 at91_set_gpio_input(data->phy_irq_pin, 0);
164                 at91_set_deglitch(data->phy_irq_pin, 1);
165         }
166
167         /* Pins used for MII and RMII */
168         at91_set_A_periph(AT91_PIN_PA19, 0);    /* ETXCK_EREFCK */
169         at91_set_A_periph(AT91_PIN_PA17, 0);    /* ERXDV */
170         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERX0 */
171         at91_set_A_periph(AT91_PIN_PA15, 0);    /* ERX1 */
172         at91_set_A_periph(AT91_PIN_PA18, 0);    /* ERXER */
173         at91_set_A_periph(AT91_PIN_PA16, 0);    /* ETXEN */
174         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ETX0 */
175         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ETX1 */
176         at91_set_A_periph(AT91_PIN_PA21, 0);    /* EMDIO */
177         at91_set_A_periph(AT91_PIN_PA20, 0);    /* EMDC */
178
179         if (!data->is_rmii) {
180                 at91_set_B_periph(AT91_PIN_PA28, 0);    /* ECRS */
181                 at91_set_B_periph(AT91_PIN_PA29, 0);    /* ECOL */
182                 at91_set_B_periph(AT91_PIN_PA25, 0);    /* ERX2 */
183                 at91_set_B_periph(AT91_PIN_PA26, 0);    /* ERX3 */
184                 at91_set_B_periph(AT91_PIN_PA27, 0);    /* ERXCK */
185                 at91_set_B_periph(AT91_PIN_PA23, 0);    /* ETX2 */
186                 at91_set_B_periph(AT91_PIN_PA24, 0);    /* ETX3 */
187                 at91_set_B_periph(AT91_PIN_PA22, 0);    /* ETXER */
188         }
189
190         eth_data = *data;
191         platform_device_register(&at91sam9260_eth_device);
192 }
193 #else
194 void __init at91_add_device_eth(struct at91_eth_data *data) {}
195 #endif
196
197
198 /* --------------------------------------------------------------------
199  *  MMC / SD
200  * -------------------------------------------------------------------- */
201
202 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
203 static u64 mmc_dmamask = DMA_BIT_MASK(32);
204 static struct at91_mmc_data mmc_data;
205
206 static struct resource mmc_resources[] = {
207         [0] = {
208                 .start  = AT91SAM9260_BASE_MCI,
209                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
210                 .flags  = IORESOURCE_MEM,
211         },
212         [1] = {
213                 .start  = AT91SAM9260_ID_MCI,
214                 .end    = AT91SAM9260_ID_MCI,
215                 .flags  = IORESOURCE_IRQ,
216         },
217 };
218
219 static struct platform_device at91sam9260_mmc_device = {
220         .name           = "at91_mci",
221         .id             = -1,
222         .dev            = {
223                                 .dma_mask               = &mmc_dmamask,
224                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
225                                 .platform_data          = &mmc_data,
226         },
227         .resource       = mmc_resources,
228         .num_resources  = ARRAY_SIZE(mmc_resources),
229 };
230
231 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
232 {
233         if (!data)
234                 return;
235
236         /* input/irq */
237         if (data->det_pin) {
238                 at91_set_gpio_input(data->det_pin, 1);
239                 at91_set_deglitch(data->det_pin, 1);
240         }
241         if (data->wp_pin)
242                 at91_set_gpio_input(data->wp_pin, 1);
243         if (data->vcc_pin)
244                 at91_set_gpio_output(data->vcc_pin, 0);
245
246         /* CLK */
247         at91_set_A_periph(AT91_PIN_PA8, 0);
248
249         if (data->slot_b) {
250                 /* CMD */
251                 at91_set_B_periph(AT91_PIN_PA1, 1);
252
253                 /* DAT0, maybe DAT1..DAT3 */
254                 at91_set_B_periph(AT91_PIN_PA0, 1);
255                 if (data->wire4) {
256                         at91_set_B_periph(AT91_PIN_PA5, 1);
257                         at91_set_B_periph(AT91_PIN_PA4, 1);
258                         at91_set_B_periph(AT91_PIN_PA3, 1);
259                 }
260         } else {
261                 /* CMD */
262                 at91_set_A_periph(AT91_PIN_PA7, 1);
263
264                 /* DAT0, maybe DAT1..DAT3 */
265                 at91_set_A_periph(AT91_PIN_PA6, 1);
266                 if (data->wire4) {
267                         at91_set_A_periph(AT91_PIN_PA9, 1);
268                         at91_set_A_periph(AT91_PIN_PA10, 1);
269                         at91_set_A_periph(AT91_PIN_PA11, 1);
270                 }
271         }
272
273         mmc_data = *data;
274         platform_device_register(&at91sam9260_mmc_device);
275 }
276 #else
277 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
278 #endif
279
280
281 /* --------------------------------------------------------------------
282  *  NAND / SmartMedia
283  * -------------------------------------------------------------------- */
284
285 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
286 static struct at91_nand_data nand_data;
287
288 #define NAND_BASE       AT91_CHIPSELECT_3
289
290 static struct resource nand_resources[] = {
291         [0] = {
292                 .start  = NAND_BASE,
293                 .end    = NAND_BASE + SZ_256M - 1,
294                 .flags  = IORESOURCE_MEM,
295         },
296         [1] = {
297                 .start  = AT91_BASE_SYS + AT91_ECC,
298                 .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
299                 .flags  = IORESOURCE_MEM,
300         }
301 };
302
303 static struct platform_device at91sam9260_nand_device = {
304         .name           = "at91_nand",
305         .id             = -1,
306         .dev            = {
307                                 .platform_data  = &nand_data,
308         },
309         .resource       = nand_resources,
310         .num_resources  = ARRAY_SIZE(nand_resources),
311 };
312
313 void __init at91_add_device_nand(struct at91_nand_data *data)
314 {
315         unsigned long csa, mode;
316
317         if (!data)
318                 return;
319
320         csa = at91_sys_read(AT91_MATRIX_EBICSA);
321         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
322
323         /* set the bus interface characteristics */
324         at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
325                         | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
326
327         at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
328                         | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
329
330         at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
331
332         if (data->bus_width_16)
333                 mode = AT91_SMC_DBW_16;
334         else
335                 mode = AT91_SMC_DBW_8;
336         at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
337
338         /* enable pin */
339         if (data->enable_pin)
340                 at91_set_gpio_output(data->enable_pin, 1);
341
342         /* ready/busy pin */
343         if (data->rdy_pin)
344                 at91_set_gpio_input(data->rdy_pin, 1);
345
346         /* card detect pin */
347         if (data->det_pin)
348                 at91_set_gpio_input(data->det_pin, 1);
349
350         nand_data = *data;
351         platform_device_register(&at91sam9260_nand_device);
352 }
353 #else
354 void __init at91_add_device_nand(struct at91_nand_data *data) {}
355 #endif
356
357
358 /* --------------------------------------------------------------------
359  *  TWI (i2c)
360  * -------------------------------------------------------------------- */
361
362 /*
363  * Prefer the GPIO code since the TWI controller isn't robust
364  * (gets overruns and underruns under load) and can only issue
365  * repeated STARTs in one scenario (the driver doesn't yet handle them).
366  */
367
368 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
369
370 static struct i2c_gpio_platform_data pdata = {
371         .sda_pin                = AT91_PIN_PA23,
372         .sda_is_open_drain      = 1,
373         .scl_pin                = AT91_PIN_PA24,
374         .scl_is_open_drain      = 1,
375         .udelay                 = 2,            /* ~100 kHz */
376 };
377
378 static struct platform_device at91sam9260_twi_device = {
379         .name                   = "i2c-gpio",
380         .id                     = -1,
381         .dev.platform_data      = &pdata,
382 };
383
384 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
385 {
386         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
387         at91_set_multi_drive(AT91_PIN_PA23, 1);
388
389         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
390         at91_set_multi_drive(AT91_PIN_PA24, 1);
391
392         i2c_register_board_info(0, devices, nr_devices);
393         platform_device_register(&at91sam9260_twi_device);
394 }
395
396 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
397
398 static struct resource twi_resources[] = {
399         [0] = {
400                 .start  = AT91SAM9260_BASE_TWI,
401                 .end    = AT91SAM9260_BASE_TWI + SZ_16K - 1,
402                 .flags  = IORESOURCE_MEM,
403         },
404         [1] = {
405                 .start  = AT91SAM9260_ID_TWI,
406                 .end    = AT91SAM9260_ID_TWI,
407                 .flags  = IORESOURCE_IRQ,
408         },
409 };
410
411 static struct platform_device at91sam9260_twi_device = {
412         .name           = "at91_i2c",
413         .id             = -1,
414         .resource       = twi_resources,
415         .num_resources  = ARRAY_SIZE(twi_resources),
416 };
417
418 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
419 {
420         /* pins used for TWI interface */
421         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
422         at91_set_multi_drive(AT91_PIN_PA23, 1);
423
424         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
425         at91_set_multi_drive(AT91_PIN_PA24, 1);
426
427         i2c_register_board_info(0, devices, nr_devices);
428         platform_device_register(&at91sam9260_twi_device);
429 }
430 #else
431 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
432 #endif
433
434
435 /* --------------------------------------------------------------------
436  *  SPI
437  * -------------------------------------------------------------------- */
438
439 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
440 static u64 spi_dmamask = DMA_BIT_MASK(32);
441
442 static struct resource spi0_resources[] = {
443         [0] = {
444                 .start  = AT91SAM9260_BASE_SPI0,
445                 .end    = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
446                 .flags  = IORESOURCE_MEM,
447         },
448         [1] = {
449                 .start  = AT91SAM9260_ID_SPI0,
450                 .end    = AT91SAM9260_ID_SPI0,
451                 .flags  = IORESOURCE_IRQ,
452         },
453 };
454
455 static struct platform_device at91sam9260_spi0_device = {
456         .name           = "atmel_spi",
457         .id             = 0,
458         .dev            = {
459                                 .dma_mask               = &spi_dmamask,
460                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
461         },
462         .resource       = spi0_resources,
463         .num_resources  = ARRAY_SIZE(spi0_resources),
464 };
465
466 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
467
468 static struct resource spi1_resources[] = {
469         [0] = {
470                 .start  = AT91SAM9260_BASE_SPI1,
471                 .end    = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
472                 .flags  = IORESOURCE_MEM,
473         },
474         [1] = {
475                 .start  = AT91SAM9260_ID_SPI1,
476                 .end    = AT91SAM9260_ID_SPI1,
477                 .flags  = IORESOURCE_IRQ,
478         },
479 };
480
481 static struct platform_device at91sam9260_spi1_device = {
482         .name           = "atmel_spi",
483         .id             = 1,
484         .dev            = {
485                                 .dma_mask               = &spi_dmamask,
486                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
487         },
488         .resource       = spi1_resources,
489         .num_resources  = ARRAY_SIZE(spi1_resources),
490 };
491
492 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
493
494 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
495 {
496         int i;
497         unsigned long cs_pin;
498         short enable_spi0 = 0;
499         short enable_spi1 = 0;
500
501         /* Choose SPI chip-selects */
502         for (i = 0; i < nr_devices; i++) {
503                 if (devices[i].controller_data)
504                         cs_pin = (unsigned long) devices[i].controller_data;
505                 else if (devices[i].bus_num == 0)
506                         cs_pin = spi0_standard_cs[devices[i].chip_select];
507                 else
508                         cs_pin = spi1_standard_cs[devices[i].chip_select];
509
510                 if (devices[i].bus_num == 0)
511                         enable_spi0 = 1;
512                 else
513                         enable_spi1 = 1;
514
515                 /* enable chip-select pin */
516                 at91_set_gpio_output(cs_pin, 1);
517
518                 /* pass chip-select pin to driver */
519                 devices[i].controller_data = (void *) cs_pin;
520         }
521
522         spi_register_board_info(devices, nr_devices);
523
524         /* Configure SPI bus(es) */
525         if (enable_spi0) {
526                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
527                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
528                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI1_SPCK */
529
530                 at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
531                 platform_device_register(&at91sam9260_spi0_device);
532         }
533         if (enable_spi1) {
534                 at91_set_A_periph(AT91_PIN_PB0, 0);     /* SPI1_MISO */
535                 at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI1_MOSI */
536                 at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI1_SPCK */
537
538                 at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
539                 platform_device_register(&at91sam9260_spi1_device);
540         }
541 }
542 #else
543 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
544 #endif
545
546
547 /* --------------------------------------------------------------------
548  *  Timer/Counter blocks
549  * -------------------------------------------------------------------- */
550
551 #ifdef CONFIG_ATMEL_TCLIB
552
553 static struct resource tcb0_resources[] = {
554         [0] = {
555                 .start  = AT91SAM9260_BASE_TCB0,
556                 .end    = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
557                 .flags  = IORESOURCE_MEM,
558         },
559         [1] = {
560                 .start  = AT91SAM9260_ID_TC0,
561                 .end    = AT91SAM9260_ID_TC0,
562                 .flags  = IORESOURCE_IRQ,
563         },
564         [2] = {
565                 .start  = AT91SAM9260_ID_TC1,
566                 .end    = AT91SAM9260_ID_TC1,
567                 .flags  = IORESOURCE_IRQ,
568         },
569         [3] = {
570                 .start  = AT91SAM9260_ID_TC2,
571                 .end    = AT91SAM9260_ID_TC2,
572                 .flags  = IORESOURCE_IRQ,
573         },
574 };
575
576 static struct platform_device at91sam9260_tcb0_device = {
577         .name           = "atmel_tcb",
578         .id             = 0,
579         .resource       = tcb0_resources,
580         .num_resources  = ARRAY_SIZE(tcb0_resources),
581 };
582
583 static struct resource tcb1_resources[] = {
584         [0] = {
585                 .start  = AT91SAM9260_BASE_TCB1,
586                 .end    = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
587                 .flags  = IORESOURCE_MEM,
588         },
589         [1] = {
590                 .start  = AT91SAM9260_ID_TC3,
591                 .end    = AT91SAM9260_ID_TC3,
592                 .flags  = IORESOURCE_IRQ,
593         },
594         [2] = {
595                 .start  = AT91SAM9260_ID_TC4,
596                 .end    = AT91SAM9260_ID_TC4,
597                 .flags  = IORESOURCE_IRQ,
598         },
599         [3] = {
600                 .start  = AT91SAM9260_ID_TC5,
601                 .end    = AT91SAM9260_ID_TC5,
602                 .flags  = IORESOURCE_IRQ,
603         },
604 };
605
606 static struct platform_device at91sam9260_tcb1_device = {
607         .name           = "atmel_tcb",
608         .id             = 1,
609         .resource       = tcb1_resources,
610         .num_resources  = ARRAY_SIZE(tcb1_resources),
611 };
612
613 static void __init at91_add_device_tc(void)
614 {
615         /* this chip has a separate clock and irq for each TC channel */
616         at91_clock_associate("tc0_clk", &at91sam9260_tcb0_device.dev, "t0_clk");
617         at91_clock_associate("tc1_clk", &at91sam9260_tcb0_device.dev, "t1_clk");
618         at91_clock_associate("tc2_clk", &at91sam9260_tcb0_device.dev, "t2_clk");
619         platform_device_register(&at91sam9260_tcb0_device);
620
621         at91_clock_associate("tc3_clk", &at91sam9260_tcb1_device.dev, "t0_clk");
622         at91_clock_associate("tc4_clk", &at91sam9260_tcb1_device.dev, "t1_clk");
623         at91_clock_associate("tc5_clk", &at91sam9260_tcb1_device.dev, "t2_clk");
624         platform_device_register(&at91sam9260_tcb1_device);
625 }
626 #else
627 static void __init at91_add_device_tc(void) { }
628 #endif
629
630
631 /* --------------------------------------------------------------------
632  *  RTT
633  * -------------------------------------------------------------------- */
634
635 static struct resource rtt_resources[] = {
636         {
637                 .start  = AT91_BASE_SYS + AT91_RTT,
638                 .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
639                 .flags  = IORESOURCE_MEM,
640         }
641 };
642
643 static struct platform_device at91sam9260_rtt_device = {
644         .name           = "at91_rtt",
645         .id             = 0,
646         .resource       = rtt_resources,
647         .num_resources  = ARRAY_SIZE(rtt_resources),
648 };
649
650 static void __init at91_add_device_rtt(void)
651 {
652         platform_device_register(&at91sam9260_rtt_device);
653 }
654
655
656 /* --------------------------------------------------------------------
657  *  Watchdog
658  * -------------------------------------------------------------------- */
659
660 #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
661 static struct platform_device at91sam9260_wdt_device = {
662         .name           = "at91_wdt",
663         .id             = -1,
664         .num_resources  = 0,
665 };
666
667 static void __init at91_add_device_watchdog(void)
668 {
669         platform_device_register(&at91sam9260_wdt_device);
670 }
671 #else
672 static void __init at91_add_device_watchdog(void) {}
673 #endif
674
675
676 /* --------------------------------------------------------------------
677  *  SSC -- Synchronous Serial Controller
678  * -------------------------------------------------------------------- */
679
680 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
681 static u64 ssc_dmamask = DMA_BIT_MASK(32);
682
683 static struct resource ssc_resources[] = {
684         [0] = {
685                 .start  = AT91SAM9260_BASE_SSC,
686                 .end    = AT91SAM9260_BASE_SSC + SZ_16K - 1,
687                 .flags  = IORESOURCE_MEM,
688         },
689         [1] = {
690                 .start  = AT91SAM9260_ID_SSC,
691                 .end    = AT91SAM9260_ID_SSC,
692                 .flags  = IORESOURCE_IRQ,
693         },
694 };
695
696 static struct platform_device at91sam9260_ssc_device = {
697         .name   = "ssc",
698         .id     = 0,
699         .dev    = {
700                 .dma_mask               = &ssc_dmamask,
701                 .coherent_dma_mask      = DMA_BIT_MASK(32),
702         },
703         .resource       = ssc_resources,
704         .num_resources  = ARRAY_SIZE(ssc_resources),
705 };
706
707 static inline void configure_ssc_pins(unsigned pins)
708 {
709         if (pins & ATMEL_SSC_TF)
710                 at91_set_A_periph(AT91_PIN_PB17, 1);
711         if (pins & ATMEL_SSC_TK)
712                 at91_set_A_periph(AT91_PIN_PB16, 1);
713         if (pins & ATMEL_SSC_TD)
714                 at91_set_A_periph(AT91_PIN_PB18, 1);
715         if (pins & ATMEL_SSC_RD)
716                 at91_set_A_periph(AT91_PIN_PB19, 1);
717         if (pins & ATMEL_SSC_RK)
718                 at91_set_A_periph(AT91_PIN_PB20, 1);
719         if (pins & ATMEL_SSC_RF)
720                 at91_set_A_periph(AT91_PIN_PB21, 1);
721 }
722
723 /*
724  * SSC controllers are accessed through library code, instead of any
725  * kind of all-singing/all-dancing driver.  For example one could be
726  * used by a particular I2S audio codec's driver, while another one
727  * on the same system might be used by a custom data capture driver.
728  */
729 void __init at91_add_device_ssc(unsigned id, unsigned pins)
730 {
731         struct platform_device *pdev;
732
733         /*
734          * NOTE: caller is responsible for passing information matching
735          * "pins" to whatever will be using each particular controller.
736          */
737         switch (id) {
738         case AT91SAM9260_ID_SSC:
739                 pdev = &at91sam9260_ssc_device;
740                 configure_ssc_pins(pins);
741                 at91_clock_associate("ssc_clk", &pdev->dev, "pclk");
742                 break;
743         default:
744                 return;
745         }
746
747         platform_device_register(pdev);
748 }
749
750 #else
751 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
752 #endif
753
754
755 /* --------------------------------------------------------------------
756  *  UART
757  * -------------------------------------------------------------------- */
758 #if defined(CONFIG_SERIAL_ATMEL)
759 static struct resource dbgu_resources[] = {
760         [0] = {
761                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
762                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
763                 .flags  = IORESOURCE_MEM,
764         },
765         [1] = {
766                 .start  = AT91_ID_SYS,
767                 .end    = AT91_ID_SYS,
768                 .flags  = IORESOURCE_IRQ,
769         },
770 };
771
772 static struct atmel_uart_data dbgu_data = {
773         .use_dma_tx     = 0,
774         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
775         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
776 };
777
778 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
779
780 static struct platform_device at91sam9260_dbgu_device = {
781         .name           = "atmel_usart",
782         .id             = 0,
783         .dev            = {
784                                 .dma_mask               = &dbgu_dmamask,
785                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
786                                 .platform_data          = &dbgu_data,
787         },
788         .resource       = dbgu_resources,
789         .num_resources  = ARRAY_SIZE(dbgu_resources),
790 };
791
792 static inline void configure_dbgu_pins(void)
793 {
794         at91_set_A_periph(AT91_PIN_PB14, 0);            /* DRXD */
795         at91_set_A_periph(AT91_PIN_PB15, 1);            /* DTXD */
796 }
797
798 static struct resource uart0_resources[] = {
799         [0] = {
800                 .start  = AT91SAM9260_BASE_US0,
801                 .end    = AT91SAM9260_BASE_US0 + SZ_16K - 1,
802                 .flags  = IORESOURCE_MEM,
803         },
804         [1] = {
805                 .start  = AT91SAM9260_ID_US0,
806                 .end    = AT91SAM9260_ID_US0,
807                 .flags  = IORESOURCE_IRQ,
808         },
809 };
810
811 static struct atmel_uart_data uart0_data = {
812         .use_dma_tx     = 1,
813         .use_dma_rx     = 1,
814 };
815
816 static u64 uart0_dmamask = DMA_BIT_MASK(32);
817
818 static struct platform_device at91sam9260_uart0_device = {
819         .name           = "atmel_usart",
820         .id             = 1,
821         .dev            = {
822                                 .dma_mask               = &uart0_dmamask,
823                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
824                                 .platform_data          = &uart0_data,
825         },
826         .resource       = uart0_resources,
827         .num_resources  = ARRAY_SIZE(uart0_resources),
828 };
829
830 static inline void configure_usart0_pins(unsigned pins)
831 {
832         at91_set_A_periph(AT91_PIN_PB4, 1);             /* TXD0 */
833         at91_set_A_periph(AT91_PIN_PB5, 0);             /* RXD0 */
834
835         if (pins & ATMEL_UART_RTS)
836                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS0 */
837         if (pins & ATMEL_UART_CTS)
838                 at91_set_A_periph(AT91_PIN_PB27, 0);    /* CTS0 */
839         if (pins & ATMEL_UART_DTR)
840                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* DTR0 */
841         if (pins & ATMEL_UART_DSR)
842                 at91_set_A_periph(AT91_PIN_PB22, 0);    /* DSR0 */
843         if (pins & ATMEL_UART_DCD)
844                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD0 */
845         if (pins & ATMEL_UART_RI)
846                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* RI0 */
847 }
848
849 static struct resource uart1_resources[] = {
850         [0] = {
851                 .start  = AT91SAM9260_BASE_US1,
852                 .end    = AT91SAM9260_BASE_US1 + SZ_16K - 1,
853                 .flags  = IORESOURCE_MEM,
854         },
855         [1] = {
856                 .start  = AT91SAM9260_ID_US1,
857                 .end    = AT91SAM9260_ID_US1,
858                 .flags  = IORESOURCE_IRQ,
859         },
860 };
861
862 static struct atmel_uart_data uart1_data = {
863         .use_dma_tx     = 1,
864         .use_dma_rx     = 1,
865 };
866
867 static u64 uart1_dmamask = DMA_BIT_MASK(32);
868
869 static struct platform_device at91sam9260_uart1_device = {
870         .name           = "atmel_usart",
871         .id             = 2,
872         .dev            = {
873                                 .dma_mask               = &uart1_dmamask,
874                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
875                                 .platform_data          = &uart1_data,
876         },
877         .resource       = uart1_resources,
878         .num_resources  = ARRAY_SIZE(uart1_resources),
879 };
880
881 static inline void configure_usart1_pins(unsigned pins)
882 {
883         at91_set_A_periph(AT91_PIN_PB6, 1);             /* TXD1 */
884         at91_set_A_periph(AT91_PIN_PB7, 0);             /* RXD1 */
885
886         if (pins & ATMEL_UART_RTS)
887                 at91_set_A_periph(AT91_PIN_PB28, 0);    /* RTS1 */
888         if (pins & ATMEL_UART_CTS)
889                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* CTS1 */
890 }
891
892 static struct resource uart2_resources[] = {
893         [0] = {
894                 .start  = AT91SAM9260_BASE_US2,
895                 .end    = AT91SAM9260_BASE_US2 + SZ_16K - 1,
896                 .flags  = IORESOURCE_MEM,
897         },
898         [1] = {
899                 .start  = AT91SAM9260_ID_US2,
900                 .end    = AT91SAM9260_ID_US2,
901                 .flags  = IORESOURCE_IRQ,
902         },
903 };
904
905 static struct atmel_uart_data uart2_data = {
906         .use_dma_tx     = 1,
907         .use_dma_rx     = 1,
908 };
909
910 static u64 uart2_dmamask = DMA_BIT_MASK(32);
911
912 static struct platform_device at91sam9260_uart2_device = {
913         .name           = "atmel_usart",
914         .id             = 3,
915         .dev            = {
916                                 .dma_mask               = &uart2_dmamask,
917                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
918                                 .platform_data          = &uart2_data,
919         },
920         .resource       = uart2_resources,
921         .num_resources  = ARRAY_SIZE(uart2_resources),
922 };
923
924 static inline void configure_usart2_pins(unsigned pins)
925 {
926         at91_set_A_periph(AT91_PIN_PB8, 1);             /* TXD2 */
927         at91_set_A_periph(AT91_PIN_PB9, 0);             /* RXD2 */
928
929         if (pins & ATMEL_UART_RTS)
930                 at91_set_A_periph(AT91_PIN_PA4, 0);     /* RTS2 */
931         if (pins & ATMEL_UART_CTS)
932                 at91_set_A_periph(AT91_PIN_PA5, 0);     /* CTS2 */
933 }
934
935 static struct resource uart3_resources[] = {
936         [0] = {
937                 .start  = AT91SAM9260_BASE_US3,
938                 .end    = AT91SAM9260_BASE_US3 + SZ_16K - 1,
939                 .flags  = IORESOURCE_MEM,
940         },
941         [1] = {
942                 .start  = AT91SAM9260_ID_US3,
943                 .end    = AT91SAM9260_ID_US3,
944                 .flags  = IORESOURCE_IRQ,
945         },
946 };
947
948 static struct atmel_uart_data uart3_data = {
949         .use_dma_tx     = 1,
950         .use_dma_rx     = 1,
951 };
952
953 static u64 uart3_dmamask = DMA_BIT_MASK(32);
954
955 static struct platform_device at91sam9260_uart3_device = {
956         .name           = "atmel_usart",
957         .id             = 4,
958         .dev            = {
959                                 .dma_mask               = &uart3_dmamask,
960                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
961                                 .platform_data          = &uart3_data,
962         },
963         .resource       = uart3_resources,
964         .num_resources  = ARRAY_SIZE(uart3_resources),
965 };
966
967 static inline void configure_usart3_pins(unsigned pins)
968 {
969         at91_set_A_periph(AT91_PIN_PB10, 1);            /* TXD3 */
970         at91_set_A_periph(AT91_PIN_PB11, 0);            /* RXD3 */
971
972         if (pins & ATMEL_UART_RTS)
973                 at91_set_B_periph(AT91_PIN_PC8, 0);     /* RTS3 */
974         if (pins & ATMEL_UART_CTS)
975                 at91_set_B_periph(AT91_PIN_PC10, 0);    /* CTS3 */
976 }
977
978 static struct resource uart4_resources[] = {
979         [0] = {
980                 .start  = AT91SAM9260_BASE_US4,
981                 .end    = AT91SAM9260_BASE_US4 + SZ_16K - 1,
982                 .flags  = IORESOURCE_MEM,
983         },
984         [1] = {
985                 .start  = AT91SAM9260_ID_US4,
986                 .end    = AT91SAM9260_ID_US4,
987                 .flags  = IORESOURCE_IRQ,
988         },
989 };
990
991 static struct atmel_uart_data uart4_data = {
992         .use_dma_tx     = 1,
993         .use_dma_rx     = 1,
994 };
995
996 static u64 uart4_dmamask = DMA_BIT_MASK(32);
997
998 static struct platform_device at91sam9260_uart4_device = {
999         .name           = "atmel_usart",
1000         .id             = 5,
1001         .dev            = {
1002                                 .dma_mask               = &uart4_dmamask,
1003                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1004                                 .platform_data          = &uart4_data,
1005         },
1006         .resource       = uart4_resources,
1007         .num_resources  = ARRAY_SIZE(uart4_resources),
1008 };
1009
1010 static inline void configure_usart4_pins(void)
1011 {
1012         at91_set_B_periph(AT91_PIN_PA31, 1);            /* TXD4 */
1013         at91_set_B_periph(AT91_PIN_PA30, 0);            /* RXD4 */
1014 }
1015
1016 static struct resource uart5_resources[] = {
1017         [0] = {
1018                 .start  = AT91SAM9260_BASE_US5,
1019                 .end    = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1020                 .flags  = IORESOURCE_MEM,
1021         },
1022         [1] = {
1023                 .start  = AT91SAM9260_ID_US5,
1024                 .end    = AT91SAM9260_ID_US5,
1025                 .flags  = IORESOURCE_IRQ,
1026         },
1027 };
1028
1029 static struct atmel_uart_data uart5_data = {
1030         .use_dma_tx     = 1,
1031         .use_dma_rx     = 1,
1032 };
1033
1034 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1035
1036 static struct platform_device at91sam9260_uart5_device = {
1037         .name           = "atmel_usart",
1038         .id             = 6,
1039         .dev            = {
1040                                 .dma_mask               = &uart5_dmamask,
1041                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1042                                 .platform_data          = &uart5_data,
1043         },
1044         .resource       = uart5_resources,
1045         .num_resources  = ARRAY_SIZE(uart5_resources),
1046 };
1047
1048 static inline void configure_usart5_pins(void)
1049 {
1050         at91_set_A_periph(AT91_PIN_PB12, 1);            /* TXD5 */
1051         at91_set_A_periph(AT91_PIN_PB13, 0);            /* RXD5 */
1052 }
1053
1054 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1055 struct platform_device *atmel_default_console_device;   /* the serial console device */
1056
1057 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1058 {
1059         struct platform_device *pdev;
1060
1061         switch (id) {
1062                 case 0:         /* DBGU */
1063                         pdev = &at91sam9260_dbgu_device;
1064                         configure_dbgu_pins();
1065                         at91_clock_associate("mck", &pdev->dev, "usart");
1066                         break;
1067                 case AT91SAM9260_ID_US0:
1068                         pdev = &at91sam9260_uart0_device;
1069                         configure_usart0_pins(pins);
1070                         at91_clock_associate("usart0_clk", &pdev->dev, "usart");
1071                         break;
1072                 case AT91SAM9260_ID_US1:
1073                         pdev = &at91sam9260_uart1_device;
1074                         configure_usart1_pins(pins);
1075                         at91_clock_associate("usart1_clk", &pdev->dev, "usart");
1076                         break;
1077                 case AT91SAM9260_ID_US2:
1078                         pdev = &at91sam9260_uart2_device;
1079                         configure_usart2_pins(pins);
1080                         at91_clock_associate("usart2_clk", &pdev->dev, "usart");
1081                         break;
1082                 case AT91SAM9260_ID_US3:
1083                         pdev = &at91sam9260_uart3_device;
1084                         configure_usart3_pins(pins);
1085                         at91_clock_associate("usart3_clk", &pdev->dev, "usart");
1086                         break;
1087                 case AT91SAM9260_ID_US4:
1088                         pdev = &at91sam9260_uart4_device;
1089                         configure_usart4_pins();
1090                         at91_clock_associate("usart4_clk", &pdev->dev, "usart");
1091                         break;
1092                 case AT91SAM9260_ID_US5:
1093                         pdev = &at91sam9260_uart5_device;
1094                         configure_usart5_pins();
1095                         at91_clock_associate("usart5_clk", &pdev->dev, "usart");
1096                         break;
1097                 default:
1098                         return;
1099         }
1100         pdev->id = portnr;              /* update to mapped ID */
1101
1102         if (portnr < ATMEL_MAX_UART)
1103                 at91_uarts[portnr] = pdev;
1104 }
1105
1106 void __init at91_set_serial_console(unsigned portnr)
1107 {
1108         if (portnr < ATMEL_MAX_UART)
1109                 atmel_default_console_device = at91_uarts[portnr];
1110 }
1111
1112 void __init at91_add_device_serial(void)
1113 {
1114         int i;
1115
1116         for (i = 0; i < ATMEL_MAX_UART; i++) {
1117                 if (at91_uarts[i])
1118                         platform_device_register(at91_uarts[i]);
1119         }
1120
1121         if (!atmel_default_console_device)
1122                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1123 }
1124 #else
1125 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1126 void __init at91_set_serial_console(unsigned portnr) {}
1127 void __init at91_add_device_serial(void) {}
1128 #endif
1129
1130
1131 /* -------------------------------------------------------------------- */
1132 /*
1133  * These devices are always present and don't need any board-specific
1134  * setup.
1135  */
1136 static int __init at91_add_standard_devices(void)
1137 {
1138         at91_add_device_rtt();
1139         at91_add_device_watchdog();
1140         at91_add_device_tc();
1141         return 0;
1142 }
1143
1144 arch_initcall(at91_add_standard_devices);