5 * Please do not include this file in generic code. There is currently
6 * no requirement for any architecture to implement anything held
12 #include <linux/smp.h>
16 #include <linux/linkage.h>
17 #include <linux/cache.h>
18 #include <linux/spinlock.h>
19 #include <linux/cpumask.h>
20 #include <linux/irqreturn.h>
23 #include <asm/ptrace.h>
24 #include <asm/irq_regs.h>
27 typedef void fastcall (*irq_flow_handler_t)(unsigned int irq,
28 struct irq_desc *desc);
34 * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
38 #define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
39 #define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
40 #define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
41 #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
42 #define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
43 #define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
44 #define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
45 #define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
48 #define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */
49 #define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */
50 #define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */
51 #define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */
52 #define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */
53 #define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */
54 #define IRQ_LEVEL 0x00004000 /* IRQ level triggered */
55 #define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */
56 #define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */
57 #define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */
58 #define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */
59 #define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */
60 #define IRQ_WAKEUP 0x00100000 /* IRQ triggers system wakeup */
61 #define IRQ_MOVE_PENDING 0x00200000 /* need to re-target IRQ destination */
62 #define IRQ_NO_BALANCING 0x00400000 /* IRQ is excluded from balancing */
64 #ifdef CONFIG_IRQ_PER_CPU
65 # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
66 # define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
68 # define CHECK_IRQ_PER_CPU(var) 0
69 # define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING
72 struct proc_dir_entry;
76 * struct irq_chip - hardware interrupt chip descriptor
78 * @name: name for /proc/interrupts
79 * @startup: start up the interrupt (defaults to ->enable if NULL)
80 * @shutdown: shut down the interrupt (defaults to ->disable if NULL)
81 * @enable: enable the interrupt (defaults to chip->unmask if NULL)
82 * @disable: disable the interrupt (defaults to chip->mask if NULL)
83 * @ack: start of a new interrupt
84 * @mask: mask an interrupt source
85 * @mask_ack: ack and mask an interrupt source
86 * @unmask: unmask an interrupt source
87 * @eoi: end of interrupt - chip level
88 * @end: end of interrupt - flow level
89 * @set_affinity: set the CPU affinity on SMP machines
90 * @retrigger: resend an IRQ to the CPU
91 * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
92 * @set_wake: enable/disable power-management wake-on of an IRQ
94 * @release: release function solely used by UML
95 * @typename: obsoleted by name, kept as migration helper
99 unsigned int (*startup)(unsigned int irq);
100 void (*shutdown)(unsigned int irq);
101 void (*enable)(unsigned int irq);
102 void (*disable)(unsigned int irq);
104 void (*ack)(unsigned int irq);
105 void (*mask)(unsigned int irq);
106 void (*mask_ack)(unsigned int irq);
107 void (*unmask)(unsigned int irq);
108 void (*eoi)(unsigned int irq);
110 void (*end)(unsigned int irq);
111 void (*set_affinity)(unsigned int irq, cpumask_t dest);
112 int (*retrigger)(unsigned int irq);
113 int (*set_type)(unsigned int irq, unsigned int flow_type);
114 int (*set_wake)(unsigned int irq, unsigned int on);
116 /* Currently used only by UML, might disappear one day.*/
117 #ifdef CONFIG_IRQ_RELEASE_METHOD
118 void (*release)(unsigned int irq, void *dev_id);
121 * For compatibility, ->typename is copied into ->name.
124 const char *typename;
128 * struct irq_desc - interrupt descriptor
130 * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
131 * @chip: low level interrupt hardware access
132 * @msi_desc: MSI descriptor
133 * @handler_data: per-IRQ data for the irq_chip methods
134 * @chip_data: platform-specific per-chip private data for the chip
135 * methods, to allow shared chip implementations
136 * @action: the irq action chain
137 * @status: status information
138 * @depth: disable-depth, for nested irq_disable() calls
139 * @wake_depth: enable depth, for multiple set_irq_wake() callers
140 * @irq_count: stats field to detect stalled irqs
141 * @irqs_unhandled: stats field for spurious unhandled interrupts
142 * @lock: locking for SMP
143 * @affinity: IRQ affinity on SMP
144 * @cpu: cpu index useful for balancing
145 * @pending_mask: pending rebalanced interrupts
146 * @dir: /proc/irq/ procfs entry
147 * @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP
148 * @name: flow handler name for /proc/interrupts output
150 * Pad this out to 32 bytes for cache and indexing reasons.
153 irq_flow_handler_t handle_irq;
154 struct irq_chip *chip;
155 struct msi_desc *msi_desc;
158 struct irqaction *action; /* IRQ action list */
159 unsigned int status; /* IRQ status */
161 unsigned int depth; /* nested irq disables */
162 unsigned int wake_depth; /* nested wake enables */
163 unsigned int irq_count; /* For detecting broken IRQs */
164 unsigned int irqs_unhandled;
170 #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
171 cpumask_t pending_mask;
173 #ifdef CONFIG_PROC_FS
174 struct proc_dir_entry *dir;
177 } ____cacheline_aligned;
179 extern struct irq_desc irq_desc[NR_IRQS];
182 * Migration helpers for obsolete names, they will go away:
184 #define hw_interrupt_type irq_chip
185 typedef struct irq_chip hw_irq_controller;
186 #define no_irq_type no_irq_chip
187 typedef struct irq_desc irq_desc_t;
190 * Pick up the arch-dependent methods:
192 #include <asm/hw_irq.h>
194 extern int setup_irq(unsigned int irq, struct irqaction *new);
196 #ifdef CONFIG_GENERIC_HARDIRQS
198 #ifndef handle_dynamic_tick
199 # define handle_dynamic_tick(a) do { } while (0)
203 static inline void set_native_irq_info(int irq, cpumask_t mask)
205 irq_desc[irq].affinity = mask;
208 static inline void set_native_irq_info(int irq, cpumask_t mask)
215 #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
217 void set_pending_irq(unsigned int irq, cpumask_t mask);
218 void move_native_irq(int irq);
219 void move_masked_irq(int irq);
221 #else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */
223 static inline void move_irq(int irq)
227 static inline void move_native_irq(int irq)
231 static inline void move_masked_irq(int irq)
235 static inline void set_pending_irq(unsigned int irq, cpumask_t mask)
239 #endif /* CONFIG_GENERIC_PENDING_IRQ */
241 extern int irq_set_affinity(unsigned int irq, cpumask_t cpumask);
242 extern int irq_can_set_affinity(unsigned int irq);
244 #else /* CONFIG_SMP */
246 #define move_native_irq(x)
247 #define move_masked_irq(x)
249 static inline int irq_set_affinity(unsigned int irq, cpumask_t cpumask)
254 static inline int irq_can_set_affinity(unsigned int irq) { return 0; }
256 #endif /* CONFIG_SMP */
258 #ifdef CONFIG_IRQBALANCE
259 extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask);
261 static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
266 #ifdef CONFIG_AUTO_IRQ_AFFINITY
267 extern int select_smp_affinity(unsigned int irq);
269 static inline int select_smp_affinity(unsigned int irq)
275 extern int no_irq_affinity;
277 static inline int irq_balancing_disabled(unsigned int irq)
279 return irq_desc[irq].status & IRQ_NO_BALANCING_MASK;
282 /* Handle irq action chains: */
283 extern int handle_IRQ_event(unsigned int irq, struct irqaction *action);
286 * Built-in IRQ handlers for various IRQ types,
287 * callable via desc->chip->handle_irq()
289 extern void fastcall handle_level_irq(unsigned int irq, struct irq_desc *desc);
290 extern void fastcall handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
291 extern void fastcall handle_edge_irq(unsigned int irq, struct irq_desc *desc);
292 extern void fastcall handle_simple_irq(unsigned int irq, struct irq_desc *desc);
293 extern void fastcall handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
294 extern void fastcall handle_bad_irq(unsigned int irq, struct irq_desc *desc);
297 * Monolithic do_IRQ implementation.
298 * (is an explicit fastcall, because i386 4KSTACKS calls it from assembly)
300 #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
301 extern fastcall unsigned int __do_IRQ(unsigned int irq);
305 * Architectures call this to let the generic IRQ layer
306 * handle an interrupt. If the descriptor is attached to an
307 * irqchip-style controller then we call the ->handle_irq() handler,
308 * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
310 static inline void generic_handle_irq(unsigned int irq)
312 struct irq_desc *desc = irq_desc + irq;
314 #ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
315 desc->handle_irq(irq, desc);
317 if (likely(desc->handle_irq))
318 desc->handle_irq(irq, desc);
324 /* Handling of unhandled and spurious interrupts: */
325 extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
328 /* Resending of interrupts :*/
329 void check_irq_resend(struct irq_desc *desc, unsigned int irq);
331 /* Initialize /proc/irq/ */
332 extern void init_irq_proc(void);
334 /* Enable/disable irq debugging output: */
335 extern int noirqdebug_setup(char *str);
337 /* Checks whether the interrupt can be requested by request_irq(): */
338 extern int can_request_irq(unsigned int irq, unsigned long irqflags);
340 /* Dummy irq-chip implementations: */
341 extern struct irq_chip no_irq_chip;
342 extern struct irq_chip dummy_irq_chip;
345 set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
346 irq_flow_handler_t handle);
348 set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
349 irq_flow_handler_t handle, const char *name);
352 __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
356 * Set a highlevel flow handler for a given IRQ:
359 set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
361 __set_irq_handler(irq, handle, 0, NULL);
365 * Set a highlevel chained flow handler for a given IRQ.
366 * (a chained handler is automatically enabled and set to
367 * IRQ_NOREQUEST and IRQ_NOPROBE)
370 set_irq_chained_handler(unsigned int irq,
371 irq_flow_handler_t handle)
373 __set_irq_handler(irq, handle, 1, NULL);
376 /* Handle dynamic irq creation and destruction */
377 extern int create_irq(void);
378 extern void destroy_irq(unsigned int irq);
380 /* Test to see if a driver has successfully requested an irq */
381 static inline int irq_has_action(unsigned int irq)
383 struct irq_desc *desc = irq_desc + irq;
384 return desc->action != NULL;
387 /* Dynamic irq helper functions */
388 extern void dynamic_irq_init(unsigned int irq);
389 extern void dynamic_irq_cleanup(unsigned int irq);
391 /* Set/get chip/data for an IRQ: */
392 extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
393 extern int set_irq_data(unsigned int irq, void *data);
394 extern int set_irq_chip_data(unsigned int irq, void *data);
395 extern int set_irq_type(unsigned int irq, unsigned int type);
396 extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
398 #define get_irq_chip(irq) (irq_desc[irq].chip)
399 #define get_irq_chip_data(irq) (irq_desc[irq].chip_data)
400 #define get_irq_data(irq) (irq_desc[irq].handler_data)
401 #define get_irq_msi(irq) (irq_desc[irq].msi_desc)
403 #endif /* CONFIG_GENERIC_HARDIRQS */
405 #endif /* !CONFIG_S390 */
407 #endif /* _LINUX_IRQ_H */