2 w83627ehf - Driver for the hardware monitoring functionality of
3 the Winbond W83627EHF Super-I/O chip
4 Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
5 Copyright (C) 2006 Yuan Mu (Winbond),
6 Rudolf Marek <r.marek@assembler.cz>
7 David Hubbard <david.c.hubbard@gmail.com>
9 Shamelessly ripped from the w83627hf driver
10 Copyright (C) 2003 Mark Studebaker
12 Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
13 in testing and debugging this driver.
15 This driver also supports the W83627EHG, which is the lead-free
16 version of the W83627EHF.
18 This program is free software; you can redistribute it and/or modify
19 it under the terms of the GNU General Public License as published by
20 the Free Software Foundation; either version 2 of the License, or
21 (at your option) any later version.
23 This program is distributed in the hope that it will be useful,
24 but WITHOUT ANY WARRANTY; without even the implied warranty of
25 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 GNU General Public License for more details.
28 You should have received a copy of the GNU General Public License
29 along with this program; if not, write to the Free Software
30 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 Supports the following chips:
35 Chip #vin #fan #pwm #temp chip IDs man ID
36 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
38 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
39 w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3
42 #include <linux/module.h>
43 #include <linux/init.h>
44 #include <linux/slab.h>
45 #include <linux/jiffies.h>
46 #include <linux/platform_device.h>
47 #include <linux/hwmon.h>
48 #include <linux/hwmon-sysfs.h>
49 #include <linux/hwmon-vid.h>
50 #include <linux/err.h>
51 #include <linux/mutex.h>
52 #include <linux/acpi.h>
56 enum kinds { w83627ehf, w83627dhg, w83667hg };
58 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
59 static const char * w83627ehf_device_names[] = {
65 static unsigned short force_id;
66 module_param(force_id, ushort, 0);
67 MODULE_PARM_DESC(force_id, "Override the detected device ID");
69 #define DRVNAME "w83627ehf"
72 * Super-I/O constants and functions
75 #define W83627EHF_LD_HWM 0x0b
76 #define W83667HG_LD_VID 0x0d
78 #define SIO_REG_LDSEL 0x07 /* Logical device select */
79 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
80 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
81 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
82 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
83 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
84 #define SIO_REG_VID_DATA 0xF1 /* VID data */
86 #define SIO_W83627EHF_ID 0x8850
87 #define SIO_W83627EHG_ID 0x8860
88 #define SIO_W83627DHG_ID 0xa020
89 #define SIO_W83667HG_ID 0xa510
90 #define SIO_ID_MASK 0xFFF0
93 superio_outb(int ioreg, int reg, int val)
100 superio_inb(int ioreg, int reg)
103 return inb(ioreg + 1);
107 superio_select(int ioreg, int ld)
109 outb(SIO_REG_LDSEL, ioreg);
114 superio_enter(int ioreg)
121 superio_exit(int ioreg)
124 outb(0x02, ioreg + 1);
131 #define IOREGION_ALIGNMENT ~7
132 #define IOREGION_OFFSET 5
133 #define IOREGION_LENGTH 2
134 #define ADDR_REG_OFFSET 0
135 #define DATA_REG_OFFSET 1
137 #define W83627EHF_REG_BANK 0x4E
138 #define W83627EHF_REG_CONFIG 0x40
140 /* Not currently used:
141 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
142 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
143 * REG_MAN_ID is at port 0x4f
144 * REG_CHIP_ID is at port 0x58 */
146 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
147 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
149 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
150 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
151 (0x554 + (((nr) - 7) * 2)))
152 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
153 (0x555 + (((nr) - 7) * 2)))
154 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
157 #define W83627EHF_REG_TEMP1 0x27
158 #define W83627EHF_REG_TEMP1_HYST 0x3a
159 #define W83627EHF_REG_TEMP1_OVER 0x39
160 static const u16 W83627EHF_REG_TEMP[] = { 0x150, 0x250 };
161 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x153, 0x253 };
162 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x155, 0x255 };
163 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 };
165 /* Fan clock dividers are spread over the following five registers */
166 #define W83627EHF_REG_FANDIV1 0x47
167 #define W83627EHF_REG_FANDIV2 0x4B
168 #define W83627EHF_REG_VBAT 0x5D
169 #define W83627EHF_REG_DIODE 0x59
170 #define W83627EHF_REG_SMI_OVT 0x4C
172 #define W83627EHF_REG_ALARM1 0x459
173 #define W83627EHF_REG_ALARM2 0x45A
174 #define W83627EHF_REG_ALARM3 0x45B
176 /* SmartFan registers */
177 /* DC or PWM output fan configuration */
178 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
179 0x04, /* SYS FAN0 output mode and PWM mode */
180 0x04, /* CPU FAN0 output mode and PWM mode */
181 0x12, /* AUX FAN mode */
182 0x62, /* CPU fan1 mode */
185 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
186 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
188 /* FAN Duty Cycle, be used to control */
189 static const u8 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
190 static const u8 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
191 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
194 /* Advanced Fan control, some values are common for all fans */
195 static const u8 W83627EHF_REG_FAN_MIN_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
196 static const u8 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0C, 0x0D, 0x17, 0x66 };
202 /* 1 is PWM mode, output in ms */
203 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
205 return mode ? 100 * reg : 400 * reg;
208 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
210 return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
211 (msec + 200) / 400), 1, 255);
214 static inline unsigned int
215 fan_from_reg(u8 reg, unsigned int div)
217 if (reg == 0 || reg == 255)
219 return 1350000U / (reg * div);
222 static inline unsigned int
229 temp1_from_reg(s8 reg)
235 temp1_to_reg(long temp, int min, int max)
242 return (temp - 500) / 1000;
243 return (temp + 500) / 1000;
246 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
248 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
250 static inline long in_from_reg(u8 reg, u8 nr)
252 return reg * scale_in[nr];
255 static inline u8 in_to_reg(u32 val, u8 nr)
257 return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0, 255);
261 * Data structures and manipulation thereof
264 struct w83627ehf_data {
265 int addr; /* IO base of hw monitor block */
268 struct device *hwmon_dev;
271 struct mutex update_lock;
272 char valid; /* !=0 if following fields are valid */
273 unsigned long last_updated; /* In jiffies */
275 /* Register values */
276 u8 in_num; /* number of in inputs we have */
277 u8 in[10]; /* Register value */
278 u8 in_max[10]; /* Register value */
279 u8 in_min[10]; /* Register value */
283 u8 has_fan; /* some fan inputs can be disabled */
290 s16 temp_max_hyst[2];
293 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
294 u8 pwm_enable[4]; /* 1->manual
295 2->thermal cruise (also called SmartFan I) */
296 u8 pwm_num; /* number of pwm */
301 u8 fan_min_output[4]; /* minimum fan speed */
308 struct w83627ehf_sio_data {
313 static inline int is_word_sized(u16 reg)
315 return (((reg & 0xff00) == 0x100
316 || (reg & 0xff00) == 0x200)
317 && ((reg & 0x00ff) == 0x50
318 || (reg & 0x00ff) == 0x53
319 || (reg & 0x00ff) == 0x55));
322 /* Registers 0x50-0x5f are banked */
323 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
325 if ((reg & 0x00f0) == 0x50) {
326 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
327 outb_p(reg >> 8, data->addr + DATA_REG_OFFSET);
331 /* Not strictly necessary, but play it safe for now */
332 static inline void w83627ehf_reset_bank(struct w83627ehf_data *data, u16 reg)
335 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
336 outb_p(0, data->addr + DATA_REG_OFFSET);
340 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
342 int res, word_sized = is_word_sized(reg);
344 mutex_lock(&data->lock);
346 w83627ehf_set_bank(data, reg);
347 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
348 res = inb_p(data->addr + DATA_REG_OFFSET);
350 outb_p((reg & 0xff) + 1,
351 data->addr + ADDR_REG_OFFSET);
352 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
354 w83627ehf_reset_bank(data, reg);
356 mutex_unlock(&data->lock);
361 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg, u16 value)
363 int word_sized = is_word_sized(reg);
365 mutex_lock(&data->lock);
367 w83627ehf_set_bank(data, reg);
368 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
370 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
371 outb_p((reg & 0xff) + 1,
372 data->addr + ADDR_REG_OFFSET);
374 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
375 w83627ehf_reset_bank(data, reg);
377 mutex_unlock(&data->lock);
381 /* This function assumes that the caller holds data->update_lock */
382 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
388 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
389 | ((data->fan_div[0] & 0x03) << 4);
390 /* fan5 input control bit is write only, compute the value */
391 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
392 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
393 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
394 | ((data->fan_div[0] & 0x04) << 3);
395 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
398 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
399 | ((data->fan_div[1] & 0x03) << 6);
400 /* fan5 input control bit is write only, compute the value */
401 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
402 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
403 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
404 | ((data->fan_div[1] & 0x04) << 4);
405 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
408 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
409 | ((data->fan_div[2] & 0x03) << 6);
410 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
411 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
412 | ((data->fan_div[2] & 0x04) << 5);
413 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
416 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
417 | (data->fan_div[3] & 0x03);
418 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
419 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
420 | ((data->fan_div[3] & 0x04) << 5);
421 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
424 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
425 | ((data->fan_div[4] & 0x03) << 2)
426 | ((data->fan_div[4] & 0x04) << 5);
427 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
432 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
436 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
437 data->fan_div[0] = (i >> 4) & 0x03;
438 data->fan_div[1] = (i >> 6) & 0x03;
439 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
440 data->fan_div[2] = (i >> 6) & 0x03;
441 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
442 data->fan_div[0] |= (i >> 3) & 0x04;
443 data->fan_div[1] |= (i >> 4) & 0x04;
444 data->fan_div[2] |= (i >> 5) & 0x04;
445 if (data->has_fan & ((1 << 3) | (1 << 4))) {
446 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
447 data->fan_div[3] = i & 0x03;
448 data->fan_div[4] = ((i >> 2) & 0x03)
451 if (data->has_fan & (1 << 3)) {
452 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
453 data->fan_div[3] |= (i >> 5) & 0x04;
457 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
459 struct w83627ehf_data *data = dev_get_drvdata(dev);
460 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
463 mutex_lock(&data->update_lock);
465 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
467 /* Fan clock dividers */
468 w83627ehf_update_fan_div(data);
470 /* Measured voltages and limits */
471 for (i = 0; i < data->in_num; i++) {
472 data->in[i] = w83627ehf_read_value(data,
473 W83627EHF_REG_IN(i));
474 data->in_min[i] = w83627ehf_read_value(data,
475 W83627EHF_REG_IN_MIN(i));
476 data->in_max[i] = w83627ehf_read_value(data,
477 W83627EHF_REG_IN_MAX(i));
480 /* Measured fan speeds and limits */
481 for (i = 0; i < 5; i++) {
482 if (!(data->has_fan & (1 << i)))
485 data->fan[i] = w83627ehf_read_value(data,
486 W83627EHF_REG_FAN[i]);
487 data->fan_min[i] = w83627ehf_read_value(data,
488 W83627EHF_REG_FAN_MIN[i]);
490 /* If we failed to measure the fan speed and clock
491 divider can be increased, let's try that for next
493 if (data->fan[i] == 0xff
494 && data->fan_div[i] < 0x07) {
495 dev_dbg(dev, "Increasing fan%d "
496 "clock divider from %u to %u\n",
497 i + 1, div_from_reg(data->fan_div[i]),
498 div_from_reg(data->fan_div[i] + 1));
500 w83627ehf_write_fan_div(data, i);
501 /* Preserve min limit if possible */
502 if (data->fan_min[i] >= 2
503 && data->fan_min[i] != 255)
504 w83627ehf_write_value(data,
505 W83627EHF_REG_FAN_MIN[i],
506 (data->fan_min[i] /= 2));
510 for (i = 0; i < 4; i++) {
511 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
513 pwmcfg = w83627ehf_read_value(data,
514 W83627EHF_REG_PWM_ENABLE[i]);
515 tolerance = w83627ehf_read_value(data,
516 W83627EHF_REG_TOLERANCE[i]);
519 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1)
521 data->pwm_enable[i] =
522 ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
524 data->pwm[i] = w83627ehf_read_value(data,
525 W83627EHF_REG_PWM[i]);
526 data->fan_min_output[i] = w83627ehf_read_value(data,
527 W83627EHF_REG_FAN_MIN_OUTPUT[i]);
528 data->fan_stop_time[i] = w83627ehf_read_value(data,
529 W83627EHF_REG_FAN_STOP_TIME[i]);
530 data->target_temp[i] =
531 w83627ehf_read_value(data,
532 W83627EHF_REG_TARGET[i]) &
533 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
534 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0))
538 /* Measured temperatures and limits */
539 data->temp1 = w83627ehf_read_value(data,
540 W83627EHF_REG_TEMP1);
541 data->temp1_max = w83627ehf_read_value(data,
542 W83627EHF_REG_TEMP1_OVER);
543 data->temp1_max_hyst = w83627ehf_read_value(data,
544 W83627EHF_REG_TEMP1_HYST);
545 for (i = 0; i < 2; i++) {
546 data->temp[i] = w83627ehf_read_value(data,
547 W83627EHF_REG_TEMP[i]);
548 data->temp_max[i] = w83627ehf_read_value(data,
549 W83627EHF_REG_TEMP_OVER[i]);
550 data->temp_max_hyst[i] = w83627ehf_read_value(data,
551 W83627EHF_REG_TEMP_HYST[i]);
554 data->alarms = w83627ehf_read_value(data,
555 W83627EHF_REG_ALARM1) |
556 (w83627ehf_read_value(data,
557 W83627EHF_REG_ALARM2) << 8) |
558 (w83627ehf_read_value(data,
559 W83627EHF_REG_ALARM3) << 16);
561 data->last_updated = jiffies;
565 mutex_unlock(&data->update_lock);
570 * Sysfs callback functions
572 #define show_in_reg(reg) \
574 show_##reg(struct device *dev, struct device_attribute *attr, \
577 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
578 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
579 int nr = sensor_attr->index; \
580 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
586 #define store_in_reg(REG, reg) \
588 store_in_##reg (struct device *dev, struct device_attribute *attr, \
589 const char *buf, size_t count) \
591 struct w83627ehf_data *data = dev_get_drvdata(dev); \
592 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
593 int nr = sensor_attr->index; \
594 u32 val = simple_strtoul(buf, NULL, 10); \
596 mutex_lock(&data->update_lock); \
597 data->in_##reg[nr] = in_to_reg(val, nr); \
598 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
599 data->in_##reg[nr]); \
600 mutex_unlock(&data->update_lock); \
604 store_in_reg(MIN, min)
605 store_in_reg(MAX, max)
607 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
609 struct w83627ehf_data *data = w83627ehf_update_device(dev);
610 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
611 int nr = sensor_attr->index;
612 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
615 static struct sensor_device_attribute sda_in_input[] = {
616 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
617 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
618 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
619 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
620 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
621 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
622 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
623 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
624 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
625 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
628 static struct sensor_device_attribute sda_in_alarm[] = {
629 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
630 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
631 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
632 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
633 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
634 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
635 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
636 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
637 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
638 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
641 static struct sensor_device_attribute sda_in_min[] = {
642 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
643 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
644 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
645 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
646 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
647 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
648 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
649 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
650 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
651 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
654 static struct sensor_device_attribute sda_in_max[] = {
655 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
656 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
657 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
658 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
659 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
660 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
661 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
662 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
663 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
664 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
667 #define show_fan_reg(reg) \
669 show_##reg(struct device *dev, struct device_attribute *attr, \
672 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
673 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
674 int nr = sensor_attr->index; \
675 return sprintf(buf, "%d\n", \
676 fan_from_reg(data->reg[nr], \
677 div_from_reg(data->fan_div[nr]))); \
680 show_fan_reg(fan_min);
683 show_fan_div(struct device *dev, struct device_attribute *attr,
686 struct w83627ehf_data *data = w83627ehf_update_device(dev);
687 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
688 int nr = sensor_attr->index;
689 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
693 store_fan_min(struct device *dev, struct device_attribute *attr,
694 const char *buf, size_t count)
696 struct w83627ehf_data *data = dev_get_drvdata(dev);
697 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
698 int nr = sensor_attr->index;
699 unsigned int val = simple_strtoul(buf, NULL, 10);
703 mutex_lock(&data->update_lock);
705 /* No min limit, alarm disabled */
706 data->fan_min[nr] = 255;
707 new_div = data->fan_div[nr]; /* No change */
708 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
709 } else if ((reg = 1350000U / val) >= 128 * 255) {
710 /* Speed below this value cannot possibly be represented,
711 even with the highest divider (128) */
712 data->fan_min[nr] = 254;
713 new_div = 7; /* 128 == (1 << 7) */
714 dev_warn(dev, "fan%u low limit %u below minimum %u, set to "
715 "minimum\n", nr + 1, val, fan_from_reg(254, 128));
717 /* Speed above this value cannot possibly be represented,
718 even with the lowest divider (1) */
719 data->fan_min[nr] = 1;
720 new_div = 0; /* 1 == (1 << 0) */
721 dev_warn(dev, "fan%u low limit %u above maximum %u, set to "
722 "maximum\n", nr + 1, val, fan_from_reg(1, 1));
724 /* Automatically pick the best divider, i.e. the one such
725 that the min limit will correspond to a register value
726 in the 96..192 range */
728 while (reg > 192 && new_div < 7) {
732 data->fan_min[nr] = reg;
735 /* Write both the fan clock divider (if it changed) and the new
736 fan min (unconditionally) */
737 if (new_div != data->fan_div[nr]) {
738 /* Preserve the fan speed reading */
739 if (data->fan[nr] != 0xff) {
740 if (new_div > data->fan_div[nr])
741 data->fan[nr] >>= new_div - data->fan_div[nr];
742 else if (data->fan[nr] & 0x80)
743 data->fan[nr] = 0xff;
745 data->fan[nr] <<= data->fan_div[nr] - new_div;
748 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
749 nr + 1, div_from_reg(data->fan_div[nr]),
750 div_from_reg(new_div));
751 data->fan_div[nr] = new_div;
752 w83627ehf_write_fan_div(data, nr);
753 /* Give the chip time to sample a new speed value */
754 data->last_updated = jiffies;
756 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[nr],
758 mutex_unlock(&data->update_lock);
763 static struct sensor_device_attribute sda_fan_input[] = {
764 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
765 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
766 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
767 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
768 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
771 static struct sensor_device_attribute sda_fan_alarm[] = {
772 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
773 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
774 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
775 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
776 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
779 static struct sensor_device_attribute sda_fan_min[] = {
780 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
782 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
784 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
786 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
788 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
792 static struct sensor_device_attribute sda_fan_div[] = {
793 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
794 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
795 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
796 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
797 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
800 #define show_temp1_reg(reg) \
802 show_##reg(struct device *dev, struct device_attribute *attr, \
805 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
806 return sprintf(buf, "%d\n", temp1_from_reg(data->reg)); \
808 show_temp1_reg(temp1);
809 show_temp1_reg(temp1_max);
810 show_temp1_reg(temp1_max_hyst);
812 #define store_temp1_reg(REG, reg) \
814 store_temp1_##reg(struct device *dev, struct device_attribute *attr, \
815 const char *buf, size_t count) \
817 struct w83627ehf_data *data = dev_get_drvdata(dev); \
818 long val = simple_strtol(buf, NULL, 10); \
820 mutex_lock(&data->update_lock); \
821 data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \
822 w83627ehf_write_value(data, W83627EHF_REG_TEMP1_##REG, \
823 data->temp1_##reg); \
824 mutex_unlock(&data->update_lock); \
827 store_temp1_reg(OVER, max);
828 store_temp1_reg(HYST, max_hyst);
830 #define show_temp_reg(reg) \
832 show_##reg(struct device *dev, struct device_attribute *attr, \
835 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
836 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
837 int nr = sensor_attr->index; \
838 return sprintf(buf, "%d\n", \
839 LM75_TEMP_FROM_REG(data->reg[nr])); \
842 show_temp_reg(temp_max);
843 show_temp_reg(temp_max_hyst);
845 #define store_temp_reg(REG, reg) \
847 store_##reg(struct device *dev, struct device_attribute *attr, \
848 const char *buf, size_t count) \
850 struct w83627ehf_data *data = dev_get_drvdata(dev); \
851 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
852 int nr = sensor_attr->index; \
853 long val = simple_strtol(buf, NULL, 10); \
855 mutex_lock(&data->update_lock); \
856 data->reg[nr] = LM75_TEMP_TO_REG(val); \
857 w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \
859 mutex_unlock(&data->update_lock); \
862 store_temp_reg(OVER, temp_max);
863 store_temp_reg(HYST, temp_max_hyst);
866 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
868 struct w83627ehf_data *data = w83627ehf_update_device(dev);
869 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
870 int nr = sensor_attr->index;
871 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
874 static struct sensor_device_attribute sda_temp[] = {
875 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0),
876 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0),
877 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 1),
878 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1_max,
880 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
882 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
884 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1_max_hyst,
885 store_temp1_max_hyst, 0),
886 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
887 store_temp_max_hyst, 0),
888 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
889 store_temp_max_hyst, 1),
890 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
891 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
892 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
893 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
894 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
895 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
898 #define show_pwm_reg(reg) \
899 static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
902 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
903 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
904 int nr = sensor_attr->index; \
905 return sprintf(buf, "%d\n", data->reg[nr]); \
908 show_pwm_reg(pwm_mode)
909 show_pwm_reg(pwm_enable)
913 store_pwm_mode(struct device *dev, struct device_attribute *attr,
914 const char *buf, size_t count)
916 struct w83627ehf_data *data = dev_get_drvdata(dev);
917 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
918 int nr = sensor_attr->index;
919 u32 val = simple_strtoul(buf, NULL, 10);
924 mutex_lock(&data->update_lock);
925 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
926 data->pwm_mode[nr] = val;
927 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
929 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
930 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
931 mutex_unlock(&data->update_lock);
936 store_pwm(struct device *dev, struct device_attribute *attr,
937 const char *buf, size_t count)
939 struct w83627ehf_data *data = dev_get_drvdata(dev);
940 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
941 int nr = sensor_attr->index;
942 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255);
944 mutex_lock(&data->update_lock);
946 w83627ehf_write_value(data, W83627EHF_REG_PWM[nr], val);
947 mutex_unlock(&data->update_lock);
952 store_pwm_enable(struct device *dev, struct device_attribute *attr,
953 const char *buf, size_t count)
955 struct w83627ehf_data *data = dev_get_drvdata(dev);
956 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
957 int nr = sensor_attr->index;
958 u32 val = simple_strtoul(buf, NULL, 10);
961 if (!val || (val > 2)) /* only modes 1 and 2 are supported */
963 mutex_lock(&data->update_lock);
964 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
965 data->pwm_enable[nr] = val;
966 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
967 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
968 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
969 mutex_unlock(&data->update_lock);
974 #define show_tol_temp(reg) \
975 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
978 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
979 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
980 int nr = sensor_attr->index; \
981 return sprintf(buf, "%d\n", temp1_from_reg(data->reg[nr])); \
984 show_tol_temp(tolerance)
985 show_tol_temp(target_temp)
988 store_target_temp(struct device *dev, struct device_attribute *attr,
989 const char *buf, size_t count)
991 struct w83627ehf_data *data = dev_get_drvdata(dev);
992 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
993 int nr = sensor_attr->index;
994 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000);
996 mutex_lock(&data->update_lock);
997 data->target_temp[nr] = val;
998 w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
999 mutex_unlock(&data->update_lock);
1004 store_tolerance(struct device *dev, struct device_attribute *attr,
1005 const char *buf, size_t count)
1007 struct w83627ehf_data *data = dev_get_drvdata(dev);
1008 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1009 int nr = sensor_attr->index;
1011 /* Limit the temp to 0C - 15C */
1012 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000);
1014 mutex_lock(&data->update_lock);
1015 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1016 data->tolerance[nr] = val;
1018 reg = (reg & 0x0f) | (val << 4);
1020 reg = (reg & 0xf0) | val;
1021 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1022 mutex_unlock(&data->update_lock);
1026 static struct sensor_device_attribute sda_pwm[] = {
1027 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1028 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1029 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1030 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1033 static struct sensor_device_attribute sda_pwm_mode[] = {
1034 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1036 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1038 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1040 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1044 static struct sensor_device_attribute sda_pwm_enable[] = {
1045 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1046 store_pwm_enable, 0),
1047 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1048 store_pwm_enable, 1),
1049 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1050 store_pwm_enable, 2),
1051 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1052 store_pwm_enable, 3),
1055 static struct sensor_device_attribute sda_target_temp[] = {
1056 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1057 store_target_temp, 0),
1058 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1059 store_target_temp, 1),
1060 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1061 store_target_temp, 2),
1062 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1063 store_target_temp, 3),
1066 static struct sensor_device_attribute sda_tolerance[] = {
1067 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1068 store_tolerance, 0),
1069 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1070 store_tolerance, 1),
1071 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1072 store_tolerance, 2),
1073 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1074 store_tolerance, 3),
1077 /* Smart Fan registers */
1079 #define fan_functions(reg, REG) \
1080 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1083 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1084 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1085 int nr = sensor_attr->index; \
1086 return sprintf(buf, "%d\n", data->reg[nr]); \
1089 store_##reg(struct device *dev, struct device_attribute *attr, \
1090 const char *buf, size_t count) \
1092 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1093 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1094 int nr = sensor_attr->index; \
1095 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \
1096 mutex_lock(&data->update_lock); \
1097 data->reg[nr] = val; \
1098 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1099 mutex_unlock(&data->update_lock); \
1103 fan_functions(fan_min_output, FAN_MIN_OUTPUT)
1105 #define fan_time_functions(reg, REG) \
1106 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1109 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1110 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1111 int nr = sensor_attr->index; \
1112 return sprintf(buf, "%d\n", \
1113 step_time_from_reg(data->reg[nr], data->pwm_mode[nr])); \
1117 store_##reg(struct device *dev, struct device_attribute *attr, \
1118 const char *buf, size_t count) \
1120 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1121 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1122 int nr = sensor_attr->index; \
1123 u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \
1124 data->pwm_mode[nr]); \
1125 mutex_lock(&data->update_lock); \
1126 data->reg[nr] = val; \
1127 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1128 mutex_unlock(&data->update_lock); \
1132 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1134 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1137 struct w83627ehf_data *data = dev_get_drvdata(dev);
1139 return sprintf(buf, "%s\n", data->name);
1141 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1143 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1144 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1145 store_fan_stop_time, 3),
1146 SENSOR_ATTR(pwm4_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1147 store_fan_min_output, 3),
1150 static struct sensor_device_attribute sda_sf3_arrays[] = {
1151 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1152 store_fan_stop_time, 0),
1153 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1154 store_fan_stop_time, 1),
1155 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1156 store_fan_stop_time, 2),
1157 SENSOR_ATTR(pwm1_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1158 store_fan_min_output, 0),
1159 SENSOR_ATTR(pwm2_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1160 store_fan_min_output, 1),
1161 SENSOR_ATTR(pwm3_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1162 store_fan_min_output, 2),
1166 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1168 struct w83627ehf_data *data = dev_get_drvdata(dev);
1169 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1171 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1174 * Driver and device management
1177 static void w83627ehf_device_remove_files(struct device *dev)
1179 /* some entries in the following arrays may not have been used in
1180 * device_create_file(), but device_remove_file() will ignore them */
1182 struct w83627ehf_data *data = dev_get_drvdata(dev);
1184 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1185 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1186 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1187 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1188 for (i = 0; i < data->in_num; i++) {
1189 device_remove_file(dev, &sda_in_input[i].dev_attr);
1190 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1191 device_remove_file(dev, &sda_in_min[i].dev_attr);
1192 device_remove_file(dev, &sda_in_max[i].dev_attr);
1194 for (i = 0; i < 5; i++) {
1195 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1196 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1197 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1198 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1200 for (i = 0; i < data->pwm_num; i++) {
1201 device_remove_file(dev, &sda_pwm[i].dev_attr);
1202 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1203 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1204 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1205 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1207 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1208 device_remove_file(dev, &sda_temp[i].dev_attr);
1210 device_remove_file(dev, &dev_attr_name);
1211 device_remove_file(dev, &dev_attr_cpu0_vid);
1214 /* Get the monitoring functions started */
1215 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
1220 /* Start monitoring is needed */
1221 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1223 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1226 /* Enable temp2 and temp3 if needed */
1227 for (i = 0; i < 2; i++) {
1228 tmp = w83627ehf_read_value(data,
1229 W83627EHF_REG_TEMP_CONFIG[i]);
1231 w83627ehf_write_value(data,
1232 W83627EHF_REG_TEMP_CONFIG[i],
1236 /* Enable VBAT monitoring if needed */
1237 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1239 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1241 /* Get thermal sensor types */
1242 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1243 for (i = 0; i < 3; i++) {
1244 if ((tmp & (0x02 << i)))
1245 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 2;
1247 data->temp_type[i] = 4; /* thermistor */
1251 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1253 struct device *dev = &pdev->dev;
1254 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1255 struct w83627ehf_data *data;
1256 struct resource *res;
1257 u8 fan4pin, fan5pin, en_vrm10;
1260 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1261 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1263 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1264 (unsigned long)res->start,
1265 (unsigned long)res->start + IOREGION_LENGTH - 1);
1269 if (!(data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL))) {
1274 data->addr = res->start;
1275 mutex_init(&data->lock);
1276 mutex_init(&data->update_lock);
1277 data->name = w83627ehf_device_names[sio_data->kind];
1278 platform_set_drvdata(pdev, data);
1280 /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
1281 data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
1282 /* 667HG has 3 pwms */
1283 data->pwm_num = (sio_data->kind == w83667hg) ? 3 : 4;
1285 /* Initialize the chip */
1286 w83627ehf_init_device(data);
1288 data->vrm = vid_which_vrm();
1289 superio_enter(sio_data->sioreg);
1290 /* Read VID value */
1291 if (sio_data->kind == w83667hg) {
1292 /* W83667HG has different pins for VID input and output, so
1293 we can get the VID input values directly at logical device D
1295 superio_select(sio_data->sioreg, W83667HG_LD_VID);
1296 data->vid = superio_inb(sio_data->sioreg, 0xe3);
1297 err = device_create_file(dev, &dev_attr_cpu0_vid);
1301 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
1302 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
1303 /* Set VID input sensibility if needed. In theory the
1304 BIOS should have set it, but in practice it's not
1305 always the case. We only do it for the W83627EHF/EHG
1306 because the W83627DHG is more complex in this
1308 if (sio_data->kind == w83627ehf) {
1309 en_vrm10 = superio_inb(sio_data->sioreg,
1311 if ((en_vrm10 & 0x08) && data->vrm == 90) {
1312 dev_warn(dev, "Setting VID input "
1313 "voltage to TTL\n");
1314 superio_outb(sio_data->sioreg,
1317 } else if (!(en_vrm10 & 0x08)
1318 && data->vrm == 100) {
1319 dev_warn(dev, "Setting VID input "
1320 "voltage to VRM10\n");
1321 superio_outb(sio_data->sioreg,
1327 data->vid = superio_inb(sio_data->sioreg,
1329 if (sio_data->kind == w83627ehf) /* 6 VID pins only */
1332 err = device_create_file(dev, &dev_attr_cpu0_vid);
1336 dev_info(dev, "VID pins in output mode, CPU VID not "
1341 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1342 if (sio_data->kind == w83667hg) {
1343 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
1344 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
1346 fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
1347 fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
1349 superio_exit(sio_data->sioreg);
1351 /* It looks like fan4 and fan5 pins can be alternatively used
1352 as fan on/off switches, but fan5 control is write only :/
1353 We assume that if the serial interface is disabled, designers
1354 connected fan5 as input unless they are emitting log 1, which
1355 is not the default. */
1357 data->has_fan = 0x07; /* fan1, fan2 and fan3 */
1358 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1359 if ((i & (1 << 2)) && fan4pin)
1360 data->has_fan |= (1 << 3);
1361 if (!(i & (1 << 1)) && fan5pin)
1362 data->has_fan |= (1 << 4);
1364 /* Read fan clock dividers immediately */
1365 w83627ehf_update_fan_div(data);
1367 /* Register sysfs hooks */
1368 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1369 if ((err = device_create_file(dev,
1370 &sda_sf3_arrays[i].dev_attr)))
1373 /* if fan4 is enabled create the sf3 files for it */
1374 if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
1375 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
1376 if ((err = device_create_file(dev,
1377 &sda_sf3_arrays_fan4[i].dev_attr)))
1381 for (i = 0; i < data->in_num; i++)
1382 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
1383 || (err = device_create_file(dev,
1384 &sda_in_alarm[i].dev_attr))
1385 || (err = device_create_file(dev,
1386 &sda_in_min[i].dev_attr))
1387 || (err = device_create_file(dev,
1388 &sda_in_max[i].dev_attr)))
1391 for (i = 0; i < 5; i++) {
1392 if (data->has_fan & (1 << i)) {
1393 if ((err = device_create_file(dev,
1394 &sda_fan_input[i].dev_attr))
1395 || (err = device_create_file(dev,
1396 &sda_fan_alarm[i].dev_attr))
1397 || (err = device_create_file(dev,
1398 &sda_fan_div[i].dev_attr))
1399 || (err = device_create_file(dev,
1400 &sda_fan_min[i].dev_attr)))
1402 if (i < data->pwm_num &&
1403 ((err = device_create_file(dev,
1404 &sda_pwm[i].dev_attr))
1405 || (err = device_create_file(dev,
1406 &sda_pwm_mode[i].dev_attr))
1407 || (err = device_create_file(dev,
1408 &sda_pwm_enable[i].dev_attr))
1409 || (err = device_create_file(dev,
1410 &sda_target_temp[i].dev_attr))
1411 || (err = device_create_file(dev,
1412 &sda_tolerance[i].dev_attr))))
1417 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1418 if ((err = device_create_file(dev, &sda_temp[i].dev_attr)))
1421 err = device_create_file(dev, &dev_attr_name);
1425 data->hwmon_dev = hwmon_device_register(dev);
1426 if (IS_ERR(data->hwmon_dev)) {
1427 err = PTR_ERR(data->hwmon_dev);
1434 w83627ehf_device_remove_files(dev);
1436 platform_set_drvdata(pdev, NULL);
1438 release_region(res->start, IOREGION_LENGTH);
1443 static int __devexit w83627ehf_remove(struct platform_device *pdev)
1445 struct w83627ehf_data *data = platform_get_drvdata(pdev);
1447 hwmon_device_unregister(data->hwmon_dev);
1448 w83627ehf_device_remove_files(&pdev->dev);
1449 release_region(data->addr, IOREGION_LENGTH);
1450 platform_set_drvdata(pdev, NULL);
1456 static struct platform_driver w83627ehf_driver = {
1458 .owner = THIS_MODULE,
1461 .probe = w83627ehf_probe,
1462 .remove = __devexit_p(w83627ehf_remove),
1465 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
1466 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
1467 struct w83627ehf_sio_data *sio_data)
1469 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
1470 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
1471 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
1472 static const char __initdata sio_name_W83667HG[] = "W83667HG";
1475 const char *sio_name;
1477 superio_enter(sioaddr);
1482 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
1483 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1484 switch (val & SIO_ID_MASK) {
1485 case SIO_W83627EHF_ID:
1486 sio_data->kind = w83627ehf;
1487 sio_name = sio_name_W83627EHF;
1489 case SIO_W83627EHG_ID:
1490 sio_data->kind = w83627ehf;
1491 sio_name = sio_name_W83627EHG;
1493 case SIO_W83627DHG_ID:
1494 sio_data->kind = w83627dhg;
1495 sio_name = sio_name_W83627DHG;
1497 case SIO_W83667HG_ID:
1498 sio_data->kind = w83667hg;
1499 sio_name = sio_name_W83667HG;
1503 pr_debug(DRVNAME ": unsupported chip ID: 0x%04x\n",
1505 superio_exit(sioaddr);
1509 /* We have a known chip, find the HWM I/O address */
1510 superio_select(sioaddr, W83627EHF_LD_HWM);
1511 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
1512 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1513 *addr = val & IOREGION_ALIGNMENT;
1515 printk(KERN_ERR DRVNAME ": Refusing to enable a Super-I/O "
1516 "device with a base I/O port 0.\n");
1517 superio_exit(sioaddr);
1521 /* Activate logical device if needed */
1522 val = superio_inb(sioaddr, SIO_REG_ENABLE);
1523 if (!(val & 0x01)) {
1524 printk(KERN_WARNING DRVNAME ": Forcibly enabling Super-I/O. "
1525 "Sensor is probably unusable.\n");
1526 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1529 superio_exit(sioaddr);
1530 pr_info(DRVNAME ": Found %s chip at %#x\n", sio_name, *addr);
1531 sio_data->sioreg = sioaddr;
1536 /* when Super-I/O functions move to a separate file, the Super-I/O
1537 * bus will manage the lifetime of the device and this module will only keep
1538 * track of the w83627ehf driver. But since we platform_device_alloc(), we
1539 * must keep track of the device */
1540 static struct platform_device *pdev;
1542 static int __init sensors_w83627ehf_init(void)
1545 unsigned short address;
1546 struct resource res;
1547 struct w83627ehf_sio_data sio_data;
1549 /* initialize sio_data->kind and sio_data->sioreg.
1551 * when Super-I/O functions move to a separate file, the Super-I/O
1552 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
1553 * w83627ehf hardware monitor, and call probe() */
1554 if (w83627ehf_find(0x2e, &address, &sio_data) &&
1555 w83627ehf_find(0x4e, &address, &sio_data))
1558 err = platform_driver_register(&w83627ehf_driver);
1562 if (!(pdev = platform_device_alloc(DRVNAME, address))) {
1564 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1565 goto exit_unregister;
1568 err = platform_device_add_data(pdev, &sio_data,
1569 sizeof(struct w83627ehf_sio_data));
1571 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1572 goto exit_device_put;
1575 memset(&res, 0, sizeof(res));
1577 res.start = address + IOREGION_OFFSET;
1578 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
1579 res.flags = IORESOURCE_IO;
1581 err = acpi_check_resource_conflict(&res);
1583 goto exit_device_put;
1585 err = platform_device_add_resources(pdev, &res, 1);
1587 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1589 goto exit_device_put;
1592 /* platform_device_add calls probe() */
1593 err = platform_device_add(pdev);
1595 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1597 goto exit_device_put;
1603 platform_device_put(pdev);
1605 platform_driver_unregister(&w83627ehf_driver);
1610 static void __exit sensors_w83627ehf_exit(void)
1612 platform_device_unregister(pdev);
1613 platform_driver_unregister(&w83627ehf_driver);
1616 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
1617 MODULE_DESCRIPTION("W83627EHF driver");
1618 MODULE_LICENSE("GPL");
1620 module_init(sensors_w83627ehf_init);
1621 module_exit(sensors_w83627ehf_exit);