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   1 /*
   2  * linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver
   3  *
   4  * Copyright (c) 2001-2002  Denis Oliver Kropp <dok@directfb.org>
   5  *
   6  *
   7  * Card specific code is based on XFree86's neomagic driver.
   8  * Framebuffer framework code is based on code of cyber2000fb.
   9  *
  10  * This file is subject to the terms and conditions of the GNU General
  11  * Public License.  See the file COPYING in the main directory of this
  12  * archive for more details.
  13  *
  14  *
  15  * 0.4.1
  16  *  - Cosmetic changes (dok)
  17  *
  18  * 0.4
  19  *  - Toshiba Libretto support, allow modes larger than LCD size if
  20  *    LCD is disabled, keep BIOS settings if internal/external display
  21  *    haven't been enabled explicitly
  22  *                          (Thomas J. Moore <dark@mama.indstate.edu>)
  23  *
  24  * 0.3.3
  25  *  - Porting over to new fbdev api. (jsimmons)
  26  *
  27  * 0.3.2
  28  *  - got rid of all floating point (dok)
  29  *
  30  * 0.3.1
  31  *  - added module license (dok)
  32  *
  33  * 0.3
  34  *  - hardware accelerated clear and move for 2200 and above (dok)
  35  *  - maximum allowed dotclock is handled now (dok)
  36  *
  37  * 0.2.1
  38  *  - correct panning after X usage (dok)
  39  *  - added module and kernel parameters (dok)
  40  *  - no stretching if external display is enabled (dok)
  41  *
  42  * 0.2
  43  *  - initial version (dok)
  44  *
  45  *
  46  * TODO
  47  * - ioctl for internal/external switching
  48  * - blanking
  49  * - 32bit depth support, maybe impossible
  50  * - disable pan-on-sync, need specs
  51  *
  52  * BUGS
  53  * - white margin on bootup like with tdfxfb (colormap problem?)
  54  *
  55  */
  56
  57 #include <linux/config.h>
  58 #include <linux/module.h>
  59 #include <linux/kernel.h>
  60 #include <linux/errno.h>
  61 #include <linux/string.h>
  62 #include <linux/mm.h>
  63 #include <linux/tty.h>
  64 #include <linux/slab.h>
  65 #include <linux/delay.h>
  66 #include <linux/fb.h>
  67 #include <linux/pci.h>
  68 #include <linux/init.h>
  69 #ifdef CONFIG_TOSHIBA
  70 #include <linux/toshiba.h>
  71 extern int tosh_smm(SMMRegisters *regs);
  72 #endif
  73
  74 #include <asm/io.h>
  75 #include <asm/irq.h>
  76 #include <asm/pgtable.h>
  77 #include <asm/system.h>
  78 #include <asm/uaccess.h>
  79
  80 #ifdef CONFIG_MTRR
  81 #include <asm/mtrr.h>
  82 #endif
  83
  84 #include <video/vga.h>
  85 #include <video/neomagic.h>
  86
  87 #define NEOFB_VERSION "0.4.2"
  88
  89 /* --------------------------------------------------------------------- */
  90
  91 static int internal;
  92 static int external;
  93 static int libretto;
  94 static int nostretch;
  95 static int nopciburst;
  96 static char *mode_option __devinitdata = NULL;
  97
  98 #ifdef MODULE
  99
 100 MODULE_AUTHOR("(c) 2001-2002  Denis Oliver Kropp <dok@convergence.de>");
 101 MODULE_LICENSE("GPL");
 102 MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips");
 103 module_param(internal, bool, 0);
 104 MODULE_PARM_DESC(internal, "Enable output on internal LCD Display.");
 105 module_param(external, bool, 0);
 106 MODULE_PARM_DESC(external, "Enable output on external CRT.");
 107 module_param(libretto, bool, 0);
 108 MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD.");
 109 module_param(nostretch, bool, 0);
 110 MODULE_PARM_DESC(nostretch,
 111                  "Disable stretching of modes smaller than LCD.");
 112 module_param(nopciburst, bool, 0);
 113 MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode.");
 114 module_param(mode_option, charp, 0);
 115 MODULE_PARM_DESC(mode_option, "Preferred video mode ('640x480-8@60', etc)");
 116
 117 #endif
 118
 119
 120 /* --------------------------------------------------------------------- */
 121
 122 static biosMode bios8[] = {
 123         {320, 240, 0x40},
 124         {300, 400, 0x42},
 125         {640, 400, 0x20},
 126         {640, 480, 0x21},
 127         {800, 600, 0x23},
 128         {1024, 768, 0x25},
 129 };
 130
 131 static biosMode bios16[] = {
 132         {320, 200, 0x2e},
 133         {320, 240, 0x41},
 134         {300, 400, 0x43},
 135         {640, 480, 0x31},
 136         {800, 600, 0x34},
 137         {1024, 768, 0x37},
 138 };
 139
 140 static biosMode bios24[] = {
 141         {640, 480, 0x32},
 142         {800, 600, 0x35},
 143         {1024, 768, 0x38}
 144 };
 145
 146 #ifdef NO_32BIT_SUPPORT_YET
 147 /* FIXME: guessed values, wrong */
 148 static biosMode bios32[] = {
 149         {640, 480, 0x33},
 150         {800, 600, 0x36},
 151         {1024, 768, 0x39}
 152 };
 153 #endif
 154
 155 static inline void write_le32(int regindex, u32 val, const struct neofb_par *par)
 156 {
 157         writel(val, par->neo2200 + par->cursorOff + regindex);
 158 }
 159
 160 static int neoFindMode(int xres, int yres, int depth)
 161 {
 162         int xres_s;
 163         int i, size;
 164         biosMode *mode;
 165
 166         switch (depth) {
 167         case 8:
 168                 size = sizeof(bios8) / sizeof(biosMode);
 169                 mode = bios8;
 170                 break;
 171         case 16:
 172                 size = sizeof(bios16) / sizeof(biosMode);
 173                 mode = bios16;
 174                 break;
 175         case 24:
 176                 size = sizeof(bios24) / sizeof(biosMode);
 177                 mode = bios24;
 178                 break;
 179 #ifdef NO_32BIT_SUPPORT_YET
 180         case 32:
 181                 size = sizeof(bios32) / sizeof(biosMode);
 182                 mode = bios32;
 183                 break;
 184 #endif
 185         default:
 186                 return 0;
 187         }
 188
 189         for (i = 0; i < size; i++) {
 190                 if (xres <= mode[i].x_res) {
 191                         xres_s = mode[i].x_res;
 192                         for (; i < size; i++) {
 193                                 if (mode[i].x_res != xres_s)
 194                                         return mode[i - 1].mode;
 195                                 if (yres <= mode[i].y_res)
 196                                         return mode[i].mode;
 197                         }
 198                 }
 199         }
 200         return mode[size - 1].mode;
 201 }
 202
 203 /*
 204  * neoCalcVCLK --
 205  *
 206  * Determine the closest clock frequency to the one requested.
 207  */
 208 #define REF_FREQ 0xe517         /* 14.31818 in 20.12 fixed point */
 209 #define MAX_N 127
 210 #define MAX_D 31
 211 #define MAX_F 1
 212
 213 static void neoCalcVCLK(const struct fb_info *info,
 214                         struct neofb_par *par, long freq)
 215 {
 216         int n, d, f;
 217         int n_best = 0, d_best = 0, f_best = 0;
 218         long f_best_diff = (0x7ffff << 12);     /* 20.12 */
 219         long f_target = (freq << 12) / 1000;    /* 20.12 */
 220
 221         for (f = 0; f <= MAX_F; f++)
 222                 for (n = 0; n <= MAX_N; n++)
 223                         for (d = 0; d <= MAX_D; d++) {
 224                                 long f_out;     /* 20.12 */
 225                                 long f_diff;    /* 20.12 */
 226
 227                                 f_out =
 228                                     ((((n + 1) << 12) / ((d +
 229                                                           1) *
 230                                                          (1 << f))) >> 12)
 231                                     * REF_FREQ;
 232                                 f_diff = abs(f_out - f_target);
 233                                 if (f_diff < f_best_diff) {
 234                                         f_best_diff = f_diff;
 235                                         n_best = n;
 236                                         d_best = d;
 237                                         f_best = f;
 238                                 }
 239                         }
 240
 241         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
 242             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
 243             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
 244             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
 245                 /* NOT_DONE:  We are trying the full range of the 2200 clock.
 246                    We should be able to try n up to 2047 */
 247                 par->VCLK3NumeratorLow = n_best;
 248                 par->VCLK3NumeratorHigh = (f_best << 7);
 249         } else
 250                 par->VCLK3NumeratorLow = n_best | (f_best << 7);
 251
 252         par->VCLK3Denominator = d_best;
 253
 254 #ifdef NEOFB_DEBUG
 255         printk("neoVCLK: f:%d NumLow=%d NumHi=%d Den=%d Df=%d\n",
 256                f_target >> 12,
 257                par->VCLK3NumeratorLow,
 258                par->VCLK3NumeratorHigh,
 259                par->VCLK3Denominator, f_best_diff >> 12);
 260 #endif
 261 }
 262
 263 /*
 264  * vgaHWInit --
 265  *      Handle the initialization, etc. of a screen.
 266  *      Return FALSE on failure.
 267  */
 268
 269 static int vgaHWInit(const struct fb_var_screeninfo *var,
 270                      const struct fb_info *info,
 271                      struct neofb_par *par, struct xtimings *timings)
 272 {
 273         par->MiscOutReg = 0x23;
 274
 275         if (!(timings->sync & FB_SYNC_HOR_HIGH_ACT))
 276                 par->MiscOutReg |= 0x40;
 277
 278         if (!(timings->sync & FB_SYNC_VERT_HIGH_ACT))
 279                 par->MiscOutReg |= 0x80;
 280
 281         /*
 282          * Time Sequencer
 283          */
 284         par->Sequencer[0] = 0x00;
 285         par->Sequencer[1] = 0x01;
 286         par->Sequencer[2] = 0x0F;
 287         par->Sequencer[3] = 0x00;       /* Font select */
 288         par->Sequencer[4] = 0x0E;       /* Misc */
 289
 290         /*
 291          * CRTC Controller
 292          */
 293         par->CRTC[0] = (timings->HTotal >> 3) - 5;
 294         par->CRTC[1] = (timings->HDisplay >> 3) - 1;
 295         par->CRTC[2] = (timings->HDisplay >> 3) - 1;
 296         par->CRTC[3] = (((timings->HTotal >> 3) - 1) & 0x1F) | 0x80;
 297         par->CRTC[4] = (timings->HSyncStart >> 3);
 298         par->CRTC[5] = ((((timings->HTotal >> 3) - 1) & 0x20) << 2)
 299             | (((timings->HSyncEnd >> 3)) & 0x1F);
 300         par->CRTC[6] = (timings->VTotal - 2) & 0xFF;
 301         par->CRTC[7] = (((timings->VTotal - 2) & 0x100) >> 8)
 302             | (((timings->VDisplay - 1) & 0x100) >> 7)
 303             | ((timings->VSyncStart & 0x100) >> 6)
 304             | (((timings->VDisplay - 1) & 0x100) >> 5)
 305             | 0x10 | (((timings->VTotal - 2) & 0x200) >> 4)
 306             | (((timings->VDisplay - 1) & 0x200) >> 3)
 307             | ((timings->VSyncStart & 0x200) >> 2);
 308         par->CRTC[8] = 0x00;
 309         par->CRTC[9] = (((timings->VDisplay - 1) & 0x200) >> 4) | 0x40;
 310
 311         if (timings->dblscan)
 312                 par->CRTC[9] |= 0x80;
 313
 314         par->CRTC[10] = 0x00;
 315         par->CRTC[11] = 0x00;
 316         par->CRTC[12] = 0x00;
 317         par->CRTC[13] = 0x00;
 318         par->CRTC[14] = 0x00;
 319         par->CRTC[15] = 0x00;
 320         par->CRTC[16] = timings->VSyncStart & 0xFF;
 321         par->CRTC[17] = (timings->VSyncEnd & 0x0F) | 0x20;
 322         par->CRTC[18] = (timings->VDisplay - 1) & 0xFF;
 323         par->CRTC[19] = var->xres_virtual >> 4;
 324         par->CRTC[20] = 0x00;
 325         par->CRTC[21] = (timings->VDisplay - 1) & 0xFF;
 326         par->CRTC[22] = (timings->VTotal - 1) & 0xFF;
 327         par->CRTC[23] = 0xC3;
 328         par->CRTC[24] = 0xFF;
 329
 330         /*
 331          * are these unnecessary?
 332          * vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 333          * vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 334          */
 335
 336         /*
 337          * Graphics Display Controller
 338          */
 339         par->Graphics[0] = 0x00;
 340         par->Graphics[1] = 0x00;
 341         par->Graphics[2] = 0x00;
 342         par->Graphics[3] = 0x00;
 343         par->Graphics[4] = 0x00;
 344         par->Graphics[5] = 0x40;
 345         par->Graphics[6] = 0x05;        /* only map 64k VGA memory !!!! */
 346         par->Graphics[7] = 0x0F;
 347         par->Graphics[8] = 0xFF;
 348
 349
 350         par->Attribute[0] = 0x00;       /* standard colormap translation */
 351         par->Attribute[1] = 0x01;
 352         par->Attribute[2] = 0x02;
 353         par->Attribute[3] = 0x03;
 354         par->Attribute[4] = 0x04;
 355         par->Attribute[5] = 0x05;
 356         par->Attribute[6] = 0x06;
 357         par->Attribute[7] = 0x07;
 358         par->Attribute[8] = 0x08;
 359         par->Attribute[9] = 0x09;
 360         par->Attribute[10] = 0x0A;
 361         par->Attribute[11] = 0x0B;
 362         par->Attribute[12] = 0x0C;
 363         par->Attribute[13] = 0x0D;
 364         par->Attribute[14] = 0x0E;
 365         par->Attribute[15] = 0x0F;
 366         par->Attribute[16] = 0x41;
 367         par->Attribute[17] = 0xFF;
 368         par->Attribute[18] = 0x0F;
 369         par->Attribute[19] = 0x00;
 370         par->Attribute[20] = 0x00;
 371         return 0;
 372 }
 373
 374 static void vgaHWLock(struct vgastate *state)
 375 {
 376         /* Protect CRTC[0-7] */
 377         vga_wcrt(state->vgabase, 0x11, vga_rcrt(state->vgabase, 0x11) | 0x80);
 378 }
 379
 380 static void vgaHWUnlock(void)
 381 {
 382         /* Unprotect CRTC[0-7] */
 383         vga_wcrt(NULL, 0x11, vga_rcrt(NULL, 0x11) & ~0x80);
 384 }
 385
 386 static void neoLock(struct vgastate *state)
 387 {
 388         vga_wgfx(state->vgabase, 0x09, 0x00);
 389         vgaHWLock(state);
 390 }
 391
 392 static void neoUnlock(void)
 393 {
 394         vgaHWUnlock();
 395         vga_wgfx(NULL, 0x09, 0x26);
 396 }
 397
 398 /*
 399  * VGA Palette management
 400  */
 401 static int paletteEnabled = 0;
 402
 403 static inline void VGAenablePalette(void)
 404 {
 405         vga_r(NULL, VGA_IS1_RC);
 406         vga_w(NULL, VGA_ATT_W, 0x00);
 407         paletteEnabled = 1;
 408 }
 409
 410 static inline void VGAdisablePalette(void)
 411 {
 412         vga_r(NULL, VGA_IS1_RC);
 413         vga_w(NULL, VGA_ATT_W, 0x20);
 414         paletteEnabled = 0;
 415 }
 416
 417 static inline void VGAwATTR(u8 index, u8 value)
 418 {
 419         if (paletteEnabled)
 420                 index &= ~0x20;
 421         else
 422                 index |= 0x20;
 423
 424         vga_r(NULL, VGA_IS1_RC);
 425         vga_wattr(NULL, index, value);
 426 }
 427
 428 static void vgaHWProtect(int on)
 429 {
 430         unsigned char tmp;
 431
 432         if (on) {
 433                 /*
 434                  * Turn off screen and disable sequencer.
 435                  */
 436                 tmp = vga_rseq(NULL, 0x01);
 437                 vga_wseq(NULL, 0x00, 0x01);             /* Synchronous Reset */
 438                 vga_wseq(NULL, 0x01, tmp | 0x20);       /* disable the display */
 439
 440                 VGAenablePalette();
 441         } else {
 442                 /*
 443                  * Reenable sequencer, then turn on screen.
 444                  */
 445                 tmp = vga_rseq(NULL, 0x01);
 446                 vga_wseq(NULL, 0x01, tmp & ~0x20);      /* reenable display */
 447                 vga_wseq(NULL, 0x00, 0x03);             /* clear synchronousreset */
 448
 449                 VGAdisablePalette();
 450         }
 451 }
 452
 453 static void vgaHWRestore(const struct fb_info *info,
 454                          const struct neofb_par *par)
 455 {
 456         int i;
 457
 458         vga_w(NULL, VGA_MIS_W, par->MiscOutReg);
 459
 460         for (i = 1; i < 5; i++)
 461                 vga_wseq(NULL, i, par->Sequencer[i]);
 462
 463         /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */
 464         vga_wcrt(NULL, 17, par->CRTC[17] & ~0x80);
 465
 466         for (i = 0; i < 25; i++)
 467                 vga_wcrt(NULL, i, par->CRTC[i]);
 468
 469         for (i = 0; i < 9; i++)
 470                 vga_wgfx(NULL, i, par->Graphics[i]);
 471
 472         VGAenablePalette();
 473
 474         for (i = 0; i < 21; i++)
 475                 VGAwATTR(i, par->Attribute[i]);
 476
 477         VGAdisablePalette();
 478 }
 479
 480
 481 /* -------------------- Hardware specific routines ------------------------- */
 482
 483 /*
 484  * Hardware Acceleration for Neo2200+
 485  */
 486 static inline int neo2200_sync(struct fb_info *info)
 487 {
 488         struct neofb_par *par = info->par;
 489
 490         while (readl(&par->neo2200->bltStat) & 1);
 491         return 0;
 492 }
 493
 494 static inline void neo2200_wait_fifo(struct fb_info *info,
 495                                      int requested_fifo_space)
 496 {
 497         //  ndev->neo.waitfifo_calls++;
 498         //  ndev->neo.waitfifo_sum += requested_fifo_space;
 499
 500         /* FIXME: does not work
 501            if (neo_fifo_space < requested_fifo_space)
 502            {
 503            neo_fifo_waitcycles++;
 504
 505            while (1)
 506            {
 507            neo_fifo_space = (neo2200->bltStat >> 8);
 508            if (neo_fifo_space >= requested_fifo_space)
 509            break;
 510            }
 511            }
 512            else
 513            {
 514            neo_fifo_cache_hits++;
 515            }
 516
 517            neo_fifo_space -= requested_fifo_space;
 518          */
 519
 520         neo2200_sync(info);
 521 }
 522
 523 static inline void neo2200_accel_init(struct fb_info *info,
 524                                       struct fb_var_screeninfo *var)
 525 {
 526         struct neofb_par *par = info->par;
 527         Neo2200 __iomem *neo2200 = par->neo2200;
 528         u32 bltMod, pitch;
 529
 530         neo2200_sync(info);
 531
 532         switch (var->bits_per_pixel) {
 533         case 8:
 534                 bltMod = NEO_MODE1_DEPTH8;
 535                 pitch = var->xres_virtual;
 536                 break;
 537         case 15:
 538         case 16:
 539                 bltMod = NEO_MODE1_DEPTH16;
 540                 pitch = var->xres_virtual * 2;
 541                 break;
 542         case 24:
 543                 bltMod = NEO_MODE1_DEPTH24;
 544                 pitch = var->xres_virtual * 3;
 545                 break;
 546         default:
 547                 printk(KERN_ERR
 548                        "neofb: neo2200_accel_init: unexpected bits per pixel!\n");
 549                 return;
 550         }
 551
 552         writel(bltMod << 16, &neo2200->bltStat);
 553         writel((pitch << 16) | pitch, &neo2200->pitch);
 554 }
 555
 556 /* --------------------------------------------------------------------- */
 557
 558 static int
 559 neofb_open(struct fb_info *info, int user)
 560 {
 561         struct neofb_par *par = info->par;
 562         int cnt = atomic_read(&par->ref_count);
 563
 564         if (!cnt) {
 565                 memset(&par->state, 0, sizeof(struct vgastate));
 566                 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS;
 567                 save_vga(&par->state);
 568         }
 569         atomic_inc(&par->ref_count);
 570         return 0;
 571 }
 572
 573 static int
 574 neofb_release(struct fb_info *info, int user)
 575 {
 576         struct neofb_par *par = info->par;
 577         int cnt = atomic_read(&par->ref_count);
 578
 579         if (!cnt)
 580                 return -EINVAL;
 581         if (cnt == 1) {
 582                 restore_vga(&par->state);
 583         }
 584         atomic_dec(&par->ref_count);
 585         return 0;
 586 }
 587
 588 static int
 589 neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 590 {
 591         struct neofb_par *par = info->par;
 592         unsigned int pixclock = var->pixclock;
 593         struct xtimings timings;
 594         int memlen, vramlen;
 595         int mode_ok = 0;
 596
 597         DBG("neofb_check_var");
 598
 599         if (!pixclock)
 600                 pixclock = 10000;       /* 10ns = 100MHz */
 601         timings.pixclock = 1000000000 / pixclock;
 602         if (timings.pixclock < 1)
 603                 timings.pixclock = 1;
 604
 605         if (timings.pixclock > par->maxClock)
 606                 return -EINVAL;
 607
 608         timings.dblscan = var->vmode & FB_VMODE_DOUBLE;
 609         timings.interlaced = var->vmode & FB_VMODE_INTERLACED;
 610         timings.HDisplay = var->xres;
 611         timings.HSyncStart = timings.HDisplay + var->right_margin;
 612         timings.HSyncEnd = timings.HSyncStart + var->hsync_len;
 613         timings.HTotal = timings.HSyncEnd + var->left_margin;
 614         timings.VDisplay = var->yres;
 615         timings.VSyncStart = timings.VDisplay + var->lower_margin;
 616         timings.VSyncEnd = timings.VSyncStart + var->vsync_len;
 617         timings.VTotal = timings.VSyncEnd + var->upper_margin;
 618         timings.sync = var->sync;
 619
 620         /* Is the mode larger than the LCD panel? */
 621         if (par->internal_display &&
 622             ((var->xres > par->NeoPanelWidth) ||
 623              (var->yres > par->NeoPanelHeight))) {
 624                 printk(KERN_INFO
 625                        "Mode (%dx%d) larger than the LCD panel (%dx%d)\n",
 626                        var->xres, var->yres, par->NeoPanelWidth,
 627                        par->NeoPanelHeight);
 628                 return -EINVAL;
 629         }
 630
 631         /* Is the mode one of the acceptable sizes? */
 632         if (!par->internal_display)
 633                 mode_ok = 1;
 634         else {
 635                 switch (var->xres) {
 636                 case 1280:
 637                         if (var->yres == 1024)
 638                                 mode_ok = 1;
 639                         break;
 640                 case 1024:
 641                         if (var->yres == 768)
 642                                 mode_ok = 1;
 643                         break;
 644                 case 800:
 645                         if (var->yres == (par->libretto ? 480 : 600))
 646                                 mode_ok = 1;
 647                         break;
 648                 case 640:
 649                         if (var->yres == 480)
 650                                 mode_ok = 1;
 651                         break;
 652                 }
 653         }
 654
 655         if (!mode_ok) {
 656                 printk(KERN_INFO
 657                        "Mode (%dx%d) won't display properly on LCD\n",
 658                        var->xres, var->yres);
 659                 return -EINVAL;
 660         }
 661
 662         var->red.msb_right = 0;
 663         var->green.msb_right = 0;
 664         var->blue.msb_right = 0;
 665
 666         switch (var->bits_per_pixel) {
 667         case 8:         /* PSEUDOCOLOUR, 256 */
 668                 var->transp.offset = 0;
 669                 var->transp.length = 0;
 670                 var->red.offset = 0;
 671                 var->red.length = 8;
 672                 var->green.offset = 0;
 673                 var->green.length = 8;
 674                 var->blue.offset = 0;
 675                 var->blue.length = 8;
 676                 break;
 677
 678         case 16:                /* DIRECTCOLOUR, 64k */
 679                 var->transp.offset = 0;
 680                 var->transp.length = 0;
 681                 var->red.offset = 11;
 682                 var->red.length = 5;
 683                 var->green.offset = 5;
 684                 var->green.length = 6;
 685                 var->blue.offset = 0;
 686                 var->blue.length = 5;
 687                 break;
 688
 689         case 24:                /* TRUECOLOUR, 16m */
 690                 var->transp.offset = 0;
 691                 var->transp.length = 0;
 692                 var->red.offset = 16;
 693                 var->red.length = 8;
 694                 var->green.offset = 8;
 695                 var->green.length = 8;
 696                 var->blue.offset = 0;
 697                 var->blue.length = 8;
 698                 break;
 699
 700 #ifdef NO_32BIT_SUPPORT_YET
 701         case 32:                /* TRUECOLOUR, 16m */
 702                 var->transp.offset = 24;
 703                 var->transp.length = 8;
 704                 var->red.offset = 16;
 705                 var->red.length = 8;
 706                 var->green.offset = 8;
 707                 var->green.length = 8;
 708                 var->blue.offset = 0;
 709                 var->blue.length = 8;
 710                 break;
 711 #endif
 712         default:
 713                 printk(KERN_WARNING "neofb: no support for %dbpp\n",
 714                        var->bits_per_pixel);
 715                 return -EINVAL;
 716         }
 717
 718         vramlen = info->fix.smem_len;
 719         if (vramlen > 4 * 1024 * 1024)
 720                 vramlen = 4 * 1024 * 1024;
 721
 722         if (var->yres_virtual < var->yres)
 723                 var->yres_virtual = var->yres;
 724         if (var->xres_virtual < var->xres)
 725                 var->xres_virtual = var->xres;
 726
 727         memlen = var->xres_virtual * var->bits_per_pixel * var->yres_virtual >> 3;
 728
 729         if (memlen > vramlen) {
 730                 var->yres_virtual =  vramlen * 8 / (var->xres_virtual *
 731                                         var->bits_per_pixel);
 732                 memlen = var->xres_virtual * var->bits_per_pixel *
 733                                 var->yres_virtual / 8;
 734         }
 735
 736         /* we must round yres/xres down, we already rounded y/xres_virtual up
 737            if it was possible. We should return -EINVAL, but I disagree */
 738         if (var->yres_virtual < var->yres)
 739                 var->yres = var->yres_virtual;
 740         if (var->xres_virtual < var->xres)
 741                 var->xres = var->xres_virtual;
 742         if (var->xoffset + var->xres > var->xres_virtual)
 743                 var->xoffset = var->xres_virtual - var->xres;
 744         if (var->yoffset + var->yres > var->yres_virtual)
 745                 var->yoffset = var->yres_virtual - var->yres;
 746
 747         var->nonstd = 0;
 748         var->height = -1;
 749         var->width = -1;
 750
 751         if (var->bits_per_pixel >= 24 || !par->neo2200)
 752                 var->accel_flags &= ~FB_ACCELF_TEXT;
 753         return 0;
 754 }
 755
 756 static int neofb_set_par(struct fb_info *info)
 757 {
 758         struct neofb_par *par = info->par;
 759         struct xtimings timings;
 760         unsigned char temp;
 761         int i, clock_hi = 0;
 762         int lcd_stretch;
 763         int hoffset, voffset;
 764
 765         DBG("neofb_set_par");
 766
 767         neoUnlock();
 768
 769         vgaHWProtect(1);        /* Blank the screen */
 770
 771         timings.dblscan = info->var.vmode & FB_VMODE_DOUBLE;
 772         timings.interlaced = info->var.vmode & FB_VMODE_INTERLACED;
 773         timings.HDisplay = info->var.xres;
 774         timings.HSyncStart = timings.HDisplay + info->var.right_margin;
 775         timings.HSyncEnd = timings.HSyncStart + info->var.hsync_len;
 776         timings.HTotal = timings.HSyncEnd + info->var.left_margin;
 777         timings.VDisplay = info->var.yres;
 778         timings.VSyncStart = timings.VDisplay + info->var.lower_margin;
 779         timings.VSyncEnd = timings.VSyncStart + info->var.vsync_len;
 780         timings.VTotal = timings.VSyncEnd + info->var.upper_margin;
 781         timings.sync = info->var.sync;
 782         timings.pixclock = PICOS2KHZ(info->var.pixclock);
 783
 784         if (timings.pixclock < 1)
 785                 timings.pixclock = 1;
 786
 787         /*
 788          * This will allocate the datastructure and initialize all of the
 789          * generic VGA registers.
 790          */
 791
 792         if (vgaHWInit(&info->var, info, par, &timings))
 793                 return -EINVAL;
 794
 795         /*
 796          * The default value assigned by vgaHW.c is 0x41, but this does
 797          * not work for NeoMagic.
 798          */
 799         par->Attribute[16] = 0x01;
 800
 801         switch (info->var.bits_per_pixel) {
 802         case 8:
 803                 par->CRTC[0x13] = info->var.xres_virtual >> 3;
 804                 par->ExtCRTOffset = info->var.xres_virtual >> 11;
 805                 par->ExtColorModeSelect = 0x11;
 806                 break;
 807         case 16:
 808                 par->CRTC[0x13] = info->var.xres_virtual >> 2;
 809                 par->ExtCRTOffset = info->var.xres_virtual >> 10;
 810                 par->ExtColorModeSelect = 0x13;
 811                 break;
 812         case 24:
 813                 par->CRTC[0x13] = (info->var.xres_virtual * 3) >> 3;
 814                 par->ExtCRTOffset = (info->var.xres_virtual * 3) >> 11;
 815                 par->ExtColorModeSelect = 0x14;
 816                 break;
 817 #ifdef NO_32BIT_SUPPORT_YET
 818         case 32:                /* FIXME: guessed values */
 819                 par->CRTC[0x13] = info->var.xres_virtual >> 1;
 820                 par->ExtCRTOffset = info->var.xres_virtual >> 9;
 821                 par->ExtColorModeSelect = 0x15;
 822                 break;
 823 #endif
 824         default:
 825                 break;
 826         }
 827
 828         par->ExtCRTDispAddr = 0x10;
 829
 830         /* Vertical Extension */
 831         par->VerticalExt = (((timings.VTotal - 2) & 0x400) >> 10)
 832             | (((timings.VDisplay - 1) & 0x400) >> 9)
 833             | (((timings.VSyncStart) & 0x400) >> 8)
 834             | (((timings.VSyncStart) & 0x400) >> 7);
 835
 836         /* Fast write bursts on unless disabled. */
 837         if (par->pci_burst)
 838                 par->SysIfaceCntl1 = 0x30;
 839         else
 840                 par->SysIfaceCntl1 = 0x00;
 841
 842         par->SysIfaceCntl2 = 0xc0;      /* VESA Bios sets this to 0x80! */
 843
 844         /* Initialize: by default, we want display config register to be read */
 845         par->PanelDispCntlRegRead = 1;
 846
 847         /* Enable any user specified display devices. */
 848         par->PanelDispCntlReg1 = 0x00;
 849         if (par->internal_display)
 850                 par->PanelDispCntlReg1 |= 0x02;
 851         if (par->external_display)
 852                 par->PanelDispCntlReg1 |= 0x01;
 853
 854         /* If the user did not specify any display devices, then... */
 855         if (par->PanelDispCntlReg1 == 0x00) {
 856                 /* Default to internal (i.e., LCD) only. */
 857                 par->PanelDispCntlReg1 = vga_rgfx(NULL, 0x20) & 0x03;
 858         }
 859
 860         /* If we are using a fixed mode, then tell the chip we are. */
 861         switch (info->var.xres) {
 862         case 1280:
 863                 par->PanelDispCntlReg1 |= 0x60;
 864                 break;
 865         case 1024:
 866                 par->PanelDispCntlReg1 |= 0x40;
 867                 break;
 868         case 800:
 869                 par->PanelDispCntlReg1 |= 0x20;
 870                 break;
 871         case 640:
 872         default:
 873                 break;
 874         }
 875
 876         /* Setup shadow register locking. */
 877         switch (par->PanelDispCntlReg1 & 0x03) {
 878         case 0x01:              /* External CRT only mode: */
 879                 par->GeneralLockReg = 0x00;
 880                 /* We need to program the VCLK for external display only mode. */
 881                 par->ProgramVCLK = 1;
 882                 break;
 883         case 0x02:              /* Internal LCD only mode: */
 884         case 0x03:              /* Simultaneous internal/external (LCD/CRT) mode: */
 885                 par->GeneralLockReg = 0x01;
 886                 /* Don't program the VCLK when using the LCD. */
 887                 par->ProgramVCLK = 0;
 888                 break;
 889         }
 890
 891         /*
 892          * If the screen is to be stretched, turn on stretching for the
 893          * various modes.
 894          *
 895          * OPTION_LCD_STRETCH means stretching should be turned off!
 896          */
 897         par->PanelDispCntlReg2 = 0x00;
 898         par->PanelDispCntlReg3 = 0x00;
 899
 900         if (par->lcd_stretch && (par->PanelDispCntlReg1 == 0x02) &&     /* LCD only */
 901             (info->var.xres != par->NeoPanelWidth)) {
 902                 switch (info->var.xres) {
 903                 case 320:       /* Needs testing.  KEM -- 24 May 98 */
 904                 case 400:       /* Needs testing.  KEM -- 24 May 98 */
 905                 case 640:
 906                 case 800:
 907                 case 1024:
 908                         lcd_stretch = 1;
 909                         par->PanelDispCntlReg2 |= 0xC6;
 910                         break;
 911                 default:
 912                         lcd_stretch = 0;
 913                         /* No stretching in these modes. */
 914                 }
 915         } else
 916                 lcd_stretch = 0;
 917
 918         /*
 919          * If the screen is to be centerd, turn on the centering for the
 920          * various modes.
 921          */
 922         par->PanelVertCenterReg1 = 0x00;
 923         par->PanelVertCenterReg2 = 0x00;
 924         par->PanelVertCenterReg3 = 0x00;
 925         par->PanelVertCenterReg4 = 0x00;
 926         par->PanelVertCenterReg5 = 0x00;
 927         par->PanelHorizCenterReg1 = 0x00;
 928         par->PanelHorizCenterReg2 = 0x00;
 929         par->PanelHorizCenterReg3 = 0x00;
 930         par->PanelHorizCenterReg4 = 0x00;
 931         par->PanelHorizCenterReg5 = 0x00;
 932
 933
 934         if (par->PanelDispCntlReg1 & 0x02) {
 935                 if (info->var.xres == par->NeoPanelWidth) {
 936                         /*
 937                          * No centering required when the requested display width
 938                          * equals the panel width.
 939                          */
 940                 } else {
 941                         par->PanelDispCntlReg2 |= 0x01;
 942                         par->PanelDispCntlReg3 |= 0x10;
 943
 944                         /* Calculate the horizontal and vertical offsets. */
 945                         if (!lcd_stretch) {
 946                                 hoffset =
 947                                     ((par->NeoPanelWidth -
 948                                       info->var.xres) >> 4) - 1;
 949                                 voffset =
 950                                     ((par->NeoPanelHeight -
 951                                       info->var.yres) >> 1) - 2;
 952                         } else {
 953                                 /* Stretched modes cannot be centered. */
 954                                 hoffset = 0;
 955                                 voffset = 0;
 956                         }
 957
 958                         switch (info->var.xres) {
 959                         case 320:       /* Needs testing.  KEM -- 24 May 98 */
 960                                 par->PanelHorizCenterReg3 = hoffset;
 961                                 par->PanelVertCenterReg2 = voffset;
 962                                 break;
 963                         case 400:       /* Needs testing.  KEM -- 24 May 98 */
 964                                 par->PanelHorizCenterReg4 = hoffset;
 965                                 par->PanelVertCenterReg1 = voffset;
 966                                 break;
 967                         case 640:
 968                                 par->PanelHorizCenterReg1 = hoffset;
 969                                 par->PanelVertCenterReg3 = voffset;
 970                                 break;
 971                         case 800:
 972                                 par->PanelHorizCenterReg2 = hoffset;
 973                                 par->PanelVertCenterReg4 = voffset;
 974                                 break;
 975                         case 1024:
 976                                 par->PanelHorizCenterReg5 = hoffset;
 977                                 par->PanelVertCenterReg5 = voffset;
 978                                 break;
 979                         case 1280:
 980                         default:
 981                                 /* No centering in these modes. */
 982                                 break;
 983                         }
 984                 }
 985         }
 986
 987         par->biosMode =
 988             neoFindMode(info->var.xres, info->var.yres,
 989                         info->var.bits_per_pixel);
 990
 991         /*
 992          * Calculate the VCLK that most closely matches the requested dot
 993          * clock.
 994          */
 995         neoCalcVCLK(info, par, timings.pixclock);
 996
 997         /* Since we program the clocks ourselves, always use VCLK3. */
 998         par->MiscOutReg |= 0x0C;
 999
1000         /* alread unlocked above */
1001         /* BOGUS  vga_wgfx(NULL, 0x09, 0x26); */
1002
1003         /* don't know what this is, but it's 0 from bootup anyway */
1004         vga_wgfx(NULL, 0x15, 0x00);
1005
1006         /* was set to 0x01 by my bios in text and vesa modes */
1007         vga_wgfx(NULL, 0x0A, par->GeneralLockReg);
1008
1009         /*
1010          * The color mode needs to be set before calling vgaHWRestore
1011          * to ensure the DAC is initialized properly.
1012          *
1013          * NOTE: Make sure we don't change bits make sure we don't change
1014          * any reserved bits.
1015          */
1016         temp = vga_rgfx(NULL, 0x90);
1017         switch (info->fix.accel) {
1018         case FB_ACCEL_NEOMAGIC_NM2070:
1019                 temp &= 0xF0;   /* Save bits 7:4 */
1020                 temp |= (par->ExtColorModeSelect & ~0xF0);
1021                 break;
1022         case FB_ACCEL_NEOMAGIC_NM2090:
1023         case FB_ACCEL_NEOMAGIC_NM2093:
1024         case FB_ACCEL_NEOMAGIC_NM2097:
1025         case FB_ACCEL_NEOMAGIC_NM2160:
1026         case FB_ACCEL_NEOMAGIC_NM2200:
1027         case FB_ACCEL_NEOMAGIC_NM2230:
1028         case FB_ACCEL_NEOMAGIC_NM2360:
1029         case FB_ACCEL_NEOMAGIC_NM2380:
1030                 temp &= 0x70;   /* Save bits 6:4 */
1031                 temp |= (par->ExtColorModeSelect & ~0x70);
1032                 break;
1033         }
1034
1035         vga_wgfx(NULL, 0x90, temp);
1036
1037         /*
1038          * In some rare cases a lockup might occur if we don't delay
1039          * here. (Reported by Miles Lane)
1040          */
1041         //mdelay(200);
1042
1043         /*
1044          * Disable horizontal and vertical graphics and text expansions so
1045          * that vgaHWRestore works properly.
1046          */
1047         temp = vga_rgfx(NULL, 0x25);
1048         temp &= 0x39;
1049         vga_wgfx(NULL, 0x25, temp);
1050
1051         /*
1052          * Sleep for 200ms to make sure that the two operations above have
1053          * had time to take effect.
1054          */
1055         mdelay(200);
1056
1057         /*
1058          * This function handles restoring the generic VGA registers.  */
1059         vgaHWRestore(info, par);
1060
1061         /* linear colormap for non palettized modes */
1062         switch (info->var.bits_per_pixel) {
1063         case 8:
1064                 /* PseudoColor, 256 */
1065                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
1066                 break;
1067         case 16:
1068                 /* TrueColor, 64k */
1069                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1070
1071                 for (i = 0; i < 64; i++) {
1072                         outb(i, 0x3c8);
1073
1074                         outb(i << 1, 0x3c9);
1075                         outb(i, 0x3c9);
1076                         outb(i << 1, 0x3c9);
1077                 }
1078                 break;
1079         case 24:
1080 #ifdef NO_32BIT_SUPPORT_YET
1081         case 32:
1082 #endif
1083                 /* TrueColor, 16m */
1084                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1085
1086                 for (i = 0; i < 256; i++) {
1087                         outb(i, 0x3c8);
1088
1089                         outb(i, 0x3c9);
1090                         outb(i, 0x3c9);
1091                         outb(i, 0x3c9);
1092                 }
1093                 break;
1094         }
1095
1096         vga_wgfx(NULL, 0x0E, par->ExtCRTDispAddr);
1097         vga_wgfx(NULL, 0x0F, par->ExtCRTOffset);
1098         temp = vga_rgfx(NULL, 0x10);
1099         temp &= 0x0F;           /* Save bits 3:0 */
1100         temp |= (par->SysIfaceCntl1 & ~0x0F);   /* VESA Bios sets bit 1! */
1101         vga_wgfx(NULL, 0x10, temp);
1102
1103         vga_wgfx(NULL, 0x11, par->SysIfaceCntl2);
1104         vga_wgfx(NULL, 0x15, 0 /*par->SingleAddrPage */ );
1105         vga_wgfx(NULL, 0x16, 0 /*par->DualAddrPage */ );
1106
1107         temp = vga_rgfx(NULL, 0x20);
1108         switch (info->fix.accel) {
1109         case FB_ACCEL_NEOMAGIC_NM2070:
1110                 temp &= 0xFC;   /* Save bits 7:2 */
1111                 temp |= (par->PanelDispCntlReg1 & ~0xFC);
1112                 break;
1113         case FB_ACCEL_NEOMAGIC_NM2090:
1114         case FB_ACCEL_NEOMAGIC_NM2093:
1115         case FB_ACCEL_NEOMAGIC_NM2097:
1116         case FB_ACCEL_NEOMAGIC_NM2160:
1117                 temp &= 0xDC;   /* Save bits 7:6,4:2 */
1118                 temp |= (par->PanelDispCntlReg1 & ~0xDC);
1119                 break;
1120         case FB_ACCEL_NEOMAGIC_NM2200:
1121         case FB_ACCEL_NEOMAGIC_NM2230:
1122         case FB_ACCEL_NEOMAGIC_NM2360:
1123         case FB_ACCEL_NEOMAGIC_NM2380:
1124                 temp &= 0x98;   /* Save bits 7,4:3 */
1125                 temp |= (par->PanelDispCntlReg1 & ~0x98);
1126                 break;
1127         }
1128         vga_wgfx(NULL, 0x20, temp);
1129
1130         temp = vga_rgfx(NULL, 0x25);
1131         temp &= 0x38;           /* Save bits 5:3 */
1132         temp |= (par->PanelDispCntlReg2 & ~0x38);
1133         vga_wgfx(NULL, 0x25, temp);
1134
1135         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1136                 temp = vga_rgfx(NULL, 0x30);
1137                 temp &= 0xEF;   /* Save bits 7:5 and bits 3:0 */
1138                 temp |= (par->PanelDispCntlReg3 & ~0xEF);
1139                 vga_wgfx(NULL, 0x30, temp);
1140         }
1141
1142         vga_wgfx(NULL, 0x28, par->PanelVertCenterReg1);
1143         vga_wgfx(NULL, 0x29, par->PanelVertCenterReg2);
1144         vga_wgfx(NULL, 0x2a, par->PanelVertCenterReg3);
1145
1146         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1147                 vga_wgfx(NULL, 0x32, par->PanelVertCenterReg4);
1148                 vga_wgfx(NULL, 0x33, par->PanelHorizCenterReg1);
1149                 vga_wgfx(NULL, 0x34, par->PanelHorizCenterReg2);
1150                 vga_wgfx(NULL, 0x35, par->PanelHorizCenterReg3);
1151         }
1152
1153         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2160)
1154                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1155
1156         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1157             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1158             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1159             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1160                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1161                 vga_wgfx(NULL, 0x37, par->PanelVertCenterReg5);
1162                 vga_wgfx(NULL, 0x38, par->PanelHorizCenterReg5);
1163
1164                 clock_hi = 1;
1165         }
1166
1167         /* Program VCLK3 if needed. */
1168         if (par->ProgramVCLK && ((vga_rgfx(NULL, 0x9B) != par->VCLK3NumeratorLow)
1169                                  || (vga_rgfx(NULL, 0x9F) != par->VCLK3Denominator)
1170                                  || (clock_hi && ((vga_rgfx(NULL, 0x8F) & ~0x0f)
1171                                                   != (par->VCLK3NumeratorHigh &
1172                                                       ~0x0F))))) {
1173                 vga_wgfx(NULL, 0x9B, par->VCLK3NumeratorLow);
1174                 if (clock_hi) {
1175                         temp = vga_rgfx(NULL, 0x8F);
1176                         temp &= 0x0F;   /* Save bits 3:0 */
1177                         temp |= (par->VCLK3NumeratorHigh & ~0x0F);
1178                         vga_wgfx(NULL, 0x8F, temp);
1179                 }
1180                 vga_wgfx(NULL, 0x9F, par->VCLK3Denominator);
1181         }
1182
1183         if (par->biosMode)
1184                 vga_wcrt(NULL, 0x23, par->biosMode);
1185
1186         vga_wgfx(NULL, 0x93, 0xc0);     /* Gives 5x faster framebuffer writes !!! */
1187
1188         /* Program vertical extension register */
1189         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1190             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1191             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1192             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1193                 vga_wcrt(NULL, 0x70, par->VerticalExt);
1194         }
1195
1196         vgaHWProtect(0);        /* Turn on screen */
1197
1198         /* Calling this also locks offset registers required in update_start */
1199         neoLock(&par->state);
1200
1201         info->fix.line_length =
1202             info->var.xres_virtual * (info->var.bits_per_pixel >> 3);
1203
1204         switch (info->fix.accel) {
1205                 case FB_ACCEL_NEOMAGIC_NM2200:
1206                 case FB_ACCEL_NEOMAGIC_NM2230:
1207                 case FB_ACCEL_NEOMAGIC_NM2360:
1208                 case FB_ACCEL_NEOMAGIC_NM2380:
1209                         neo2200_accel_init(info, &info->var);
1210                         break;
1211                 default:
1212                         break;
1213         }
1214         return 0;
1215 }
1216
1217 static void neofb_update_start(struct fb_info *info,
1218                                struct fb_var_screeninfo *var)
1219 {
1220         struct neofb_par *par = info->par;
1221         struct vgastate *state = &par->state;
1222         int oldExtCRTDispAddr;
1223         int Base;
1224
1225         DBG("neofb_update_start");
1226
1227         Base = (var->yoffset * var->xres_virtual + var->xoffset) >> 2;
1228         Base *= (var->bits_per_pixel + 7) / 8;
1229
1230         neoUnlock();
1231
1232         /*
1233          * These are the generic starting address registers.
1234          */
1235         vga_wcrt(state->vgabase, 0x0C, (Base & 0x00FF00) >> 8);
1236         vga_wcrt(state->vgabase, 0x0D, (Base & 0x00FF));
1237
1238         /*
1239          * Make sure we don't clobber some other bits that might already
1240          * have been set. NOTE: NM2200 has a writable bit 3, but it shouldn't
1241          * be needed.
1242          */
1243         oldExtCRTDispAddr = vga_rgfx(NULL, 0x0E);
1244         vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0)));
1245
1246         neoLock(state);
1247 }
1248
1249 /*
1250  *    Pan or Wrap the Display
1251  */
1252 static int neofb_pan_display(struct fb_var_screeninfo *var,
1253                              struct fb_info *info)
1254 {
1255         u_int y_bottom;
1256
1257         y_bottom = var->yoffset;
1258
1259         if (!(var->vmode & FB_VMODE_YWRAP))
1260                 y_bottom += var->yres;
1261
1262         if (var->xoffset > (var->xres_virtual - var->xres))
1263                 return -EINVAL;
1264         if (y_bottom > info->var.yres_virtual)
1265                 return -EINVAL;
1266
1267         neofb_update_start(info, var);
1268
1269         info->var.xoffset = var->xoffset;
1270         info->var.yoffset = var->yoffset;
1271
1272         if (var->vmode & FB_VMODE_YWRAP)
1273                 info->var.vmode |= FB_VMODE_YWRAP;
1274         else
1275                 info->var.vmode &= ~FB_VMODE_YWRAP;
1276         return 0;
1277 }
1278
1279 static int neofb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
1280                            u_int transp, struct fb_info *fb)
1281 {
1282         if (regno >= fb->cmap.len || regno > 255)
1283                 return -EINVAL;
1284
1285         switch (fb->var.bits_per_pixel) {
1286         case 8:
1287                 outb(regno, 0x3c8);
1288
1289                 outb(red >> 10, 0x3c9);
1290                 outb(green >> 10, 0x3c9);
1291                 outb(blue >> 10, 0x3c9);
1292                 break;
1293         case 16:
1294                 ((u32 *) fb->pseudo_palette)[regno] =
1295                                 ((red & 0xf800)) | ((green & 0xfc00) >> 5) |
1296                                 ((blue & 0xf800) >> 11);
1297                 break;
1298         case 24:
1299                 ((u32 *) fb->pseudo_palette)[regno] =
1300                                 ((red & 0xff00) << 8) | ((green & 0xff00)) |
1301                                 ((blue & 0xff00) >> 8);
1302                 break;
1303 #ifdef NO_32BIT_SUPPORT_YET
1304         case 32:
1305                 ((u32 *) fb->pseudo_palette)[regno] =
1306                                 ((transp & 0xff00) << 16) | ((red & 0xff00) << 8) |
1307                                 ((green & 0xff00)) | ((blue & 0xff00) >> 8);
1308                 break;
1309 #endif
1310         default:
1311                 return 1;
1312         }
1313         return 0;
1314 }
1315
1316 /*
1317  *    (Un)Blank the display.
1318  */
1319 static int neofb_blank(int blank_mode, struct fb_info *info)
1320 {
1321         /*
1322          *  Blank the screen if blank_mode != 0, else unblank.
1323          *  Return 0 if blanking succeeded, != 0 if un-/blanking failed due to
1324          *  e.g. a video mode which doesn't support it. Implements VESA suspend
1325          *  and powerdown modes for monitors, and backlight control on LCDs.
1326          *    blank_mode == 0: unblanked (backlight on)
1327          *    blank_mode == 1: blank (backlight on)
1328          *    blank_mode == 2: suspend vsync (backlight off)
1329          *    blank_mode == 3: suspend hsync (backlight off)
1330          *    blank_mode == 4: powerdown (backlight off)
1331          *
1332          *  wms...Enable VESA DPMS compatible powerdown mode
1333          *  run "setterm -powersave powerdown" to take advantage
1334          */
1335         struct neofb_par *par = info->par;
1336         int seqflags, lcdflags, dpmsflags, reg;
1337
1338
1339         /*
1340          * Reload the value stored in the register, if sensible. It might have
1341          * been changed via FN keystroke.
1342          */
1343         if (par->PanelDispCntlRegRead) {
1344                 neoUnlock();
1345                 par->PanelDispCntlReg1 = vga_rgfx(NULL, 0x20) & 0x03;
1346                 neoLock(&par->state);
1347         }
1348         par->PanelDispCntlRegRead = !blank_mode;
1349
1350         switch (blank_mode) {
1351         case FB_BLANK_POWERDOWN:        /* powerdown - both sync lines down */
1352                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1353                 lcdflags = 0;                   /* LCD off */
1354                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC |
1355                             NEO_GR01_SUPPRESS_VSYNC;
1356 #ifdef CONFIG_TOSHIBA
1357                 /* Do we still need this ? */
1358                 /* attempt to turn off backlight on toshiba; also turns off external */
1359                 {
1360                         SMMRegisters regs;
1361
1362                         regs.eax = 0xff00; /* HCI_SET */
1363                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1364                         regs.ecx = 0x0000; /* HCI_DISABLE */
1365                         tosh_smm(&regs);
1366                 }
1367 #endif
1368                 break;
1369         case FB_BLANK_HSYNC_SUSPEND:            /* hsync off */
1370                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1371                 lcdflags = 0;                   /* LCD off */
1372                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC;
1373                 break;
1374         case FB_BLANK_VSYNC_SUSPEND:            /* vsync off */
1375                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1376                 lcdflags = 0;                   /* LCD off */
1377                 dpmsflags = NEO_GR01_SUPPRESS_VSYNC;
1378                 break;
1379         case FB_BLANK_NORMAL:           /* just blank screen (backlight stays on) */
1380                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1381                 lcdflags = par->PanelDispCntlReg1 & 0x02; /* LCD normal */
1382                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1383                 break;
1384         case FB_BLANK_UNBLANK:          /* unblank */
1385                 seqflags = 0;                   /* Enable sequencer */
1386                 lcdflags = par->PanelDispCntlReg1 & 0x02; /* LCD normal */
1387                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1388 #ifdef CONFIG_TOSHIBA
1389                 /* Do we still need this ? */
1390                 /* attempt to re-enable backlight/external on toshiba */
1391                 {
1392                         SMMRegisters regs;
1393
1394                         regs.eax = 0xff00; /* HCI_SET */
1395                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1396                         regs.ecx = 0x0001; /* HCI_ENABLE */
1397                         tosh_smm(&regs);
1398                 }
1399 #endif
1400                 break;
1401         default:        /* Anything else we don't understand; return 1 to tell
1402                          * fb_blank we didn't aactually do anything */
1403                 return 1;
1404         }
1405
1406         neoUnlock();
1407         reg = (vga_rseq(NULL, 0x01) & ~0x20) | seqflags;
1408         vga_wseq(NULL, 0x01, reg);
1409         reg = (vga_rgfx(NULL, 0x20) & ~0x02) | lcdflags;
1410         vga_wgfx(NULL, 0x20, reg);
1411         reg = (vga_rgfx(NULL, 0x01) & ~0xF0) | 0x80 | dpmsflags;
1412         vga_wgfx(NULL, 0x01, reg);
1413         neoLock(&par->state);
1414         return 0;
1415 }
1416
1417 static void
1418 neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1419 {
1420         struct neofb_par *par = info->par;
1421         u_long dst, rop;
1422
1423         dst = rect->dx + rect->dy * info->var.xres_virtual;
1424         rop = rect->rop ? 0x060000 : 0x0c0000;
1425
1426         neo2200_wait_fifo(info, 4);
1427
1428         /* set blt control */
1429         writel(NEO_BC3_FIFO_EN |
1430                NEO_BC0_SRC_IS_FG | NEO_BC3_SKIP_MAPPING |
1431                //               NEO_BC3_DST_XY_ADDR  |
1432                //               NEO_BC3_SRC_XY_ADDR  |
1433                rop, &par->neo2200->bltCntl);
1434
1435         switch (info->var.bits_per_pixel) {
1436         case 8:
1437                 writel(rect->color, &par->neo2200->fgColor);
1438                 break;
1439         case 16:
1440         case 24:
1441                 writel(((u32 *) (info->pseudo_palette))[rect->color],
1442                        &par->neo2200->fgColor);
1443                 break;
1444         }
1445
1446         writel(dst * ((info->var.bits_per_pixel + 7) >> 3),
1447                &par->neo2200->dstStart);
1448         writel((rect->height << 16) | (rect->width & 0xffff),
1449                &par->neo2200->xyExt);
1450 }
1451
1452 static void
1453 neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1454 {
1455         u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
1456         struct neofb_par *par = info->par;
1457         u_long src, dst, bltCntl;
1458
1459         bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000;
1460
1461         if ((dy > sy) || ((dy == sy) && (dx > sx))) {
1462                 /* Start with the lower right corner */
1463                 sy += (area->height - 1);
1464                 dy += (area->height - 1);
1465                 sx += (area->width - 1);
1466                 dx += (area->width - 1);
1467
1468                 bltCntl |= NEO_BC0_X_DEC | NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC;
1469         }
1470
1471         src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length;
1472         dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length;
1473
1474         neo2200_wait_fifo(info, 4);
1475
1476         /* set blt control */
1477         writel(bltCntl, &par->neo2200->bltCntl);
1478
1479         writel(src, &par->neo2200->srcStart);
1480         writel(dst, &par->neo2200->dstStart);
1481         writel((area->height << 16) | (area->width & 0xffff),
1482                &par->neo2200->xyExt);
1483 }
1484
1485 static void
1486 neo2200_imageblit(struct fb_info *info, const struct fb_image *image)
1487 {
1488         struct neofb_par *par = info->par;
1489         int s_pitch = (image->width * image->depth + 7) >> 3;
1490         int scan_align = info->pixmap.scan_align - 1;
1491         int buf_align = info->pixmap.buf_align - 1;
1492         int bltCntl_flags, d_pitch, data_len;
1493
1494         // The data is padded for the hardware
1495         d_pitch = (s_pitch + scan_align) & ~scan_align;
1496         data_len = ((d_pitch * image->height) + buf_align) & ~buf_align;
1497
1498         neo2200_sync(info);
1499
1500         if (image->depth == 1) {
1501                 if (info->var.bits_per_pixel == 24 && image->width < 16) {
1502                         /* FIXME. There is a bug with accelerated color-expanded
1503                          * transfers in 24 bit mode if the image being transferred
1504                          * is less than 16 bits wide. This is due to insufficient
1505                          * padding when writing the image. We need to adjust
1506                          * struct fb_pixmap. Not yet done. */
1507                         return cfb_imageblit(info, image);
1508                 }
1509                 bltCntl_flags = NEO_BC0_SRC_MONO;
1510         } else if (image->depth == info->var.bits_per_pixel) {
1511                 bltCntl_flags = 0;
1512         } else {
1513                 /* We don't currently support hardware acceleration if image
1514                  * depth is different from display */
1515                 return cfb_imageblit(info, image);
1516         }
1517
1518         switch (info->var.bits_per_pixel) {
1519         case 8:
1520                 writel(image->fg_color, &par->neo2200->fgColor);
1521                 writel(image->bg_color, &par->neo2200->bgColor);
1522                 break;
1523         case 16:
1524         case 24:
1525                 writel(((u32 *) (info->pseudo_palette))[image->fg_color],
1526                        &par->neo2200->fgColor);
1527                 writel(((u32 *) (info->pseudo_palette))[image->bg_color],
1528                        &par->neo2200->bgColor);
1529                 break;
1530         }
1531
1532         writel(NEO_BC0_SYS_TO_VID |
1533                 NEO_BC3_SKIP_MAPPING | bltCntl_flags |
1534                 // NEO_BC3_DST_XY_ADDR |
1535                 0x0c0000, &par->neo2200->bltCntl);
1536
1537         writel(0, &par->neo2200->srcStart);
1538 //      par->neo2200->dstStart = (image->dy << 16) | (image->dx & 0xffff);
1539         writel(((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) +
1540                 image->dy * info->fix.line_length), &par->neo2200->dstStart);
1541         writel((image->height << 16) | (image->width & 0xffff),
1542                &par->neo2200->xyExt);
1543
1544         memcpy_toio(par->mmio_vbase + 0x100000, image->data, data_len);
1545 }
1546
1547 static void
1548 neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1549 {
1550         switch (info->fix.accel) {
1551                 case FB_ACCEL_NEOMAGIC_NM2200:
1552                 case FB_ACCEL_NEOMAGIC_NM2230:
1553                 case FB_ACCEL_NEOMAGIC_NM2360:
1554                 case FB_ACCEL_NEOMAGIC_NM2380:
1555                         neo2200_fillrect(info, rect);
1556                         break;
1557                 default:
1558                         cfb_fillrect(info, rect);
1559                         break;
1560         }
1561 }
1562
1563 static void
1564 neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1565 {
1566         switch (info->fix.accel) {
1567                 case FB_ACCEL_NEOMAGIC_NM2200:
1568                 case FB_ACCEL_NEOMAGIC_NM2230:
1569                 case FB_ACCEL_NEOMAGIC_NM2360:
1570                 case FB_ACCEL_NEOMAGIC_NM2380:
1571                         neo2200_copyarea(info, area);
1572                         break;
1573                 default:
1574                         cfb_copyarea(info, area);
1575                         break;
1576         }
1577 }
1578
1579 static void
1580 neofb_imageblit(struct fb_info *info, const struct fb_image *image)
1581 {
1582         switch (info->fix.accel) {
1583                 case FB_ACCEL_NEOMAGIC_NM2200:
1584                 case FB_ACCEL_NEOMAGIC_NM2230:
1585                 case FB_ACCEL_NEOMAGIC_NM2360:
1586                 case FB_ACCEL_NEOMAGIC_NM2380:
1587                         neo2200_imageblit(info, image);
1588                         break;
1589                 default:
1590                         cfb_imageblit(info, image);
1591                         break;
1592         }
1593 }
1594
1595 static int
1596 neofb_sync(struct fb_info *info)
1597 {
1598         switch (info->fix.accel) {
1599                 case FB_ACCEL_NEOMAGIC_NM2200:
1600                 case FB_ACCEL_NEOMAGIC_NM2230:
1601                 case FB_ACCEL_NEOMAGIC_NM2360:
1602                 case FB_ACCEL_NEOMAGIC_NM2380:
1603                         neo2200_sync(info);
1604                         break;
1605                 default:
1606                         break;
1607         }
1608         return 0;
1609 }
1610
1611 /*
1612 static void
1613 neofb_draw_cursor(struct fb_info *info, u8 *dst, u8 *src, unsigned int width)
1614 {
1615         //memset_io(info->sprite.addr, 0xff, 1);
1616 }
1617
1618 static int
1619 neofb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1620 {
1621         struct neofb_par *par = (struct neofb_par *) info->par;
1622
1623         * Disable cursor *
1624         write_le32(NEOREG_CURSCNTL, ~NEO_CURS_ENABLE, par);
1625
1626         if (cursor->set & FB_CUR_SETPOS) {
1627                 u32 x = cursor->image.dx;
1628                 u32 y = cursor->image.dy;
1629
1630                 info->cursor.image.dx = x;
1631                 info->cursor.image.dy = y;
1632                 write_le32(NEOREG_CURSX, x, par);
1633                 write_le32(NEOREG_CURSY, y, par);
1634         }
1635
1636         if (cursor->set & FB_CUR_SETSIZE) {
1637                 info->cursor.image.height = cursor->image.height;
1638                 info->cursor.image.width = cursor->image.width;
1639         }
1640
1641         if (cursor->set & FB_CUR_SETHOT)
1642                 info->cursor.hot = cursor->hot;
1643
1644         if (cursor->set & FB_CUR_SETCMAP) {
1645                 if (cursor->image.depth == 1) {
1646                         u32 fg = cursor->image.fg_color;
1647                         u32 bg = cursor->image.bg_color;
1648
1649                         info->cursor.image.fg_color = fg;
1650                         info->cursor.image.bg_color = bg;
1651
1652                         fg = ((fg & 0xff0000) >> 16) | ((fg & 0xff) << 16) | (fg & 0xff00);
1653                         bg = ((bg & 0xff0000) >> 16) | ((bg & 0xff) << 16) | (bg & 0xff00);
1654                         write_le32(NEOREG_CURSFGCOLOR, fg, par);
1655                         write_le32(NEOREG_CURSBGCOLOR, bg, par);
1656                 }
1657         }
1658
1659         if (cursor->set & FB_CUR_SETSHAPE)
1660                 fb_load_cursor_image(info);
1661
1662         if (info->cursor.enable)
1663                 write_le32(NEOREG_CURSCNTL, NEO_CURS_ENABLE, par);
1664         return 0;
1665 }
1666 */
1667
1668 static struct fb_ops neofb_ops = {
1669         .owner          = THIS_MODULE,
1670         .fb_open        = neofb_open,
1671         .fb_release     = neofb_release,
1672         .fb_check_var   = neofb_check_var,
1673         .fb_set_par     = neofb_set_par,
1674         .fb_setcolreg   = neofb_setcolreg,
1675         .fb_pan_display = neofb_pan_display,
1676         .fb_blank       = neofb_blank,
1677         .fb_sync        = neofb_sync,
1678         .fb_fillrect    = neofb_fillrect,
1679         .fb_copyarea    = neofb_copyarea,
1680         .fb_imageblit   = neofb_imageblit,
1681 };
1682
1683 /* --------------------------------------------------------------------- */
1684
1685 static struct fb_videomode __devinitdata mode800x480 = {
1686         .xres           = 800,
1687         .yres           = 480,
1688         .pixclock       = 25000,
1689         .left_margin    = 88,
1690         .right_margin   = 40,
1691         .upper_margin   = 23,
1692         .lower_margin   = 1,
1693         .hsync_len      = 128,
1694         .vsync_len      = 4,
1695         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1696         .vmode          = FB_VMODE_NONINTERLACED
1697 };
1698
1699 static int __devinit neo_map_mmio(struct fb_info *info,
1700                                   struct pci_dev *dev)
1701 {
1702         struct neofb_par *par = info->par;
1703
1704         DBG("neo_map_mmio");
1705
1706         switch (info->fix.accel) {
1707                 case FB_ACCEL_NEOMAGIC_NM2070:
1708                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1709                                 0x100000;
1710                         break;
1711                 case FB_ACCEL_NEOMAGIC_NM2090:
1712                 case FB_ACCEL_NEOMAGIC_NM2093:
1713                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1714                                 0x200000;
1715                         break;
1716                 case FB_ACCEL_NEOMAGIC_NM2160:
1717                 case FB_ACCEL_NEOMAGIC_NM2097:
1718                 case FB_ACCEL_NEOMAGIC_NM2200:
1719                 case FB_ACCEL_NEOMAGIC_NM2230:
1720                 case FB_ACCEL_NEOMAGIC_NM2360:
1721                 case FB_ACCEL_NEOMAGIC_NM2380:
1722                         info->fix.mmio_start = pci_resource_start(dev, 1);
1723                         break;
1724                 default:
1725                         info->fix.mmio_start = pci_resource_start(dev, 0);
1726         }
1727         info->fix.mmio_len = MMIO_SIZE;
1728
1729         if (!request_mem_region
1730             (info->fix.mmio_start, MMIO_SIZE, "memory mapped I/O")) {
1731                 printk("neofb: memory mapped IO in use\n");
1732                 return -EBUSY;
1733         }
1734
1735         par->mmio_vbase = ioremap(info->fix.mmio_start, MMIO_SIZE);
1736         if (!par->mmio_vbase) {
1737                 printk("neofb: unable to map memory mapped IO\n");
1738                 release_mem_region(info->fix.mmio_start,
1739                                    info->fix.mmio_len);
1740                 return -ENOMEM;
1741         } else
1742                 printk(KERN_INFO "neofb: mapped io at %p\n",
1743                        par->mmio_vbase);
1744         return 0;
1745 }
1746
1747 static void neo_unmap_mmio(struct fb_info *info)
1748 {
1749         struct neofb_par *par = info->par;
1750
1751         DBG("neo_unmap_mmio");
1752
1753         iounmap(par->mmio_vbase);
1754         par->mmio_vbase = NULL;
1755
1756         release_mem_region(info->fix.mmio_start,
1757                            info->fix.mmio_len);
1758 }
1759
1760 static int __devinit neo_map_video(struct fb_info *info,
1761                                    struct pci_dev *dev, int video_len)
1762 {
1763         //unsigned long addr;
1764
1765         DBG("neo_map_video");
1766
1767         info->fix.smem_start = pci_resource_start(dev, 0);
1768         info->fix.smem_len = video_len;
1769
1770         if (!request_mem_region(info->fix.smem_start, info->fix.smem_len,
1771                                 "frame buffer")) {
1772                 printk("neofb: frame buffer in use\n");
1773                 return -EBUSY;
1774         }
1775
1776         info->screen_base =
1777             ioremap(info->fix.smem_start, info->fix.smem_len);
1778         if (!info->screen_base) {
1779                 printk("neofb: unable to map screen memory\n");
1780                 release_mem_region(info->fix.smem_start,
1781                                    info->fix.smem_len);
1782                 return -ENOMEM;
1783         } else
1784                 printk(KERN_INFO "neofb: mapped framebuffer at %p\n",
1785                        info->screen_base);
1786
1787 #ifdef CONFIG_MTRR
1788         ((struct neofb_par *)(info->par))->mtrr =
1789                 mtrr_add(info->fix.smem_start, pci_resource_len(dev, 0),
1790                                 MTRR_TYPE_WRCOMB, 1);
1791 #endif
1792
1793         /* Clear framebuffer, it's all white in memory after boot */
1794         memset_io(info->screen_base, 0, info->fix.smem_len);
1795
1796         /* Allocate Cursor drawing pad.
1797         info->fix.smem_len -= PAGE_SIZE;
1798         addr = info->fix.smem_start + info->fix.smem_len;
1799         write_le32(NEOREG_CURSMEMPOS, ((0x000f & (addr >> 10)) << 8) |
1800                                         ((0x0ff0 & (addr >> 10)) >> 4), par);
1801         addr = (unsigned long) info->screen_base + info->fix.smem_len;
1802         info->sprite.addr = (u8 *) addr; */
1803         return 0;
1804 }
1805
1806 static void neo_unmap_video(struct fb_info *info)
1807 {
1808         DBG("neo_unmap_video");
1809
1810 #ifdef CONFIG_MTRR
1811         {
1812                 struct neofb_par *par = info->par;
1813
1814                 mtrr_del(par->mtrr, info->fix.smem_start,
1815                          info->fix.smem_len);
1816         }
1817 #endif
1818         iounmap(info->screen_base);
1819         info->screen_base = NULL;
1820
1821         release_mem_region(info->fix.smem_start,
1822                            info->fix.smem_len);
1823 }
1824
1825 static int __devinit neo_scan_monitor(struct fb_info *info)
1826 {
1827         struct neofb_par *par = info->par;
1828         unsigned char type, display;
1829         int w;
1830
1831         // Eventually we will have i2c support.
1832         info->monspecs.modedb = kmalloc(sizeof(struct fb_videomode), GFP_KERNEL);
1833         if (!info->monspecs.modedb)
1834                 return -ENOMEM;
1835         info->monspecs.modedb_len = 1;
1836
1837         /* Determine the panel type */
1838         vga_wgfx(NULL, 0x09, 0x26);
1839         type = vga_rgfx(NULL, 0x21);
1840         display = vga_rgfx(NULL, 0x20);
1841         if (!par->internal_display && !par->external_display) {
1842                 par->internal_display = display & 2 || !(display & 3) ? 1 : 0;
1843                 par->external_display = display & 1;
1844                 printk (KERN_INFO "Autodetected %s display\n",
1845                         par->internal_display && par->external_display ? "simultaneous" :
1846                         par->internal_display ? "internal" : "external");
1847         }
1848
1849         /* Determine panel width -- used in NeoValidMode. */
1850         w = vga_rgfx(NULL, 0x20);
1851         vga_wgfx(NULL, 0x09, 0x00);
1852         switch ((w & 0x18) >> 3) {
1853         case 0x00:
1854                 // 640x480@60
1855                 par->NeoPanelWidth = 640;
1856                 par->NeoPanelHeight = 480;
1857                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1858                 break;
1859         case 0x01:
1860                 par->NeoPanelWidth = 800;
1861                 if (par->libretto) {
1862                         par->NeoPanelHeight = 480;
1863                         memcpy(info->monspecs.modedb, &mode800x480, sizeof(struct fb_videomode));
1864                 } else {
1865                         // 800x600@60
1866                         par->NeoPanelHeight = 600;
1867                         memcpy(info->monspecs.modedb, &vesa_modes[8], sizeof(struct fb_videomode));
1868                 }
1869                 break;
1870         case 0x02:
1871                 // 1024x768@60
1872                 par->NeoPanelWidth = 1024;
1873                 par->NeoPanelHeight = 768;
1874                 memcpy(info->monspecs.modedb, &vesa_modes[13], sizeof(struct fb_videomode));
1875                 break;
1876         case 0x03:
1877                 /* 1280x1024@60 panel support needs to be added */
1878 #ifdef NOT_DONE
1879                 par->NeoPanelWidth = 1280;
1880                 par->NeoPanelHeight = 1024;
1881                 memcpy(info->monspecs.modedb, &vesa_modes[20], sizeof(struct fb_videomode));
1882                 break;
1883 #else
1884                 printk(KERN_ERR
1885                        "neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n");
1886                 return -1;
1887 #endif
1888         default:
1889                 // 640x480@60
1890                 par->NeoPanelWidth = 640;
1891                 par->NeoPanelHeight = 480;
1892                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1893                 break;
1894         }
1895
1896         printk(KERN_INFO "Panel is a %dx%d %s %s display\n",
1897                par->NeoPanelWidth,
1898                par->NeoPanelHeight,
1899                (type & 0x02) ? "color" : "monochrome",
1900                (type & 0x10) ? "TFT" : "dual scan");
1901         return 0;
1902 }
1903
1904 static int __devinit neo_init_hw(struct fb_info *info)
1905 {
1906         struct neofb_par *par = info->par;
1907         int videoRam = 896;
1908         int maxClock = 65000;
1909         int CursorMem = 1024;
1910         int CursorOff = 0x100;
1911         int linearSize = 1024;
1912         int maxWidth = 1024;
1913         int maxHeight = 1024;
1914
1915         DBG("neo_init_hw");
1916
1917         neoUnlock();
1918
1919 #if 0
1920         printk(KERN_DEBUG "--- Neo extended register dump ---\n");
1921         for (int w = 0; w < 0x85; w++)
1922                 printk(KERN_DEBUG "CR %p: %p\n", (void *) w,
1923                        (void *) vga_rcrt(NULL, w);
1924         for (int w = 0; w < 0xC7; w++)
1925                 printk(KERN_DEBUG "GR %p: %p\n", (void *) w,
1926                        (void *) vga_rgfx(NULL, w));
1927 #endif
1928         switch (info->fix.accel) {
1929         case FB_ACCEL_NEOMAGIC_NM2070:
1930                 videoRam = 896;
1931                 maxClock = 65000;
1932                 CursorMem = 2048;
1933                 CursorOff = 0x100;
1934                 linearSize = 1024;
1935                 maxWidth = 1024;
1936                 maxHeight = 1024;
1937                 break;
1938         case FB_ACCEL_NEOMAGIC_NM2090:
1939         case FB_ACCEL_NEOMAGIC_NM2093:
1940                 videoRam = 1152;
1941                 maxClock = 80000;
1942                 CursorMem = 2048;
1943                 CursorOff = 0x100;
1944                 linearSize = 2048;
1945                 maxWidth = 1024;
1946                 maxHeight = 1024;
1947                 break;
1948         case FB_ACCEL_NEOMAGIC_NM2097:
1949                 videoRam = 1152;
1950                 maxClock = 80000;
1951                 CursorMem = 1024;
1952                 CursorOff = 0x100;
1953                 linearSize = 2048;
1954                 maxWidth = 1024;
1955                 maxHeight = 1024;
1956                 break;
1957         case FB_ACCEL_NEOMAGIC_NM2160:
1958                 videoRam = 2048;
1959                 maxClock = 90000;
1960                 CursorMem = 1024;
1961                 CursorOff = 0x100;
1962                 linearSize = 2048;
1963                 maxWidth = 1024;
1964                 maxHeight = 1024;
1965                 break;
1966         case FB_ACCEL_NEOMAGIC_NM2200:
1967                 videoRam = 2560;
1968                 maxClock = 110000;
1969                 CursorMem = 1024;
1970                 CursorOff = 0x1000;
1971                 linearSize = 4096;
1972                 maxWidth = 1280;
1973                 maxHeight = 1024;       /* ???? */
1974
1975                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
1976                 break;
1977         case FB_ACCEL_NEOMAGIC_NM2230:
1978                 videoRam = 3008;
1979                 maxClock = 110000;
1980                 CursorMem = 1024;
1981                 CursorOff = 0x1000;
1982                 linearSize = 4096;
1983                 maxWidth = 1280;
1984                 maxHeight = 1024;       /* ???? */
1985
1986                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
1987                 break;
1988         case FB_ACCEL_NEOMAGIC_NM2360:
1989                 videoRam = 4096;
1990                 maxClock = 110000;
1991                 CursorMem = 1024;
1992                 CursorOff = 0x1000;
1993                 linearSize = 4096;
1994                 maxWidth = 1280;
1995                 maxHeight = 1024;       /* ???? */
1996
1997                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
1998                 break;
1999         case FB_ACCEL_NEOMAGIC_NM2380:
2000                 videoRam = 6144;
2001                 maxClock = 110000;
2002                 CursorMem = 1024;
2003                 CursorOff = 0x1000;
2004                 linearSize = 8192;
2005                 maxWidth = 1280;
2006                 maxHeight = 1024;       /* ???? */
2007
2008                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2009                 break;
2010         }
2011 /*
2012         info->sprite.size = CursorMem;
2013         info->sprite.scan_align = 1;
2014         info->sprite.buf_align = 1;
2015         info->sprite.flags = FB_PIXMAP_IO;
2016         info->sprite.outbuf = neofb_draw_cursor;
2017 */
2018         par->maxClock = maxClock;
2019         par->cursorOff = CursorOff;
2020         return ((videoRam * 1024));
2021 }
2022
2023
2024 static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const struct
2025                                                    pci_device_id *id)
2026 {
2027         struct fb_info *info;
2028         struct neofb_par *par;
2029
2030         info = framebuffer_alloc(sizeof(struct neofb_par), &dev->dev);
2031
2032         if (!info)
2033                 return NULL;
2034
2035         par = info->par;
2036
2037         info->fix.accel = id->driver_data;
2038
2039         par->pci_burst = !nopciburst;
2040         par->lcd_stretch = !nostretch;
2041         par->libretto = libretto;
2042
2043         par->internal_display = internal;
2044         par->external_display = external;
2045         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
2046
2047         switch (info->fix.accel) {
2048         case FB_ACCEL_NEOMAGIC_NM2070:
2049                 sprintf(info->fix.id, "MagicGraph 128");
2050                 break;
2051         case FB_ACCEL_NEOMAGIC_NM2090:
2052                 sprintf(info->fix.id, "MagicGraph 128V");
2053                 break;
2054         case FB_ACCEL_NEOMAGIC_NM2093:
2055                 sprintf(info->fix.id, "MagicGraph 128ZV");
2056                 break;
2057         case FB_ACCEL_NEOMAGIC_NM2097:
2058                 sprintf(info->fix.id, "MagicGraph 128ZV+");
2059                 break;
2060         case FB_ACCEL_NEOMAGIC_NM2160:
2061                 sprintf(info->fix.id, "MagicGraph 128XD");
2062                 break;
2063         case FB_ACCEL_NEOMAGIC_NM2200:
2064                 sprintf(info->fix.id, "MagicGraph 256AV");
2065                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2066                                FBINFO_HWACCEL_COPYAREA |
2067                                FBINFO_HWACCEL_FILLRECT;
2068                 break;
2069         case FB_ACCEL_NEOMAGIC_NM2230:
2070                 sprintf(info->fix.id, "MagicGraph 256AV+");
2071                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2072                                FBINFO_HWACCEL_COPYAREA |
2073                                FBINFO_HWACCEL_FILLRECT;
2074                 break;
2075         case FB_ACCEL_NEOMAGIC_NM2360:
2076                 sprintf(info->fix.id, "MagicGraph 256ZX");
2077                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2078                                FBINFO_HWACCEL_COPYAREA |
2079                                FBINFO_HWACCEL_FILLRECT;
2080                 break;
2081         case FB_ACCEL_NEOMAGIC_NM2380:
2082                 sprintf(info->fix.id, "MagicGraph 256XL+");
2083                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2084                                FBINFO_HWACCEL_COPYAREA |
2085                                FBINFO_HWACCEL_FILLRECT;
2086                 break;
2087         }
2088
2089         info->fix.type = FB_TYPE_PACKED_PIXELS;
2090         info->fix.type_aux = 0;
2091         info->fix.xpanstep = 0;
2092         info->fix.ypanstep = 4;
2093         info->fix.ywrapstep = 0;
2094         info->fix.accel = id->driver_data;
2095
2096         info->fbops = &neofb_ops;
2097         info->pseudo_palette = par->palette;
2098         return info;
2099 }
2100
2101 static void neo_free_fb_info(struct fb_info *info)
2102 {
2103         if (info) {
2104                 /*
2105                  * Free the colourmap
2106                  */
2107                 fb_dealloc_cmap(&info->cmap);
2108                 framebuffer_release(info);
2109         }
2110 }
2111
2112 /* --------------------------------------------------------------------- */
2113
2114 static int __devinit neofb_probe(struct pci_dev *dev,
2115                                  const struct pci_device_id *id)
2116 {
2117         struct fb_info *info;
2118         u_int h_sync, v_sync;
2119         int video_len, err;
2120
2121         DBG("neofb_probe");
2122
2123         err = pci_enable_device(dev);
2124         if (err)
2125                 return err;
2126
2127         err = -ENOMEM;
2128         info = neo_alloc_fb_info(dev, id);
2129         if (!info)
2130                 return err;
2131
2132         err = neo_map_mmio(info, dev);
2133         if (err)
2134                 goto err_map_mmio;
2135
2136         err = neo_scan_monitor(info);
2137         if (err)
2138                 goto err_scan_monitor;
2139
2140         video_len = neo_init_hw(info);
2141         if (video_len < 0) {
2142                 err = video_len;
2143                 goto err_init_hw;
2144         }
2145
2146         err = neo_map_video(info, dev, video_len);
2147         if (err)
2148                 goto err_init_hw;
2149
2150         if (!fb_find_mode(&info->var, info, mode_option, NULL, 0,
2151                         info->monspecs.modedb, 16)) {
2152                 printk(KERN_ERR "neofb: Unable to find usable video mode.\n");
2153                 goto err_map_video;
2154         }
2155
2156         /*
2157          * Calculate the hsync and vsync frequencies.  Note that
2158          * we split the 1e12 constant up so that we can preserve
2159          * the precision and fit the results into 32-bit registers.
2160          *  (1953125000 * 512 = 1e12)
2161          */
2162         h_sync = 1953125000 / info->var.pixclock;
2163         h_sync =
2164             h_sync * 512 / (info->var.xres + info->var.left_margin +
2165                             info->var.right_margin + info->var.hsync_len);
2166         v_sync =
2167             h_sync / (info->var.yres + info->var.upper_margin +
2168                       info->var.lower_margin + info->var.vsync_len);
2169
2170         printk(KERN_INFO "neofb v" NEOFB_VERSION
2171                ": %dkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
2172                info->fix.smem_len >> 10, info->var.xres,
2173                info->var.yres, h_sync / 1000, h_sync % 1000, v_sync);
2174
2175         if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
2176                 goto err_map_video;
2177
2178         err = register_framebuffer(info);
2179         if (err < 0)
2180                 goto err_reg_fb;
2181
2182         printk(KERN_INFO "fb%d: %s frame buffer device\n",
2183                info->node, info->fix.id);
2184
2185         /*
2186          * Our driver data
2187          */
2188         pci_set_drvdata(dev, info);
2189         return 0;
2190
2191 err_reg_fb:
2192         fb_dealloc_cmap(&info->cmap);
2193 err_map_video:
2194         neo_unmap_video(info);
2195 err_init_hw:
2196         fb_destroy_modedb(info->monspecs.modedb);
2197 err_scan_monitor:
2198         neo_unmap_mmio(info);
2199 err_map_mmio:
2200         neo_free_fb_info(info);
2201         return err;
2202 }
2203
2204 static void __devexit neofb_remove(struct pci_dev *dev)
2205 {
2206         struct fb_info *info = pci_get_drvdata(dev);
2207
2208         DBG("neofb_remove");
2209
2210         if (info) {
2211                 /*
2212                  * If unregister_framebuffer fails, then
2213                  * we will be leaving hooks that could cause
2214                  * oopsen laying around.
2215                  */
2216                 if (unregister_framebuffer(info))
2217                         printk(KERN_WARNING
2218                                "neofb: danger danger!  Oopsen imminent!\n");
2219
2220                 neo_unmap_video(info);
2221                 fb_destroy_modedb(info->monspecs.modedb);
2222                 neo_unmap_mmio(info);
2223                 neo_free_fb_info(info);
2224
2225                 /*
2226                  * Ensure that the driver data is no longer
2227                  * valid.
2228                  */
2229                 pci_set_drvdata(dev, NULL);
2230         }
2231 }
2232
2233 static struct pci_device_id neofb_devices[] = {
2234         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070,
2235          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070},
2236
2237         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2090,
2238          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2090},
2239
2240         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2093,
2241          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2093},
2242
2243         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2097,
2244          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2097},
2245
2246         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2160,
2247          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2160},
2248
2249         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2200,
2250          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2200},
2251
2252         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2230,
2253          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2230},
2254
2255         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2360,
2256          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2360},
2257
2258         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2380,
2259          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2380},
2260
2261         {0, 0, 0, 0, 0, 0, 0}
2262 };
2263
2264 MODULE_DEVICE_TABLE(pci, neofb_devices);
2265
2266 static struct pci_driver neofb_driver = {
2267         .name =         "neofb",
2268         .id_table =     neofb_devices,
2269         .probe =        neofb_probe,
2270         .remove =       __devexit_p(neofb_remove)
2271 };
2272
2273 /* ************************* init in-kernel code ************************** */
2274
2275 #ifndef MODULE
2276 static int __init neofb_setup(char *options)
2277 {
2278         char *this_opt;
2279
2280         DBG("neofb_setup");
2281
2282         if (!options || !*options)
2283                 return 0;
2284
2285         while ((this_opt = strsep(&options, ",")) != NULL) {
2286                 if (!*this_opt)
2287                         continue;
2288
2289                 if (!strncmp(this_opt, "internal", 8))
2290                         internal = 1;
2291                 else if (!strncmp(this_opt, "external", 8))
2292                         external = 1;
2293                 else if (!strncmp(this_opt, "nostretch", 9))
2294                         nostretch = 1;
2295                 else if (!strncmp(this_opt, "nopciburst", 10))
2296                         nopciburst = 1;
2297                 else if (!strncmp(this_opt, "libretto", 8))
2298                         libretto = 1;
2299                 else
2300                         mode_option = this_opt;
2301         }
2302         return 0;
2303 }
2304 #endif  /*  MODULE  */
2305
2306 static int __init neofb_init(void)
2307 {
2308 #ifndef MODULE
2309         char *option = NULL;
2310
2311         if (fb_get_options("neofb", &option))
2312                 return -ENODEV;
2313         neofb_setup(option);
2314 #endif
2315         return pci_register_driver(&neofb_driver);
2316 }
2317
2318 module_init(neofb_init);
2319
2320 #ifdef MODULE
2321 static void __exit neofb_exit(void)
2322 {
2323         pci_unregister_driver(&neofb_driver);
2324 }
2325
2326 module_exit(neofb_exit);
2327 #endif                          /* MODULE */