Merge ../linus
[linux-2.6] / drivers / video / cg6.c
1 /* cg6.c: CGSIX (GX, GXplus, TGX) frame buffer driver
2  *
3  * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4  * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5  * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6  * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
7  *
8  * Driver layout based loosely on tgafb.c, see that file for credits.
9  */
10
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/errno.h>
14 #include <linux/string.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/init.h>
18 #include <linux/fb.h>
19 #include <linux/mm.h>
20
21 #include <asm/io.h>
22 #include <asm/prom.h>
23 #include <asm/of_device.h>
24 #include <asm/fbio.h>
25
26 #include "sbuslib.h"
27
28 /*
29  * Local functions.
30  */
31
32 static int cg6_setcolreg(unsigned, unsigned, unsigned, unsigned,
33                          unsigned, struct fb_info *);
34 static int cg6_blank(int, struct fb_info *);
35
36 static void cg6_imageblit(struct fb_info *, const struct fb_image *);
37 static void cg6_fillrect(struct fb_info *, const struct fb_fillrect *);
38 static int cg6_sync(struct fb_info *);
39 static int cg6_mmap(struct fb_info *, struct vm_area_struct *);
40 static int cg6_ioctl(struct fb_info *, unsigned int, unsigned long);
41
42 /*
43  *  Frame buffer operations
44  */
45
46 static struct fb_ops cg6_ops = {
47         .owner                  = THIS_MODULE,
48         .fb_setcolreg           = cg6_setcolreg,
49         .fb_blank               = cg6_blank,
50         .fb_fillrect            = cg6_fillrect,
51         .fb_copyarea            = cfb_copyarea,
52         .fb_imageblit           = cg6_imageblit,
53         .fb_sync                = cg6_sync,
54         .fb_mmap                = cg6_mmap,
55         .fb_ioctl               = cg6_ioctl,
56 #ifdef CONFIG_COMPAT
57         .fb_compat_ioctl        = sbusfb_compat_ioctl,
58 #endif
59 };
60
61 /* Offset of interesting structures in the OBIO space */
62 /*
63  * Brooktree is the video dac and is funny to program on the cg6.
64  * (it's even funnier on the cg3)
65  * The FBC could be the frame buffer control
66  * The FHC could is the frame buffer hardware control.
67  */
68 #define CG6_ROM_OFFSET       0x0UL
69 #define CG6_BROOKTREE_OFFSET 0x200000UL
70 #define CG6_DHC_OFFSET       0x240000UL
71 #define CG6_ALT_OFFSET       0x280000UL
72 #define CG6_FHC_OFFSET       0x300000UL
73 #define CG6_THC_OFFSET       0x301000UL
74 #define CG6_FBC_OFFSET       0x700000UL
75 #define CG6_TEC_OFFSET       0x701000UL
76 #define CG6_RAM_OFFSET       0x800000UL
77
78 /* FHC definitions */
79 #define CG6_FHC_FBID_SHIFT           24
80 #define CG6_FHC_FBID_MASK            255
81 #define CG6_FHC_REV_SHIFT            20
82 #define CG6_FHC_REV_MASK             15
83 #define CG6_FHC_FROP_DISABLE         (1 << 19)
84 #define CG6_FHC_ROW_DISABLE          (1 << 18)
85 #define CG6_FHC_SRC_DISABLE          (1 << 17)
86 #define CG6_FHC_DST_DISABLE          (1 << 16)
87 #define CG6_FHC_RESET                (1 << 15)
88 #define CG6_FHC_LITTLE_ENDIAN        (1 << 13)
89 #define CG6_FHC_RES_MASK             (3 << 11)
90 #define CG6_FHC_1024                 (0 << 11)
91 #define CG6_FHC_1152                 (1 << 11)
92 #define CG6_FHC_1280                 (2 << 11)
93 #define CG6_FHC_1600                 (3 << 11)
94 #define CG6_FHC_CPU_MASK             (3 << 9)
95 #define CG6_FHC_CPU_SPARC            (0 << 9)
96 #define CG6_FHC_CPU_68020            (1 << 9)
97 #define CG6_FHC_CPU_386              (2 << 9)
98 #define CG6_FHC_TEST                 (1 << 8)
99 #define CG6_FHC_TEST_X_SHIFT         4
100 #define CG6_FHC_TEST_X_MASK          15
101 #define CG6_FHC_TEST_Y_SHIFT         0
102 #define CG6_FHC_TEST_Y_MASK          15
103
104 /* FBC mode definitions */
105 #define CG6_FBC_BLIT_IGNORE             0x00000000
106 #define CG6_FBC_BLIT_NOSRC              0x00100000
107 #define CG6_FBC_BLIT_SRC                0x00200000
108 #define CG6_FBC_BLIT_ILLEGAL            0x00300000
109 #define CG6_FBC_BLIT_MASK               0x00300000
110
111 #define CG6_FBC_VBLANK                  0x00080000
112
113 #define CG6_FBC_MODE_IGNORE             0x00000000
114 #define CG6_FBC_MODE_COLOR8             0x00020000
115 #define CG6_FBC_MODE_COLOR1             0x00040000
116 #define CG6_FBC_MODE_HRMONO             0x00060000
117 #define CG6_FBC_MODE_MASK               0x00060000
118
119 #define CG6_FBC_DRAW_IGNORE             0x00000000
120 #define CG6_FBC_DRAW_RENDER             0x00008000
121 #define CG6_FBC_DRAW_PICK               0x00010000
122 #define CG6_FBC_DRAW_ILLEGAL            0x00018000
123 #define CG6_FBC_DRAW_MASK               0x00018000
124
125 #define CG6_FBC_BWRITE0_IGNORE          0x00000000
126 #define CG6_FBC_BWRITE0_ENABLE          0x00002000
127 #define CG6_FBC_BWRITE0_DISABLE         0x00004000
128 #define CG6_FBC_BWRITE0_ILLEGAL         0x00006000
129 #define CG6_FBC_BWRITE0_MASK            0x00006000
130
131 #define CG6_FBC_BWRITE1_IGNORE          0x00000000
132 #define CG6_FBC_BWRITE1_ENABLE          0x00000800
133 #define CG6_FBC_BWRITE1_DISABLE         0x00001000
134 #define CG6_FBC_BWRITE1_ILLEGAL         0x00001800
135 #define CG6_FBC_BWRITE1_MASK            0x00001800
136
137 #define CG6_FBC_BREAD_IGNORE            0x00000000
138 #define CG6_FBC_BREAD_0                 0x00000200
139 #define CG6_FBC_BREAD_1                 0x00000400
140 #define CG6_FBC_BREAD_ILLEGAL           0x00000600
141 #define CG6_FBC_BREAD_MASK              0x00000600
142
143 #define CG6_FBC_BDISP_IGNORE            0x00000000
144 #define CG6_FBC_BDISP_0                 0x00000080
145 #define CG6_FBC_BDISP_1                 0x00000100
146 #define CG6_FBC_BDISP_ILLEGAL           0x00000180
147 #define CG6_FBC_BDISP_MASK              0x00000180
148
149 #define CG6_FBC_INDEX_MOD               0x00000040
150 #define CG6_FBC_INDEX_MASK              0x00000030
151
152 /* THC definitions */
153 #define CG6_THC_MISC_REV_SHIFT       16
154 #define CG6_THC_MISC_REV_MASK        15
155 #define CG6_THC_MISC_RESET           (1 << 12)
156 #define CG6_THC_MISC_VIDEO           (1 << 10)
157 #define CG6_THC_MISC_SYNC            (1 << 9)
158 #define CG6_THC_MISC_VSYNC           (1 << 8)
159 #define CG6_THC_MISC_SYNC_ENAB       (1 << 7)
160 #define CG6_THC_MISC_CURS_RES        (1 << 6)
161 #define CG6_THC_MISC_INT_ENAB        (1 << 5)
162 #define CG6_THC_MISC_INT             (1 << 4)
163 #define CG6_THC_MISC_INIT            0x9f
164
165 /* The contents are unknown */
166 struct cg6_tec {
167         int tec_matrix;
168         int tec_clip;
169         int tec_vdc;
170 };
171
172 struct cg6_thc {
173         u32 thc_pad0[512];
174         u32 thc_hs;             /* hsync timing */
175         u32 thc_hsdvs;
176         u32 thc_hd;
177         u32 thc_vs;             /* vsync timing */
178         u32 thc_vd;
179         u32 thc_refresh;
180         u32 thc_misc;
181         u32 thc_pad1[56];
182         u32 thc_cursxy; /* cursor x,y position (16 bits each) */
183         u32 thc_cursmask[32];   /* cursor mask bits */
184         u32 thc_cursbits[32];   /* what to show where mask enabled */
185 };
186
187 struct cg6_fbc {
188         u32     xxx0[1];
189         u32     mode;
190         u32     clip;
191         u32     xxx1[1];            
192         u32     s;
193         u32     draw;
194         u32     blit;
195         u32     font;
196         u32     xxx2[24];
197         u32     x0, y0, z0, color0;
198         u32     x1, y1, z1, color1;
199         u32     x2, y2, z2, color2;
200         u32     x3, y3, z3, color3;
201         u32     offx, offy;
202         u32     xxx3[2];
203         u32     incx, incy;
204         u32     xxx4[2];
205         u32     clipminx, clipminy;
206         u32     xxx5[2];
207         u32     clipmaxx, clipmaxy;
208         u32     xxx6[2];
209         u32     fg;
210         u32     bg;
211         u32     alu;
212         u32     pm;
213         u32     pixelm;
214         u32     xxx7[2];
215         u32     patalign;
216         u32     pattern[8];
217         u32     xxx8[432];
218         u32     apointx, apointy, apointz;
219         u32     xxx9[1];
220         u32     rpointx, rpointy, rpointz;
221         u32     xxx10[5];
222         u32     pointr, pointg, pointb, pointa;
223         u32     alinex, aliney, alinez;
224         u32     xxx11[1];
225         u32     rlinex, rliney, rlinez;
226         u32     xxx12[5];
227         u32     liner, lineg, lineb, linea;
228         u32     atrix, atriy, atriz;
229         u32     xxx13[1];
230         u32     rtrix, rtriy, rtriz;
231         u32     xxx14[5];
232         u32     trir, trig, trib, tria;
233         u32     aquadx, aquady, aquadz;
234         u32     xxx15[1];
235         u32     rquadx, rquady, rquadz;
236         u32     xxx16[5];
237         u32     quadr, quadg, quadb, quada;
238         u32     arectx, arecty, arectz;
239         u32     xxx17[1];
240         u32     rrectx, rrecty, rrectz;
241         u32     xxx18[5];
242         u32     rectr, rectg, rectb, recta;
243 };
244
245 struct bt_regs {
246         u32 addr;
247         u32 color_map;
248         u32 control;
249         u32 cursor;
250 };
251
252 struct cg6_par {
253         spinlock_t              lock;
254         struct bt_regs          __iomem *bt;
255         struct cg6_fbc          __iomem *fbc;
256         struct cg6_thc          __iomem *thc;
257         struct cg6_tec          __iomem *tec;
258         u32                     __iomem *fhc;
259
260         u32                     flags;
261 #define CG6_FLAG_BLANKED        0x00000001
262
263         unsigned long           physbase;
264         unsigned long           which_io;
265         unsigned long           fbsize;
266 };
267
268 static int cg6_sync(struct fb_info *info)
269 {
270         struct cg6_par *par = (struct cg6_par *) info->par;
271         struct cg6_fbc __iomem *fbc = par->fbc;
272         int limit = 10000;
273
274         do {
275                 if (!(sbus_readl(&fbc->s) & 0x10000000))
276                         break;
277                 udelay(10);
278         } while (--limit > 0);
279
280         return 0;
281 }
282
283 /**
284  *      cg6_fillrect - REQUIRED function. Can use generic routines if 
285  *                     non acclerated hardware and packed pixel based.
286  *                     Draws a rectangle on the screen.               
287  *
288  *      @info: frame buffer structure that represents a single frame buffer
289  *      @rect: structure defining the rectagle and operation.
290  */
291 static void cg6_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
292 {
293         struct cg6_par *par = (struct cg6_par *) info->par;
294         struct cg6_fbc __iomem *fbc = par->fbc;
295         unsigned long flags;
296         s32 val;
297
298         /* XXX doesn't handle ROP_XOR */
299
300         spin_lock_irqsave(&par->lock, flags);
301         cg6_sync(info);
302         sbus_writel(rect->color, &fbc->fg);
303         sbus_writel(~(u32)0, &fbc->pixelm);
304         sbus_writel(0xea80ff00, &fbc->alu);
305         sbus_writel(0, &fbc->s);
306         sbus_writel(0, &fbc->clip);
307         sbus_writel(~(u32)0, &fbc->pm);
308         sbus_writel(rect->dy, &fbc->arecty);
309         sbus_writel(rect->dx, &fbc->arectx);
310         sbus_writel(rect->dy + rect->height, &fbc->arecty);
311         sbus_writel(rect->dx + rect->width, &fbc->arectx);
312         do {
313                 val = sbus_readl(&fbc->draw);
314         } while (val < 0 && (val & 0x20000000));
315         spin_unlock_irqrestore(&par->lock, flags);
316 }
317
318 /**
319  *      cg6_imageblit - REQUIRED function. Can use generic routines if
320  *                      non acclerated hardware and packed pixel based.
321  *                      Copies a image from system memory to the screen. 
322  *
323  *      @info: frame buffer structure that represents a single frame buffer
324  *      @image: structure defining the image.
325  */
326 static void cg6_imageblit(struct fb_info *info, const struct fb_image *image)
327 {
328         struct cg6_par *par = (struct cg6_par *) info->par;
329         struct cg6_fbc __iomem *fbc = par->fbc;
330         const u8 *data = image->data;
331         unsigned long flags;
332         u32 x, y;
333         int i, width;
334
335         if (image->depth > 1) {
336                 cfb_imageblit(info, image);
337                 return;
338         }
339
340         spin_lock_irqsave(&par->lock, flags);
341
342         cg6_sync(info);
343
344         sbus_writel(image->fg_color, &fbc->fg);
345         sbus_writel(image->bg_color, &fbc->bg);
346         sbus_writel(0x140000, &fbc->mode);
347         sbus_writel(0xe880fc30, &fbc->alu);
348         sbus_writel(~(u32)0, &fbc->pixelm);
349         sbus_writel(0, &fbc->s);
350         sbus_writel(0, &fbc->clip);
351         sbus_writel(0xff, &fbc->pm);
352         sbus_writel(32, &fbc->incx);
353         sbus_writel(0, &fbc->incy);
354
355         x = image->dx;
356         y = image->dy;
357         for (i = 0; i < image->height; i++) {
358                 width = image->width;
359
360                 while (width >= 32) {
361                         u32 val;
362
363                         sbus_writel(y, &fbc->y0);
364                         sbus_writel(x, &fbc->x0);
365                         sbus_writel(x + 32 - 1, &fbc->x1);
366                         
367                         val = ((u32)data[0] << 24) |
368                               ((u32)data[1] << 16) |
369                               ((u32)data[2] <<  8) |
370                               ((u32)data[3] <<  0);
371                         sbus_writel(val, &fbc->font);
372
373                         data += 4;
374                         x += 32;
375                         width -= 32;
376                 }
377                 if (width) {
378                         u32 val;
379
380                         sbus_writel(y, &fbc->y0);
381                         sbus_writel(x, &fbc->x0);
382                         sbus_writel(x + width - 1, &fbc->x1);
383                         if (width <= 8) {
384                                 val = (u32) data[0] << 24;
385                                 data += 1;
386                         } else if (width <= 16) {
387                                 val = ((u32) data[0] << 24) |
388                                       ((u32) data[1] << 16);
389                                 data += 2;
390                         } else {
391                                 val = ((u32) data[0] << 24) |
392                                       ((u32) data[1] << 16) |
393                                       ((u32) data[2] <<  8);
394                                 data += 3;
395                         }
396                         sbus_writel(val, &fbc->font);
397                 }
398
399                 y += 1;
400                 x = image->dx;
401         }
402
403         spin_unlock_irqrestore(&par->lock, flags);
404 }
405
406 /**
407  *      cg6_setcolreg - Optional function. Sets a color register.
408  *      @regno: boolean, 0 copy local, 1 get_user() function
409  *      @red: frame buffer colormap structure
410  *      @green: The green value which can be up to 16 bits wide
411  *      @blue:  The blue value which can be up to 16 bits wide.
412  *      @transp: If supported the alpha value which can be up to 16 bits wide.
413  *      @info: frame buffer info structure
414  */
415 static int cg6_setcolreg(unsigned regno,
416                          unsigned red, unsigned green, unsigned blue,
417                          unsigned transp, struct fb_info *info)
418 {
419         struct cg6_par *par = (struct cg6_par *) info->par;
420         struct bt_regs __iomem *bt = par->bt;
421         unsigned long flags;
422
423         if (regno >= 256)
424                 return 1;
425
426         red >>= 8;
427         green >>= 8;
428         blue >>= 8;
429
430         spin_lock_irqsave(&par->lock, flags);
431
432         sbus_writel((u32)regno << 24, &bt->addr);
433         sbus_writel((u32)red << 24, &bt->color_map);
434         sbus_writel((u32)green << 24, &bt->color_map);
435         sbus_writel((u32)blue << 24, &bt->color_map);
436
437         spin_unlock_irqrestore(&par->lock, flags);
438
439         return 0;
440 }
441
442 /**
443  *      cg6_blank - Optional function.  Blanks the display.
444  *      @blank_mode: the blank mode we want.
445  *      @info: frame buffer structure that represents a single frame buffer
446  */
447 static int
448 cg6_blank(int blank, struct fb_info *info)
449 {
450         struct cg6_par *par = (struct cg6_par *) info->par;
451         struct cg6_thc __iomem *thc = par->thc;
452         unsigned long flags;
453         u32 val;
454
455         spin_lock_irqsave(&par->lock, flags);
456
457         switch (blank) {
458         case FB_BLANK_UNBLANK: /* Unblanking */
459                 val = sbus_readl(&thc->thc_misc);
460                 val |= CG6_THC_MISC_VIDEO;
461                 sbus_writel(val, &thc->thc_misc);
462                 par->flags &= ~CG6_FLAG_BLANKED;
463                 break;
464
465         case FB_BLANK_NORMAL: /* Normal blanking */
466         case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
467         case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
468         case FB_BLANK_POWERDOWN: /* Poweroff */
469                 val = sbus_readl(&thc->thc_misc);
470                 val &= ~CG6_THC_MISC_VIDEO;
471                 sbus_writel(val, &thc->thc_misc);
472                 par->flags |= CG6_FLAG_BLANKED;
473                 break;
474         }
475
476         spin_unlock_irqrestore(&par->lock, flags);
477
478         return 0;
479 }
480
481 static struct sbus_mmap_map cg6_mmap_map[] = {
482         {
483                 .voff   = CG6_FBC,
484                 .poff   = CG6_FBC_OFFSET,
485                 .size   = PAGE_SIZE
486         },
487         {
488                 .voff   = CG6_TEC,
489                 .poff   = CG6_TEC_OFFSET,
490                 .size   = PAGE_SIZE
491         },
492         {
493                 .voff   = CG6_BTREGS,
494                 .poff   = CG6_BROOKTREE_OFFSET,
495                 .size   = PAGE_SIZE
496         },
497         {
498                 .voff   = CG6_FHC,
499                 .poff   = CG6_FHC_OFFSET,
500                 .size   = PAGE_SIZE
501         },
502         {
503                 .voff   = CG6_THC,
504                 .poff   = CG6_THC_OFFSET,
505                 .size   = PAGE_SIZE
506         },
507         {
508                 .voff   = CG6_ROM,
509                 .poff   = CG6_ROM_OFFSET,
510                 .size   = 0x10000
511         },
512         {
513                 .voff   = CG6_RAM,
514                 .poff   = CG6_RAM_OFFSET,
515                 .size   = SBUS_MMAP_FBSIZE(1)
516         },
517         {
518                 .voff   = CG6_DHC,
519                 .poff   = CG6_DHC_OFFSET,
520                 .size   = 0x40000
521         },
522         { .size = 0 }
523 };
524
525 static int cg6_mmap(struct fb_info *info, struct vm_area_struct *vma)
526 {
527         struct cg6_par *par = (struct cg6_par *)info->par;
528
529         return sbusfb_mmap_helper(cg6_mmap_map,
530                                   par->physbase, par->fbsize,
531                                   par->which_io, vma);
532 }
533
534 static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
535 {
536         struct cg6_par *par = (struct cg6_par *) info->par;
537
538         return sbusfb_ioctl_helper(cmd, arg, info,
539                                    FBTYPE_SUNFAST_COLOR, 8, par->fbsize);
540 }
541
542 /*
543  *  Initialisation
544  */
545
546 static void
547 cg6_init_fix(struct fb_info *info, int linebytes)
548 {
549         struct cg6_par *par = (struct cg6_par *)info->par;
550         const char *cg6_cpu_name, *cg6_card_name;
551         u32 conf;
552
553         conf = sbus_readl(par->fhc);
554         switch(conf & CG6_FHC_CPU_MASK) {
555         case CG6_FHC_CPU_SPARC:
556                 cg6_cpu_name = "sparc";
557                 break;
558         case CG6_FHC_CPU_68020:
559                 cg6_cpu_name = "68020";
560                 break;
561         default:
562                 cg6_cpu_name = "i386";
563                 break;
564         };
565         if (((conf >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK) >= 11) {
566                 if (par->fbsize <= 0x100000) {
567                         cg6_card_name = "TGX";
568                 } else {
569                         cg6_card_name = "TGX+";
570                 }
571         } else {
572                 if (par->fbsize <= 0x100000) {
573                         cg6_card_name = "GX";
574                 } else {
575                         cg6_card_name = "GX+";
576                 }
577         }
578
579         sprintf(info->fix.id, "%s %s", cg6_card_name, cg6_cpu_name);
580         info->fix.id[sizeof(info->fix.id)-1] = 0;
581
582         info->fix.type = FB_TYPE_PACKED_PIXELS;
583         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
584
585         info->fix.line_length = linebytes;
586
587         info->fix.accel = FB_ACCEL_SUN_CGSIX;
588 }
589
590 /* Initialize Brooktree DAC */
591 static void cg6_bt_init(struct cg6_par *par)
592 {
593         struct bt_regs __iomem *bt = par->bt;
594
595         sbus_writel(0x04 << 24, &bt->addr);         /* color planes */
596         sbus_writel(0xff << 24, &bt->control);
597         sbus_writel(0x05 << 24, &bt->addr);
598         sbus_writel(0x00 << 24, &bt->control);
599         sbus_writel(0x06 << 24, &bt->addr);         /* overlay plane */
600         sbus_writel(0x73 << 24, &bt->control);
601         sbus_writel(0x07 << 24, &bt->addr);
602         sbus_writel(0x00 << 24, &bt->control);
603 }
604
605 static void cg6_chip_init(struct fb_info *info)
606 {
607         struct cg6_par *par = (struct cg6_par *) info->par;
608         struct cg6_tec __iomem *tec = par->tec;
609         struct cg6_fbc __iomem *fbc = par->fbc;
610         u32 rev, conf, mode;
611         int i;
612         
613         /* Turn off stuff in the Transform Engine. */
614         sbus_writel(0, &tec->tec_matrix);
615         sbus_writel(0, &tec->tec_clip);
616         sbus_writel(0, &tec->tec_vdc);
617
618         /* Take care of bugs in old revisions. */
619         rev = (sbus_readl(par->fhc) >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK;
620         if (rev < 5) {
621                 conf = (sbus_readl(par->fhc) & CG6_FHC_RES_MASK) |
622                         CG6_FHC_CPU_68020 | CG6_FHC_TEST |
623                         (11 << CG6_FHC_TEST_X_SHIFT) |
624                         (11 << CG6_FHC_TEST_Y_SHIFT);
625                 if (rev < 2)
626                         conf |= CG6_FHC_DST_DISABLE;
627                 sbus_writel(conf, par->fhc);
628         }
629
630         /* Set things in the FBC. Bad things appear to happen if we do
631          * back to back store/loads on the mode register, so copy it
632          * out instead. */
633         mode = sbus_readl(&fbc->mode);
634         do {
635                 i = sbus_readl(&fbc->s);
636         } while (i & 0x10000000);
637         mode &= ~(CG6_FBC_BLIT_MASK | CG6_FBC_MODE_MASK |
638                        CG6_FBC_DRAW_MASK | CG6_FBC_BWRITE0_MASK |
639                        CG6_FBC_BWRITE1_MASK | CG6_FBC_BREAD_MASK |
640                        CG6_FBC_BDISP_MASK);
641         mode |= (CG6_FBC_BLIT_SRC | CG6_FBC_MODE_COLOR8 |
642                       CG6_FBC_DRAW_RENDER | CG6_FBC_BWRITE0_ENABLE |
643                       CG6_FBC_BWRITE1_DISABLE | CG6_FBC_BREAD_0 |
644                       CG6_FBC_BDISP_0);
645         sbus_writel(mode, &fbc->mode);
646
647         sbus_writel(0, &fbc->clip);
648         sbus_writel(0, &fbc->offx);
649         sbus_writel(0, &fbc->offy);
650         sbus_writel(0, &fbc->clipminx);
651         sbus_writel(0, &fbc->clipminy);
652         sbus_writel(info->var.xres - 1, &fbc->clipmaxx);
653         sbus_writel(info->var.yres - 1, &fbc->clipmaxy);
654 }
655
656 struct all_info {
657         struct fb_info info;
658         struct cg6_par par;
659 };
660
661 static void cg6_unmap_regs(struct all_info *all)
662 {
663         if (all->par.fbc)
664                 of_iounmap(all->par.fbc, 4096);
665         if (all->par.tec)
666                 of_iounmap(all->par.tec, sizeof(struct cg6_tec));
667         if (all->par.thc)
668                 of_iounmap(all->par.thc, sizeof(struct cg6_thc));
669         if (all->par.bt)
670                 of_iounmap(all->par.bt, sizeof(struct bt_regs));
671         if (all->par.fhc)
672                 of_iounmap(all->par.fhc, sizeof(u32));
673
674         if (all->info.screen_base)
675                 of_iounmap(all->info.screen_base, all->par.fbsize);
676 }
677
678 static int __devinit cg6_init_one(struct of_device *op)
679 {
680         struct device_node *dp = op->node;
681         struct all_info *all;
682         int linebytes, err;
683
684         all = kzalloc(sizeof(*all), GFP_KERNEL);
685         if (!all)
686                 return -ENOMEM;
687
688         spin_lock_init(&all->par.lock);
689
690         all->par.physbase = op->resource[0].start;
691         all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
692
693         sbusfb_fill_var(&all->info.var, dp->node, 8);
694         all->info.var.red.length = 8;
695         all->info.var.green.length = 8;
696         all->info.var.blue.length = 8;
697
698         linebytes = of_getintprop_default(dp, "linebytes",
699                                           all->info.var.xres);
700         all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
701         if (of_find_property(dp, "dblbuf", NULL))
702                 all->par.fbsize *= 4;
703
704         all->par.fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET,
705                                   4096, "cgsix fbc");
706         all->par.tec = of_ioremap(&op->resource[0], CG6_TEC_OFFSET,
707                                   sizeof(struct cg6_tec), "cgsix tec");
708         all->par.thc = of_ioremap(&op->resource[0], CG6_THC_OFFSET,
709                                   sizeof(struct cg6_thc), "cgsix thc");
710         all->par.bt = of_ioremap(&op->resource[0], CG6_BROOKTREE_OFFSET,
711                                  sizeof(struct bt_regs), "cgsix dac");
712         all->par.fhc = of_ioremap(&op->resource[0], CG6_FHC_OFFSET,
713                                   sizeof(u32), "cgsix fhc");
714
715         all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT |
716                           FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
717         all->info.fbops = &cg6_ops;
718
719         all->info.screen_base =  of_ioremap(&op->resource[0], CG6_RAM_OFFSET,
720                                             all->par.fbsize, "cgsix ram");
721         if (!all->par.fbc || !all->par.tec || !all->par.thc ||
722             !all->par.bt || !all->par.fhc || !all->info.screen_base) {
723                 cg6_unmap_regs(all);
724                 kfree(all);
725                 return -ENOMEM;
726         }
727
728         all->info.par = &all->par;
729
730         all->info.var.accel_flags = FB_ACCELF_TEXT;
731
732         cg6_bt_init(&all->par);
733         cg6_chip_init(&all->info);
734         cg6_blank(0, &all->info);
735
736         if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
737                 cg6_unmap_regs(all);
738                 kfree(all);
739                 return -ENOMEM;
740         }
741
742         fb_set_cmap(&all->info.cmap, &all->info);
743         cg6_init_fix(&all->info, linebytes);
744
745         err = register_framebuffer(&all->info);
746         if (err < 0) {
747                 cg6_unmap_regs(all);
748                 fb_dealloc_cmap(&all->info.cmap);
749                 kfree(all);
750                 return err;
751         }
752
753         dev_set_drvdata(&op->dev, all);
754
755         printk("%s: CGsix [%s] at %lx:%lx\n",
756                dp->full_name,
757                all->info.fix.id,
758                all->par.which_io, all->par.physbase);
759
760         return 0;
761 }
762
763 static int __devinit cg6_probe(struct of_device *dev, const struct of_device_id *match)
764 {
765         struct of_device *op = to_of_device(&dev->dev);
766
767         return cg6_init_one(op);
768 }
769
770 static int __devexit cg6_remove(struct of_device *dev)
771 {
772         struct all_info *all = dev_get_drvdata(&dev->dev);
773
774         unregister_framebuffer(&all->info);
775         fb_dealloc_cmap(&all->info.cmap);
776
777         cg6_unmap_regs(all);
778
779         kfree(all);
780
781         dev_set_drvdata(&dev->dev, NULL);
782
783         return 0;
784 }
785
786 static struct of_device_id cg6_match[] = {
787         {
788                 .name = "cgsix",
789         },
790         {
791                 .name = "cgthree+",
792         },
793         {},
794 };
795 MODULE_DEVICE_TABLE(of, cg6_match);
796
797 static struct of_platform_driver cg6_driver = {
798         .name           = "cg6",
799         .match_table    = cg6_match,
800         .probe          = cg6_probe,
801         .remove         = __devexit_p(cg6_remove),
802 };
803
804 static int __init cg6_init(void)
805 {
806         if (fb_get_options("cg6fb", NULL))
807                 return -ENODEV;
808
809         return of_register_driver(&cg6_driver, &of_bus_type);
810 }
811
812 static void __exit cg6_exit(void)
813 {
814         of_unregister_driver(&cg6_driver);
815 }
816
817 module_init(cg6_init);
818 module_exit(cg6_exit);
819
820 MODULE_DESCRIPTION("framebuffer driver for CGsix chipsets");
821 MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
822 MODULE_VERSION("2.0");
823 MODULE_LICENSE("GPL");