2 * linux/arch/mips/tx4938/common/handler.S
4 * Primary interrupt handler for tx4938 based systems
5 * Copyright (C) 2000-2001 Toshiba Corporation
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
12 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
15 #include <asm/mipsregs.h>
16 #include <asm/addrspace.h>
17 #include <asm/regdef.h>
18 #include <asm/stackframe.h>
19 #include <asm/tx4938/rbtx4938.h>
23 NESTED(tx4938_irq_handler, PT_SIZE, sp)
32 andi t1, t0, STATUSF_IP7 /* cpu timer */
35 /* IP6..IP3 multiplexed -- do not use */
37 andi t1, t0, STATUSF_IP2 /* tx4938 pic */
40 andi t1, t0, STATUSF_IP1 /* user line 1 */
43 andi t1, t0, STATUSF_IP0 /* user line 0 */
49 END(tx4938_irq_handler)
55 li a0, TX4938_IRQ_CPU_TIMER
64 beqz v0, goto_spurious_interrupt
71 goto_spurious_interrupt:
75 li a0, TX4938_IRQ_USER1
81 li a0, TX4938_IRQ_USER0