2 * VIA IDE driver for Linux. Supported southbridges:
4 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
5 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
6 * vt8235, vt8237, vt8237a
8 * Copyright (c) 2000-2002 Vojtech Pavlik
9 * Copyright (c) 2007 Bartlomiej Zolnierkiewicz
11 * Based on the work of:
17 * Obsolete device documentation publically available from via.com.tw
18 * Current device documentation available under NDA only
22 * This program is free software; you can redistribute it and/or modify it
23 * under the terms of the GNU General Public License version 2 as published by
24 * the Free Software Foundation.
27 #include <linux/module.h>
28 #include <linux/kernel.h>
29 #include <linux/pci.h>
30 #include <linux/init.h>
31 #include <linux/ide.h>
32 #include <linux/dmi.h>
34 #ifdef CONFIG_PPC_CHRP
35 #include <asm/processor.h>
38 #define DRV_NAME "via82cxxx"
40 #define VIA_IDE_ENABLE 0x40
41 #define VIA_IDE_CONFIG 0x41
42 #define VIA_FIFO_CONFIG 0x43
43 #define VIA_MISC_1 0x44
44 #define VIA_MISC_2 0x45
45 #define VIA_MISC_3 0x46
46 #define VIA_DRIVE_TIMING 0x48
47 #define VIA_8BIT_TIMING 0x4e
48 #define VIA_ADDRESS_SETUP 0x4c
49 #define VIA_UDMA_TIMING 0x50
51 #define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */
52 #define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */
53 #define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */
54 #define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */
55 #define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
56 #define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
59 * VIA SouthBridge chips.
62 static struct via_isa_bridge {
69 } via_isa_bridges[] = {
70 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
71 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
72 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
73 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
74 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
75 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
76 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
77 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
78 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
79 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
80 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
81 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
82 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
83 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
84 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
85 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
86 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
87 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
88 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
89 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
90 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
91 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
92 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
93 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
97 static unsigned int via_clock;
98 static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
102 struct via_isa_bridge *via_config;
103 unsigned int via_80w;
107 * via_set_speed - write timing registers
110 * @timing: IDE timing data to use
112 * via_set_speed writes timing values to the chipset registers
115 static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
117 struct pci_dev *dev = to_pci_dev(hwif->dev);
118 struct ide_host *host = pci_get_drvdata(dev);
119 struct via82cxxx_dev *vdev = host->host_priv;
122 if (~vdev->via_config->flags & VIA_BAD_AST) {
123 pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
124 t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
125 pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
128 pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
129 ((clamp_val(timing->act8b, 1, 16) - 1) << 4) | (clamp_val(timing->rec8b, 1, 16) - 1));
131 pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
132 ((clamp_val(timing->active, 1, 16) - 1) << 4) | (clamp_val(timing->recover, 1, 16) - 1));
134 switch (vdev->via_config->udma_mask) {
135 case ATA_UDMA2: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break;
136 case ATA_UDMA4: t = timing->udma ? (0xe8 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x0f; break;
137 case ATA_UDMA5: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
138 case ATA_UDMA6: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
142 pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
146 * via_set_drive - configure transfer mode
147 * @drive: Drive to set up
148 * @speed: desired speed
150 * via_set_drive() computes timing values configures the chipset to
151 * a desired transfer mode. It also can be called by upper layers.
154 static void via_set_drive(ide_drive_t *drive, const u8 speed)
156 ide_hwif_t *hwif = drive->hwif;
157 ide_drive_t *peer = hwif->drives + (~drive->dn & 1);
158 struct pci_dev *dev = to_pci_dev(hwif->dev);
159 struct ide_host *host = pci_get_drvdata(dev);
160 struct via82cxxx_dev *vdev = host->host_priv;
161 struct ide_timing t, p;
164 T = 1000000000 / via_clock;
166 switch (vdev->via_config->udma_mask) {
167 case ATA_UDMA2: UT = T; break;
168 case ATA_UDMA4: UT = T/2; break;
169 case ATA_UDMA5: UT = T/3; break;
170 case ATA_UDMA6: UT = T/4; break;
174 ide_timing_compute(drive, speed, &t, T, UT);
177 ide_timing_compute(peer, peer->current_speed, &p, T, UT);
178 ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
181 via_set_speed(HWIF(drive), drive->dn, &t);
185 * via_set_pio_mode - set host controller for PIO mode
187 * @pio: PIO mode number
189 * A callback from the upper layers for PIO-only tuning.
192 static void via_set_pio_mode(ide_drive_t *drive, const u8 pio)
194 via_set_drive(drive, XFER_PIO_0 + pio);
197 static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
199 struct via_isa_bridge *via_config;
201 for (via_config = via_isa_bridges; via_config->id; via_config++)
202 if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
203 !!(via_config->flags & VIA_BAD_ID),
204 via_config->id, NULL))) {
206 if ((*isa)->revision >= via_config->rev_min &&
207 (*isa)->revision <= via_config->rev_max)
216 * Check and handle 80-wire cable presence
218 static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
222 switch (vdev->via_config->udma_mask) {
224 for (i = 24; i >= 0; i -= 8)
225 if (((u >> (i & 16)) & 8) &&
227 (((u >> i) & 7) < 2)) {
232 vdev->via_80w |= (1 << (1 - (i >> 4)));
237 for (i = 24; i >= 0; i -= 8)
238 if (((u >> i) & 0x10) ||
239 (((u >> i) & 0x20) &&
240 (((u >> i) & 7) < 4))) {
241 /* BIOS 80-wire bit or
242 * UDMA w/ < 60ns/cycle
244 vdev->via_80w |= (1 << (1 - (i >> 4)));
249 for (i = 24; i >= 0; i -= 8)
250 if (((u >> i) & 0x10) ||
251 (((u >> i) & 0x20) &&
252 (((u >> i) & 7) < 6))) {
253 /* BIOS 80-wire bit or
254 * UDMA w/ < 60ns/cycle
256 vdev->via_80w |= (1 << (1 - (i >> 4)));
263 * init_chipset_via82cxxx - initialization handler
266 * The initialization callback. Here we determine the IDE chip type
267 * and initialize its drive independent registers.
270 static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev)
272 struct ide_host *host = pci_get_drvdata(dev);
273 struct via82cxxx_dev *vdev = host->host_priv;
274 struct via_isa_bridge *via_config = vdev->via_config;
279 * Detect cable and configure Clk66
281 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
283 via_cable_detect(vdev, u);
285 if (via_config->udma_mask == ATA_UDMA4) {
287 pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
288 } else if (via_config->flags & VIA_BAD_CLK66) {
289 /* Would cause trouble on 596a and 686 */
290 pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
294 * Check whether interfaces are enabled.
297 pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
300 * Set up FIFO sizes and thresholds.
303 pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
305 /* Disable PREQ# till DDACK# */
306 if (via_config->flags & VIA_BAD_PREQ) {
307 /* Would crash on 586b rev 41 */
311 /* Fix FIFO split between channels */
312 if (via_config->flags & VIA_SET_FIFO) {
315 case 2: t |= 0x00; break; /* 16 on primary */
316 case 1: t |= 0x60; break; /* 16 on secondary */
317 case 3: t |= 0x20; break; /* 8 pri 8 sec */
321 pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
327 * Cable special cases
330 static const struct dmi_system_id cable_dmi_table[] = {
332 .ident = "Acer Ferrari 3400",
334 DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
335 DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
341 static int via_cable_override(struct pci_dev *pdev)
344 if (dmi_check_system(cable_dmi_table))
347 /* Arima W730-K8/Targa Visionary 811/... */
348 if (pdev->subsystem_vendor == 0x161F &&
349 pdev->subsystem_device == 0x2032)
355 static u8 __devinit via82cxxx_cable_detect(ide_hwif_t *hwif)
357 struct pci_dev *pdev = to_pci_dev(hwif->dev);
358 struct ide_host *host = pci_get_drvdata(pdev);
359 struct via82cxxx_dev *vdev = host->host_priv;
361 if (via_cable_override(pdev))
362 return ATA_CBL_PATA40_SHORT;
364 if ((vdev->via_80w >> hwif->channel) & 1)
365 return ATA_CBL_PATA80;
367 return ATA_CBL_PATA40;
370 static const struct ide_port_ops via_port_ops = {
371 .set_pio_mode = via_set_pio_mode,
372 .set_dma_mode = via_set_drive,
373 .cable_detect = via82cxxx_cable_detect,
376 static const struct ide_port_info via82cxxx_chipset __devinitdata = {
378 .init_chipset = init_chipset_via82cxxx,
379 .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
380 .port_ops = &via_port_ops,
381 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST |
382 IDE_HFLAG_POST_SET_MODE |
384 .pio_mask = ATA_PIO5,
385 .swdma_mask = ATA_SWDMA2,
386 .mwdma_mask = ATA_MWDMA2,
389 static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
391 struct pci_dev *isa = NULL;
392 struct via_isa_bridge *via_config;
393 struct via82cxxx_dev *vdev;
395 u8 idx = id->driver_data;
396 struct ide_port_info d;
398 d = via82cxxx_chipset;
401 * Find the ISA bridge and check we know what it is.
403 via_config = via_config_find(&isa);
404 if (!via_config->id) {
405 printk(KERN_WARNING DRV_NAME " %s: unknown chipset, skipping\n",
411 * Print the boot message.
413 printk(KERN_INFO DRV_NAME " %s: VIA %s (rev %02x) IDE %sDMA%s\n",
414 pci_name(dev), via_config->name, isa->revision,
415 via_config->udma_mask ? "U" : "MW",
416 via_dma[via_config->udma_mask ?
417 (fls(via_config->udma_mask) - 1) : 0]);
422 * Determine system bus clock.
424 via_clock = (ide_pci_clk ? ide_pci_clk : 33) * 1000;
427 case 33000: via_clock = 33333; break;
428 case 37000: via_clock = 37500; break;
429 case 41000: via_clock = 41666; break;
432 if (via_clock < 20000 || via_clock > 50000) {
433 printk(KERN_WARNING DRV_NAME ": User given PCI clock speed "
434 "impossible (%d), using 33 MHz instead.\n", via_clock);
435 printk(KERN_WARNING DRV_NAME ": Use ide0=ata66 if you want "
436 "to assume 80-wire cable.\n");
441 d.host_flags |= IDE_HFLAG_NO_AUTODMA;
443 d.enablebits[1].reg = d.enablebits[0].reg = 0;
445 if ((via_config->flags & VIA_NO_UNMASK) == 0)
446 d.host_flags |= IDE_HFLAG_UNMASK_IRQS;
448 #ifdef CONFIG_PPC_CHRP
449 if (machine_is(chrp) && _chrp_type == _CHRP_Pegasos)
450 d.host_flags |= IDE_HFLAG_FORCE_LEGACY_IRQS;
453 d.udma_mask = via_config->udma_mask;
455 vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
457 printk(KERN_ERR DRV_NAME " %s: out of memory :(\n",
462 vdev->via_config = via_config;
464 rc = ide_pci_init_one(dev, &d, vdev);
471 static void __devexit via_remove(struct pci_dev *dev)
473 struct ide_host *host = pci_get_drvdata(dev);
474 struct via82cxxx_dev *vdev = host->host_priv;
480 static const struct pci_device_id via_pci_tbl[] = {
481 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C576_1), 0 },
482 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C586_1), 0 },
483 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_CX700_IDE), 0 },
484 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6410), 1 },
485 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_SATA_EIDE), 1 },
488 MODULE_DEVICE_TABLE(pci, via_pci_tbl);
490 static struct pci_driver driver = {
492 .id_table = via_pci_tbl,
493 .probe = via_init_one,
494 .remove = via_remove,
497 static int __init via_ide_init(void)
499 return ide_pci_register_driver(&driver);
502 static void __exit via_ide_exit(void)
504 pci_unregister_driver(&driver);
507 module_init(via_ide_init);
508 module_exit(via_ide_exit);
510 MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick");
511 MODULE_DESCRIPTION("PCI driver module for VIA IDE");
512 MODULE_LICENSE("GPL");