2 * platform.c: platform support for PNX833X.
4 * Copyright 2008 NXP Semiconductors
5 * Chris Steel <chris.steel@nxp.com>
6 * Daniel Laird <daniel.j.laird@nxp.com>
8 * Based on software written by:
9 * Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/device.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/platform_device.h>
28 #include <linux/kernel.h>
29 #include <linux/init.h>
30 #include <linux/resource.h>
31 #include <linux/serial.h>
32 #include <linux/serial_pnx8xxx.h>
33 #include <linux/mtd/nand.h>
34 #include <linux/mtd/partitions.h>
36 #ifdef CONFIG_I2C_PNX0105
37 /* Until i2c driver available in kernel.*/
38 #include <linux/i2c-pnx0105.h>
42 #include <irq-mapping.h>
45 static u64 uart_dmamask = DMA_32BIT_MASK;
47 static struct resource pnx833x_uart_resources[] = {
49 .start = PNX833X_UART0_PORTS_START,
50 .end = PNX833X_UART0_PORTS_END,
51 .flags = IORESOURCE_MEM,
54 .start = PNX833X_PIC_UART0_INT,
55 .end = PNX833X_PIC_UART0_INT,
56 .flags = IORESOURCE_IRQ,
59 .start = PNX833X_UART1_PORTS_START,
60 .end = PNX833X_UART1_PORTS_END,
61 .flags = IORESOURCE_MEM,
64 .start = PNX833X_PIC_UART1_INT,
65 .end = PNX833X_PIC_UART1_INT,
66 .flags = IORESOURCE_IRQ,
70 struct pnx8xxx_port pnx8xxx_ports[] = {
75 .membase = (void __iomem *)PNX833X_UART0_PORTS_START,
76 .mapbase = PNX833X_UART0_PORTS_START,
77 .irq = PNX833X_PIC_UART0_INT,
80 .flags = UPF_BOOT_AUTOCONF,
88 .membase = (void __iomem *)PNX833X_UART1_PORTS_START,
89 .mapbase = PNX833X_UART1_PORTS_START,
90 .irq = PNX833X_PIC_UART1_INT,
93 .flags = UPF_BOOT_AUTOCONF,
99 static struct platform_device pnx833x_uart_device = {
100 .name = "pnx8xxx-uart",
103 .dma_mask = &uart_dmamask,
104 .coherent_dma_mask = DMA_32BIT_MASK,
105 .platform_data = pnx8xxx_ports,
107 .num_resources = ARRAY_SIZE(pnx833x_uart_resources),
108 .resource = pnx833x_uart_resources,
111 static u64 ehci_dmamask = DMA_32BIT_MASK;
113 static struct resource pnx833x_usb_ehci_resources[] = {
115 .start = PNX833X_USB_PORTS_START,
116 .end = PNX833X_USB_PORTS_END,
117 .flags = IORESOURCE_MEM,
120 .start = PNX833X_PIC_USB_INT,
121 .end = PNX833X_PIC_USB_INT,
122 .flags = IORESOURCE_IRQ,
126 static struct platform_device pnx833x_usb_ehci_device = {
127 .name = "pnx833x-ehci",
130 .dma_mask = &ehci_dmamask,
131 .coherent_dma_mask = DMA_32BIT_MASK,
133 .num_resources = ARRAY_SIZE(pnx833x_usb_ehci_resources),
134 .resource = pnx833x_usb_ehci_resources,
137 #ifdef CONFIG_I2C_PNX0105
138 static struct resource pnx833x_i2c0_resources[] = {
140 .start = PNX833X_I2C0_PORTS_START,
141 .end = PNX833X_I2C0_PORTS_END,
142 .flags = IORESOURCE_MEM,
145 .start = PNX833X_PIC_I2C0_INT,
146 .end = PNX833X_PIC_I2C0_INT,
147 .flags = IORESOURCE_IRQ,
151 static struct resource pnx833x_i2c1_resources[] = {
153 .start = PNX833X_I2C1_PORTS_START,
154 .end = PNX833X_I2C1_PORTS_END,
155 .flags = IORESOURCE_MEM,
158 .start = PNX833X_PIC_I2C1_INT,
159 .end = PNX833X_PIC_I2C1_INT,
160 .flags = IORESOURCE_IRQ,
164 static struct i2c_pnx0105_dev pnx833x_i2c_dev[] = {
166 .base = PNX833X_I2C0_PORTS_START,
167 .irq = -1, /* should be PNX833X_PIC_I2C0_INT but polling is faster */
168 .clock = 6, /* 0 == 400 kHz, 4 == 100 kHz(Maximum HDMI), 6 = 50kHz(Prefered HDCP) */
169 .bus_addr = 0, /* no slave support */
172 .base = PNX833X_I2C1_PORTS_START,
173 .irq = -1, /* on high freq, polling is faster */
174 /*.irq = PNX833X_PIC_I2C1_INT,*/
175 .clock = 4, /* 0 == 400 kHz, 4 == 100 kHz. 100 kHz seems a safe default for now */
176 .bus_addr = 0, /* no slave support */
180 static struct platform_device pnx833x_i2c0_device = {
181 .name = "i2c-pnx0105",
184 .platform_data = &pnx833x_i2c_dev[0],
186 .num_resources = ARRAY_SIZE(pnx833x_i2c0_resources),
187 .resource = pnx833x_i2c0_resources,
190 static struct platform_device pnx833x_i2c1_device = {
191 .name = "i2c-pnx0105",
194 .platform_data = &pnx833x_i2c_dev[1],
196 .num_resources = ARRAY_SIZE(pnx833x_i2c1_resources),
197 .resource = pnx833x_i2c1_resources,
201 static u64 ethernet_dmamask = DMA_32BIT_MASK;
203 static struct resource pnx833x_ethernet_resources[] = {
205 .start = PNX8335_IP3902_PORTS_START,
206 .end = PNX8335_IP3902_PORTS_END,
207 .flags = IORESOURCE_MEM,
210 .start = PNX8335_PIC_ETHERNET_INT,
211 .end = PNX8335_PIC_ETHERNET_INT,
212 .flags = IORESOURCE_IRQ,
216 static struct platform_device pnx833x_ethernet_device = {
217 .name = "ip3902-eth",
220 .dma_mask = ðernet_dmamask,
221 .coherent_dma_mask = DMA_32BIT_MASK,
223 .num_resources = ARRAY_SIZE(pnx833x_ethernet_resources),
224 .resource = pnx833x_ethernet_resources,
227 static struct resource pnx833x_sata_resources[] = {
229 .start = PNX8335_SATA_PORTS_START,
230 .end = PNX8335_SATA_PORTS_END,
231 .flags = IORESOURCE_MEM,
234 .start = PNX8335_PIC_SATA_INT,
235 .end = PNX8335_PIC_SATA_INT,
236 .flags = IORESOURCE_IRQ,
240 static struct platform_device pnx833x_sata_device = {
241 .name = "pnx833x-sata",
243 .num_resources = ARRAY_SIZE(pnx833x_sata_resources),
244 .resource = pnx833x_sata_resources,
247 static const char *part_probes[] = {
253 pnx833x_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
255 struct nand_chip *this = mtd->priv;
256 unsigned long nandaddr = (unsigned long)this->IO_ADDR_W;
258 if (cmd == NAND_CMD_NONE)
262 writeb(cmd, (void __iomem *)(nandaddr + PNX8335_NAND_CLE_MASK));
264 writeb(cmd, (void __iomem *)(nandaddr + PNX8335_NAND_ALE_MASK));
267 static struct platform_nand_data pnx833x_flash_nand_data = {
270 .part_probe_types = part_probes,
273 .cmd_ctrl = pnx833x_flash_nand_cmd_ctrl
278 * Set start to be the correct address (PNX8335_NAND_BASE with no 0xb!!),
279 * 12 bytes more seems to be the standard that allows for NAND access.
281 static struct resource pnx833x_flash_nand_resource = {
282 .start = PNX8335_NAND_BASE,
283 .end = PNX8335_NAND_BASE + 12,
284 .flags = IORESOURCE_MEM,
287 static struct platform_device pnx833x_flash_nand = {
291 .resource = &pnx833x_flash_nand_resource,
293 .platform_data = &pnx833x_flash_nand_data,
297 static struct platform_device *pnx833x_platform_devices[] __initdata = {
298 &pnx833x_uart_device,
299 &pnx833x_usb_ehci_device,
300 #ifdef CONFIG_I2C_PNX0105
301 &pnx833x_i2c0_device,
302 &pnx833x_i2c1_device,
304 &pnx833x_ethernet_device,
305 &pnx833x_sata_device,
309 static int __init pnx833x_platform_init(void)
313 res = platform_add_devices(pnx833x_platform_devices,
314 ARRAY_SIZE(pnx833x_platform_devices));
319 arch_initcall(pnx833x_platform_init);