Merge branch 'topic/fix/hda' into for-linus
[linux-2.6] / arch / powerpc / boot / dts / mpc8536ds.dts
1 /*
2  * MPC8536 DS Device Tree Source
3  *
4  * Copyright 2008 Freescale Semiconductor, Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         model = "fsl,mpc8536ds";
16         compatible = "fsl,mpc8536ds";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         aliases {
21                 ethernet0 = &enet0;
22                 ethernet1 = &enet1;
23                 serial0 = &serial0;
24                 serial1 = &serial1;
25                 pci0 = &pci0;
26                 pci1 = &pci1;
27                 pci2 = &pci2;
28                 pci3 = &pci3;
29         };
30
31         cpus {
32                 #cpus = <1>;
33                 #address-cells = <1>;
34                 #size-cells = <0>;
35
36                 PowerPC,8536@0 {
37                         device_type = "cpu";
38                         reg = <0>;
39                         next-level-cache = <&L2>;
40                 };
41         };
42
43         memory {
44                 device_type = "memory";
45                 reg = <00000000 00000000>;      // Filled by U-Boot
46         };
47
48         soc@ffe00000 {
49                 #address-cells = <1>;
50                 #size-cells = <1>;
51                 device_type = "soc";
52                 compatible = "simple-bus";
53                 ranges = <0x0 0xffe00000 0x100000>;
54                 reg = <0xffe00000 0x1000>;
55                 bus-frequency = <0>;            // Filled out by uboot.
56
57                 memory-controller@2000 {
58                         compatible = "fsl,mpc8536-memory-controller";
59                         reg = <0x2000 0x1000>;
60                         interrupt-parent = <&mpic>;
61                         interrupts = <18 0x2>;
62                 };
63
64                 L2: l2-cache-controller@20000 {
65                         compatible = "fsl,mpc8536-l2-cache-controller";
66                         reg = <0x20000 0x1000>;
67                         interrupt-parent = <&mpic>;
68                         interrupts = <16 0x2>;
69                 };
70
71                 i2c@3000 {
72                         #address-cells = <1>;
73                         #size-cells = <0>;
74                         cell-index = <0>;
75                         compatible = "fsl-i2c";
76                         reg = <0x3000 0x100>;
77                         interrupts = <43 0x2>;
78                         interrupt-parent = <&mpic>;
79                         dfsrr;
80                 };
81
82                 i2c@3100 {
83                         #address-cells = <1>;
84                         #size-cells = <0>;
85                         cell-index = <1>;
86                         compatible = "fsl-i2c";
87                         reg = <0x3100 0x100>;
88                         interrupts = <43 0x2>;
89                         interrupt-parent = <&mpic>;
90                         dfsrr;
91                         rtc@68 {
92                                 compatible = "dallas,ds3232";
93                                 reg = <0x68>;
94                                 interrupts = <0 0x1>;
95                                 interrupt-parent = <&mpic>;
96                         };
97                 };
98
99                 dma@21300 {
100                         #address-cells = <1>;
101                         #size-cells = <1>;
102                         compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
103                         reg = <0x21300 4>;
104                         ranges = <0 0x21100 0x200>;
105                         cell-index = <0>;
106                         dma-channel@0 {
107                                 compatible = "fsl,mpc8536-dma-channel",
108                                              "fsl,eloplus-dma-channel";
109                                 reg = <0x0 0x80>;
110                                 cell-index = <0>;
111                                 interrupt-parent = <&mpic>;
112                                 interrupts = <20 2>;
113                         };
114                         dma-channel@80 {
115                                 compatible = "fsl,mpc8536-dma-channel",
116                                              "fsl,eloplus-dma-channel";
117                                 reg = <0x80 0x80>;
118                                 cell-index = <1>;
119                                 interrupt-parent = <&mpic>;
120                                 interrupts = <21 2>;
121                         };
122                         dma-channel@100 {
123                                 compatible = "fsl,mpc8536-dma-channel",
124                                              "fsl,eloplus-dma-channel";
125                                 reg = <0x100 0x80>;
126                                 cell-index = <2>;
127                                 interrupt-parent = <&mpic>;
128                                 interrupts = <22 2>;
129                         };
130                         dma-channel@180 {
131                                 compatible = "fsl,mpc8536-dma-channel",
132                                              "fsl,eloplus-dma-channel";
133                                 reg = <0x180 0x80>;
134                                 cell-index = <3>;
135                                 interrupt-parent = <&mpic>;
136                                 interrupts = <23 2>;
137                         };
138                 };
139
140                 mdio@24520 {
141                         #address-cells = <1>;
142                         #size-cells = <0>;
143                         compatible = "fsl,gianfar-mdio";
144                         reg = <0x24520 0x20>;
145
146                         phy0: ethernet-phy@0 {
147                                 interrupt-parent = <&mpic>;
148                                 interrupts = <10 0x1>;
149                                 reg = <0>;
150                                 device_type = "ethernet-phy";
151                         };
152                         phy1: ethernet-phy@1 {
153                                 interrupt-parent = <&mpic>;
154                                 interrupts = <10 0x1>;
155                                 reg = <1>;
156                                 device_type = "ethernet-phy";
157                         };
158                 };
159
160                 usb@22000 {
161                         compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
162                         reg = <0x22000 0x1000>;
163                         #address-cells = <1>;
164                         #size-cells = <0>;
165                         interrupt-parent = <&mpic>;
166                         interrupts = <28 0x2>;
167                         phy_type = "ulpi";
168                 };
169
170                 usb@23000 {
171                         compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
172                         reg = <0x23000 0x1000>;
173                         #address-cells = <1>;
174                         #size-cells = <0>;
175                         interrupt-parent = <&mpic>;
176                         interrupts = <46 0x2>;
177                         phy_type = "ulpi";
178                 };
179
180                 enet0: ethernet@24000 {
181                         cell-index = <0>;
182                         device_type = "network";
183                         model = "eTSEC";
184                         compatible = "gianfar";
185                         reg = <0x24000 0x1000>;
186                         local-mac-address = [ 00 00 00 00 00 00 ];
187                         interrupts = <29 2 30 2 34 2>;
188                         interrupt-parent = <&mpic>;
189                         phy-handle = <&phy1>;
190                         phy-connection-type = "rgmii-id";
191                 };
192
193                 enet1: ethernet@26000 {
194                         cell-index = <1>;
195                         device_type = "network";
196                         model = "eTSEC";
197                         compatible = "gianfar";
198                         reg = <0x26000 0x1000>;
199                         local-mac-address = [ 00 00 00 00 00 00 ];
200                         interrupts = <31 2 32 2 33 2>;
201                         interrupt-parent = <&mpic>;
202                         phy-handle = <&phy0>;
203                         phy-connection-type = "rgmii-id";
204                 };
205
206                 usb@2b000 {
207                         compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
208                         reg = <0x2b000 0x1000>;
209                         #address-cells = <1>;
210                         #size-cells = <0>;
211                         interrupt-parent = <&mpic>;
212                         interrupts = <60 0x2>;
213                         dr_mode = "peripheral";
214                         phy_type = "ulpi";
215                 };
216
217                 serial0: serial@4500 {
218                         cell-index = <0>;
219                         device_type = "serial";
220                         compatible = "ns16550";
221                         reg = <0x4500 0x100>;
222                         clock-frequency = <0>;
223                         interrupts = <42 0x2>;
224                         interrupt-parent = <&mpic>;
225                 };
226
227                 serial1: serial@4600 {
228                         cell-index = <1>;
229                         device_type = "serial";
230                         compatible = "ns16550";
231                         reg = <0x4600 0x100>;
232                         clock-frequency = <0>;
233                         interrupts = <42 0x2>;
234                         interrupt-parent = <&mpic>;
235                 };
236
237                 crypto@30000 {
238                         compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
239                                      "fsl,sec2.1", "fsl,sec2.0";
240                         reg = <0x30000 0x10000>;
241                         interrupts = <45 2 58 2>;
242                         interrupt-parent = <&mpic>;
243                         fsl,num-channels = <4>;
244                         fsl,channel-fifo-len = <24>;
245                         fsl,exec-units-mask = <0x9fe>;
246                         fsl,descriptor-types-mask = <0x3ab0ebf>;
247                 };
248
249                 sata@18000 {
250                         compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
251                         reg = <0x18000 0x1000>;
252                         cell-index = <1>;
253                         interrupts = <74 0x2>;
254                         interrupt-parent = <&mpic>;
255                 };
256
257                 sata@19000 {
258                         compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
259                         reg = <0x19000 0x1000>;
260                         cell-index = <2>;
261                         interrupts = <41 0x2>;
262                         interrupt-parent = <&mpic>;
263                 };
264
265                 global-utilities@e0000 {        //global utilities block
266                         compatible = "fsl,mpc8548-guts";
267                         reg = <0xe0000 0x1000>;
268                         fsl,has-rstcr;
269                 };
270
271                 mpic: pic@40000 {
272                         clock-frequency = <0>;
273                         interrupt-controller;
274                         #address-cells = <0>;
275                         #interrupt-cells = <2>;
276                         reg = <0x40000 0x40000>;
277                         compatible = "chrp,open-pic";
278                         device_type = "open-pic";
279                         big-endian;
280                 };
281
282                 msi@41600 {
283                         compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
284                         reg = <0x41600 0x80>;
285                         msi-available-ranges = <0 0x100>;
286                         interrupts = <
287                                 0xe0 0
288                                 0xe1 0
289                                 0xe2 0
290                                 0xe3 0
291                                 0xe4 0
292                                 0xe5 0
293                                 0xe6 0
294                                 0xe7 0>;
295                         interrupt-parent = <&mpic>;
296                 };
297         };
298
299         pci0: pci@ffe08000 {
300                 cell-index = <0>;
301                 compatible = "fsl,mpc8540-pci";
302                 device_type = "pci";
303                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
304                 interrupt-map = <
305
306                         /* IDSEL 0x11 J17 Slot 1 */
307                         0x8800 0 0 1 &mpic 1 1
308                         0x8800 0 0 2 &mpic 2 1
309                         0x8800 0 0 3 &mpic 3 1
310                         0x8800 0 0 4 &mpic 4 1>;
311
312                 interrupt-parent = <&mpic>;
313                 interrupts = <24 0x2>;
314                 bus-range = <0 0xff>;
315                 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000
316                           0x01000000 0 0x00000000 0xffc00000 0 0x00010000>;
317                 clock-frequency = <66666666>;
318                 #interrupt-cells = <1>;
319                 #size-cells = <2>;
320                 #address-cells = <3>;
321                 reg = <0xffe08000 0x1000>;
322         };
323
324         pci1: pcie@ffe09000 {
325                 cell-index = <1>;
326                 compatible = "fsl,mpc8548-pcie";
327                 device_type = "pci";
328                 #interrupt-cells = <1>;
329                 #size-cells = <2>;
330                 #address-cells = <3>;
331                 reg = <0xffe09000 0x1000>;
332                 bus-range = <0 0xff>;
333                 ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000
334                           0x01000000 0 0x00000000 0xffc20000 0 0x00010000>;
335                 clock-frequency = <33333333>;
336                 interrupt-parent = <&mpic>;
337                 interrupts = <25 0x2>;
338                 interrupt-map-mask = <0xf800 0 0 7>;
339                 interrupt-map = <
340                         /* IDSEL 0x0 */
341                         0000 0 0 1 &mpic 4 1
342                         0000 0 0 2 &mpic 5 1
343                         0000 0 0 3 &mpic 6 1
344                         0000 0 0 4 &mpic 7 1
345                         >;
346                 pcie@0 {
347                         reg = <0 0 0 0 0>;
348                         #size-cells = <2>;
349                         #address-cells = <3>;
350                         device_type = "pci";
351                         ranges = <0x02000000 0 0x98000000
352                                   0x02000000 0 0x98000000
353                                   0 0x08000000
354
355                                   0x01000000 0 0x00000000
356                                   0x01000000 0 0x00000000
357                                   0 0x00010000>;
358                 };
359         };
360
361         pci2: pcie@ffe0a000 {
362                 cell-index = <2>;
363                 compatible = "fsl,mpc8548-pcie";
364                 device_type = "pci";
365                 #interrupt-cells = <1>;
366                 #size-cells = <2>;
367                 #address-cells = <3>;
368                 reg = <0xffe0a000 0x1000>;
369                 bus-range = <0 0xff>;
370                 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000
371                           0x01000000 0 0x00000000 0xffc10000 0 0x00010000>;
372                 clock-frequency = <33333333>;
373                 interrupt-parent = <&mpic>;
374                 interrupts = <26 0x2>;
375                 interrupt-map-mask = <0xf800 0 0 7>;
376                 interrupt-map = <
377                         /* IDSEL 0x0 */
378                         0000 0 0 1 &mpic 0 1
379                         0000 0 0 2 &mpic 1 1
380                         0000 0 0 3 &mpic 2 1
381                         0000 0 0 4 &mpic 3 1
382                         >;
383                 pcie@0 {
384                         reg = <0 0 0 0 0>;
385                         #size-cells = <2>;
386                         #address-cells = <3>;
387                         device_type = "pci";
388                         ranges = <0x02000000 0 0x90000000
389                                   0x02000000 0 0x90000000
390                                   0 0x08000000
391
392                                   0x01000000 0 0x00000000
393                                   0x01000000 0 0x00000000
394                                   0 0x00010000>;
395                 };
396         };
397
398         pci3: pcie@ffe0b000 {
399                 cell-index = <3>;
400                 compatible = "fsl,mpc8548-pcie";
401                 device_type = "pci";
402                 #interrupt-cells = <1>;
403                 #size-cells = <2>;
404                 #address-cells = <3>;
405                 reg = <0xffe0b000 0x1000>;
406                 bus-range = <0 0xff>;
407                 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
408                           0x01000000 0 0x00000000 0xffc30000 0 0x00010000>;
409                 clock-frequency = <33333333>;
410                 interrupt-parent = <&mpic>;
411                 interrupts = <27 0x2>;
412                 interrupt-map-mask = <0xf800 0 0 7>;
413                 interrupt-map = <
414                         /* IDSEL 0x0 */
415                         0000 0 0 1 &mpic 8 1
416                         0000 0 0 2 &mpic 9 1
417                         0000 0 0 3 &mpic 10 1
418                         0000 0 0 4 &mpic 11 1
419                         >;
420
421                 pcie@0 {
422                         reg = <0 0 0 0 0>;
423                         #size-cells = <2>;
424                         #address-cells = <3>;
425                         device_type = "pci";
426                         ranges = <0x02000000 0 0xa0000000
427                                   0x02000000 0 0xa0000000
428                                   0 0x20000000
429
430                                   0x01000000 0 0x00000000
431                                   0x01000000 0 0x00000000
432                                   0 0x00100000>;
433                 };
434         };
435 };