git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/p54/p54pci.c

   1
   2 /*
   3  * Linux device driver for PCI based Prism54
   4  *
   5  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
   6  *
   7  * Based on the islsm (softmac prism54) driver, which is:
   8  * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/init.h>
  16 #include <linux/pci.h>
  17 #include <linux/firmware.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/delay.h>
  20 #include <linux/completion.h>
  21 #include <net/mac80211.h>
  22
  23 #include "p54.h"
  24 #include "p54pci.h"
  25
  26 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  27 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
  28 MODULE_LICENSE("GPL");
  29 MODULE_ALIAS("prism54pci");
  30
  31 static struct pci_device_id p54p_table[] __devinitdata = {
  32         /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
  33         { PCI_DEVICE(0x1260, 0x3890) },
  34         /* 3COM 3CRWE154G72 Wireless LAN adapter */
  35         { PCI_DEVICE(0x10b7, 0x6001) },
  36         /* Intersil PRISM Indigo Wireless LAN adapter */
  37         { PCI_DEVICE(0x1260, 0x3877) },
  38         /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
  39         { PCI_DEVICE(0x1260, 0x3886) },
  40         { },
  41 };
  42
  43 MODULE_DEVICE_TABLE(pci, p54p_table);
  44
  45 static int p54p_upload_firmware(struct ieee80211_hw *dev)
  46 {
  47         struct p54p_priv *priv = dev->priv;
  48         const struct firmware *fw_entry = NULL;
  49         __le32 reg;
  50         int err;
  51         __le32 *data;
  52         u32 remains, left, device_addr;
  53
  54         P54P_WRITE(int_enable, cpu_to_le32(0));
  55         P54P_READ(int_enable);
  56         udelay(10);
  57
  58         reg = P54P_READ(ctrl_stat);
  59         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  60         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
  61         P54P_WRITE(ctrl_stat, reg);
  62         P54P_READ(ctrl_stat);
  63         udelay(10);
  64
  65         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
  66         P54P_WRITE(ctrl_stat, reg);
  67         wmb();
  68         udelay(10);
  69
  70         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  71         P54P_WRITE(ctrl_stat, reg);
  72         wmb();
  73
  74         mdelay(50);
  75
  76         err = request_firmware(&fw_entry, "isl3886", &priv->pdev->dev);
  77         if (err) {
  78                 printk(KERN_ERR "%s (prism54pci): cannot find firmware "
  79                        "(isl3886)\n", pci_name(priv->pdev));
  80                 return err;
  81         }
  82
  83         p54_parse_firmware(dev, fw_entry);
  84
  85         data = (__le32 *) fw_entry->data;
  86         remains = fw_entry->size;
  87         device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
  88         while (remains) {
  89                 u32 i = 0;
  90                 left = min((u32)0x1000, remains);
  91                 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
  92                 P54P_READ(int_enable);
  93
  94                 device_addr += 0x1000;
  95                 while (i < left) {
  96                         P54P_WRITE(direct_mem_win[i], *data++);
  97                         i += sizeof(u32);
  98                 }
  99
 100                 remains -= left;
 101                 P54P_READ(int_enable);
 102         }
 103
 104         release_firmware(fw_entry);
 105
 106         reg = P54P_READ(ctrl_stat);
 107         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
 108         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 109         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
 110         P54P_WRITE(ctrl_stat, reg);
 111         P54P_READ(ctrl_stat);
 112         udelay(10);
 113
 114         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
 115         P54P_WRITE(ctrl_stat, reg);
 116         wmb();
 117         udelay(10);
 118
 119         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 120         P54P_WRITE(ctrl_stat, reg);
 121         wmb();
 122         udelay(10);
 123
 124         return 0;
 125 }
 126
 127 static irqreturn_t p54p_simple_interrupt(int irq, void *dev_id)
 128 {
 129         struct p54p_priv *priv = (struct p54p_priv *) dev_id;
 130         __le32 reg;
 131
 132         reg = P54P_READ(int_ident);
 133         P54P_WRITE(int_ack, reg);
 134
 135         if (reg & P54P_READ(int_enable))
 136                 complete(&priv->boot_comp);
 137
 138         return IRQ_HANDLED;
 139 }
 140
 141 static int p54p_read_eeprom(struct ieee80211_hw *dev)
 142 {
 143         struct p54p_priv *priv = dev->priv;
 144         struct p54p_ring_control *ring_control = priv->ring_control;
 145         int err;
 146         struct p54_control_hdr *hdr;
 147         void *eeprom;
 148         dma_addr_t rx_mapping, tx_mapping;
 149         u16 alen;
 150
 151         init_completion(&priv->boot_comp);
 152         err = request_irq(priv->pdev->irq, &p54p_simple_interrupt,
 153                           IRQF_SHARED, "prism54pci", priv);
 154         if (err) {
 155                 printk(KERN_ERR "%s (prism54pci): failed to register IRQ handler\n",
 156                        pci_name(priv->pdev));
 157                 return err;
 158         }
 159
 160         eeprom = kmalloc(0x2010 + EEPROM_READBACK_LEN, GFP_KERNEL);
 161         if (!eeprom) {
 162                 printk(KERN_ERR "%s (prism54pci): no memory for eeprom!\n",
 163                        pci_name(priv->pdev));
 164                 err = -ENOMEM;
 165                 goto out;
 166         }
 167
 168         memset(ring_control, 0, sizeof(*ring_control));
 169         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
 170         P54P_READ(ring_control_base);
 171         udelay(10);
 172
 173         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
 174         P54P_READ(int_enable);
 175         udelay(10);
 176
 177         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 178
 179         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
 180                 printk(KERN_ERR "%s (prism54pci): Cannot boot firmware!\n",
 181                        pci_name(priv->pdev));
 182                 err = -EINVAL;
 183                 goto out;
 184         }
 185
 186         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
 187         P54P_READ(int_enable);
 188
 189         hdr = eeprom + 0x2010;
 190         p54_fill_eeprom_readback(hdr);
 191         hdr->req_id = cpu_to_le32(priv->common.rx_start);
 192
 193         rx_mapping = pci_map_single(priv->pdev, eeprom,
 194                                     0x2010, PCI_DMA_FROMDEVICE);
 195         tx_mapping = pci_map_single(priv->pdev, (void *)hdr,
 196                                     EEPROM_READBACK_LEN, PCI_DMA_TODEVICE);
 197
 198         ring_control->rx_mgmt[0].host_addr = cpu_to_le32(rx_mapping);
 199         ring_control->rx_mgmt[0].len = cpu_to_le16(0x2010);
 200         ring_control->tx_data[0].host_addr = cpu_to_le32(tx_mapping);
 201         ring_control->tx_data[0].device_addr = hdr->req_id;
 202         ring_control->tx_data[0].len = cpu_to_le16(EEPROM_READBACK_LEN);
 203
 204         ring_control->host_idx[2] = cpu_to_le32(1);
 205         ring_control->host_idx[1] = cpu_to_le32(1);
 206
 207         wmb();
 208         mdelay(100);
 209         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 210
 211         wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ);
 212         wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ);
 213
 214         pci_unmap_single(priv->pdev, tx_mapping,
 215                          EEPROM_READBACK_LEN, PCI_DMA_TODEVICE);
 216         pci_unmap_single(priv->pdev, rx_mapping,
 217                          0x2010, PCI_DMA_FROMDEVICE);
 218
 219         alen = le16_to_cpu(ring_control->rx_mgmt[0].len);
 220         if (le32_to_cpu(ring_control->device_idx[2]) != 1 ||
 221             alen < 0x10) {
 222                 printk(KERN_ERR "%s (prism54pci): Cannot read eeprom!\n",
 223                        pci_name(priv->pdev));
 224                 err = -EINVAL;
 225                 goto out;
 226         }
 227
 228         p54_parse_eeprom(dev, (u8 *)eeprom + 0x10, alen - 0x10);
 229
 230  out:
 231         kfree(eeprom);
 232         P54P_WRITE(int_enable, cpu_to_le32(0));
 233         P54P_READ(int_enable);
 234         udelay(10);
 235         free_irq(priv->pdev->irq, priv);
 236         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 237         return err;
 238 }
 239
 240 static void p54p_refill_rx_ring(struct ieee80211_hw *dev)
 241 {
 242         struct p54p_priv *priv = dev->priv;
 243         struct p54p_ring_control *ring_control = priv->ring_control;
 244         u32 limit, host_idx, idx;
 245
 246         host_idx = le32_to_cpu(ring_control->host_idx[0]);
 247         limit = host_idx;
 248         limit -= le32_to_cpu(ring_control->device_idx[0]);
 249         limit = ARRAY_SIZE(ring_control->rx_data) - limit;
 250
 251         idx = host_idx % ARRAY_SIZE(ring_control->rx_data);
 252         while (limit-- > 1) {
 253                 struct p54p_desc *desc = &ring_control->rx_data[idx];
 254
 255                 if (!desc->host_addr) {
 256                         struct sk_buff *skb;
 257                         dma_addr_t mapping;
 258                         skb = dev_alloc_skb(MAX_RX_SIZE);
 259                         if (!skb)
 260                                 break;
 261
 262                         mapping = pci_map_single(priv->pdev,
 263                                                  skb_tail_pointer(skb),
 264                                                  MAX_RX_SIZE,
 265                                                  PCI_DMA_FROMDEVICE);
 266                         desc->host_addr = cpu_to_le32(mapping);
 267                         desc->device_addr = 0;  // FIXME: necessary?
 268                         desc->len = cpu_to_le16(MAX_RX_SIZE);
 269                         desc->flags = 0;
 270                         priv->rx_buf[idx] = skb;
 271                 }
 272
 273                 idx++;
 274                 host_idx++;
 275                 idx %= ARRAY_SIZE(ring_control->rx_data);
 276         }
 277
 278         wmb();
 279         ring_control->host_idx[0] = cpu_to_le32(host_idx);
 280 }
 281
 282 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
 283 {
 284         struct ieee80211_hw *dev = dev_id;
 285         struct p54p_priv *priv = dev->priv;
 286         struct p54p_ring_control *ring_control = priv->ring_control;
 287         __le32 reg;
 288
 289         spin_lock(&priv->lock);
 290         reg = P54P_READ(int_ident);
 291         if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
 292                 spin_unlock(&priv->lock);
 293                 return IRQ_HANDLED;
 294         }
 295
 296         P54P_WRITE(int_ack, reg);
 297
 298         reg &= P54P_READ(int_enable);
 299
 300         if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) {
 301                 struct p54p_desc *desc;
 302                 u32 idx, i;
 303                 i = priv->tx_idx;
 304                 i %= ARRAY_SIZE(ring_control->tx_data);
 305                 priv->tx_idx = idx = le32_to_cpu(ring_control->device_idx[1]);
 306                 idx %= ARRAY_SIZE(ring_control->tx_data);
 307
 308                 while (i != idx) {
 309                         desc = &ring_control->tx_data[i];
 310                         if (priv->tx_buf[i]) {
 311                                 kfree(priv->tx_buf[i]);
 312                                 priv->tx_buf[i] = NULL;
 313                         }
 314
 315                         pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 316                                          le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
 317
 318                         desc->host_addr = 0;
 319                         desc->device_addr = 0;
 320                         desc->len = 0;
 321                         desc->flags = 0;
 322
 323                         i++;
 324                         i %= ARRAY_SIZE(ring_control->tx_data);
 325                 }
 326
 327                 i = priv->rx_idx;
 328                 i %= ARRAY_SIZE(ring_control->rx_data);
 329                 priv->rx_idx = idx = le32_to_cpu(ring_control->device_idx[0]);
 330                 idx %= ARRAY_SIZE(ring_control->rx_data);
 331                 while (i != idx) {
 332                         u16 len;
 333                         struct sk_buff *skb;
 334                         desc = &ring_control->rx_data[i];
 335                         len = le16_to_cpu(desc->len);
 336                         skb = priv->rx_buf[i];
 337
 338                         skb_put(skb, len);
 339
 340                         if (p54_rx(dev, skb)) {
 341                                 pci_unmap_single(priv->pdev,
 342                                                  le32_to_cpu(desc->host_addr),
 343                                                  MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 344
 345                                 priv->rx_buf[i] = NULL;
 346                                 desc->host_addr = 0;
 347                         } else {
 348                                 skb_trim(skb, 0);
 349                                 desc->len = cpu_to_le16(MAX_RX_SIZE);
 350                         }
 351
 352                         i++;
 353                         i %= ARRAY_SIZE(ring_control->rx_data);
 354                 }
 355
 356                 p54p_refill_rx_ring(dev);
 357
 358                 wmb();
 359                 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 360         } else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
 361                 complete(&priv->boot_comp);
 362
 363         spin_unlock(&priv->lock);
 364
 365         return reg ? IRQ_HANDLED : IRQ_NONE;
 366 }
 367
 368 static void p54p_tx(struct ieee80211_hw *dev, struct p54_control_hdr *data,
 369                     size_t len, int free_on_tx)
 370 {
 371         struct p54p_priv *priv = dev->priv;
 372         struct p54p_ring_control *ring_control = priv->ring_control;
 373         unsigned long flags;
 374         struct p54p_desc *desc;
 375         dma_addr_t mapping;
 376         u32 device_idx, idx, i;
 377
 378         spin_lock_irqsave(&priv->lock, flags);
 379
 380         device_idx = le32_to_cpu(ring_control->device_idx[1]);
 381         idx = le32_to_cpu(ring_control->host_idx[1]);
 382         i = idx % ARRAY_SIZE(ring_control->tx_data);
 383
 384         mapping = pci_map_single(priv->pdev, data, len, PCI_DMA_TODEVICE);
 385         desc = &ring_control->tx_data[i];
 386         desc->host_addr = cpu_to_le32(mapping);
 387         desc->device_addr = data->req_id;
 388         desc->len = cpu_to_le16(len);
 389         desc->flags = 0;
 390
 391         wmb();
 392         ring_control->host_idx[1] = cpu_to_le32(idx + 1);
 393
 394         if (free_on_tx)
 395                 priv->tx_buf[i] = data;
 396
 397         spin_unlock_irqrestore(&priv->lock, flags);
 398
 399         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 400         P54P_READ(dev_int);
 401
 402         /* FIXME: unlikely to happen because the device usually runs out of
 403            memory before we fill the ring up, but we can make it impossible */
 404         if (idx - device_idx > ARRAY_SIZE(ring_control->tx_data) - 2)
 405                 printk(KERN_INFO "%s: tx overflow.\n", wiphy_name(dev->wiphy));
 406 }
 407
 408 static int p54p_open(struct ieee80211_hw *dev)
 409 {
 410         struct p54p_priv *priv = dev->priv;
 411         int err;
 412
 413         init_completion(&priv->boot_comp);
 414         err = request_irq(priv->pdev->irq, &p54p_interrupt,
 415                           IRQF_SHARED, "prism54pci", dev);
 416         if (err) {
 417                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 418                        wiphy_name(dev->wiphy));
 419                 return err;
 420         }
 421
 422         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 423         priv->rx_idx = priv->tx_idx = 0;
 424         p54p_refill_rx_ring(dev);
 425
 426         p54p_upload_firmware(dev);
 427
 428         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
 429         P54P_READ(ring_control_base);
 430         wmb();
 431         udelay(10);
 432
 433         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
 434         P54P_READ(int_enable);
 435         wmb();
 436         udelay(10);
 437
 438         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 439         P54P_READ(dev_int);
 440
 441         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
 442                 printk(KERN_ERR "%s: Cannot boot firmware!\n",
 443                        wiphy_name(dev->wiphy));
 444                 free_irq(priv->pdev->irq, dev);
 445                 return -ETIMEDOUT;
 446         }
 447
 448         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
 449         P54P_READ(int_enable);
 450         wmb();
 451         udelay(10);
 452
 453         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 454         P54P_READ(dev_int);
 455         wmb();
 456         udelay(10);
 457
 458         return 0;
 459 }
 460
 461 static void p54p_stop(struct ieee80211_hw *dev)
 462 {
 463         struct p54p_priv *priv = dev->priv;
 464         struct p54p_ring_control *ring_control = priv->ring_control;
 465         unsigned int i;
 466         struct p54p_desc *desc;
 467
 468         P54P_WRITE(int_enable, cpu_to_le32(0));
 469         P54P_READ(int_enable);
 470         udelay(10);
 471
 472         free_irq(priv->pdev->irq, dev);
 473
 474         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 475
 476         for (i = 0; i < ARRAY_SIZE(priv->rx_buf); i++) {
 477                 desc = &ring_control->rx_data[i];
 478                 if (desc->host_addr)
 479                         pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 480                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 481                 kfree_skb(priv->rx_buf[i]);
 482                 priv->rx_buf[i] = NULL;
 483         }
 484
 485         for (i = 0; i < ARRAY_SIZE(priv->tx_buf); i++) {
 486                 desc = &ring_control->tx_data[i];
 487                 if (desc->host_addr)
 488                         pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 489                                          le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
 490
 491                 kfree(priv->tx_buf[i]);
 492                 priv->tx_buf[i] = NULL;
 493         }
 494
 495         memset(ring_control, 0, sizeof(ring_control));
 496 }
 497
 498 static int __devinit p54p_probe(struct pci_dev *pdev,
 499                                 const struct pci_device_id *id)
 500 {
 501         struct p54p_priv *priv;
 502         struct ieee80211_hw *dev;
 503         unsigned long mem_addr, mem_len;
 504         int err;
 505         DECLARE_MAC_BUF(mac);
 506
 507         err = pci_enable_device(pdev);
 508         if (err) {
 509                 printk(KERN_ERR "%s (prism54pci): Cannot enable new PCI device\n",
 510                        pci_name(pdev));
 511                 return err;
 512         }
 513
 514         mem_addr = pci_resource_start(pdev, 0);
 515         mem_len = pci_resource_len(pdev, 0);
 516         if (mem_len < sizeof(struct p54p_csr)) {
 517                 printk(KERN_ERR "%s (prism54pci): Too short PCI resources\n",
 518                        pci_name(pdev));
 519                 pci_disable_device(pdev);
 520                 return err;
 521         }
 522
 523         err = pci_request_regions(pdev, "prism54pci");
 524         if (err) {
 525                 printk(KERN_ERR "%s (prism54pci): Cannot obtain PCI resources\n",
 526                        pci_name(pdev));
 527                 return err;
 528         }
 529
 530         if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) ||
 531             pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
 532                 printk(KERN_ERR "%s (prism54pci): No suitable DMA available\n",
 533                        pci_name(pdev));
 534                 goto err_free_reg;
 535         }
 536
 537         pci_set_master(pdev);
 538         pci_try_set_mwi(pdev);
 539
 540         pci_write_config_byte(pdev, 0x40, 0);
 541         pci_write_config_byte(pdev, 0x41, 0);
 542
 543         dev = p54_init_common(sizeof(*priv));
 544         if (!dev) {
 545                 printk(KERN_ERR "%s (prism54pci): ieee80211 alloc failed\n",
 546                        pci_name(pdev));
 547                 err = -ENOMEM;
 548                 goto err_free_reg;
 549         }
 550
 551         priv = dev->priv;
 552         priv->pdev = pdev;
 553
 554         SET_IEEE80211_DEV(dev, &pdev->dev);
 555         pci_set_drvdata(pdev, dev);
 556
 557         priv->map = ioremap(mem_addr, mem_len);
 558         if (!priv->map) {
 559                 printk(KERN_ERR "%s (prism54pci): Cannot map device memory\n",
 560                        pci_name(pdev));
 561                 err = -EINVAL;  // TODO: use a better error code?
 562                 goto err_free_dev;
 563         }
 564
 565         priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
 566                                                   &priv->ring_control_dma);
 567         if (!priv->ring_control) {
 568                 printk(KERN_ERR "%s (prism54pci): Cannot allocate rings\n",
 569                        pci_name(pdev));
 570                 err = -ENOMEM;
 571                 goto err_iounmap;
 572         }
 573         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 574
 575         err = p54p_upload_firmware(dev);
 576         if (err)
 577                 goto err_free_desc;
 578
 579         err = p54p_read_eeprom(dev);
 580         if (err)
 581                 goto err_free_desc;
 582
 583         priv->common.open = p54p_open;
 584         priv->common.stop = p54p_stop;
 585         priv->common.tx = p54p_tx;
 586
 587         spin_lock_init(&priv->lock);
 588
 589         err = ieee80211_register_hw(dev);
 590         if (err) {
 591                 printk(KERN_ERR "%s (prism54pci): Cannot register netdevice\n",
 592                        pci_name(pdev));
 593                 goto err_free_common;
 594         }
 595
 596         printk(KERN_INFO "%s: hwaddr %s, isl38%02x\n",
 597                wiphy_name(dev->wiphy),
 598                print_mac(mac, dev->wiphy->perm_addr),
 599                priv->common.version);
 600
 601         return 0;
 602
 603  err_free_common:
 604         p54_free_common(dev);
 605
 606  err_free_desc:
 607         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 608                             priv->ring_control, priv->ring_control_dma);
 609
 610  err_iounmap:
 611         iounmap(priv->map);
 612
 613  err_free_dev:
 614         pci_set_drvdata(pdev, NULL);
 615         ieee80211_free_hw(dev);
 616
 617  err_free_reg:
 618         pci_release_regions(pdev);
 619         pci_disable_device(pdev);
 620         return err;
 621 }
 622
 623 static void __devexit p54p_remove(struct pci_dev *pdev)
 624 {
 625         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 626         struct p54p_priv *priv;
 627
 628         if (!dev)
 629                 return;
 630
 631         ieee80211_unregister_hw(dev);
 632         priv = dev->priv;
 633         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 634                             priv->ring_control, priv->ring_control_dma);
 635         p54_free_common(dev);
 636         iounmap(priv->map);
 637         pci_release_regions(pdev);
 638         pci_disable_device(pdev);
 639         ieee80211_free_hw(dev);
 640 }
 641
 642 #ifdef CONFIG_PM
 643 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
 644 {
 645         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 646         struct p54p_priv *priv = dev->priv;
 647
 648         if (priv->common.mode != IEEE80211_IF_TYPE_INVALID) {
 649                 ieee80211_stop_queues(dev);
 650                 p54p_stop(dev);
 651         }
 652
 653         pci_save_state(pdev);
 654         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 655         return 0;
 656 }
 657
 658 static int p54p_resume(struct pci_dev *pdev)
 659 {
 660         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 661         struct p54p_priv *priv = dev->priv;
 662
 663         pci_set_power_state(pdev, PCI_D0);
 664         pci_restore_state(pdev);
 665
 666         if (priv->common.mode != IEEE80211_IF_TYPE_INVALID) {
 667                 p54p_open(dev);
 668                 ieee80211_wake_queues(dev);
 669         }
 670
 671         return 0;
 672 }
 673 #endif /* CONFIG_PM */
 674
 675 static struct pci_driver p54p_driver = {
 676         .name           = "prism54pci",
 677         .id_table       = p54p_table,
 678         .probe          = p54p_probe,
 679         .remove         = __devexit_p(p54p_remove),
 680 #ifdef CONFIG_PM
 681         .suspend        = p54p_suspend,
 682         .resume         = p54p_resume,
 683 #endif /* CONFIG_PM */
 684 };
 685
 686 static int __init p54p_init(void)
 687 {
 688         return pci_register_driver(&p54p_driver);
 689 }
 690
 691 static void __exit p54p_exit(void)
 692 {
 693         pci_unregister_driver(&p54p_driver);
 694 }
 695
 696 module_init(p54p_init);
 697 module_exit(p54p_exit);