3 * Trampoline.S Derived from Setup.S by Linus Torvalds
5 * 4 Jan 1997 Michael Chastain: changed to gnu as.
6 * 15 Sept 2005 Eric Biederman: 64bit PIC support
8 * Entry: CS:IP point to the start of our code, we are
9 * in real mode with no stack, but the rest of the
10 * trampoline page to make our stack and everything else
13 * On entry to trampoline_data, the processor is in real mode
14 * with 16-bit addressing and 16-bit data. CS has some value
15 * and IP is zero. Thus, data addresses need to be absolute
16 * (no relocation) and are taken with regard to r_base.
18 * With the addition of trampoline_level4_pgt this code can
19 * now enter a 64bit kernel that lives at arbitrary 64bit
22 * If you work on this file, check the object module with objdump
23 * --full-contents --reloc to make sure there are no relocation
27 #include <linux/linkage.h>
28 #include <asm/pgtable.h>
31 #include <asm/segment.h>
33 /* We can free up trampoline after bootup if cpu hotplug is not supported. */
34 #ifndef CONFIG_HOTPLUG_CPU
35 .section .init.data, "aw", @progbits
37 .section .rodata, "a", @progbits
42 ENTRY(trampoline_data)
44 cli # We should be safe anyway
46 mov %cs, %ax # Code and data in the same place
52 movl $0xA5A5A5A5, trampoline_data - r_base
53 # write marker for master knows we're running
56 movw $(trampoline_stack_end - r_base), %sp
58 call verify_cpu # Verify the cpu supports long mode
59 testl %eax, %eax # Check for return code
63 movzx %ax, %esi # Find the 32bit trampoline location
67 addl %esi, startup_32_vector - r_base
68 addl %esi, startup_64_vector - r_base
69 addl %esi, tgdt + 2 - r_base # Fixup the gdt pointer
72 * GDT tables in non default location kernel can be beyond 16MB and
73 * lgdt will not be able to load the address as in real mode default
74 * operand size is 16bit. Use lgdtl instead to force operand size
78 lidtl tidt - r_base # load idt with 0, 0
79 lgdtl tgdt - r_base # load gdt with whatever is appropriate
82 inc %ax # protected mode (PE) bit
83 lmsw %ax # into protected mode
85 # flush prefetch and jump to startup_32
86 ljmpl *(startup_32_vector - r_base)
91 movl $__KERNEL_DS, %eax # Initialize the %ds segment register
95 btsl $5, %eax # Enable PAE mode
98 # Setup trampoline 4 level pagetables
99 leal (trampoline_level4_pgt - r_base)(%esi), %eax
103 movl $(1 << _EFER_LME), %eax # Enable Long Mode
108 btsl $31, %eax # Enable paging and in turn activate Long Mode
109 btsl $0, %eax # Enable protected mode
113 * At this point we're in long mode but in 32bit compatibility mode
114 * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
115 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
116 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
118 ljmp *(startup_64_vector - r_base)(%esi)
123 # Now jump into the kernel using virtual addresses
124 movq $secondary_startup_64, %rax
131 #include "verify_cpu_64.S"
133 # Careful these need to be in the same 64K segment as the above;
135 .word 0 # idt limit = 0
136 .word 0, 0 # idt base = 0L
138 # Duplicate the global descriptor table
139 # so the kernel can live anywhere
142 .short tgdt_end - tgdt # gdt limit
145 .quad 0x00cf9b000000ffff # __KERNEL32_CS
146 .quad 0x00af9b000000ffff # __KERNEL_CS
147 .quad 0x00cf93000000ffff # __KERNEL_DS
152 .long startup_32 - r_base
153 .word __KERNEL32_CS, 0
157 .long startup_64 - r_base
162 trampoline_stack_end:
163 ENTRY(trampoline_level4_pgt)
164 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
166 .quad level3_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE
168 ENTRY(trampoline_end)