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[linux-2.6] / arch / ppc / platforms / 4xx / ibm440gx.h
1 /*
2  * arch/ppc/platforms/ibm440gx.h
3  *
4  * PPC440GX definitions
5  *
6  * Matt Porter <mporter@mvista.com>
7  *
8  * Copyright 2002 Roland Dreier
9  * Copyright 2003 MontaVista Software, Inc.
10  *
11  * This program is free software; you can redistribute  it and/or modify it
12  * under  the terms of  the GNU General  Public License as published by the
13  * Free Software Foundation;  either version 2 of the  License, or (at your
14  * option) any later version.
15  *
16  */
17
18 #ifdef __KERNEL__
19 #ifndef __PPC_PLATFORMS_IBM440GX_H
20 #define __PPC_PLATFORMS_IBM440GX_H
21
22 #include <linux/config.h>
23
24 #include <asm/ibm44x.h>
25
26 /* UART */
27 #define PPC440GX_UART0_ADDR     0x0000000140000200ULL
28 #define PPC440GX_UART1_ADDR     0x0000000140000300ULL
29 #define UART0_INT               0
30 #define UART1_INT               1
31
32 /* Clock and Power Management */
33 #define IBM_CPM_IIC0            0x80000000      /* IIC interface */
34 #define IBM_CPM_IIC1            0x40000000      /* IIC interface */
35 #define IBM_CPM_PCI             0x20000000      /* PCI bridge */
36 #define IBM_CPM_RGMII           0x10000000      /* RGMII */
37 #define IBM_CPM_TAHOE0          0x08000000      /* TAHOE 0 */
38 #define IBM_CPM_TAHOE1          0x04000000      /* TAHOE 1 */
39 #define IBM_CPM_CPU                 0x02000000  /* processor core */
40 #define IBM_CPM_DMA                 0x01000000  /* DMA controller */
41 #define IBM_CPM_BGO                 0x00800000  /* PLB to OPB bus arbiter */
42 #define IBM_CPM_BGI                 0x00400000  /* OPB to PLB bridge */
43 #define IBM_CPM_EBC                 0x00200000  /* External Bux Controller */
44 #define IBM_CPM_EBM                 0x00100000  /* Ext Bus Master Interface */
45 #define IBM_CPM_DMC                 0x00080000  /* SDRAM peripheral controller */
46 #define IBM_CPM_PLB                 0x00040000  /* PLB bus arbiter */
47 #define IBM_CPM_SRAM            0x00020000      /* SRAM memory controller */
48 #define IBM_CPM_PPM                 0x00002000  /* PLB Performance Monitor */
49 #define IBM_CPM_UIC1            0x00001000      /* Universal Interrupt Controller */
50 #define IBM_CPM_GPIO0           0x00000800      /* General Purpose IO (??) */
51 #define IBM_CPM_GPT                 0x00000400  /* General Purpose Timers  */
52 #define IBM_CPM_UART0           0x00000200      /* serial port 0 */
53 #define IBM_CPM_UART1           0x00000100      /* serial port 1 */
54 #define IBM_CPM_UIC0            0x00000080      /* Universal Interrupt Controller */
55 #define IBM_CPM_TMRCLK          0x00000040      /* CPU timers */
56 #define IBM_CPM_EMAC0           0x00000020      /* EMAC 0     */
57 #define IBM_CPM_EMAC1           0x00000010      /* EMAC 1     */
58 #define IBM_CPM_EMAC2           0x00000008      /* EMAC 2     */
59 #define IBM_CPM_EMAC3           0x00000004      /* EMAC 3     */
60
61 #define DFLT_IBM4xx_PM          ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \
62                                 | IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \
63                                 | IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \
64                                 | IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI \
65                                 | IBM_CPM_TAHOE0 | IBM_CPM_TAHOE1 \
66                                 | IBM_CPM_EMAC0 | IBM_CPM_EMAC1 \
67                                 | IBM_CPM_EMAC2 | IBM_CPM_EMAC3 )
68 /*
69  * Serial port defines
70  */
71 #define RS_TABLE_SIZE   2
72
73 #endif /* __PPC_PLATFORMS_IBM440GX_H */
74 #endif /* __KERNEL__ */