2 * arch/ppc64/kernel/entry.S
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
7 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
8 * Adapted for Power Macintosh by Paul Mackerras.
9 * Low-level exception handlers and MMU support
10 * rewritten by Paul Mackerras.
11 * Copyright (C) 1996 Paul Mackerras.
12 * MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
14 * This file contains the system call entry code, context switch
15 * code, and exception/interrupt return code for PowerPC.
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License
19 * as published by the Free Software Foundation; either version
20 * 2 of the License, or (at your option) any later version.
23 #include <linux/config.h>
24 #include <linux/errno.h>
25 #include <asm/unistd.h>
26 #include <asm/processor.h>
29 #include <asm/thread_info.h>
30 #include <asm/ppc_asm.h>
31 #include <asm/asm-offsets.h>
32 #include <asm/cputable.h>
34 #ifdef CONFIG_PPC_ISERIES
35 #define DO_SOFT_DISABLE
43 .tc .sys_call_table[TC],.sys_call_table
46 .tc .sys_call_table32[TC],.sys_call_table32
48 /* This value is used to mark exception frames on the stack. */
50 .tc ID_72656773_68657265[TC],0x7265677368657265
57 .globl system_call_common
61 addi r1,r1,-INT_FRAME_SIZE
95 addi r9,r1,STACK_FRAME_OVERHEAD
96 ld r11,exception_marker@toc(r2)
97 std r11,-16(r9) /* "regshere" marker */
98 #ifdef CONFIG_PPC_ISERIES
99 /* Hack for handling interrupts when soft-enabling on iSeries */
100 cmpdi cr1,r0,0x5555 /* syscall 0x5555 */
101 andi. r10,r12,MSR_PR /* from kernel */
102 crand 4*cr0+eq,4*cr1+eq,4*cr0+eq
103 beq hardware_interrupt_entry
104 lbz r10,PACAPROCENABLED(r13)
116 addi r9,r1,STACK_FRAME_OVERHEAD
118 clrrdi r11,r1,THREAD_SHIFT
121 stb r12,TI_SC_NOERR(r11)
122 andi. r11,r10,_TIF_SYSCALL_T_OR_A
124 syscall_dotrace_cont:
125 cmpldi 0,r0,NR_syscalls
128 system_call: /* label this so stack traces look sane */
130 * Need to vector to 32 Bit or default sys_call_table here,
131 * based on caller's run-mode / personality.
133 ld r11,.SYS_CALL_TABLE@toc(2)
134 andi. r10,r10,_TIF_32BIT
136 ld r11,.SYS_CALL_TABLE32@toc(2)
145 ldx r10,r11,r0 /* Fetch system call handler [ptr] */
147 bctrl /* Call handler */
152 bl .do_show_syscall_exit
159 clrrdi r12,r1,THREAD_SHIFT
163 /* check for syscall tracing or audit */
165 andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP)
166 bne- syscall_exit_trace
167 syscall_exit_trace_cont:
169 /* disable interrupts so current_thread_info()->flags can't change,
170 and so that we don't get interrupted after loading SRR0/1. */
179 andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SIGPENDING|_TIF_NEED_RESCHED)
180 bne- syscall_exit_work
182 stdcx. r0,0,r1 /* to clear the reservation */
185 beq- 1f /* only restore r13 if */
186 ld r13,GPR13(r1) /* returning to usermode */
190 mtmsrd r10,1 /* clear MSR.RI */
197 b . /* prevent speculative execution */
202 clrrdi r12,r1,THREAD_SHIFT
206 lbz r11,TI_SC_NOERR(r12)
208 bne- syscall_error_cont
210 oris r5,r5,0x1000 /* Set SO bit in CR */
214 /* Traced system call support */
217 addi r3,r1,STACK_FRAME_OVERHEAD
218 bl .do_syscall_trace_enter
219 ld r0,GPR0(r1) /* Restore original registers */
226 addi r9,r1,STACK_FRAME_OVERHEAD
227 clrrdi r10,r1,THREAD_SHIFT
229 b syscall_dotrace_cont
234 addi r3,r1,STACK_FRAME_OVERHEAD
235 bl .do_syscall_trace_leave
239 clrrdi r12,r1,THREAD_SHIFT
240 b syscall_exit_trace_cont
242 /* Stuff to do on exit from a system call. */
246 b .ret_from_except_lite
248 /* Save non-volatile GPRs, if not already saved. */
259 * The sigsuspend and rt_sigsuspend system calls can call do_signal
260 * and thus put the process into the stopped state where we might
261 * want to examine its user state with ptrace. Therefore we need
262 * to save all the nonvolatile registers (r14 - r31) before calling
263 * the C code. Similarly, fork, vfork and clone need the full
264 * register state on the stack so that it can be copied to the child.
266 _GLOBAL(ppc32_sigsuspend)
271 _GLOBAL(ppc64_rt_sigsuspend)
273 bl .sys_rt_sigsuspend
276 _GLOBAL(ppc32_rt_sigsuspend)
278 bl .sys32_rt_sigsuspend
279 /* If sigsuspend() returns zero, we are going into a signal handler */
282 /* If it returned -EINTR, we need to return via syscall_exit to set
283 the SO bit in cr0 and potentially stop for ptrace. */
301 _GLOBAL(ppc32_swapcontext)
303 bl .sys32_swapcontext
306 _GLOBAL(ppc64_swapcontext)
311 _GLOBAL(ppc32_sigreturn)
315 _GLOBAL(ppc32_rt_sigreturn)
316 bl .sys32_rt_sigreturn
319 _GLOBAL(ppc64_rt_sigreturn)
324 clrrdi r4,r1,THREAD_SHIFT
326 andi. r4,r4,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP)
328 addi r3,r1,STACK_FRAME_OVERHEAD
329 bl .do_syscall_trace_leave
330 81: b .ret_from_except
332 _GLOBAL(ret_from_fork)
339 * This routine switches between two different tasks. The process
340 * state of one is saved on its kernel stack. Then the state
341 * of the other is restored from its kernel stack. The memory
342 * management hardware is updated to the second process's state.
343 * Finally, we can return to the second process, via ret_from_except.
344 * On entry, r3 points to the THREAD for the current task, r4
345 * points to the THREAD for the new task.
347 * Note: there are two ways to get to the "going out" portion
348 * of this code; either by coming in via the entry (_switch)
349 * or via "fork" which must set up an environment equivalent
350 * to the "_switch" path. If you change this you'll have to change
351 * the fork code also.
353 * The code which creates the new task context is in 'copy_thread'
354 * in arch/ppc64/kernel/process.c
360 stdu r1,-SWITCH_FRAME_SIZE(r1)
361 /* r3-r13 are caller saved -- Cort */
364 mflr r20 /* Return to switch caller */
367 #ifdef CONFIG_ALTIVEC
369 oris r0,r0,MSR_VEC@h /* Disable altivec */
370 mfspr r24,SPRN_VRSAVE /* save vrsave register value */
371 std r24,THREAD_VRSAVE(r3)
372 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
373 #endif /* CONFIG_ALTIVEC */
382 std r1,KSP(r3) /* Set old stack pointer */
385 /* We need a sync somewhere here to make sure that if the
386 * previous task gets rescheduled on another CPU, it sees all
387 * stores it has performed on this one.
390 #endif /* CONFIG_SMP */
392 addi r6,r4,-THREAD /* Convert THREAD to 'current' */
393 std r6,PACACURRENT(r13) /* Set new 'current' */
395 ld r8,KSP(r4) /* new stack pointer */
397 clrrdi r6,r8,28 /* get its ESID */
398 clrrdi r9,r1,28 /* get current sp ESID */
399 clrldi. r0,r6,2 /* is new ESID c00000000? */
400 cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */
402 beq 2f /* if yes, don't slbie it */
404 /* Bolt in the new stack SLB entry */
405 ld r7,KSP_VSID(r4) /* Get new stack's VSID */
406 oris r0,r6,(SLB_ESID_V)@h
407 ori r0,r0,(SLB_NUM_BOLTED-1)@l
409 slbie r6 /* Workaround POWER5 < DD2.1 issue */
414 END_FTR_SECTION_IFSET(CPU_FTR_SLB)
415 clrrdi r7,r8,THREAD_SHIFT /* base of new stack */
416 /* Note: this uses SWITCH_FRAME_SIZE rather than INT_FRAME_SIZE
417 because we don't need to leave the 288-byte ABI gap at the
418 top of the kernel stack. */
419 addi r7,r7,THREAD_SIZE-SWITCH_FRAME_SIZE
421 mr r1,r8 /* start using new stack pointer */
422 std r7,PACAKSAVE(r13)
427 #ifdef CONFIG_ALTIVEC
429 ld r0,THREAD_VRSAVE(r4)
430 mtspr SPRN_VRSAVE,r0 /* if G4, restore VRSAVE reg */
431 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
432 #endif /* CONFIG_ALTIVEC */
434 /* r3-r13 are destroyed -- Cort */
438 /* convert old thread to its task_struct for return value */
440 ld r7,_NIP(r1) /* Return to _switch caller in new task */
442 addi r1,r1,SWITCH_FRAME_SIZE
446 _GLOBAL(ret_from_except)
449 bne .ret_from_except_lite
452 _GLOBAL(ret_from_except_lite)
454 * Disable interrupts so that current_thread_info()->flags
455 * can't change between when we test it and when we return
456 * from the interrupt.
458 mfmsr r10 /* Get current interrupt state */
459 rldicl r9,r10,48,1 /* clear MSR_EE */
461 mtmsrd r9,1 /* Update machine state */
463 #ifdef CONFIG_PREEMPT
464 clrrdi r9,r1,THREAD_SHIFT /* current_thread_info() */
465 li r0,_TIF_NEED_RESCHED /* bits to check */
468 /* Move MSR_PR bit in r3 to _TIF_SIGPENDING position in r0 */
469 rlwimi r0,r3,32+TIF_SIGPENDING-MSR_PR_LG,_TIF_SIGPENDING
470 and. r0,r4,r0 /* check NEED_RESCHED and maybe SIGPENDING */
473 #else /* !CONFIG_PREEMPT */
474 ld r3,_MSR(r1) /* Returning to user mode? */
476 beq restore /* if not, just restore regs and return */
478 /* Check current_thread_info()->flags */
479 clrrdi r9,r1,THREAD_SHIFT
481 andi. r0,r4,_TIF_USER_WORK_MASK
486 #ifdef CONFIG_PPC_ISERIES
490 /* Check for pending interrupts (iSeries) */
491 ld r3,PACALPPACA+LPPACAANYINT(r13)
493 beq+ 4f /* skip do_IRQ if no interrupts */
496 stb r3,PACAPROCENABLED(r13) /* ensure we are soft-disabled */
498 mtmsrd r10 /* hard-enable again */
499 addi r3,r1,STACK_FRAME_OVERHEAD
501 b .ret_from_except_lite /* loop back and handle more */
503 4: stb r5,PACAPROCENABLED(r13)
513 * r13 is our per cpu area, only restore it if we are returning to
528 stdcx. r0,0,r1 /* to clear the reservation */
550 b . /* prevent speculative execution */
552 /* Note: this must change if we start using the TIF_NOTIFY_RESUME bit */
554 #ifdef CONFIG_PREEMPT
555 andi. r0,r3,MSR_PR /* Returning to user mode? */
557 /* Check that preempt_count() == 0 and interrupts are enabled */
558 lwz r8,TI_PREEMPT(r9)
560 #ifdef CONFIG_PPC_ISERIES
566 crandc eq,cr1*4+eq,eq
568 /* here we are preempting the current task */
570 #ifdef CONFIG_PPC_ISERIES
572 stb r0,PACAPROCENABLED(r13)
575 mtmsrd r10,1 /* reenable interrupts */
578 clrrdi r9,r1,THREAD_SHIFT
579 rldicl r10,r10,48,1 /* disable interrupts again */
583 andi. r0,r4,_TIF_NEED_RESCHED
589 /* Enable interrupts */
593 andi. r0,r4,_TIF_NEED_RESCHED
596 b .ret_from_except_lite
600 addi r4,r1,STACK_FRAME_OVERHEAD
605 addi r3,r1,STACK_FRAME_OVERHEAD
606 bl .unrecoverable_exception
609 #ifdef CONFIG_PPC_RTAS
611 * On CHRP, the Run-Time Abstraction Services (RTAS) have to be
612 * called with the MMU off.
614 * In addition, we need to be in 32b mode, at least for now.
616 * Note: r3 is an input parameter to rtas, so don't trash it...
621 stdu r1,-RTAS_FRAME_SIZE(r1) /* Save SP and create stack space. */
623 /* Because RTAS is running in 32b mode, it clobbers the high order half
624 * of all registers that it saves. We therefore save those registers
625 * RTAS might touch to the stack. (r0, r3-r13 are caller saved)
627 SAVE_GPR(2, r1) /* Save the TOC */
628 SAVE_GPR(13, r1) /* Save paca */
629 SAVE_8GPRS(14, r1) /* Save the non-volatiles */
630 SAVE_10GPRS(22, r1) /* ditto */
647 /* There is no way it is acceptable to get here with interrupts enabled,
648 * check it with the asm equivalent of WARN_ON
653 .section __bug_table,"a"
654 .llong 1b,__LINE__ + 0x1000000, 1f, 2f
658 2: .asciz "enter_rtas"
661 /* Unfortunately, the stack pointer and the MSR are also clobbered,
662 * so they are saved in the PACA which allows us to restore
663 * our original state after RTAS returns.
666 std r6,PACASAVEDMSR(r13)
668 /* Setup our real return addr */
669 SET_REG_TO_LABEL(r4,.rtas_return_loc)
670 SET_REG_TO_CONST(r9,KERNELBASE)
675 ori r0,r0,MSR_EE|MSR_SE|MSR_BE|MSR_RI
679 rldicr r9,r9,MSR_SF_LG,(63-MSR_SF_LG)
680 ori r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP
683 sync /* disable interrupts so SRR0/1 */
684 mtmsrd r0 /* don't get trashed */
686 SET_REG_TO_LABEL(r4,rtas)
687 ld r5,RTASENTRY(r4) /* get the rtas->entry value */
688 ld r4,RTASBASE(r4) /* get the rtas->base value */
693 b . /* prevent speculative execution */
695 _STATIC(rtas_return_loc)
696 /* relocation is off at this point */
697 mfspr r4,SPRG3 /* Get PACA */
698 SET_REG_TO_CONST(r5, KERNELBASE)
699 sub r4,r4,r5 /* RELOC the PACA base pointer */
707 ld r1,PACAR1(r4) /* Restore our SP */
708 LOADADDR(r3,.rtas_restore_regs)
709 ld r4,PACASAVEDMSR(r4) /* Restore our MSR */
714 b . /* prevent speculative execution */
716 _STATIC(rtas_restore_regs)
717 /* relocation is on at this point */
718 REST_GPR(2, r1) /* Restore the TOC */
719 REST_GPR(13, r1) /* Restore paca */
720 REST_8GPRS(14, r1) /* Restore the non-volatiles */
721 REST_10GPRS(22, r1) /* ditto */
740 addi r1,r1,RTAS_FRAME_SIZE /* Unstack our frame */
741 ld r0,16(r1) /* get return address */
744 blr /* return to caller */
746 #endif /* CONFIG_PPC_RTAS */
748 #ifdef CONFIG_PPC_MULTIPLATFORM
753 stdu r1,-PROM_FRAME_SIZE(r1) /* Save SP and create stack space */
755 /* Because PROM is running in 32b mode, it clobbers the high order half
756 * of all registers that it saves. We therefore save those registers
757 * PROM might touch to the stack. (r0, r3-r13 are caller saved)
780 /* Get the PROM entrypoint */
784 /* Switch MSR to 32 bits mode
788 rldicr r12,r12,MSR_SF_LG,(63-MSR_SF_LG)
791 rldicr r12,r12,MSR_ISF_LG,(63-MSR_ISF_LG)
796 /* Restore arguments & enter PROM here... */
800 /* Just make sure that r1 top 32 bits didn't get
805 /* Restore the MSR (back to 64 bits) */
810 /* Restore other registers */
830 addi r1,r1,PROM_FRAME_SIZE
835 #endif /* CONFIG_PPC_MULTIPLATFORM */