Merge branch 'timers/range-hrtimers' into v28-range-hrtimers-for-linus-v2
[linux-2.6] / drivers / media / dvb / frontends / tda10048.c
1 /*
2     NXP TDA10048HN DVB OFDM demodulator driver
3
4     Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
5
6     This program is free software; you can redistribute it and/or modify
7     it under the terms of the GNU General Public License as published by
8     the Free Software Foundation; either version 2 of the License, or
9     (at your option) any later version.
10
11     This program is distributed in the hope that it will be useful,
12     but WITHOUT ANY WARRANTY; without even the implied warranty of
13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14     GNU General Public License for more details.
15
16     You should have received a copy of the GNU General Public License
17     along with this program; if not, write to the Free Software
18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19
20 */
21
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/module.h>
25 #include <linux/string.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
28 #include "dvb_frontend.h"
29 #include "dvb_math.h"
30 #include "tda10048.h"
31
32 #define TDA10048_DEFAULT_FIRMWARE "dvb-fe-tda10048-1.0.fw"
33 #define TDA10048_DEFAULT_FIRMWARE_SIZE 24878
34
35 /* Register name definitions */
36 #define TDA10048_IDENTITY          0x00
37 #define TDA10048_VERSION           0x01
38 #define TDA10048_DSP_CODE_CPT      0x0C
39 #define TDA10048_DSP_CODE_IN       0x0E
40 #define TDA10048_IN_CONF1          0x10
41 #define TDA10048_IN_CONF2          0x11
42 #define TDA10048_IN_CONF3          0x12
43 #define TDA10048_OUT_CONF1         0x14
44 #define TDA10048_OUT_CONF2         0x15
45 #define TDA10048_OUT_CONF3         0x16
46 #define TDA10048_AUTO              0x18
47 #define TDA10048_SYNC_STATUS       0x1A
48 #define TDA10048_CONF_C4_1         0x1E
49 #define TDA10048_CONF_C4_2         0x1F
50 #define TDA10048_CODE_IN_RAM       0x20
51 #define TDA10048_CHANNEL_INFO_1_R  0x22
52 #define TDA10048_CHANNEL_INFO_2_R  0x23
53 #define TDA10048_CHANNEL_INFO1     0x24
54 #define TDA10048_CHANNEL_INFO2     0x25
55 #define TDA10048_TIME_ERROR_R      0x26
56 #define TDA10048_TIME_ERROR        0x27
57 #define TDA10048_FREQ_ERROR_LSB_R  0x28
58 #define TDA10048_FREQ_ERROR_MSB_R  0x29
59 #define TDA10048_FREQ_ERROR_LSB    0x2A
60 #define TDA10048_FREQ_ERROR_MSB    0x2B
61 #define TDA10048_IT_SEL            0x30
62 #define TDA10048_IT_STAT           0x32
63 #define TDA10048_DSP_AD_LSB        0x3C
64 #define TDA10048_DSP_AD_MSB        0x3D
65 #define TDA10048_DSP_REF_LSB       0x3E
66 #define TDA10048_DSP_REF_MSB       0x3F
67 #define TDA10048_CONF_TRISTATE1    0x44
68 #define TDA10048_CONF_TRISTATE2    0x45
69 #define TDA10048_CONF_POLARITY     0x46
70 #define TDA10048_GPIO_SP_DS0       0x48
71 #define TDA10048_GPIO_SP_DS1       0x49
72 #define TDA10048_GPIO_SP_DS2       0x4A
73 #define TDA10048_GPIO_SP_DS3       0x4B
74 #define TDA10048_GPIO_OUT_SEL      0x4C
75 #define TDA10048_GPIO_SELECT       0x4D
76 #define TDA10048_IC_MODE           0x4E
77 #define TDA10048_CONF_XO           0x50
78 #define TDA10048_CONF_PLL1         0x51
79 #define TDA10048_CONF_PLL2         0x52
80 #define TDA10048_CONF_PLL3         0x53
81 #define TDA10048_CONF_ADC          0x54
82 #define TDA10048_CONF_ADC_2        0x55
83 #define TDA10048_CONF_C1_1         0x60
84 #define TDA10048_CONF_C1_3         0x62
85 #define TDA10048_AGC_CONF          0x70
86 #define TDA10048_AGC_THRESHOLD_LSB 0x72
87 #define TDA10048_AGC_THRESHOLD_MSB 0x73
88 #define TDA10048_AGC_RENORM        0x74
89 #define TDA10048_AGC_GAINS         0x76
90 #define TDA10048_AGC_TUN_MIN       0x78
91 #define TDA10048_AGC_TUN_MAX       0x79
92 #define TDA10048_AGC_IF_MIN        0x7A
93 #define TDA10048_AGC_IF_MAX        0x7B
94 #define TDA10048_AGC_TUN_LEVEL     0x7E
95 #define TDA10048_AGC_IF_LEVEL      0x7F
96 #define TDA10048_DIG_AGC_LEVEL     0x81
97 #define TDA10048_FREQ_PHY2_LSB     0x86
98 #define TDA10048_FREQ_PHY2_MSB     0x87
99 #define TDA10048_TIME_INVWREF_LSB  0x88
100 #define TDA10048_TIME_INVWREF_MSB  0x89
101 #define TDA10048_TIME_WREF_LSB     0x8A
102 #define TDA10048_TIME_WREF_MID1    0x8B
103 #define TDA10048_TIME_WREF_MID2    0x8C
104 #define TDA10048_TIME_WREF_MSB     0x8D
105 #define TDA10048_NP_OUT            0xA2
106 #define TDA10048_CELL_ID_LSB       0xA4
107 #define TDA10048_CELL_ID_MSB       0xA5
108 #define TDA10048_EXTTPS_ODD        0xAA
109 #define TDA10048_EXTTPS_EVEN       0xAB
110 #define TDA10048_TPS_LENGTH        0xAC
111 #define TDA10048_FREE_REG_1        0xB2
112 #define TDA10048_FREE_REG_2        0xB3
113 #define TDA10048_CONF_C3_1         0xC0
114 #define TDA10048_CYBER_CTRL        0xC2
115 #define TDA10048_CBER_NMAX_LSB     0xC4
116 #define TDA10048_CBER_NMAX_MSB     0xC5
117 #define TDA10048_CBER_LSB          0xC6
118 #define TDA10048_CBER_MSB          0xC7
119 #define TDA10048_VBER_LSB          0xC8
120 #define TDA10048_VBER_MID          0xC9
121 #define TDA10048_VBER_MSB          0xCA
122 #define TDA10048_CYBER_LUT         0xCC
123 #define TDA10048_UNCOR_CTRL        0xCD
124 #define TDA10048_UNCOR_CPT_LSB     0xCE
125 #define TDA10048_UNCOR_CPT_MSB     0xCF
126 #define TDA10048_SOFT_IT_C3        0xD6
127 #define TDA10048_CONF_TS2          0xE0
128 #define TDA10048_CONF_TS1          0xE1
129
130 static unsigned int debug;
131
132 #define dprintk(level, fmt, arg...)\
133         do { if (debug >= level)\
134                 printk(KERN_DEBUG "tda10048: " fmt, ## arg);\
135         } while (0)
136
137 struct tda10048_state {
138
139         struct i2c_adapter *i2c;
140
141         /* configuration settings */
142         const struct tda10048_config *config;
143         struct dvb_frontend frontend;
144
145         int fwloaded;
146 };
147
148 static struct init_tab {
149         u8      reg;
150         u16     data;
151 } init_tab[] = {
152         { TDA10048_CONF_PLL1, 0x08 },
153         { TDA10048_CONF_ADC_2, 0x00 },
154         { TDA10048_CONF_C4_1, 0x00 },
155         { TDA10048_CONF_PLL1, 0x0f },
156         { TDA10048_CONF_PLL2, 0x0a },
157         { TDA10048_CONF_PLL3, 0x43 },
158         { TDA10048_FREQ_PHY2_LSB, 0x02 },
159         { TDA10048_FREQ_PHY2_MSB, 0x0a },
160         { TDA10048_TIME_WREF_LSB, 0xbd },
161         { TDA10048_TIME_WREF_MID1, 0xe4 },
162         { TDA10048_TIME_WREF_MID2, 0xa8 },
163         { TDA10048_TIME_WREF_MSB, 0x02 },
164         { TDA10048_TIME_INVWREF_LSB, 0x04 },
165         { TDA10048_TIME_INVWREF_MSB, 0x06 },
166         { TDA10048_CONF_C4_1, 0x00 },
167         { TDA10048_CONF_C1_1, 0xa8 },
168         { TDA10048_AGC_CONF, 0x16 },
169         { TDA10048_CONF_C1_3, 0x0b },
170         { TDA10048_AGC_TUN_MIN, 0x00 },
171         { TDA10048_AGC_TUN_MAX, 0xff },
172         { TDA10048_AGC_IF_MIN, 0x00 },
173         { TDA10048_AGC_IF_MAX, 0xff },
174         { TDA10048_AGC_THRESHOLD_MSB, 0x00 },
175         { TDA10048_AGC_THRESHOLD_LSB, 0x70 },
176         { TDA10048_CYBER_CTRL, 0x38 },
177         { TDA10048_AGC_GAINS, 0x12 },
178         { TDA10048_CONF_XO, 0x00 },
179         { TDA10048_CONF_TS1, 0x07 },
180         { TDA10048_IC_MODE, 0x00 },
181         { TDA10048_CONF_TS2, 0xc0 },
182         { TDA10048_CONF_TRISTATE1, 0x21 },
183         { TDA10048_CONF_TRISTATE2, 0x00 },
184         { TDA10048_CONF_POLARITY, 0x00 },
185         { TDA10048_CONF_C4_2, 0x04 },
186         { TDA10048_CONF_ADC, 0x60 },
187         { TDA10048_CONF_ADC_2, 0x10 },
188         { TDA10048_CONF_ADC, 0x60 },
189         { TDA10048_CONF_ADC_2, 0x00 },
190         { TDA10048_CONF_C1_1, 0xa8 },
191         { TDA10048_UNCOR_CTRL, 0x00 },
192         { TDA10048_CONF_C4_2, 0x04 },
193 };
194
195 static int tda10048_writereg(struct tda10048_state *state, u8 reg, u8 data)
196 {
197         int ret;
198         u8 buf[] = { reg, data };
199         struct i2c_msg msg = {
200                 .addr = state->config->demod_address,
201                 .flags = 0, .buf = buf, .len = 2 };
202
203         dprintk(2, "%s(reg = 0x%02x, data = 0x%02x)\n", __func__, reg, data);
204
205         ret = i2c_transfer(state->i2c, &msg, 1);
206
207         if (ret != 1)
208                 printk("%s: writereg error (ret == %i)\n", __func__, ret);
209
210         return (ret != 1) ? -1 : 0;
211 }
212
213 static u8 tda10048_readreg(struct tda10048_state *state, u8 reg)
214 {
215         int ret;
216         u8 b0[] = { reg };
217         u8 b1[] = { 0 };
218         struct i2c_msg msg[] = {
219                 { .addr = state->config->demod_address,
220                         .flags = 0, .buf = b0, .len = 1 },
221                 { .addr = state->config->demod_address,
222                         .flags = I2C_M_RD, .buf = b1, .len = 1 } };
223
224         dprintk(2, "%s(reg = 0x%02x)\n", __func__, reg);
225
226         ret = i2c_transfer(state->i2c, msg, 2);
227
228         if (ret != 2)
229                 printk(KERN_ERR "%s: readreg error (ret == %i)\n",
230                         __func__, ret);
231
232         return b1[0];
233 }
234
235 static int tda10048_writeregbulk(struct tda10048_state *state, u8 reg,
236                                  const u8 *data, u16 len)
237 {
238         int ret = -EREMOTEIO;
239         struct i2c_msg msg;
240         u8 *buf;
241
242         dprintk(2, "%s(%d, ?, len = %d)\n", __func__, reg, len);
243
244         buf = kmalloc(len + 1, GFP_KERNEL);
245         if (buf == NULL) {
246                 ret = -ENOMEM;
247                 goto error;
248         }
249
250         *buf = reg;
251         memcpy(buf + 1, data, len);
252
253         msg.addr = state->config->demod_address;
254         msg.flags = 0;
255         msg.buf = buf;
256         msg.len = len + 1;
257
258         dprintk(2, "%s():  write len = %d\n",
259                 __func__, msg.len);
260
261         ret = i2c_transfer(state->i2c, &msg, 1);
262         if (ret != 1) {
263                 printk(KERN_ERR "%s(): writereg error err %i\n",
264                          __func__, ret);
265                 ret = -EREMOTEIO;
266         }
267
268 error:
269         kfree(buf);
270
271         return ret;
272 }
273
274 static int tda10048_firmware_upload(struct dvb_frontend *fe)
275 {
276         struct tda10048_state *state = fe->demodulator_priv;
277         const struct firmware *fw;
278         int ret;
279         int pos = 0;
280         int cnt;
281         u8 wlen = state->config->fwbulkwritelen;
282
283         if ((wlen != TDA10048_BULKWRITE_200) && (wlen != TDA10048_BULKWRITE_50))
284                 wlen = TDA10048_BULKWRITE_200;
285
286         /* request the firmware, this will block and timeout */
287         printk(KERN_INFO "%s: waiting for firmware upload (%s)...\n",
288                 __func__,
289                 TDA10048_DEFAULT_FIRMWARE);
290
291         ret = request_firmware(&fw, TDA10048_DEFAULT_FIRMWARE,
292                 &state->i2c->dev);
293         if (ret) {
294                 printk(KERN_ERR "%s: Upload failed. (file not found?)\n",
295                         __func__);
296                 return -EIO;
297         } else {
298                 printk(KERN_INFO "%s: firmware read %Zu bytes.\n",
299                         __func__,
300                         fw->size);
301                 ret = 0;
302         }
303
304         if (fw->size != TDA10048_DEFAULT_FIRMWARE_SIZE) {
305                 printk(KERN_ERR "%s: firmware incorrect size\n", __func__);
306                 ret = -EIO;
307         } else {
308                 printk(KERN_INFO "%s: firmware uploading\n", __func__);
309
310                 /* Soft reset */
311                 tda10048_writereg(state, TDA10048_CONF_TRISTATE1,
312                         tda10048_readreg(state, TDA10048_CONF_TRISTATE1)
313                                 & 0xfe);
314                 tda10048_writereg(state, TDA10048_CONF_TRISTATE1,
315                         tda10048_readreg(state, TDA10048_CONF_TRISTATE1)
316                                 | 0x01);
317
318                 /* Put the demod into host download mode */
319                 tda10048_writereg(state, TDA10048_CONF_C4_1,
320                         tda10048_readreg(state, TDA10048_CONF_C4_1) & 0xf9);
321
322                 /* Boot the DSP */
323                 tda10048_writereg(state, TDA10048_CONF_C4_1,
324                         tda10048_readreg(state, TDA10048_CONF_C4_1) | 0x08);
325
326                 /* Prepare for download */
327                 tda10048_writereg(state, TDA10048_DSP_CODE_CPT, 0);
328
329                 /* Download the firmware payload */
330                 while (pos < fw->size) {
331
332                         if ((fw->size - pos) > wlen)
333                                 cnt = wlen;
334                         else
335                                 cnt = fw->size - pos;
336
337                         tda10048_writeregbulk(state, TDA10048_DSP_CODE_IN,
338                                 &fw->data[pos], cnt);
339
340                         pos += cnt;
341                 }
342
343                 ret = -EIO;
344                 /* Wait up to 250ms for the DSP to boot */
345                 for (cnt = 0; cnt < 250 ; cnt += 10) {
346
347                         msleep(10);
348
349                         if (tda10048_readreg(state, TDA10048_SYNC_STATUS)
350                                 & 0x40) {
351                                 ret = 0;
352                                 break;
353                         }
354                 }
355         }
356
357         release_firmware(fw);
358
359         if (ret == 0) {
360                 printk(KERN_INFO "%s: firmware uploaded\n", __func__);
361                 state->fwloaded = 1;
362         } else
363                 printk(KERN_ERR "%s: firmware upload failed\n", __func__);
364
365         return ret;
366 }
367
368 static int tda10048_set_inversion(struct dvb_frontend *fe, int inversion)
369 {
370         struct tda10048_state *state = fe->demodulator_priv;
371
372         dprintk(1, "%s(%d)\n", __func__, inversion);
373
374         if (inversion == TDA10048_INVERSION_ON)
375                 tda10048_writereg(state, TDA10048_CONF_C1_1,
376                         tda10048_readreg(state, TDA10048_CONF_C1_1) | 0x20);
377         else
378                 tda10048_writereg(state, TDA10048_CONF_C1_1,
379                         tda10048_readreg(state, TDA10048_CONF_C1_1) & 0xdf);
380
381         return 0;
382 }
383
384 /* Retrieve the demod settings */
385 static int tda10048_get_tps(struct tda10048_state *state,
386         struct dvb_ofdm_parameters *p)
387 {
388         u8 val;
389
390         /* Make sure the TPS regs are valid */
391         if (!(tda10048_readreg(state, TDA10048_AUTO) & 0x01))
392                 return -EAGAIN;
393
394         val = tda10048_readreg(state, TDA10048_OUT_CONF2);
395         switch ((val & 0x60) >> 5) {
396         case 0:
397                 p->constellation = QPSK;
398                 break;
399         case 1:
400                 p->constellation = QAM_16;
401                 break;
402         case 2:
403                 p->constellation = QAM_64;
404                 break;
405         }
406         switch ((val & 0x18) >> 3) {
407         case 0:
408                 p->hierarchy_information = HIERARCHY_NONE;
409                 break;
410         case 1:
411                 p->hierarchy_information = HIERARCHY_1;
412                 break;
413         case 2:
414                 p->hierarchy_information = HIERARCHY_2;
415                 break;
416         case 3:
417                 p->hierarchy_information = HIERARCHY_4;
418                 break;
419         }
420         switch (val & 0x07) {
421         case 0:
422                 p->code_rate_HP = FEC_1_2;
423                 break;
424         case 1:
425                 p->code_rate_HP = FEC_2_3;
426                 break;
427         case 2:
428                 p->code_rate_HP = FEC_3_4;
429                 break;
430         case 3:
431                 p->code_rate_HP = FEC_5_6;
432                 break;
433         case 4:
434                 p->code_rate_HP = FEC_7_8;
435                 break;
436         }
437
438         val = tda10048_readreg(state, TDA10048_OUT_CONF3);
439         switch (val & 0x07) {
440         case 0:
441                 p->code_rate_LP = FEC_1_2;
442                 break;
443         case 1:
444                 p->code_rate_LP = FEC_2_3;
445                 break;
446         case 2:
447                 p->code_rate_LP = FEC_3_4;
448                 break;
449         case 3:
450                 p->code_rate_LP = FEC_5_6;
451                 break;
452         case 4:
453                 p->code_rate_LP = FEC_7_8;
454                 break;
455         }
456
457         val = tda10048_readreg(state, TDA10048_OUT_CONF1);
458         switch ((val & 0x0c) >> 2) {
459         case 0:
460                 p->guard_interval = GUARD_INTERVAL_1_32;
461                 break;
462         case 1:
463                 p->guard_interval = GUARD_INTERVAL_1_16;
464                 break;
465         case 2:
466                 p->guard_interval =  GUARD_INTERVAL_1_8;
467                 break;
468         case 3:
469                 p->guard_interval =  GUARD_INTERVAL_1_4;
470                 break;
471         }
472         switch (val & 0x02) {
473         case 0:
474                 p->transmission_mode = TRANSMISSION_MODE_2K;
475                 break;
476         case 1:
477                 p->transmission_mode = TRANSMISSION_MODE_8K;
478                 break;
479         }
480
481         return 0;
482 }
483
484 static int tda10048_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
485 {
486         struct tda10048_state *state = fe->demodulator_priv;
487         dprintk(1, "%s(%d)\n", __func__, enable);
488
489         if (enable)
490                 return tda10048_writereg(state, TDA10048_CONF_C4_1,
491                         tda10048_readreg(state, TDA10048_CONF_C4_1) | 0x02);
492         else
493                 return tda10048_writereg(state, TDA10048_CONF_C4_1,
494                         tda10048_readreg(state, TDA10048_CONF_C4_1) & 0xfd);
495 }
496
497 static int tda10048_output_mode(struct dvb_frontend *fe, int serial)
498 {
499         struct tda10048_state *state = fe->demodulator_priv;
500         dprintk(1, "%s(%d)\n", __func__, serial);
501
502         /* Ensure pins are out of tri-state */
503         tda10048_writereg(state, TDA10048_CONF_TRISTATE1, 0x21);
504         tda10048_writereg(state, TDA10048_CONF_TRISTATE2, 0x00);
505
506         if (serial) {
507                 tda10048_writereg(state, TDA10048_IC_MODE, 0x80 | 0x20);
508                 tda10048_writereg(state, TDA10048_CONF_TS2, 0xc0);
509         } else {
510                 tda10048_writereg(state, TDA10048_IC_MODE, 0x00);
511                 tda10048_writereg(state, TDA10048_CONF_TS2, 0x01);
512         }
513
514         return 0;
515 }
516
517 /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
518 /* TODO: Support manual tuning with specific params */
519 static int tda10048_set_frontend(struct dvb_frontend *fe,
520         struct dvb_frontend_parameters *p)
521 {
522         struct tda10048_state *state = fe->demodulator_priv;
523
524         dprintk(1, "%s(frequency=%d)\n", __func__, p->frequency);
525
526         if (fe->ops.tuner_ops.set_params) {
527
528                 if (fe->ops.i2c_gate_ctrl)
529                         fe->ops.i2c_gate_ctrl(fe, 1);
530
531                 fe->ops.tuner_ops.set_params(fe, p);
532
533                 if (fe->ops.i2c_gate_ctrl)
534                         fe->ops.i2c_gate_ctrl(fe, 0);
535         }
536
537         /* Enable demod TPS auto detection and begin acquisition */
538         tda10048_writereg(state, TDA10048_AUTO, 0x57);
539
540         return 0;
541 }
542
543 /* Establish sane defaults and load firmware. */
544 static int tda10048_init(struct dvb_frontend *fe)
545 {
546         struct tda10048_state *state = fe->demodulator_priv;
547         int ret = 0, i;
548
549         dprintk(1, "%s()\n", __func__);
550
551         /* Apply register defaults */
552         for (i = 0; i < ARRAY_SIZE(init_tab); i++)
553                 tda10048_writereg(state, init_tab[i].reg, init_tab[i].data);
554
555         if (state->fwloaded == 0)
556                 ret = tda10048_firmware_upload(fe);
557
558         /* Set either serial or parallel */
559         tda10048_output_mode(fe, state->config->output_mode);
560
561         /* set inversion */
562         tda10048_set_inversion(fe, state->config->inversion);
563
564         /* Ensure we leave the gate closed */
565         tda10048_i2c_gate_ctrl(fe, 0);
566
567         return ret;
568 }
569
570 static int tda10048_read_status(struct dvb_frontend *fe, fe_status_t *status)
571 {
572         struct tda10048_state *state = fe->demodulator_priv;
573         u8 reg;
574
575         *status = 0;
576
577         reg = tda10048_readreg(state, TDA10048_SYNC_STATUS);
578
579         dprintk(1, "%s() status =0x%02x\n", __func__, reg);
580
581         if (reg & 0x02)
582                 *status |= FE_HAS_CARRIER;
583
584         if (reg & 0x04)
585                 *status |= FE_HAS_SIGNAL;
586
587         if (reg & 0x08) {
588                 *status |= FE_HAS_LOCK;
589                 *status |= FE_HAS_VITERBI;
590                 *status |= FE_HAS_SYNC;
591         }
592
593         return 0;
594 }
595
596 static int tda10048_read_ber(struct dvb_frontend *fe, u32 *ber)
597 {
598         struct tda10048_state *state = fe->demodulator_priv;
599
600         dprintk(1, "%s()\n", __func__);
601
602         /* TODO: A reset may be required here */
603         *ber = tda10048_readreg(state, TDA10048_CBER_MSB) << 8 |
604                 tda10048_readreg(state, TDA10048_CBER_LSB);
605
606         return 0;
607 }
608
609 static int tda10048_read_signal_strength(struct dvb_frontend *fe,
610         u16 *signal_strength)
611 {
612         struct tda10048_state *state = fe->demodulator_priv;
613         u8 v;
614
615         dprintk(1, "%s()\n", __func__);
616
617         *signal_strength = 65535;
618
619         v = tda10048_readreg(state, TDA10048_NP_OUT);
620         if (v > 0)
621                 *signal_strength -= (v << 8) | v;
622
623         return 0;
624 }
625
626 /* SNR lookup table */
627 static struct snr_tab {
628         u8 val;
629         u8 data;
630 } snr_tab[] = {
631         {   0,   0 },
632         {   1, 246 },
633         {   2, 215 },
634         {   3, 198 },
635         {   4, 185 },
636         {   5, 176 },
637         {   6, 168 },
638         {   7, 161 },
639         {   8, 155 },
640         {   9, 150 },
641         {  10, 146 },
642         {  11, 141 },
643         {  12, 138 },
644         {  13, 134 },
645         {  14, 131 },
646         {  15, 128 },
647         {  16, 125 },
648         {  17, 122 },
649         {  18, 120 },
650         {  19, 118 },
651         {  20, 115 },
652         {  21, 113 },
653         {  22, 111 },
654         {  23, 109 },
655         {  24, 107 },
656         {  25, 106 },
657         {  26, 104 },
658         {  27, 102 },
659         {  28, 101 },
660         {  29,  99 },
661         {  30,  98 },
662         {  31,  96 },
663         {  32,  95 },
664         {  33,  94 },
665         {  34,  92 },
666         {  35,  91 },
667         {  36,  90 },
668         {  37,  89 },
669         {  38,  88 },
670         {  39,  86 },
671         {  40,  85 },
672         {  41,  84 },
673         {  42,  83 },
674         {  43,  82 },
675         {  44,  81 },
676         {  45,  80 },
677         {  46,  79 },
678         {  47,  78 },
679         {  48,  77 },
680         {  49,  76 },
681         {  50,  76 },
682         {  51,  75 },
683         {  52,  74 },
684         {  53,  73 },
685         {  54,  72 },
686         {  56,  71 },
687         {  57,  70 },
688         {  58,  69 },
689         {  60,  68 },
690         {  61,  67 },
691         {  63,  66 },
692         {  64,  65 },
693         {  66,  64 },
694         {  67,  63 },
695         {  68,  62 },
696         {  69,  62 },
697         {  70,  61 },
698         {  72,  60 },
699         {  74,  59 },
700         {  75,  58 },
701         {  77,  57 },
702         {  79,  56 },
703         {  81,  55 },
704         {  83,  54 },
705         {  85,  53 },
706         {  87,  52 },
707         {  89,  51 },
708         {  91,  50 },
709         {  93,  49 },
710         {  95,  48 },
711         {  97,  47 },
712         { 100,  46 },
713         { 102,  45 },
714         { 104,  44 },
715         { 107,  43 },
716         { 109,  42 },
717         { 112,  41 },
718         { 114,  40 },
719         { 117,  39 },
720         { 120,  38 },
721         { 123,  37 },
722         { 125,  36 },
723         { 128,  35 },
724         { 131,  34 },
725         { 134,  33 },
726         { 138,  32 },
727         { 141,  31 },
728         { 144,  30 },
729         { 147,  29 },
730         { 151,  28 },
731         { 154,  27 },
732         { 158,  26 },
733         { 162,  25 },
734         { 165,  24 },
735         { 169,  23 },
736         { 173,  22 },
737         { 177,  21 },
738         { 181,  20 },
739         { 186,  19 },
740         { 190,  18 },
741         { 194,  17 },
742         { 199,  16 },
743         { 204,  15 },
744         { 208,  14 },
745         { 213,  13 },
746         { 218,  12 },
747         { 223,  11 },
748         { 229,  10 },
749         { 234,   9 },
750         { 239,   8 },
751         { 245,   7 },
752         { 251,   6 },
753         { 255,   5 },
754 };
755
756 static int tda10048_read_snr(struct dvb_frontend *fe, u16 *snr)
757 {
758         struct tda10048_state *state = fe->demodulator_priv;
759         u8 v;
760         int i, ret = -EINVAL;
761
762         dprintk(1, "%s()\n", __func__);
763
764         v = tda10048_readreg(state, TDA10048_NP_OUT);
765         for (i = 0; i < ARRAY_SIZE(snr_tab); i++) {
766                 if (v <= snr_tab[i].val) {
767                         *snr = snr_tab[i].data;
768                         ret = 0;
769                         break;
770                 }
771         }
772
773         return ret;
774 }
775
776 static int tda10048_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
777 {
778         struct tda10048_state *state = fe->demodulator_priv;
779
780         dprintk(1, "%s()\n", __func__);
781
782         *ucblocks = tda10048_readreg(state, TDA10048_UNCOR_CPT_MSB) << 8 |
783                 tda10048_readreg(state, TDA10048_UNCOR_CPT_LSB);
784
785         return 0;
786 }
787
788 static int tda10048_get_frontend(struct dvb_frontend *fe,
789         struct dvb_frontend_parameters *p)
790 {
791         struct tda10048_state *state = fe->demodulator_priv;
792
793         dprintk(1, "%s()\n", __func__);
794
795         p->inversion = tda10048_readreg(state, TDA10048_CONF_C1_1)
796                 & 0x20 ? INVERSION_ON : INVERSION_OFF;
797
798         return tda10048_get_tps(state, &p->u.ofdm);
799 }
800
801 static int tda10048_get_tune_settings(struct dvb_frontend *fe,
802         struct dvb_frontend_tune_settings *tune)
803 {
804         tune->min_delay_ms = 1000;
805         return 0;
806 }
807
808 static void tda10048_release(struct dvb_frontend *fe)
809 {
810         struct tda10048_state *state = fe->demodulator_priv;
811         dprintk(1, "%s()\n", __func__);
812         kfree(state);
813 }
814
815 static struct dvb_frontend_ops tda10048_ops;
816
817 struct dvb_frontend *tda10048_attach(const struct tda10048_config *config,
818         struct i2c_adapter *i2c)
819 {
820         struct tda10048_state *state = NULL;
821
822         dprintk(1, "%s()\n", __func__);
823
824         /* allocate memory for the internal state */
825         state = kmalloc(sizeof(struct tda10048_state), GFP_KERNEL);
826         if (state == NULL)
827                 goto error;
828
829         /* setup the state */
830         state->config = config;
831         state->i2c = i2c;
832         state->fwloaded = 0;
833
834         /* check if the demod is present */
835         if (tda10048_readreg(state, TDA10048_IDENTITY) != 0x048)
836                 goto error;
837
838         /* create dvb_frontend */
839         memcpy(&state->frontend.ops, &tda10048_ops,
840                 sizeof(struct dvb_frontend_ops));
841         state->frontend.demodulator_priv = state;
842
843         /* Leave the gate closed */
844         tda10048_i2c_gate_ctrl(&state->frontend, 0);
845
846         return &state->frontend;
847
848 error:
849         kfree(state);
850         return NULL;
851 }
852 EXPORT_SYMBOL(tda10048_attach);
853
854 static struct dvb_frontend_ops tda10048_ops = {
855
856         .info = {
857                 .name                   = "NXP TDA10048HN DVB-T",
858                 .type                   = FE_OFDM,
859                 .frequency_min          = 177000000,
860                 .frequency_max          = 858000000,
861                 .frequency_stepsize     = 166666,
862                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
863                 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
864                 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
865                 FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
866                 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
867         },
868
869         .release = tda10048_release,
870         .init = tda10048_init,
871         .i2c_gate_ctrl = tda10048_i2c_gate_ctrl,
872         .set_frontend = tda10048_set_frontend,
873         .get_frontend = tda10048_get_frontend,
874         .get_tune_settings = tda10048_get_tune_settings,
875         .read_status = tda10048_read_status,
876         .read_ber = tda10048_read_ber,
877         .read_signal_strength = tda10048_read_signal_strength,
878         .read_snr = tda10048_read_snr,
879         .read_ucblocks = tda10048_read_ucblocks,
880 };
881
882 module_param(debug, int, 0644);
883 MODULE_PARM_DESC(debug, "Enable verbose debug messages");
884
885 MODULE_DESCRIPTION("NXP TDA10048HN DVB-T Demodulator driver");
886 MODULE_AUTHOR("Steven Toth");
887 MODULE_LICENSE("GPL");