Merge branch 'timers/range-hrtimers' into v28-range-hrtimers-for-linus-v2
[linux-2.6] / drivers / scsi / qla4xxx / ql4_nvram.h
1 /*
2  * QLogic iSCSI HBA Driver
3  * Copyright (c)  2003-2006 QLogic Corporation
4  *
5  * See LICENSE.qla4xxx for copyright and licensing details.
6  */
7
8 #ifndef _QL4XNVRM_H_
9 #define _QL4XNVRM_H_
10
11 /*
12  * AM29LV Flash definitions
13  */
14 #define FM93C56A_SIZE_8  0x100
15 #define FM93C56A_SIZE_16 0x80
16 #define FM93C66A_SIZE_8  0x200
17 #define FM93C66A_SIZE_16 0x100/* 4010 */
18 #define FM93C86A_SIZE_16 0x400/* 4022 */
19
20 #define  FM93C56A_START       0x1
21
22 // Commands
23 #define  FM93C56A_READ        0x2
24 #define  FM93C56A_WEN         0x0
25 #define  FM93C56A_WRITE       0x1
26 #define  FM93C56A_WRITE_ALL   0x0
27 #define  FM93C56A_WDS         0x0
28 #define  FM93C56A_ERASE       0x3
29 #define  FM93C56A_ERASE_ALL   0x0
30
31 /* Command Extentions */
32 #define  FM93C56A_WEN_EXT        0x3
33 #define  FM93C56A_WRITE_ALL_EXT  0x1
34 #define  FM93C56A_WDS_EXT        0x0
35 #define  FM93C56A_ERASE_ALL_EXT  0x2
36
37 /* Address Bits */
38 #define  FM93C56A_NO_ADDR_BITS_16   8   /* 4010 */
39 #define  FM93C56A_NO_ADDR_BITS_8    9   /* 4010 */
40 #define  FM93C86A_NO_ADDR_BITS_16   10  /* 4022 */
41
42 /* Data Bits */
43 #define  FM93C56A_DATA_BITS_16   16
44 #define  FM93C56A_DATA_BITS_8    8
45
46 /* Special Bits */
47 #define  FM93C56A_READ_DUMMY_BITS   1
48 #define  FM93C56A_READY             0
49 #define  FM93C56A_BUSY              1
50 #define  FM93C56A_CMD_BITS          2
51
52 /* Auburn Bits */
53 #define  AUBURN_EEPROM_DI           0x8
54 #define  AUBURN_EEPROM_DI_0         0x0
55 #define  AUBURN_EEPROM_DI_1         0x8
56 #define  AUBURN_EEPROM_DO           0x4
57 #define  AUBURN_EEPROM_DO_0         0x0
58 #define  AUBURN_EEPROM_DO_1         0x4
59 #define  AUBURN_EEPROM_CS           0x2
60 #define  AUBURN_EEPROM_CS_0         0x0
61 #define  AUBURN_EEPROM_CS_1         0x2
62 #define  AUBURN_EEPROM_CLK_RISE     0x1
63 #define  AUBURN_EEPROM_CLK_FALL     0x0
64
65 /* */
66 /* EEPROM format */
67 /* */
68 struct bios_params {
69         uint16_t SpinUpDelay:1;
70         uint16_t BIOSDisable:1;
71         uint16_t MMAPEnable:1;
72         uint16_t BootEnable:1;
73         uint16_t Reserved0:12;
74         uint8_t bootID0:7;
75         uint8_t bootID0Valid:1;
76         uint8_t bootLUN0[8];
77         uint8_t bootID1:7;
78         uint8_t bootID1Valid:1;
79         uint8_t bootLUN1[8];
80         uint16_t MaxLunsPerTarget;
81         uint8_t Reserved1[10];
82 };
83
84 struct eeprom_port_cfg {
85
86         /* MTU MAC 0 */
87         u16 etherMtu_mac;
88
89         /* Flow Control MAC 0 */
90         u16 pauseThreshold_mac;
91         u16 resumeThreshold_mac;
92         u16 reserved[13];
93 };
94
95 struct eeprom_function_cfg {
96         u8 reserved[30];
97
98         /* MAC ADDR */
99         u8 macAddress[6];
100         u8 macAddressSecondary[6];
101         u16 subsysVendorId;
102         u16 subsysDeviceId;
103 };
104
105 struct eeprom_data {
106         union {
107                 struct {        /* isp4010 */
108                         u8 asic_id[4]; /* x00 */
109                         u8 version;     /* x04 */
110                         u8 reserved;    /* x05 */
111                         u16 board_id;   /* x06 */
112 #define   EEPROM_BOARDID_ELDORADO    1
113 #define   EEPROM_BOARDID_PLACER      2
114
115 #define EEPROM_SERIAL_NUM_SIZE       16
116                         u8 serial_number[EEPROM_SERIAL_NUM_SIZE]; /* x08 */
117
118                         /* ExtHwConfig: */
119                         /* Offset = 24bytes
120                          *
121                          * | SSRAM Size|     |ST|PD|SDRAM SZ| W| B| SP  |  |
122                          * |15|14|13|12|11|10| 9| 8| 7| 6| 5| 4| 3| 2| 1| 0|
123                          * +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
124                          */
125                         u16 ext_hw_conf; /* x18 */
126                         u8 mac0[6];     /* x1A */
127                         u8 mac1[6];     /* x20 */
128                         u8 mac2[6];     /* x26 */
129                         u8 mac3[6];     /* x2C */
130                         u16 etherMtu;   /* x32 */
131                         u16 macConfig;  /* x34 */
132 #define  MAC_CONFIG_ENABLE_ANEG     0x0001
133 #define  MAC_CONFIG_ENABLE_PAUSE    0x0002
134                         u16 phyConfig;  /* x36 */
135 #define  PHY_CONFIG_PHY_ADDR_MASK             0x1f
136 #define  PHY_CONFIG_ENABLE_FW_MANAGEMENT_MASK 0x20
137                         u16 reserved_56;        /* x38 */
138
139 #define EEPROM_UNUSED_1_SIZE   2
140                         u8 unused_1[EEPROM_UNUSED_1_SIZE]; /* x3A */
141                         u16 bufletSize; /* x3C */
142                         u16 bufletCount;        /* x3E */
143                         u16 bufletPauseThreshold; /* x40 */
144                         u16 tcpWindowThreshold50; /* x42 */
145                         u16 tcpWindowThreshold25; /* x44 */
146                         u16 tcpWindowThreshold0; /* x46 */
147                         u16 ipHashTableBaseHi;  /* x48 */
148                         u16 ipHashTableBaseLo;  /* x4A */
149                         u16 ipHashTableSize;    /* x4C */
150                         u16 tcpHashTableBaseHi; /* x4E */
151                         u16 tcpHashTableBaseLo; /* x50 */
152                         u16 tcpHashTableSize;   /* x52 */
153                         u16 ncbTableBaseHi;     /* x54 */
154                         u16 ncbTableBaseLo;     /* x56 */
155                         u16 ncbTableSize;       /* x58 */
156                         u16 drbTableBaseHi;     /* x5A */
157                         u16 drbTableBaseLo;     /* x5C */
158                         u16 drbTableSize;       /* x5E */
159
160 #define EEPROM_UNUSED_2_SIZE   4
161                         u8 unused_2[EEPROM_UNUSED_2_SIZE]; /* x60 */
162                         u16 ipReassemblyTimeout; /* x64 */
163                         u16 tcpMaxWindowSizeHi; /* x66 */
164                         u16 tcpMaxWindowSizeLo; /* x68 */
165                         u32 net_ip_addr0;       /* x6A Added for TOE
166                                                  * functionality. */
167                         u32 net_ip_addr1;       /* x6E */
168                         u32 scsi_ip_addr0;      /* x72 */
169                         u32 scsi_ip_addr1;      /* x76 */
170 #define EEPROM_UNUSED_3_SIZE   128      /* changed from 144 to account
171                                          * for ip addresses */
172                         u8 unused_3[EEPROM_UNUSED_3_SIZE]; /* x7A */
173                         u16 subsysVendorId_f0;  /* xFA */
174                         u16 subsysDeviceId_f0;  /* xFC */
175
176                         /* Address = 0x7F */
177 #define FM93C56A_SIGNATURE  0x9356
178 #define FM93C66A_SIGNATURE  0x9366
179                         u16 signature;  /* xFE */
180
181 #define EEPROM_UNUSED_4_SIZE   250
182                         u8 unused_4[EEPROM_UNUSED_4_SIZE]; /* x100 */
183                         u16 subsysVendorId_f1;  /* x1FA */
184                         u16 subsysDeviceId_f1;  /* x1FC */
185                         u16 checksum;   /* x1FE */
186                 } __attribute__ ((packed)) isp4010;
187                 struct {        /* isp4022 */
188                         u8 asicId[4];   /* x00 */
189                         u8 version;     /* x04 */
190                         u8 reserved_5;  /* x05 */
191                         u16 boardId;    /* x06 */
192                         u8 boardIdStr[16];      /* x08 */
193                         u8 serialNumber[16];    /* x18 */
194
195                         /* External Hardware Configuration */
196                         u16 ext_hw_conf;        /* x28 */
197
198                         /* MAC 0 CONFIGURATION */
199                         struct eeprom_port_cfg macCfg_port0; /* x2A */
200
201                         /* MAC 1 CONFIGURATION */
202                         struct eeprom_port_cfg macCfg_port1; /* x4A */
203
204                         /* DDR SDRAM Configuration */
205                         u16 bufletSize; /* x6A */
206                         u16 bufletCount;        /* x6C */
207                         u16 tcpWindowThreshold50; /* x6E */
208                         u16 tcpWindowThreshold25; /* x70 */
209                         u16 tcpWindowThreshold0; /* x72 */
210                         u16 ipHashTableBaseHi;  /* x74 */
211                         u16 ipHashTableBaseLo;  /* x76 */
212                         u16 ipHashTableSize;    /* x78 */
213                         u16 tcpHashTableBaseHi; /* x7A */
214                         u16 tcpHashTableBaseLo; /* x7C */
215                         u16 tcpHashTableSize;   /* x7E */
216                         u16 ncbTableBaseHi;     /* x80 */
217                         u16 ncbTableBaseLo;     /* x82 */
218                         u16 ncbTableSize;       /* x84 */
219                         u16 drbTableBaseHi;     /* x86 */
220                         u16 drbTableBaseLo;     /* x88 */
221                         u16 drbTableSize;       /* x8A */
222                         u16 reserved_142[4];    /* x8C */
223
224                         /* TCP/IP Parameters */
225                         u16 ipReassemblyTimeout; /* x94 */
226                         u16 tcpMaxWindowSize;   /* x96 */
227                         u16 ipSecurity; /* x98 */
228                         u8 reserved_156[294]; /* x9A */
229                         u16 qDebug[8];  /* QLOGIC USE ONLY   x1C0 */
230                         struct eeprom_function_cfg funcCfg_fn0; /* x1D0 */
231                         u16 reserved_510; /* x1FE */
232
233                         /* Address = 512 */
234                         u8 oemSpace[432]; /* x200 */
235                         struct bios_params sBIOSParams_fn1; /* x3B0 */
236                         struct eeprom_function_cfg funcCfg_fn1; /* x3D0 */
237                         u16 reserved_1022; /* x3FE */
238
239                         /* Address = 1024 */
240                         u8 reserved_1024[464];  /* x400 */
241                         struct eeprom_function_cfg funcCfg_fn2; /* x5D0 */
242                         u16 reserved_1534; /* x5FE */
243
244                         /* Address = 1536 */
245                         u8 reserved_1536[432];  /* x600 */
246                         struct bios_params sBIOSParams_fn3; /* x7B0 */
247                         struct eeprom_function_cfg funcCfg_fn3; /* x7D0 */
248                         u16 checksum;   /* x7FE */
249                 } __attribute__ ((packed)) isp4022;
250         };
251 };
252
253
254 #endif  /* _QL4XNVRM_H_ */